| config.ini (9055:38f1926fb599) | config.ini (9096:8971a998190a) |
|---|---|
| 1[root] 2type=Root 3children=system 4full_system=false 5time_sync_enable=false 6time_sync_period=100000000000 7time_sync_spin_threshold=100000000 8 --- 1759 unchanged lines hidden (view full) --- 1768mem_side=system.membus.slave[0] 1769 1770[system.membus] 1771type=CoherentBus 1772block_size=64 1773clock=1000 1774header_cycles=1 1775use_default_range=false | 1[root] 2type=Root 3children=system 4full_system=false 5time_sync_enable=false 6time_sync_period=100000000000 7time_sync_spin_threshold=100000000 8 --- 1759 unchanged lines hidden (view full) --- 1768mem_side=system.membus.slave[0] 1769 1770[system.membus] 1771type=CoherentBus 1772block_size=64 1773clock=1000 1774header_cycles=1 1775use_default_range=false |
| 1776width=64 | 1776width=8 |
| 1777master=system.physmem.port[0] 1778slave=system.l2c.mem_side system.system_port 1779 1780[system.physmem] 1781type=SimpleMemory 1782conf_table_reported=false 1783file= 1784in_addr_map=true --- 5 unchanged lines hidden (view full) --- 1790port=system.membus.master[0] 1791 1792[system.toL2Bus] 1793type=CoherentBus 1794block_size=64 1795clock=1000 1796header_cycles=1 1797use_default_range=false | 1777master=system.physmem.port[0] 1778slave=system.l2c.mem_side system.system_port 1779 1780[system.physmem] 1781type=SimpleMemory 1782conf_table_reported=false 1783file= 1784in_addr_map=true --- 5 unchanged lines hidden (view full) --- 1790port=system.membus.master[0] 1791 1792[system.toL2Bus] 1793type=CoherentBus 1794block_size=64 1795clock=1000 1796header_cycles=1 1797use_default_range=false |
| 1798width=64 | 1798width=8 |
| 1799master=system.l2c.cpu_side 1800slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu1.icache.mem_side system.cpu1.dcache.mem_side system.cpu2.icache.mem_side system.cpu2.dcache.mem_side system.cpu3.icache.mem_side system.cpu3.dcache.mem_side 1801 | 1799master=system.l2c.cpu_side 1800slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu1.icache.mem_side system.cpu1.dcache.mem_side system.cpu2.icache.mem_side system.cpu2.dcache.mem_side system.cpu3.icache.mem_side system.cpu3.dcache.mem_side 1801 |