1[root] 2type=Root 3children=system 4full_system=false 5time_sync_enable=false 6time_sync_period=100000000000 7time_sync_spin_threshold=100000000 8 9[system] 10type=System 11children=cpu0 cpu1 cpu2 cpu3 l2c membus physmem toL2Bus 12boot_osflags=a 13init_param=0 14kernel= 15load_addr_mask=1099511627775 16mem_mode=timing 17memories=system.physmem 18num_work_ids=16 |
19readfile= 20symbolfile= 21work_begin_ckpt_count=0 22work_begin_cpu_id_exit=-1 23work_begin_exit_count=0 24work_cpus_ckpt_count=0 25work_end_ckpt_count=0 26work_end_exit_count=0 27work_item_id=-1 |
28system_port=system.membus.slave[1] |
29 30[system.cpu0] 31type=DerivO3CPU 32children=dcache dtb fuPool icache interrupts itb tracer workload 33BTBEntries=4096 34BTBTagSize=16 35LFSTSize=1024 36LQEntries=32 --- 84 unchanged lines hidden (view full) --- 121wbDepth=1 122wbWidth=8 123workload=system.cpu0.workload 124dcache_port=system.cpu0.dcache.cpu_side 125icache_port=system.cpu0.icache.cpu_side 126 127[system.cpu0.dcache] 128type=BaseCache |
129addr_ranges=0:18446744073709551615 |
130assoc=4 131block_size=64 132forward_snoops=true 133hash_delay=1 134is_top_level=true 135latency=1000 136max_miss_count=0 137mshrs=4 --- 4 unchanged lines hidden (view full) --- 142size=32768 143subblock_size=0 144system=system 145tgts_per_mshr=20 146trace_addr=0 147two_queue=false 148write_buffers=8 149cpu_side=system.cpu0.dcache_port |
150mem_side=system.toL2Bus.slave[1] |
151 152[system.cpu0.dtb] 153type=SparcTLB 154size=64 155 156[system.cpu0.fuPool] 157type=FUPool 158children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8 --- 254 unchanged lines hidden (view full) --- 413[system.cpu0.fuPool.FUList8.opList] 414type=OpDesc 415issueLat=3 416opClass=IprAccess 417opLat=3 418 419[system.cpu0.icache] 420type=BaseCache |
421addr_ranges=0:18446744073709551615 |
422assoc=1 423block_size=64 424forward_snoops=true 425hash_delay=1 426is_top_level=true 427latency=1000 428max_miss_count=0 429mshrs=4 --- 4 unchanged lines hidden (view full) --- 434size=32768 435subblock_size=0 436system=system 437tgts_per_mshr=20 438trace_addr=0 439two_queue=false 440write_buffers=8 441cpu_side=system.cpu0.icache_port |
442mem_side=system.toL2Bus.slave[0] |
443 444[system.cpu0.interrupts] 445type=SparcInterrupts 446 447[system.cpu0.itb] 448type=SparcTLB 449size=64 450 --- 113 unchanged lines hidden (view full) --- 564wbDepth=1 565wbWidth=8 566workload=system.cpu0.workload 567dcache_port=system.cpu1.dcache.cpu_side 568icache_port=system.cpu1.icache.cpu_side 569 570[system.cpu1.dcache] 571type=BaseCache |
572addr_ranges=0:18446744073709551615 |
573assoc=4 574block_size=64 575forward_snoops=true 576hash_delay=1 577is_top_level=true 578latency=1000 579max_miss_count=0 580mshrs=4 --- 4 unchanged lines hidden (view full) --- 585size=32768 586subblock_size=0 587system=system 588tgts_per_mshr=20 589trace_addr=0 590two_queue=false 591write_buffers=8 592cpu_side=system.cpu1.dcache_port |
593mem_side=system.toL2Bus.slave[3] |
594 595[system.cpu1.dtb] 596type=SparcTLB 597size=64 598 599[system.cpu1.fuPool] 600type=FUPool 601children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8 --- 254 unchanged lines hidden (view full) --- 856[system.cpu1.fuPool.FUList8.opList] 857type=OpDesc 858issueLat=3 859opClass=IprAccess 860opLat=3 861 862[system.cpu1.icache] 863type=BaseCache |
864addr_ranges=0:18446744073709551615 |
865assoc=1 866block_size=64 867forward_snoops=true 868hash_delay=1 869is_top_level=true 870latency=1000 871max_miss_count=0 872mshrs=4 --- 4 unchanged lines hidden (view full) --- 877size=32768 878subblock_size=0 879system=system 880tgts_per_mshr=20 881trace_addr=0 882two_queue=false 883write_buffers=8 884cpu_side=system.cpu1.icache_port |
885mem_side=system.toL2Bus.slave[2] |
886 887[system.cpu1.interrupts] 888type=SparcInterrupts 889 890[system.cpu1.itb] 891type=SparcTLB 892size=64 893 --- 94 unchanged lines hidden (view full) --- 988wbDepth=1 989wbWidth=8 990workload=system.cpu0.workload 991dcache_port=system.cpu2.dcache.cpu_side 992icache_port=system.cpu2.icache.cpu_side 993 994[system.cpu2.dcache] 995type=BaseCache |
996addr_ranges=0:18446744073709551615 |
997assoc=4 998block_size=64 999forward_snoops=true 1000hash_delay=1 1001is_top_level=true 1002latency=1000 1003max_miss_count=0 1004mshrs=4 --- 4 unchanged lines hidden (view full) --- 1009size=32768 1010subblock_size=0 1011system=system 1012tgts_per_mshr=20 1013trace_addr=0 1014two_queue=false 1015write_buffers=8 1016cpu_side=system.cpu2.dcache_port |
1017mem_side=system.toL2Bus.slave[5] |
1018 1019[system.cpu2.dtb] 1020type=SparcTLB 1021size=64 1022 1023[system.cpu2.fuPool] 1024type=FUPool 1025children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8 --- 254 unchanged lines hidden (view full) --- 1280[system.cpu2.fuPool.FUList8.opList] 1281type=OpDesc 1282issueLat=3 1283opClass=IprAccess 1284opLat=3 1285 1286[system.cpu2.icache] 1287type=BaseCache |
1288addr_ranges=0:18446744073709551615 |
1289assoc=1 1290block_size=64 1291forward_snoops=true 1292hash_delay=1 1293is_top_level=true 1294latency=1000 1295max_miss_count=0 1296mshrs=4 --- 4 unchanged lines hidden (view full) --- 1301size=32768 1302subblock_size=0 1303system=system 1304tgts_per_mshr=20 1305trace_addr=0 1306two_queue=false 1307write_buffers=8 1308cpu_side=system.cpu2.icache_port |
1309mem_side=system.toL2Bus.slave[4] |
1310 1311[system.cpu2.interrupts] 1312type=SparcInterrupts 1313 1314[system.cpu2.itb] 1315type=SparcTLB 1316size=64 1317 --- 94 unchanged lines hidden (view full) --- 1412wbDepth=1 1413wbWidth=8 1414workload=system.cpu0.workload 1415dcache_port=system.cpu3.dcache.cpu_side 1416icache_port=system.cpu3.icache.cpu_side 1417 1418[system.cpu3.dcache] 1419type=BaseCache |
1420addr_ranges=0:18446744073709551615 |
1421assoc=4 1422block_size=64 1423forward_snoops=true 1424hash_delay=1 1425is_top_level=true 1426latency=1000 1427max_miss_count=0 1428mshrs=4 --- 4 unchanged lines hidden (view full) --- 1433size=32768 1434subblock_size=0 1435system=system 1436tgts_per_mshr=20 1437trace_addr=0 1438two_queue=false 1439write_buffers=8 1440cpu_side=system.cpu3.dcache_port |
1441mem_side=system.toL2Bus.slave[7] |
1442 1443[system.cpu3.dtb] 1444type=SparcTLB 1445size=64 1446 1447[system.cpu3.fuPool] 1448type=FUPool 1449children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8 --- 254 unchanged lines hidden (view full) --- 1704[system.cpu3.fuPool.FUList8.opList] 1705type=OpDesc 1706issueLat=3 1707opClass=IprAccess 1708opLat=3 1709 1710[system.cpu3.icache] 1711type=BaseCache |
1712addr_ranges=0:18446744073709551615 |
1713assoc=1 1714block_size=64 1715forward_snoops=true 1716hash_delay=1 1717is_top_level=true 1718latency=1000 1719max_miss_count=0 1720mshrs=4 --- 4 unchanged lines hidden (view full) --- 1725size=32768 1726subblock_size=0 1727system=system 1728tgts_per_mshr=20 1729trace_addr=0 1730two_queue=false 1731write_buffers=8 1732cpu_side=system.cpu3.icache_port |
1733mem_side=system.toL2Bus.slave[6] |
1734 1735[system.cpu3.interrupts] 1736type=SparcInterrupts 1737 1738[system.cpu3.itb] 1739type=SparcTLB 1740size=64 1741 1742[system.cpu3.tracer] 1743type=ExeTracer 1744 1745[system.l2c] 1746type=BaseCache |
1747addr_ranges=0:18446744073709551615 |
1748assoc=8 1749block_size=64 1750forward_snoops=true 1751hash_delay=1 1752is_top_level=false 1753latency=10000 1754max_miss_count=0 1755mshrs=92 1756prefetch_on_access=false 1757prefetcher=Null 1758prioritizeRequests=false 1759repl=Null 1760size=4194304 1761subblock_size=0 1762system=system 1763tgts_per_mshr=16 1764trace_addr=0 1765two_queue=false 1766write_buffers=8 |
1767cpu_side=system.toL2Bus.master[0] 1768mem_side=system.membus.slave[0] |
1769 1770[system.membus] 1771type=Bus 1772block_size=64 1773bus_id=0 1774clock=1000 1775header_cycles=1 1776use_default_range=false 1777width=64 |
1778master=system.physmem.port[0] 1779slave=system.l2c.mem_side system.system_port |
1780 1781[system.physmem] |
1782type=SimpleMemory 1783conf_table_reported=false |
1784file= |
1785in_addr_map=true |
1786latency=30000 1787latency_var=0 1788null=false 1789range=0:134217727 1790zero=false |
1791port=system.membus.master[0] |
1792 1793[system.toL2Bus] 1794type=Bus 1795block_size=64 1796bus_id=0 1797clock=1000 1798header_cycles=1 1799use_default_range=false 1800width=64 |
1801master=system.l2c.cpu_side 1802slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu1.icache.mem_side system.cpu1.dcache.mem_side system.cpu2.icache.mem_side system.cpu2.dcache.mem_side system.cpu3.icache.mem_side system.cpu3.dcache.mem_side |
1803 |