Cross Reference: /gem5/tests/quick/se/04.gpu/ref/x86/linux/gpu-ruby-GPU

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stats.txt (11308:7d8836fd043d)	stats.txt (11955:1170d039b31e)
1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 0.000314 # Number of seconds simulated 4sim_ticks 314399500 # Number of ticks simulated 5final_tick 314399500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks 7host_inst_rate 59851 # Simulator instruction rate (inst/s) 8host_op_rate 123077 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 280996968 # Simulator tick rate (ticks/s) 10host_mem_usage 1296852 # Number of bytes of host memory used 11host_seconds 1.12 # Real time elapsed on the host 12sim_insts 66963 # Number of instructions simulated 13sim_ops 137705 # Number of ops (including micro ops) simulated 14system.voltage_domain.voltage 1 # Voltage in Volts 15system.clk_domain.clock 1000 # Clock period in ticks 16system.mem_ctrls.bytes_read::ruby.dir_cntrl0 99840 # Number of bytes read from this memory 17system.mem_ctrls.bytes_read::total 99840 # Number of bytes read from this memory 18system.mem_ctrls.num_reads::ruby.dir_cntrl0 1560 # Number of read requests responded to by this memory 19system.mem_ctrls.num_reads::total 1560 # Number of read requests responded to by this memory 20system.mem_ctrls.bw_read::ruby.dir_cntrl0 317557757 # Total read bandwidth from this memory (bytes/s) 21system.mem_ctrls.bw_read::total 317557757 # Total read bandwidth from this memory (bytes/s) 22system.mem_ctrls.bw_total::ruby.dir_cntrl0 317557757 # Total bandwidth to/from this memory (bytes/s) 23system.mem_ctrls.bw_total::total 317557757 # Total bandwidth to/from this memory (bytes/s) 24system.mem_ctrls.readReqs 1560 # Number of read requests accepted 25system.mem_ctrls.writeReqs 0 # Number of write requests accepted 26system.mem_ctrls.readBursts 1560 # Number of DRAM read bursts, including those serviced by the write queue 27system.mem_ctrls.writeBursts 0 # Number of DRAM write bursts, including those merged in the write queue 28system.mem_ctrls.bytesReadDRAM 99840 # Total number of bytes read from DRAM 29system.mem_ctrls.bytesReadWrQ 0 # Total number of bytes read from write queue 30system.mem_ctrls.bytesWritten 0 # Total number of bytes written to DRAM 31system.mem_ctrls.bytesReadSys 99840 # Total read bytes from the system interface side 32system.mem_ctrls.bytesWrittenSys 0 # Total written bytes from the system interface side 33system.mem_ctrls.servicedByWrQ 0 # Number of DRAM read bursts serviced by the write queue 34system.mem_ctrls.mergedWrBursts 0 # Number of DRAM write bursts merged with an existing one 35system.mem_ctrls.neitherReadNorWriteReqs 0 # Number of requests that are neither read nor write 36system.mem_ctrls.perBankRdBursts::0 122 # Per bank write bursts 37system.mem_ctrls.perBankRdBursts::1 192 # Per bank write bursts 38system.mem_ctrls.perBankRdBursts::2 93 # Per bank write bursts 39system.mem_ctrls.perBankRdBursts::3 44 # Per bank write bursts 40system.mem_ctrls.perBankRdBursts::4 61 # Per bank write bursts 41system.mem_ctrls.perBankRdBursts::5 79 # Per bank write bursts 42system.mem_ctrls.perBankRdBursts::6 52 # Per bank write bursts 43system.mem_ctrls.perBankRdBursts::7 42 # Per bank write bursts 44system.mem_ctrls.perBankRdBursts::8 54 # Per bank write bursts 45system.mem_ctrls.perBankRdBursts::9 56 # Per bank write bursts 46system.mem_ctrls.perBankRdBursts::10 182 # Per bank write bursts 47system.mem_ctrls.perBankRdBursts::11 90 # Per bank write bursts 48system.mem_ctrls.perBankRdBursts::12 223 # Per bank write bursts 49system.mem_ctrls.perBankRdBursts::13 125 # Per bank write bursts 50system.mem_ctrls.perBankRdBursts::14 51 # Per bank write bursts 51system.mem_ctrls.perBankRdBursts::15 94 # Per bank write bursts 52system.mem_ctrls.perBankWrBursts::0 0 # Per bank write bursts 53system.mem_ctrls.perBankWrBursts::1 0 # Per bank write bursts 54system.mem_ctrls.perBankWrBursts::2 0 # Per bank write bursts 55system.mem_ctrls.perBankWrBursts::3 0 # Per bank write bursts 56system.mem_ctrls.perBankWrBursts::4 0 # Per bank write bursts 57system.mem_ctrls.perBankWrBursts::5 0 # Per bank write bursts 58system.mem_ctrls.perBankWrBursts::6 0 # Per bank write bursts 59system.mem_ctrls.perBankWrBursts::7 0 # Per bank write bursts 60system.mem_ctrls.perBankWrBursts::8 0 # Per bank write bursts 61system.mem_ctrls.perBankWrBursts::9 0 # Per bank write bursts 62system.mem_ctrls.perBankWrBursts::10 0 # Per bank write bursts 63system.mem_ctrls.perBankWrBursts::11 0 # Per bank write bursts 64system.mem_ctrls.perBankWrBursts::12 0 # Per bank write bursts 65system.mem_ctrls.perBankWrBursts::13 0 # Per bank write bursts 66system.mem_ctrls.perBankWrBursts::14 0 # Per bank write bursts 67system.mem_ctrls.perBankWrBursts::15 0 # Per bank write bursts 68system.mem_ctrls.numRdRetry 0 # Number of times read queue was full causing retry 69system.mem_ctrls.numWrRetry 0 # Number of times write queue was full causing retry 70system.mem_ctrls.totGap 314257000 # Total gap between requests 71system.mem_ctrls.readPktSize::0 0 # Read request sizes (log2) 72system.mem_ctrls.readPktSize::1 0 # Read request sizes (log2) 73system.mem_ctrls.readPktSize::2 0 # Read request sizes (log2) 74system.mem_ctrls.readPktSize::3 0 # Read request sizes (log2) 75system.mem_ctrls.readPktSize::4 0 # Read request sizes (log2) 76system.mem_ctrls.readPktSize::5 0 # Read request sizes (log2) 77system.mem_ctrls.readPktSize::6 1560 # Read request sizes (log2) 78system.mem_ctrls.writePktSize::0 0 # Write request sizes (log2) 79system.mem_ctrls.writePktSize::1 0 # Write request sizes (log2) 80system.mem_ctrls.writePktSize::2 0 # Write request sizes (log2) 81system.mem_ctrls.writePktSize::3 0 # Write request sizes (log2) 82system.mem_ctrls.writePktSize::4 0 # Write request sizes (log2) 83system.mem_ctrls.writePktSize::5 0 # Write request sizes (log2) 84system.mem_ctrls.writePktSize::6 0 # Write request sizes (log2) 85system.mem_ctrls.rdQLenPdf::0 1544 # What read queue length does an incoming req see 86system.mem_ctrls.rdQLenPdf::1 3 # What read queue length does an incoming req see 87system.mem_ctrls.rdQLenPdf::2 2 # What read queue length does an incoming req see 88system.mem_ctrls.rdQLenPdf::3 2 # What read queue length does an incoming req see 89system.mem_ctrls.rdQLenPdf::4 4 # What read queue length does an incoming req see 90system.mem_ctrls.rdQLenPdf::5 3 # What read queue length does an incoming req see 91system.mem_ctrls.rdQLenPdf::6 1 # What read queue length does an incoming req see 92system.mem_ctrls.rdQLenPdf::7 1 # What read queue length does an incoming req see 93system.mem_ctrls.rdQLenPdf::8 0 # What read queue length does an incoming req see 94system.mem_ctrls.rdQLenPdf::9 0 # What read queue length does an incoming req see 95system.mem_ctrls.rdQLenPdf::10 0 # What read queue length does an incoming req see 96system.mem_ctrls.rdQLenPdf::11 0 # What read queue length does an incoming req see 97system.mem_ctrls.rdQLenPdf::12 0 # What read queue length does an incoming req see 98system.mem_ctrls.rdQLenPdf::13 0 # What read queue length does an incoming req see 99system.mem_ctrls.rdQLenPdf::14 0 # What read queue length does an incoming req see 100system.mem_ctrls.rdQLenPdf::15 0 # What read queue length does an incoming req see 101system.mem_ctrls.rdQLenPdf::16 0 # What read queue length does an incoming req see 102system.mem_ctrls.rdQLenPdf::17 0 # What read queue length does an incoming req see 103system.mem_ctrls.rdQLenPdf::18 0 # What read queue length does an incoming req see 104system.mem_ctrls.rdQLenPdf::19 0 # What read queue length does an incoming req see 105system.mem_ctrls.rdQLenPdf::20 0 # What read queue length does an incoming req see 106system.mem_ctrls.rdQLenPdf::21 0 # What read queue length does an incoming req see 107system.mem_ctrls.rdQLenPdf::22 0 # What read queue length does an incoming req see 108system.mem_ctrls.rdQLenPdf::23 0 # What read queue length does an incoming req see 109system.mem_ctrls.rdQLenPdf::24 0 # What read queue length does an incoming req see 110system.mem_ctrls.rdQLenPdf::25 0 # What read queue length does an incoming req see 111system.mem_ctrls.rdQLenPdf::26 0 # What read queue length does an incoming req see 112system.mem_ctrls.rdQLenPdf::27 0 # What read queue length does an incoming req see 113system.mem_ctrls.rdQLenPdf::28 0 # What read queue length does an incoming req see 114system.mem_ctrls.rdQLenPdf::29 0 # What read queue length does an incoming req see 115system.mem_ctrls.rdQLenPdf::30 0 # What read queue length does an incoming req see 116system.mem_ctrls.rdQLenPdf::31 0 # What read queue length does an incoming req see 117system.mem_ctrls.wrQLenPdf::0 0 # What write queue length does an incoming req see 118system.mem_ctrls.wrQLenPdf::1 0 # What write queue length does an incoming req see 119system.mem_ctrls.wrQLenPdf::2 0 # What write queue length does an incoming req see 120system.mem_ctrls.wrQLenPdf::3 0 # What write queue length does an incoming req see 121system.mem_ctrls.wrQLenPdf::4 0 # What write queue length does an incoming req see 122system.mem_ctrls.wrQLenPdf::5 0 # What write queue length does an incoming req see 123system.mem_ctrls.wrQLenPdf::6 0 # What write queue length does an incoming req see 124system.mem_ctrls.wrQLenPdf::7 0 # What write queue length does an incoming req see 125system.mem_ctrls.wrQLenPdf::8 0 # What write queue length does an incoming req see 126system.mem_ctrls.wrQLenPdf::9 0 # What write queue length does an incoming req see 127system.mem_ctrls.wrQLenPdf::10 0 # What write queue length does an incoming req see 128system.mem_ctrls.wrQLenPdf::11 0 # What write queue length does an incoming req see 129system.mem_ctrls.wrQLenPdf::12 0 # What write queue length does an incoming req see 130system.mem_ctrls.wrQLenPdf::13 0 # What write queue length does an incoming req see 131system.mem_ctrls.wrQLenPdf::14 0 # What write queue length does an incoming req see 132system.mem_ctrls.wrQLenPdf::15 0 # What write queue length does an incoming req see 133system.mem_ctrls.wrQLenPdf::16 0 # What write queue length does an incoming req see 134system.mem_ctrls.wrQLenPdf::17 0 # What write queue length does an incoming req see 135system.mem_ctrls.wrQLenPdf::18 0 # What write queue length does an incoming req see 136system.mem_ctrls.wrQLenPdf::19 0 # What write queue length does an incoming req see 137system.mem_ctrls.wrQLenPdf::20 0 # What write queue length does an incoming req see 138system.mem_ctrls.wrQLenPdf::21 0 # What write queue length does an incoming req see 139system.mem_ctrls.wrQLenPdf::22 0 # What write queue length does an incoming req see 140system.mem_ctrls.wrQLenPdf::23 0 # What write queue length does an incoming req see 141system.mem_ctrls.wrQLenPdf::24 0 # What write queue length does an incoming req see 142system.mem_ctrls.wrQLenPdf::25 0 # What write queue length does an incoming req see 143system.mem_ctrls.wrQLenPdf::26 0 # What write queue length does an incoming req see 144system.mem_ctrls.wrQLenPdf::27 0 # What write queue length does an incoming req see 145system.mem_ctrls.wrQLenPdf::28 0 # What write queue length does an incoming req see 146system.mem_ctrls.wrQLenPdf::29 0 # What write queue length does an incoming req see 147system.mem_ctrls.wrQLenPdf::30 0 # What write queue length does an incoming req see 148system.mem_ctrls.wrQLenPdf::31 0 # What write queue length does an incoming req see 149system.mem_ctrls.wrQLenPdf::32 0 # What write queue length does an incoming req see 150system.mem_ctrls.wrQLenPdf::33 0 # What write queue length does an incoming req see 151system.mem_ctrls.wrQLenPdf::34 0 # What write queue length does an incoming req see 152system.mem_ctrls.wrQLenPdf::35 0 # What write queue length does an incoming req see 153system.mem_ctrls.wrQLenPdf::36 0 # What write queue length does an incoming req see 154system.mem_ctrls.wrQLenPdf::37 0 # What write queue length does an incoming req see 155system.mem_ctrls.wrQLenPdf::38 0 # What write queue length does an incoming req see 156system.mem_ctrls.wrQLenPdf::39 0 # What write queue length does an incoming req see 157system.mem_ctrls.wrQLenPdf::40 0 # What write queue length does an incoming req see 158system.mem_ctrls.wrQLenPdf::41 0 # What write queue length does an incoming req see 159system.mem_ctrls.wrQLenPdf::42 0 # What write queue length does an incoming req see 160system.mem_ctrls.wrQLenPdf::43 0 # What write queue length does an incoming req see 161system.mem_ctrls.wrQLenPdf::44 0 # What write queue length does an incoming req see 162system.mem_ctrls.wrQLenPdf::45 0 # What write queue length does an incoming req see 163system.mem_ctrls.wrQLenPdf::46 0 # What write queue length does an incoming req see 164system.mem_ctrls.wrQLenPdf::47 0 # What write queue length does an incoming req see 165system.mem_ctrls.wrQLenPdf::48 0 # What write queue length does an incoming req see 166system.mem_ctrls.wrQLenPdf::49 0 # What write queue length does an incoming req see 167system.mem_ctrls.wrQLenPdf::50 0 # What write queue length does an incoming req see 168system.mem_ctrls.wrQLenPdf::51 0 # What write queue length does an incoming req see 169system.mem_ctrls.wrQLenPdf::52 0 # What write queue length does an incoming req see 170system.mem_ctrls.wrQLenPdf::53 0 # What write queue length does an incoming req see 171system.mem_ctrls.wrQLenPdf::54 0 # What write queue length does an incoming req see 172system.mem_ctrls.wrQLenPdf::55 0 # What write queue length does an incoming req see 173system.mem_ctrls.wrQLenPdf::56 0 # What write queue length does an incoming req see 174system.mem_ctrls.wrQLenPdf::57 0 # What write queue length does an incoming req see 175system.mem_ctrls.wrQLenPdf::58 0 # What write queue length does an incoming req see 176system.mem_ctrls.wrQLenPdf::59 0 # What write queue length does an incoming req see 177system.mem_ctrls.wrQLenPdf::60 0 # What write queue length does an incoming req see 178system.mem_ctrls.wrQLenPdf::61 0 # What write queue length does an incoming req see 179system.mem_ctrls.wrQLenPdf::62 0 # What write queue length does an incoming req see 180system.mem_ctrls.wrQLenPdf::63 0 # What write queue length does an incoming req see 181system.mem_ctrls.bytesPerActivate::samples 398 # Bytes accessed per row activation 182system.mem_ctrls.bytesPerActivate::mean 247.798995 # Bytes accessed per row activation 183system.mem_ctrls.bytesPerActivate::gmean 164.777646 # Bytes accessed per row activation 184system.mem_ctrls.bytesPerActivate::stdev 248.151006 # Bytes accessed per row activation 185system.mem_ctrls.bytesPerActivate::0-127 138 34.67% 34.67% # Bytes accessed per row activation 186system.mem_ctrls.bytesPerActivate::128-255 115 28.89% 63.57% # Bytes accessed per row activation 187system.mem_ctrls.bytesPerActivate::256-383 55 13.82% 77.39% # Bytes accessed per row activation 188system.mem_ctrls.bytesPerActivate::384-511 30 7.54% 84.92% # Bytes accessed per row activation 189system.mem_ctrls.bytesPerActivate::512-639 19 4.77% 89.70% # Bytes accessed per row activation 190system.mem_ctrls.bytesPerActivate::640-767 13 3.27% 92.96% # Bytes accessed per row activation 191system.mem_ctrls.bytesPerActivate::768-895 7 1.76% 94.72% # Bytes accessed per row activation 192system.mem_ctrls.bytesPerActivate::896-1023 7 1.76% 96.48% # Bytes accessed per row activation 193system.mem_ctrls.bytesPerActivate::1024-1151 14 3.52% 100.00% # Bytes accessed per row activation 194system.mem_ctrls.bytesPerActivate::total 398 # Bytes accessed per row activation 195system.mem_ctrls.totQLat 12586250 # Total ticks spent queuing 196system.mem_ctrls.totMemAccLat 41836250 # Total ticks spent from burst creation until serviced by the DRAM 197system.mem_ctrls.totBusLat 7800000 # Total ticks spent in databus transfers 198system.mem_ctrls.avgQLat 8068.11 # Average queueing delay per DRAM burst 199system.mem_ctrls.avgBusLat 5000.00 # Average bus latency per DRAM burst 200system.mem_ctrls.avgMemAccLat 26818.11 # Average memory access latency per DRAM burst 201system.mem_ctrls.avgRdBW 317.56 # Average DRAM read bandwidth in MiByte/s 202system.mem_ctrls.avgWrBW 0.00 # Average achieved write bandwidth in MiByte/s 203system.mem_ctrls.avgRdBWSys 317.56 # Average system read bandwidth in MiByte/s 204system.mem_ctrls.avgWrBWSys 0.00 # Average system write bandwidth in MiByte/s 205system.mem_ctrls.peakBW 12800.00 # Theoretical peak bandwidth in MiByte/s 206system.mem_ctrls.busUtil 2.48 # Data bus utilization in percentage 207system.mem_ctrls.busUtilRead 2.48 # Data bus utilization in percentage for reads 208system.mem_ctrls.busUtilWrite 0.00 # Data bus utilization in percentage for writes 209system.mem_ctrls.avgRdQLen 1.04 # Average read queue length when enqueuing 210system.mem_ctrls.avgWrQLen 0.00 # Average write queue length when enqueuing 211system.mem_ctrls.readRowHits 1157 # Number of row buffer hits during reads 212system.mem_ctrls.writeRowHits 0 # Number of row buffer hits during writes 213system.mem_ctrls.readRowHitRate 74.17 # Row buffer hit rate for reads 214system.mem_ctrls.writeRowHitRate nan # Row buffer hit rate for writes 215system.mem_ctrls.avgGap 201446.79 # Average gap between requests 216system.mem_ctrls.pageHitRate 74.17 # Row buffer hit rate, read and write combined 217system.mem_ctrls_0.actEnergy 1141560 # Energy for activate commands per rank (pJ) 218system.mem_ctrls_0.preEnergy 622875 # Energy for precharge commands per rank (pJ) 219system.mem_ctrls_0.readEnergy 5335200 # Energy for read commands per rank (pJ) 220system.mem_ctrls_0.writeEnergy 0 # Energy for write commands per rank (pJ) 221system.mem_ctrls_0.refreshEnergy 20342400 # Energy for refresh commands per rank (pJ) 222system.mem_ctrls_0.actBackEnergy 179243055 # Energy for active background per rank (pJ) 223system.mem_ctrls_0.preBackEnergy 29795250 # Energy for precharge background per rank (pJ) 224system.mem_ctrls_0.totalEnergy 236480340 # Total energy per rank (pJ) 225system.mem_ctrls_0.averagePower 758.654968 # Core power per rank (mW) 226system.mem_ctrls_0.memoryStateTime::IDLE 51073000 # Time in different power states 227system.mem_ctrls_0.memoryStateTime::REF 10400000 # Time in different power states 228system.mem_ctrls_0.memoryStateTime::PRE_PDN 0 # Time in different power states 229system.mem_ctrls_0.memoryStateTime::ACT 252847000 # Time in different power states 230system.mem_ctrls_0.memoryStateTime::ACT_PDN 0 # Time in different power states 231system.mem_ctrls_1.actEnergy 1867320 # Energy for activate commands per rank (pJ) 232system.mem_ctrls_1.preEnergy 1018875 # Energy for precharge commands per rank (pJ) 233system.mem_ctrls_1.readEnergy 6684600 # Energy for read commands per rank (pJ) 234system.mem_ctrls_1.writeEnergy 0 # Energy for write commands per rank (pJ) 235system.mem_ctrls_1.refreshEnergy 20342400 # Energy for refresh commands per rank (pJ) 236system.mem_ctrls_1.actBackEnergy 198048780 # Energy for active background per rank (pJ) 237system.mem_ctrls_1.preBackEnergy 13299000 # Energy for precharge background per rank (pJ) 238system.mem_ctrls_1.totalEnergy 241260975 # Total energy per rank (pJ) 239system.mem_ctrls_1.averagePower 773.991771 # Core power per rank (mW) 240system.mem_ctrls_1.memoryStateTime::IDLE 20941500 # Time in different power states 241system.mem_ctrls_1.memoryStateTime::REF 10400000 # Time in different power states 242system.mem_ctrls_1.memoryStateTime::PRE_PDN 0 # Time in different power states 243system.mem_ctrls_1.memoryStateTime::ACT 280382250 # Time in different power states 244system.mem_ctrls_1.memoryStateTime::ACT_PDN 0 # Time in different power states 245system.ruby.clk_domain.clock 500 # Clock period in ticks 246system.ruby.phys_mem.bytes_read::cpu0.inst 696760 # Number of bytes read from this memory 247system.ruby.phys_mem.bytes_read::cpu0.data 119832 # Number of bytes read from this memory 248system.ruby.phys_mem.bytes_read::cpu1.CUs0.ComputeUnit 3280 # Number of bytes read from this memory 249system.ruby.phys_mem.bytes_read::cpu1.CUs1.ComputeUnit 3280 # Number of bytes read from this memory 250system.ruby.phys_mem.bytes_read::total 823152 # Number of bytes read from this memory 251system.ruby.phys_mem.bytes_inst_read::cpu0.inst 696760 # Number of instructions bytes read from this memory 252system.ruby.phys_mem.bytes_inst_read::cpu1.CUs0.ComputeUnit 2000 # Number of instructions bytes read from this memory 253system.ruby.phys_mem.bytes_inst_read::cpu1.CUs1.ComputeUnit 2000 # Number of instructions bytes read from this memory 254system.ruby.phys_mem.bytes_inst_read::total 700760 # Number of instructions bytes read from this memory 255system.ruby.phys_mem.bytes_written::cpu0.data 72767 # Number of bytes written to this memory 256system.ruby.phys_mem.bytes_written::cpu1.CUs0.ComputeUnit 256 # Number of bytes written to this memory 257system.ruby.phys_mem.bytes_written::cpu1.CUs1.ComputeUnit 256 # Number of bytes written to this memory 258system.ruby.phys_mem.bytes_written::total 73279 # Number of bytes written to this memory 259system.ruby.phys_mem.num_reads::cpu0.inst 87095 # Number of read requests responded to by this memory 260system.ruby.phys_mem.num_reads::cpu0.data 16686 # Number of read requests responded to by this memory 261system.ruby.phys_mem.num_reads::cpu1.CUs0.ComputeUnit 555 # Number of read requests responded to by this memory 262system.ruby.phys_mem.num_reads::cpu1.CUs1.ComputeUnit 555 # Number of read requests responded to by this memory 263system.ruby.phys_mem.num_reads::total 104891 # Number of read requests responded to by this memory 264system.ruby.phys_mem.num_writes::cpu0.data 10422 # Number of write requests responded to by this memory 265system.ruby.phys_mem.num_writes::cpu1.CUs0.ComputeUnit 256 # Number of write requests responded to by this memory 266system.ruby.phys_mem.num_writes::cpu1.CUs1.ComputeUnit 256 # Number of write requests responded to by this memory 267system.ruby.phys_mem.num_writes::total 10934 # Number of write requests responded to by this memory 268system.ruby.phys_mem.bw_read::cpu0.inst 2216161285 # Total read bandwidth from this memory (bytes/s) 269system.ruby.phys_mem.bw_read::cpu0.data 381145644 # Total read bandwidth from this memory (bytes/s) 270system.ruby.phys_mem.bw_read::cpu1.CUs0.ComputeUnit 10432587 # Total read bandwidth from this memory (bytes/s) 271system.ruby.phys_mem.bw_read::cpu1.CUs1.ComputeUnit 10432587 # Total read bandwidth from this memory (bytes/s) 272system.ruby.phys_mem.bw_read::total 2618172103 # Total read bandwidth from this memory (bytes/s) 273system.ruby.phys_mem.bw_inst_read::cpu0.inst 2216161285 # Instruction read bandwidth from this memory (bytes/s) 274system.ruby.phys_mem.bw_inst_read::cpu1.CUs0.ComputeUnit 6361333 # Instruction read bandwidth from this memory (bytes/s) 275system.ruby.phys_mem.bw_inst_read::cpu1.CUs1.ComputeUnit 6361333 # Instruction read bandwidth from this memory (bytes/s) 276system.ruby.phys_mem.bw_inst_read::total 2228883952 # Instruction read bandwidth from this memory (bytes/s) 277system.ruby.phys_mem.bw_write::cpu0.data 231447569 # Write bandwidth from this memory (bytes/s) 278system.ruby.phys_mem.bw_write::cpu1.CUs0.ComputeUnit 814251 # Write bandwidth from this memory (bytes/s) 279system.ruby.phys_mem.bw_write::cpu1.CUs1.ComputeUnit 814251 # Write bandwidth from this memory (bytes/s) 280system.ruby.phys_mem.bw_write::total 233076070 # Write bandwidth from this memory (bytes/s) 281system.ruby.phys_mem.bw_total::cpu0.inst 2216161285 # Total bandwidth to/from this memory (bytes/s) 282system.ruby.phys_mem.bw_total::cpu0.data 612593213 # Total bandwidth to/from this memory (bytes/s) 283system.ruby.phys_mem.bw_total::cpu1.CUs0.ComputeUnit 11246837 # Total bandwidth to/from this memory (bytes/s) 284system.ruby.phys_mem.bw_total::cpu1.CUs1.ComputeUnit 11246837 # Total bandwidth to/from this memory (bytes/s) 285system.ruby.phys_mem.bw_total::total 2851248173 # Total bandwidth to/from this memory (bytes/s) 286system.cpu0.clk_domain.clock 500 # Clock period in ticks 287system.cpu0.apic_clk_domain.clock 8000 # Clock period in ticks	1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 0.000314 # Number of seconds simulated 4sim_ticks 314399500 # Number of ticks simulated 5final_tick 314399500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks 7host_inst_rate 59851 # Simulator instruction rate (inst/s) 8host_op_rate 123077 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 280996968 # Simulator tick rate (ticks/s) 10host_mem_usage 1296852 # Number of bytes of host memory used 11host_seconds 1.12 # Real time elapsed on the host 12sim_insts 66963 # Number of instructions simulated 13sim_ops 137705 # Number of ops (including micro ops) simulated 14system.voltage_domain.voltage 1 # Voltage in Volts 15system.clk_domain.clock 1000 # Clock period in ticks 16system.mem_ctrls.bytes_read::ruby.dir_cntrl0 99840 # Number of bytes read from this memory 17system.mem_ctrls.bytes_read::total 99840 # Number of bytes read from this memory 18system.mem_ctrls.num_reads::ruby.dir_cntrl0 1560 # Number of read requests responded to by this memory 19system.mem_ctrls.num_reads::total 1560 # Number of read requests responded to by this memory 20system.mem_ctrls.bw_read::ruby.dir_cntrl0 317557757 # Total read bandwidth from this memory (bytes/s) 21system.mem_ctrls.bw_read::total 317557757 # Total read bandwidth from this memory (bytes/s) 22system.mem_ctrls.bw_total::ruby.dir_cntrl0 317557757 # Total bandwidth to/from this memory (bytes/s) 23system.mem_ctrls.bw_total::total 317557757 # Total bandwidth to/from this memory (bytes/s) 24system.mem_ctrls.readReqs 1560 # Number of read requests accepted 25system.mem_ctrls.writeReqs 0 # Number of write requests accepted 26system.mem_ctrls.readBursts 1560 # Number of DRAM read bursts, including those serviced by the write queue 27system.mem_ctrls.writeBursts 0 # Number of DRAM write bursts, including those merged in the write queue 28system.mem_ctrls.bytesReadDRAM 99840 # Total number of bytes read from DRAM 29system.mem_ctrls.bytesReadWrQ 0 # Total number of bytes read from write queue 30system.mem_ctrls.bytesWritten 0 # Total number of bytes written to DRAM 31system.mem_ctrls.bytesReadSys 99840 # Total read bytes from the system interface side 32system.mem_ctrls.bytesWrittenSys 0 # Total written bytes from the system interface side 33system.mem_ctrls.servicedByWrQ 0 # Number of DRAM read bursts serviced by the write queue 34system.mem_ctrls.mergedWrBursts 0 # Number of DRAM write bursts merged with an existing one 35system.mem_ctrls.neitherReadNorWriteReqs 0 # Number of requests that are neither read nor write 36system.mem_ctrls.perBankRdBursts::0 122 # Per bank write bursts 37system.mem_ctrls.perBankRdBursts::1 192 # Per bank write bursts 38system.mem_ctrls.perBankRdBursts::2 93 # Per bank write bursts 39system.mem_ctrls.perBankRdBursts::3 44 # Per bank write bursts 40system.mem_ctrls.perBankRdBursts::4 61 # Per bank write bursts 41system.mem_ctrls.perBankRdBursts::5 79 # Per bank write bursts 42system.mem_ctrls.perBankRdBursts::6 52 # Per bank write bursts 43system.mem_ctrls.perBankRdBursts::7 42 # Per bank write bursts 44system.mem_ctrls.perBankRdBursts::8 54 # Per bank write bursts 45system.mem_ctrls.perBankRdBursts::9 56 # Per bank write bursts 46system.mem_ctrls.perBankRdBursts::10 182 # Per bank write bursts 47system.mem_ctrls.perBankRdBursts::11 90 # Per bank write bursts 48system.mem_ctrls.perBankRdBursts::12 223 # Per bank write bursts 49system.mem_ctrls.perBankRdBursts::13 125 # Per bank write bursts 50system.mem_ctrls.perBankRdBursts::14 51 # Per bank write bursts 51system.mem_ctrls.perBankRdBursts::15 94 # Per bank write bursts 52system.mem_ctrls.perBankWrBursts::0 0 # Per bank write bursts 53system.mem_ctrls.perBankWrBursts::1 0 # Per bank write bursts 54system.mem_ctrls.perBankWrBursts::2 0 # Per bank write bursts 55system.mem_ctrls.perBankWrBursts::3 0 # Per bank write bursts 56system.mem_ctrls.perBankWrBursts::4 0 # Per bank write bursts 57system.mem_ctrls.perBankWrBursts::5 0 # Per bank write bursts 58system.mem_ctrls.perBankWrBursts::6 0 # Per bank write bursts 59system.mem_ctrls.perBankWrBursts::7 0 # Per bank write bursts 60system.mem_ctrls.perBankWrBursts::8 0 # Per bank write bursts 61system.mem_ctrls.perBankWrBursts::9 0 # Per bank write bursts 62system.mem_ctrls.perBankWrBursts::10 0 # Per bank write bursts 63system.mem_ctrls.perBankWrBursts::11 0 # Per bank write bursts 64system.mem_ctrls.perBankWrBursts::12 0 # Per bank write bursts 65system.mem_ctrls.perBankWrBursts::13 0 # Per bank write bursts 66system.mem_ctrls.perBankWrBursts::14 0 # Per bank write bursts 67system.mem_ctrls.perBankWrBursts::15 0 # Per bank write bursts 68system.mem_ctrls.numRdRetry 0 # Number of times read queue was full causing retry 69system.mem_ctrls.numWrRetry 0 # Number of times write queue was full causing retry 70system.mem_ctrls.totGap 314257000 # Total gap between requests 71system.mem_ctrls.readPktSize::0 0 # Read request sizes (log2) 72system.mem_ctrls.readPktSize::1 0 # Read request sizes (log2) 73system.mem_ctrls.readPktSize::2 0 # Read request sizes (log2) 74system.mem_ctrls.readPktSize::3 0 # Read request sizes (log2) 75system.mem_ctrls.readPktSize::4 0 # Read request sizes (log2) 76system.mem_ctrls.readPktSize::5 0 # Read request sizes (log2) 77system.mem_ctrls.readPktSize::6 1560 # Read request sizes (log2) 78system.mem_ctrls.writePktSize::0 0 # Write request sizes (log2) 79system.mem_ctrls.writePktSize::1 0 # Write request sizes (log2) 80system.mem_ctrls.writePktSize::2 0 # Write request sizes (log2) 81system.mem_ctrls.writePktSize::3 0 # Write request sizes (log2) 82system.mem_ctrls.writePktSize::4 0 # Write request sizes (log2) 83system.mem_ctrls.writePktSize::5 0 # Write request sizes (log2) 84system.mem_ctrls.writePktSize::6 0 # Write request sizes (log2) 85system.mem_ctrls.rdQLenPdf::0 1544 # What read queue length does an incoming req see 86system.mem_ctrls.rdQLenPdf::1 3 # What read queue length does an incoming req see 87system.mem_ctrls.rdQLenPdf::2 2 # What read queue length does an incoming req see 88system.mem_ctrls.rdQLenPdf::3 2 # What read queue length does an incoming req see 89system.mem_ctrls.rdQLenPdf::4 4 # What read queue length does an incoming req see 90system.mem_ctrls.rdQLenPdf::5 3 # What read queue length does an incoming req see 91system.mem_ctrls.rdQLenPdf::6 1 # What read queue length does an incoming req see 92system.mem_ctrls.rdQLenPdf::7 1 # What read queue length does an incoming req see 93system.mem_ctrls.rdQLenPdf::8 0 # What read queue length does an incoming req see 94system.mem_ctrls.rdQLenPdf::9 0 # What read queue length does an incoming req see 95system.mem_ctrls.rdQLenPdf::10 0 # What read queue length does an incoming req see 96system.mem_ctrls.rdQLenPdf::11 0 # What read queue length does an incoming req see 97system.mem_ctrls.rdQLenPdf::12 0 # What read queue length does an incoming req see 98system.mem_ctrls.rdQLenPdf::13 0 # What read queue length does an incoming req see 99system.mem_ctrls.rdQLenPdf::14 0 # What read queue length does an incoming req see 100system.mem_ctrls.rdQLenPdf::15 0 # What read queue length does an incoming req see 101system.mem_ctrls.rdQLenPdf::16 0 # What read queue length does an incoming req see 102system.mem_ctrls.rdQLenPdf::17 0 # What read queue length does an incoming req see 103system.mem_ctrls.rdQLenPdf::18 0 # What read queue length does an incoming req see 104system.mem_ctrls.rdQLenPdf::19 0 # What read queue length does an incoming req see 105system.mem_ctrls.rdQLenPdf::20 0 # What read queue length does an incoming req see 106system.mem_ctrls.rdQLenPdf::21 0 # What read queue length does an incoming req see 107system.mem_ctrls.rdQLenPdf::22 0 # What read queue length does an incoming req see 108system.mem_ctrls.rdQLenPdf::23 0 # What read queue length does an incoming req see 109system.mem_ctrls.rdQLenPdf::24 0 # What read queue length does an incoming req see 110system.mem_ctrls.rdQLenPdf::25 0 # What read queue length does an incoming req see 111system.mem_ctrls.rdQLenPdf::26 0 # What read queue length does an incoming req see 112system.mem_ctrls.rdQLenPdf::27 0 # What read queue length does an incoming req see 113system.mem_ctrls.rdQLenPdf::28 0 # What read queue length does an incoming req see 114system.mem_ctrls.rdQLenPdf::29 0 # What read queue length does an incoming req see 115system.mem_ctrls.rdQLenPdf::30 0 # What read queue length does an incoming req see 116system.mem_ctrls.rdQLenPdf::31 0 # What read queue length does an incoming req see 117system.mem_ctrls.wrQLenPdf::0 0 # What write queue length does an incoming req see 118system.mem_ctrls.wrQLenPdf::1 0 # What write queue length does an incoming req see 119system.mem_ctrls.wrQLenPdf::2 0 # What write queue length does an incoming req see 120system.mem_ctrls.wrQLenPdf::3 0 # What write queue length does an incoming req see 121system.mem_ctrls.wrQLenPdf::4 0 # What write queue length does an incoming req see 122system.mem_ctrls.wrQLenPdf::5 0 # What write queue length does an incoming req see 123system.mem_ctrls.wrQLenPdf::6 0 # What write queue length does an incoming req see 124system.mem_ctrls.wrQLenPdf::7 0 # What write queue length does an incoming req see 125system.mem_ctrls.wrQLenPdf::8 0 # What write queue length does an incoming req see 126system.mem_ctrls.wrQLenPdf::9 0 # What write queue length does an incoming req see 127system.mem_ctrls.wrQLenPdf::10 0 # What write queue length does an incoming req see 128system.mem_ctrls.wrQLenPdf::11 0 # What write queue length does an incoming req see 129system.mem_ctrls.wrQLenPdf::12 0 # What write queue length does an incoming req see 130system.mem_ctrls.wrQLenPdf::13 0 # What write queue length does an incoming req see 131system.mem_ctrls.wrQLenPdf::14 0 # What write queue length does an incoming req see 132system.mem_ctrls.wrQLenPdf::15 0 # What write queue length does an incoming req see 133system.mem_ctrls.wrQLenPdf::16 0 # What write queue length does an incoming req see 134system.mem_ctrls.wrQLenPdf::17 0 # What write queue length does an incoming req see 135system.mem_ctrls.wrQLenPdf::18 0 # What write queue length does an incoming req see 136system.mem_ctrls.wrQLenPdf::19 0 # What write queue length does an incoming req see 137system.mem_ctrls.wrQLenPdf::20 0 # What write queue length does an incoming req see 138system.mem_ctrls.wrQLenPdf::21 0 # What write queue length does an incoming req see 139system.mem_ctrls.wrQLenPdf::22 0 # What write queue length does an incoming req see 140system.mem_ctrls.wrQLenPdf::23 0 # What write queue length does an incoming req see 141system.mem_ctrls.wrQLenPdf::24 0 # What write queue length does an incoming req see 142system.mem_ctrls.wrQLenPdf::25 0 # What write queue length does an incoming req see 143system.mem_ctrls.wrQLenPdf::26 0 # What write queue length does an incoming req see 144system.mem_ctrls.wrQLenPdf::27 0 # What write queue length does an incoming req see 145system.mem_ctrls.wrQLenPdf::28 0 # What write queue length does an incoming req see 146system.mem_ctrls.wrQLenPdf::29 0 # What write queue length does an incoming req see 147system.mem_ctrls.wrQLenPdf::30 0 # What write queue length does an incoming req see 148system.mem_ctrls.wrQLenPdf::31 0 # What write queue length does an incoming req see 149system.mem_ctrls.wrQLenPdf::32 0 # What write queue length does an incoming req see 150system.mem_ctrls.wrQLenPdf::33 0 # What write queue length does an incoming req see 151system.mem_ctrls.wrQLenPdf::34 0 # What write queue length does an incoming req see 152system.mem_ctrls.wrQLenPdf::35 0 # What write queue length does an incoming req see 153system.mem_ctrls.wrQLenPdf::36 0 # What write queue length does an incoming req see 154system.mem_ctrls.wrQLenPdf::37 0 # What write queue length does an incoming req see 155system.mem_ctrls.wrQLenPdf::38 0 # What write queue length does an incoming req see 156system.mem_ctrls.wrQLenPdf::39 0 # What write queue length does an incoming req see 157system.mem_ctrls.wrQLenPdf::40 0 # What write queue length does an incoming req see 158system.mem_ctrls.wrQLenPdf::41 0 # What write queue length does an incoming req see 159system.mem_ctrls.wrQLenPdf::42 0 # What write queue length does an incoming req see 160system.mem_ctrls.wrQLenPdf::43 0 # What write queue length does an incoming req see 161system.mem_ctrls.wrQLenPdf::44 0 # What write queue length does an incoming req see 162system.mem_ctrls.wrQLenPdf::45 0 # What write queue length does an incoming req see 163system.mem_ctrls.wrQLenPdf::46 0 # What write queue length does an incoming req see 164system.mem_ctrls.wrQLenPdf::47 0 # What write queue length does an incoming req see 165system.mem_ctrls.wrQLenPdf::48 0 # What write queue length does an incoming req see 166system.mem_ctrls.wrQLenPdf::49 0 # What write queue length does an incoming req see 167system.mem_ctrls.wrQLenPdf::50 0 # What write queue length does an incoming req see 168system.mem_ctrls.wrQLenPdf::51 0 # What write queue length does an incoming req see 169system.mem_ctrls.wrQLenPdf::52 0 # What write queue length does an incoming req see 170system.mem_ctrls.wrQLenPdf::53 0 # What write queue length does an incoming req see 171system.mem_ctrls.wrQLenPdf::54 0 # What write queue length does an incoming req see 172system.mem_ctrls.wrQLenPdf::55 0 # What write queue length does an incoming req see 173system.mem_ctrls.wrQLenPdf::56 0 # What write queue length does an incoming req see 174system.mem_ctrls.wrQLenPdf::57 0 # What write queue length does an incoming req see 175system.mem_ctrls.wrQLenPdf::58 0 # What write queue length does an incoming req see 176system.mem_ctrls.wrQLenPdf::59 0 # What write queue length does an incoming req see 177system.mem_ctrls.wrQLenPdf::60 0 # What write queue length does an incoming req see 178system.mem_ctrls.wrQLenPdf::61 0 # What write queue length does an incoming req see 179system.mem_ctrls.wrQLenPdf::62 0 # What write queue length does an incoming req see 180system.mem_ctrls.wrQLenPdf::63 0 # What write queue length does an incoming req see 181system.mem_ctrls.bytesPerActivate::samples 398 # Bytes accessed per row activation 182system.mem_ctrls.bytesPerActivate::mean 247.798995 # Bytes accessed per row activation 183system.mem_ctrls.bytesPerActivate::gmean 164.777646 # Bytes accessed per row activation 184system.mem_ctrls.bytesPerActivate::stdev 248.151006 # Bytes accessed per row activation 185system.mem_ctrls.bytesPerActivate::0-127 138 34.67% 34.67% # Bytes accessed per row activation 186system.mem_ctrls.bytesPerActivate::128-255 115 28.89% 63.57% # Bytes accessed per row activation 187system.mem_ctrls.bytesPerActivate::256-383 55 13.82% 77.39% # Bytes accessed per row activation 188system.mem_ctrls.bytesPerActivate::384-511 30 7.54% 84.92% # Bytes accessed per row activation 189system.mem_ctrls.bytesPerActivate::512-639 19 4.77% 89.70% # Bytes accessed per row activation 190system.mem_ctrls.bytesPerActivate::640-767 13 3.27% 92.96% # Bytes accessed per row activation 191system.mem_ctrls.bytesPerActivate::768-895 7 1.76% 94.72% # Bytes accessed per row activation 192system.mem_ctrls.bytesPerActivate::896-1023 7 1.76% 96.48% # Bytes accessed per row activation 193system.mem_ctrls.bytesPerActivate::1024-1151 14 3.52% 100.00% # Bytes accessed per row activation 194system.mem_ctrls.bytesPerActivate::total 398 # Bytes accessed per row activation 195system.mem_ctrls.totQLat 12586250 # Total ticks spent queuing 196system.mem_ctrls.totMemAccLat 41836250 # Total ticks spent from burst creation until serviced by the DRAM 197system.mem_ctrls.totBusLat 7800000 # Total ticks spent in databus transfers 198system.mem_ctrls.avgQLat 8068.11 # Average queueing delay per DRAM burst 199system.mem_ctrls.avgBusLat 5000.00 # Average bus latency per DRAM burst 200system.mem_ctrls.avgMemAccLat 26818.11 # Average memory access latency per DRAM burst 201system.mem_ctrls.avgRdBW 317.56 # Average DRAM read bandwidth in MiByte/s 202system.mem_ctrls.avgWrBW 0.00 # Average achieved write bandwidth in MiByte/s 203system.mem_ctrls.avgRdBWSys 317.56 # Average system read bandwidth in MiByte/s 204system.mem_ctrls.avgWrBWSys 0.00 # Average system write bandwidth in MiByte/s 205system.mem_ctrls.peakBW 12800.00 # Theoretical peak bandwidth in MiByte/s 206system.mem_ctrls.busUtil 2.48 # Data bus utilization in percentage 207system.mem_ctrls.busUtilRead 2.48 # Data bus utilization in percentage for reads 208system.mem_ctrls.busUtilWrite 0.00 # Data bus utilization in percentage for writes 209system.mem_ctrls.avgRdQLen 1.04 # Average read queue length when enqueuing 210system.mem_ctrls.avgWrQLen 0.00 # Average write queue length when enqueuing 211system.mem_ctrls.readRowHits 1157 # Number of row buffer hits during reads 212system.mem_ctrls.writeRowHits 0 # Number of row buffer hits during writes 213system.mem_ctrls.readRowHitRate 74.17 # Row buffer hit rate for reads 214system.mem_ctrls.writeRowHitRate nan # Row buffer hit rate for writes 215system.mem_ctrls.avgGap 201446.79 # Average gap between requests 216system.mem_ctrls.pageHitRate 74.17 # Row buffer hit rate, read and write combined 217system.mem_ctrls_0.actEnergy 1141560 # Energy for activate commands per rank (pJ) 218system.mem_ctrls_0.preEnergy 622875 # Energy for precharge commands per rank (pJ) 219system.mem_ctrls_0.readEnergy 5335200 # Energy for read commands per rank (pJ) 220system.mem_ctrls_0.writeEnergy 0 # Energy for write commands per rank (pJ) 221system.mem_ctrls_0.refreshEnergy 20342400 # Energy for refresh commands per rank (pJ) 222system.mem_ctrls_0.actBackEnergy 179243055 # Energy for active background per rank (pJ) 223system.mem_ctrls_0.preBackEnergy 29795250 # Energy for precharge background per rank (pJ) 224system.mem_ctrls_0.totalEnergy 236480340 # Total energy per rank (pJ) 225system.mem_ctrls_0.averagePower 758.654968 # Core power per rank (mW) 226system.mem_ctrls_0.memoryStateTime::IDLE 51073000 # Time in different power states 227system.mem_ctrls_0.memoryStateTime::REF 10400000 # Time in different power states 228system.mem_ctrls_0.memoryStateTime::PRE_PDN 0 # Time in different power states 229system.mem_ctrls_0.memoryStateTime::ACT 252847000 # Time in different power states 230system.mem_ctrls_0.memoryStateTime::ACT_PDN 0 # Time in different power states 231system.mem_ctrls_1.actEnergy 1867320 # Energy for activate commands per rank (pJ) 232system.mem_ctrls_1.preEnergy 1018875 # Energy for precharge commands per rank (pJ) 233system.mem_ctrls_1.readEnergy 6684600 # Energy for read commands per rank (pJ) 234system.mem_ctrls_1.writeEnergy 0 # Energy for write commands per rank (pJ) 235system.mem_ctrls_1.refreshEnergy 20342400 # Energy for refresh commands per rank (pJ) 236system.mem_ctrls_1.actBackEnergy 198048780 # Energy for active background per rank (pJ) 237system.mem_ctrls_1.preBackEnergy 13299000 # Energy for precharge background per rank (pJ) 238system.mem_ctrls_1.totalEnergy 241260975 # Total energy per rank (pJ) 239system.mem_ctrls_1.averagePower 773.991771 # Core power per rank (mW) 240system.mem_ctrls_1.memoryStateTime::IDLE 20941500 # Time in different power states 241system.mem_ctrls_1.memoryStateTime::REF 10400000 # Time in different power states 242system.mem_ctrls_1.memoryStateTime::PRE_PDN 0 # Time in different power states 243system.mem_ctrls_1.memoryStateTime::ACT 280382250 # Time in different power states 244system.mem_ctrls_1.memoryStateTime::ACT_PDN 0 # Time in different power states 245system.ruby.clk_domain.clock 500 # Clock period in ticks 246system.ruby.phys_mem.bytes_read::cpu0.inst 696760 # Number of bytes read from this memory 247system.ruby.phys_mem.bytes_read::cpu0.data 119832 # Number of bytes read from this memory 248system.ruby.phys_mem.bytes_read::cpu1.CUs0.ComputeUnit 3280 # Number of bytes read from this memory 249system.ruby.phys_mem.bytes_read::cpu1.CUs1.ComputeUnit 3280 # Number of bytes read from this memory 250system.ruby.phys_mem.bytes_read::total 823152 # Number of bytes read from this memory 251system.ruby.phys_mem.bytes_inst_read::cpu0.inst 696760 # Number of instructions bytes read from this memory 252system.ruby.phys_mem.bytes_inst_read::cpu1.CUs0.ComputeUnit 2000 # Number of instructions bytes read from this memory 253system.ruby.phys_mem.bytes_inst_read::cpu1.CUs1.ComputeUnit 2000 # Number of instructions bytes read from this memory 254system.ruby.phys_mem.bytes_inst_read::total 700760 # Number of instructions bytes read from this memory 255system.ruby.phys_mem.bytes_written::cpu0.data 72767 # Number of bytes written to this memory 256system.ruby.phys_mem.bytes_written::cpu1.CUs0.ComputeUnit 256 # Number of bytes written to this memory 257system.ruby.phys_mem.bytes_written::cpu1.CUs1.ComputeUnit 256 # Number of bytes written to this memory 258system.ruby.phys_mem.bytes_written::total 73279 # Number of bytes written to this memory 259system.ruby.phys_mem.num_reads::cpu0.inst 87095 # Number of read requests responded to by this memory 260system.ruby.phys_mem.num_reads::cpu0.data 16686 # Number of read requests responded to by this memory 261system.ruby.phys_mem.num_reads::cpu1.CUs0.ComputeUnit 555 # Number of read requests responded to by this memory 262system.ruby.phys_mem.num_reads::cpu1.CUs1.ComputeUnit 555 # Number of read requests responded to by this memory 263system.ruby.phys_mem.num_reads::total 104891 # Number of read requests responded to by this memory 264system.ruby.phys_mem.num_writes::cpu0.data 10422 # Number of write requests responded to by this memory 265system.ruby.phys_mem.num_writes::cpu1.CUs0.ComputeUnit 256 # Number of write requests responded to by this memory 266system.ruby.phys_mem.num_writes::cpu1.CUs1.ComputeUnit 256 # Number of write requests responded to by this memory 267system.ruby.phys_mem.num_writes::total 10934 # Number of write requests responded to by this memory 268system.ruby.phys_mem.bw_read::cpu0.inst 2216161285 # Total read bandwidth from this memory (bytes/s) 269system.ruby.phys_mem.bw_read::cpu0.data 381145644 # Total read bandwidth from this memory (bytes/s) 270system.ruby.phys_mem.bw_read::cpu1.CUs0.ComputeUnit 10432587 # Total read bandwidth from this memory (bytes/s) 271system.ruby.phys_mem.bw_read::cpu1.CUs1.ComputeUnit 10432587 # Total read bandwidth from this memory (bytes/s) 272system.ruby.phys_mem.bw_read::total 2618172103 # Total read bandwidth from this memory (bytes/s) 273system.ruby.phys_mem.bw_inst_read::cpu0.inst 2216161285 # Instruction read bandwidth from this memory (bytes/s) 274system.ruby.phys_mem.bw_inst_read::cpu1.CUs0.ComputeUnit 6361333 # Instruction read bandwidth from this memory (bytes/s) 275system.ruby.phys_mem.bw_inst_read::cpu1.CUs1.ComputeUnit 6361333 # Instruction read bandwidth from this memory (bytes/s) 276system.ruby.phys_mem.bw_inst_read::total 2228883952 # Instruction read bandwidth from this memory (bytes/s) 277system.ruby.phys_mem.bw_write::cpu0.data 231447569 # Write bandwidth from this memory (bytes/s) 278system.ruby.phys_mem.bw_write::cpu1.CUs0.ComputeUnit 814251 # Write bandwidth from this memory (bytes/s) 279system.ruby.phys_mem.bw_write::cpu1.CUs1.ComputeUnit 814251 # Write bandwidth from this memory (bytes/s) 280system.ruby.phys_mem.bw_write::total 233076070 # Write bandwidth from this memory (bytes/s) 281system.ruby.phys_mem.bw_total::cpu0.inst 2216161285 # Total bandwidth to/from this memory (bytes/s) 282system.ruby.phys_mem.bw_total::cpu0.data 612593213 # Total bandwidth to/from this memory (bytes/s) 283system.ruby.phys_mem.bw_total::cpu1.CUs0.ComputeUnit 11246837 # Total bandwidth to/from this memory (bytes/s) 284system.ruby.phys_mem.bw_total::cpu1.CUs1.ComputeUnit 11246837 # Total bandwidth to/from this memory (bytes/s) 285system.ruby.phys_mem.bw_total::total 2851248173 # Total bandwidth to/from this memory (bytes/s) 286system.cpu0.clk_domain.clock 500 # Clock period in ticks 287system.cpu0.apic_clk_domain.clock 8000 # Clock period in ticks
288system.cpu0.workload.num_syscalls 21 # Number of system calls	288system.cpu0.workload.numSyscalls 21 # Number of system calls
289system.cpu0.numCycles 628799 # number of cpu cycles simulated 290system.cpu0.numWorkItemsStarted 0 # number of work items this cpu started 291system.cpu0.numWorkItemsCompleted 0 # number of work items this cpu completed 292system.cpu0.committedInsts 66963 # Number of instructions committed 293system.cpu0.committedOps 137705 # Number of ops (including micro ops) committed 294system.cpu0.num_int_alu_accesses 136380 # Number of integer alu accesses 295system.cpu0.num_fp_alu_accesses 1279 # Number of float alu accesses 296system.cpu0.num_func_calls 3196 # number of times a function call or return occured 297system.cpu0.num_conditional_control_insts 12151 # number of instructions that are conditional controls 298system.cpu0.num_int_insts 136380 # number of integer instructions 299system.cpu0.num_fp_insts 1279 # number of float instructions 300system.cpu0.num_int_register_reads 257490 # number of times the integer registers were read 301system.cpu0.num_int_register_writes 110039 # number of times the integer registers were written 302system.cpu0.num_fp_register_reads 1981 # number of times the floating registers were read 303system.cpu0.num_fp_register_writes 981 # number of times the floating registers were written 304system.cpu0.num_cc_register_reads 78262 # number of times the CC registers were read 305system.cpu0.num_cc_register_writes 42183 # number of times the CC registers were written 306system.cpu0.num_mem_refs 27198 # number of memory refs 307system.cpu0.num_load_insts 16684 # Number of load instructions 308system.cpu0.num_store_insts 10514 # Number of store instructions 309system.cpu0.num_idle_cycles 8671.003972 # Number of idle cycles 310system.cpu0.num_busy_cycles 620127.996028 # Number of busy cycles 311system.cpu0.not_idle_fraction 0.986210 # Percentage of non-idle cycles 312system.cpu0.idle_fraction 0.013790 # Percentage of idle cycles 313system.cpu0.Branches 16199 # Number of branches fetched 314system.cpu0.op_class::No_OpClass 615 0.45% 0.45% # Class of executed instruction 315system.cpu0.op_class::IntAlu 108791 79.00% 79.45% # Class of executed instruction 316system.cpu0.op_class::IntMult 13 0.01% 79.46% # Class of executed instruction 317system.cpu0.op_class::IntDiv 138 0.10% 79.56% # Class of executed instruction 318system.cpu0.op_class::FloatAdd 950 0.69% 80.25% # Class of executed instruction 319system.cpu0.op_class::FloatCmp 0 0.00% 80.25% # Class of executed instruction 320system.cpu0.op_class::FloatCvt 0 0.00% 80.25% # Class of executed instruction 321system.cpu0.op_class::FloatMult 0 0.00% 80.25% # Class of executed instruction 322system.cpu0.op_class::FloatDiv 0 0.00% 80.25% # Class of executed instruction 323system.cpu0.op_class::FloatSqrt 0 0.00% 80.25% # Class of executed instruction 324system.cpu0.op_class::SimdAdd 0 0.00% 80.25% # Class of executed instruction 325system.cpu0.op_class::SimdAddAcc 0 0.00% 80.25% # Class of executed instruction 326system.cpu0.op_class::SimdAlu 0 0.00% 80.25% # Class of executed instruction 327system.cpu0.op_class::SimdCmp 0 0.00% 80.25% # Class of executed instruction 328system.cpu0.op_class::SimdCvt 0 0.00% 80.25% # Class of executed instruction 329system.cpu0.op_class::SimdMisc 0 0.00% 80.25% # Class of executed instruction 330system.cpu0.op_class::SimdMult 0 0.00% 80.25% # Class of executed instruction 331system.cpu0.op_class::SimdMultAcc 0 0.00% 80.25% # Class of executed instruction 332system.cpu0.op_class::SimdShift 0 0.00% 80.25% # Class of executed instruction 333system.cpu0.op_class::SimdShiftAcc 0 0.00% 80.25% # Class of executed instruction 334system.cpu0.op_class::SimdSqrt 0 0.00% 80.25% # Class of executed instruction 335system.cpu0.op_class::SimdFloatAdd 0 0.00% 80.25% # Class of executed instruction 336system.cpu0.op_class::SimdFloatAlu 0 0.00% 80.25% # Class of executed instruction 337system.cpu0.op_class::SimdFloatCmp 0 0.00% 80.25% # Class of executed instruction 338system.cpu0.op_class::SimdFloatCvt 0 0.00% 80.25% # Class of executed instruction 339system.cpu0.op_class::SimdFloatDiv 0 0.00% 80.25% # Class of executed instruction 340system.cpu0.op_class::SimdFloatMisc 0 0.00% 80.25% # Class of executed instruction 341system.cpu0.op_class::SimdFloatMult 0 0.00% 80.25% # Class of executed instruction 342system.cpu0.op_class::SimdFloatMultAcc 0 0.00% 80.25% # Class of executed instruction 343system.cpu0.op_class::SimdFloatSqrt 0 0.00% 80.25% # Class of executed instruction 344system.cpu0.op_class::MemRead 16684 12.12% 92.36% # Class of executed instruction 345system.cpu0.op_class::MemWrite 10514 7.64% 100.00% # Class of executed instruction 346system.cpu0.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction 347system.cpu0.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction 348system.cpu0.op_class::total 137705 # Class of executed instruction 349system.cpu1.clk_domain.voltage_domain.voltage 1 # Voltage in Volts 350system.cpu1.clk_domain.clock 1000 # Clock period in ticks 351system.cpu1.CUs0.wavefronts00.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 352system.cpu1.CUs0.wavefronts00.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 353system.cpu1.CUs0.wavefronts00.timesBlockedDueRAWDependencies 216 # number of times the wf's instructions are blocked due to RAW dependencies 354system.cpu1.CUs0.wavefronts00.src_reg_operand_dist::samples 39 # number of executed instructions with N source register operands 355system.cpu1.CUs0.wavefronts00.src_reg_operand_dist::mean 0.794872 # number of executed instructions with N source register operands 356system.cpu1.CUs0.wavefronts00.src_reg_operand_dist::stdev 0.863880 # number of executed instructions with N source register operands 357system.cpu1.CUs0.wavefronts00.src_reg_operand_dist::underflows 0 0.00% 0.00% # number of executed instructions with N source register operands 358system.cpu1.CUs0.wavefronts00.src_reg_operand_dist::0-1 28 71.79% 71.79% # number of executed instructions with N source register operands 359system.cpu1.CUs0.wavefronts00.src_reg_operand_dist::2-3 11 28.21% 100.00% # number of executed instructions with N source register operands 360system.cpu1.CUs0.wavefronts00.src_reg_operand_dist::4 0 0.00% 100.00% # number of executed instructions with N source register operands 361system.cpu1.CUs0.wavefronts00.src_reg_operand_dist::overflows 0 0.00% 100.00% # number of executed instructions with N source register operands 362system.cpu1.CUs0.wavefronts00.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 363system.cpu1.CUs0.wavefronts00.src_reg_operand_dist::max_value 2 # number of executed instructions with N source register operands 364system.cpu1.CUs0.wavefronts00.src_reg_operand_dist::total 39 # number of executed instructions with N source register operands 365system.cpu1.CUs0.wavefronts00.dst_reg_operand_dist::samples 39 # number of executed instructions with N destination register operands 366system.cpu1.CUs0.wavefronts00.dst_reg_operand_dist::mean 0.589744 # number of executed instructions with N destination register operands 367system.cpu1.CUs0.wavefronts00.dst_reg_operand_dist::stdev 0.498310 # number of executed instructions with N destination register operands 368system.cpu1.CUs0.wavefronts00.dst_reg_operand_dist::underflows 0 0.00% 0.00% # number of executed instructions with N destination register operands 369system.cpu1.CUs0.wavefronts00.dst_reg_operand_dist::0-1 39 100.00% 100.00% # number of executed instructions with N destination register operands 370system.cpu1.CUs0.wavefronts00.dst_reg_operand_dist::2-3 0 0.00% 100.00% # number of executed instructions with N destination register operands 371system.cpu1.CUs0.wavefronts00.dst_reg_operand_dist::overflows 0 0.00% 100.00% # number of executed instructions with N destination register operands 372system.cpu1.CUs0.wavefronts00.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 373system.cpu1.CUs0.wavefronts00.dst_reg_operand_dist::max_value 1 # number of executed instructions with N destination register operands 374system.cpu1.CUs0.wavefronts00.dst_reg_operand_dist::total 39 # number of executed instructions with N destination register operands 375system.cpu1.CUs0.wavefronts01.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 376system.cpu1.CUs0.wavefronts01.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 377system.cpu1.CUs0.wavefronts01.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 378system.cpu1.CUs0.wavefronts01.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 379system.cpu1.CUs0.wavefronts01.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 380system.cpu1.CUs0.wavefronts01.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 381system.cpu1.CUs0.wavefronts01.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 382system.cpu1.CUs0.wavefronts01.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 383system.cpu1.CUs0.wavefronts01.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 384system.cpu1.CUs0.wavefronts01.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 385system.cpu1.CUs0.wavefronts01.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 386system.cpu1.CUs0.wavefronts01.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 387system.cpu1.CUs0.wavefronts01.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 388system.cpu1.CUs0.wavefronts01.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 389system.cpu1.CUs0.wavefronts01.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 390system.cpu1.CUs0.wavefronts01.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 391system.cpu1.CUs0.wavefronts01.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 392system.cpu1.CUs0.wavefronts01.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 393system.cpu1.CUs0.wavefronts01.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 394system.cpu1.CUs0.wavefronts01.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 395system.cpu1.CUs0.wavefronts01.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 396system.cpu1.CUs0.wavefronts01.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 397system.cpu1.CUs0.wavefronts01.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 398system.cpu1.CUs0.wavefronts01.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 399system.cpu1.CUs0.wavefronts02.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 400system.cpu1.CUs0.wavefronts02.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 401system.cpu1.CUs0.wavefronts02.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 402system.cpu1.CUs0.wavefronts02.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 403system.cpu1.CUs0.wavefronts02.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 404system.cpu1.CUs0.wavefronts02.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 405system.cpu1.CUs0.wavefronts02.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 406system.cpu1.CUs0.wavefronts02.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 407system.cpu1.CUs0.wavefronts02.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 408system.cpu1.CUs0.wavefronts02.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 409system.cpu1.CUs0.wavefronts02.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 410system.cpu1.CUs0.wavefronts02.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 411system.cpu1.CUs0.wavefronts02.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 412system.cpu1.CUs0.wavefronts02.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 413system.cpu1.CUs0.wavefronts02.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 414system.cpu1.CUs0.wavefronts02.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 415system.cpu1.CUs0.wavefronts02.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 416system.cpu1.CUs0.wavefronts02.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 417system.cpu1.CUs0.wavefronts02.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 418system.cpu1.CUs0.wavefronts02.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 419system.cpu1.CUs0.wavefronts02.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 420system.cpu1.CUs0.wavefronts02.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 421system.cpu1.CUs0.wavefronts02.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 422system.cpu1.CUs0.wavefronts02.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 423system.cpu1.CUs0.wavefronts03.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 424system.cpu1.CUs0.wavefronts03.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 425system.cpu1.CUs0.wavefronts03.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 426system.cpu1.CUs0.wavefronts03.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 427system.cpu1.CUs0.wavefronts03.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 428system.cpu1.CUs0.wavefronts03.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 429system.cpu1.CUs0.wavefronts03.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 430system.cpu1.CUs0.wavefronts03.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 431system.cpu1.CUs0.wavefronts03.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 432system.cpu1.CUs0.wavefronts03.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 433system.cpu1.CUs0.wavefronts03.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 434system.cpu1.CUs0.wavefronts03.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 435system.cpu1.CUs0.wavefronts03.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 436system.cpu1.CUs0.wavefronts03.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 437system.cpu1.CUs0.wavefronts03.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 438system.cpu1.CUs0.wavefronts03.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 439system.cpu1.CUs0.wavefronts03.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 440system.cpu1.CUs0.wavefronts03.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 441system.cpu1.CUs0.wavefronts03.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 442system.cpu1.CUs0.wavefronts03.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 443system.cpu1.CUs0.wavefronts03.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 444system.cpu1.CUs0.wavefronts03.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 445system.cpu1.CUs0.wavefronts03.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 446system.cpu1.CUs0.wavefronts03.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 447system.cpu1.CUs0.wavefronts04.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 448system.cpu1.CUs0.wavefronts04.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 449system.cpu1.CUs0.wavefronts04.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 450system.cpu1.CUs0.wavefronts04.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 451system.cpu1.CUs0.wavefronts04.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 452system.cpu1.CUs0.wavefronts04.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 453system.cpu1.CUs0.wavefronts04.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 454system.cpu1.CUs0.wavefronts04.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 455system.cpu1.CUs0.wavefronts04.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 456system.cpu1.CUs0.wavefronts04.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 457system.cpu1.CUs0.wavefronts04.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 458system.cpu1.CUs0.wavefronts04.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 459system.cpu1.CUs0.wavefronts04.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 460system.cpu1.CUs0.wavefronts04.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 461system.cpu1.CUs0.wavefronts04.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 462system.cpu1.CUs0.wavefronts04.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 463system.cpu1.CUs0.wavefronts04.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 464system.cpu1.CUs0.wavefronts04.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 465system.cpu1.CUs0.wavefronts04.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 466system.cpu1.CUs0.wavefronts04.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 467system.cpu1.CUs0.wavefronts04.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 468system.cpu1.CUs0.wavefronts04.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 469system.cpu1.CUs0.wavefronts04.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 470system.cpu1.CUs0.wavefronts04.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 471system.cpu1.CUs0.wavefronts05.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 472system.cpu1.CUs0.wavefronts05.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 473system.cpu1.CUs0.wavefronts05.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 474system.cpu1.CUs0.wavefronts05.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 475system.cpu1.CUs0.wavefronts05.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 476system.cpu1.CUs0.wavefronts05.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 477system.cpu1.CUs0.wavefronts05.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 478system.cpu1.CUs0.wavefronts05.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 479system.cpu1.CUs0.wavefronts05.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 480system.cpu1.CUs0.wavefronts05.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 481system.cpu1.CUs0.wavefronts05.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 482system.cpu1.CUs0.wavefronts05.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 483system.cpu1.CUs0.wavefronts05.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 484system.cpu1.CUs0.wavefronts05.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 485system.cpu1.CUs0.wavefronts05.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 486system.cpu1.CUs0.wavefronts05.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 487system.cpu1.CUs0.wavefronts05.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 488system.cpu1.CUs0.wavefronts05.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 489system.cpu1.CUs0.wavefronts05.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 490system.cpu1.CUs0.wavefronts05.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 491system.cpu1.CUs0.wavefronts05.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 492system.cpu1.CUs0.wavefronts05.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 493system.cpu1.CUs0.wavefronts05.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 494system.cpu1.CUs0.wavefronts05.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 495system.cpu1.CUs0.wavefronts06.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 496system.cpu1.CUs0.wavefronts06.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 497system.cpu1.CUs0.wavefronts06.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 498system.cpu1.CUs0.wavefronts06.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 499system.cpu1.CUs0.wavefronts06.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 500system.cpu1.CUs0.wavefronts06.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 501system.cpu1.CUs0.wavefronts06.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 502system.cpu1.CUs0.wavefronts06.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 503system.cpu1.CUs0.wavefronts06.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 504system.cpu1.CUs0.wavefronts06.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 505system.cpu1.CUs0.wavefronts06.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 506system.cpu1.CUs0.wavefronts06.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 507system.cpu1.CUs0.wavefronts06.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 508system.cpu1.CUs0.wavefronts06.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 509system.cpu1.CUs0.wavefronts06.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 510system.cpu1.CUs0.wavefronts06.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 511system.cpu1.CUs0.wavefronts06.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 512system.cpu1.CUs0.wavefronts06.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 513system.cpu1.CUs0.wavefronts06.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 514system.cpu1.CUs0.wavefronts06.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 515system.cpu1.CUs0.wavefronts06.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 516system.cpu1.CUs0.wavefronts06.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 517system.cpu1.CUs0.wavefronts06.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 518system.cpu1.CUs0.wavefronts06.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 519system.cpu1.CUs0.wavefronts07.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 520system.cpu1.CUs0.wavefronts07.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 521system.cpu1.CUs0.wavefronts07.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 522system.cpu1.CUs0.wavefronts07.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 523system.cpu1.CUs0.wavefronts07.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 524system.cpu1.CUs0.wavefronts07.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 525system.cpu1.CUs0.wavefronts07.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 526system.cpu1.CUs0.wavefronts07.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 527system.cpu1.CUs0.wavefronts07.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 528system.cpu1.CUs0.wavefronts07.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 529system.cpu1.CUs0.wavefronts07.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 530system.cpu1.CUs0.wavefronts07.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 531system.cpu1.CUs0.wavefronts07.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 532system.cpu1.CUs0.wavefronts07.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 533system.cpu1.CUs0.wavefronts07.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 534system.cpu1.CUs0.wavefronts07.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 535system.cpu1.CUs0.wavefronts07.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 536system.cpu1.CUs0.wavefronts07.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 537system.cpu1.CUs0.wavefronts07.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 538system.cpu1.CUs0.wavefronts07.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 539system.cpu1.CUs0.wavefronts07.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 540system.cpu1.CUs0.wavefronts07.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 541system.cpu1.CUs0.wavefronts07.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 542system.cpu1.CUs0.wavefronts07.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 543system.cpu1.CUs0.wavefronts08.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 544system.cpu1.CUs0.wavefronts08.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 545system.cpu1.CUs0.wavefronts08.timesBlockedDueRAWDependencies 195 # number of times the wf's instructions are blocked due to RAW dependencies 546system.cpu1.CUs0.wavefronts08.src_reg_operand_dist::samples 34 # number of executed instructions with N source register operands 547system.cpu1.CUs0.wavefronts08.src_reg_operand_dist::mean 0.852941 # number of executed instructions with N source register operands 548system.cpu1.CUs0.wavefronts08.src_reg_operand_dist::stdev 0.857493 # number of executed instructions with N source register operands 549system.cpu1.CUs0.wavefronts08.src_reg_operand_dist::underflows 0 0.00% 0.00% # number of executed instructions with N source register operands 550system.cpu1.CUs0.wavefronts08.src_reg_operand_dist::0-1 24 70.59% 70.59% # number of executed instructions with N source register operands 551system.cpu1.CUs0.wavefronts08.src_reg_operand_dist::2-3 10 29.41% 100.00% # number of executed instructions with N source register operands 552system.cpu1.CUs0.wavefronts08.src_reg_operand_dist::4 0 0.00% 100.00% # number of executed instructions with N source register operands 553system.cpu1.CUs0.wavefronts08.src_reg_operand_dist::overflows 0 0.00% 100.00% # number of executed instructions with N source register operands 554system.cpu1.CUs0.wavefronts08.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 555system.cpu1.CUs0.wavefronts08.src_reg_operand_dist::max_value 2 # number of executed instructions with N source register operands 556system.cpu1.CUs0.wavefronts08.src_reg_operand_dist::total 34 # number of executed instructions with N source register operands 557system.cpu1.CUs0.wavefronts08.dst_reg_operand_dist::samples 34 # number of executed instructions with N destination register operands 558system.cpu1.CUs0.wavefronts08.dst_reg_operand_dist::mean 0.617647 # number of executed instructions with N destination register operands 559system.cpu1.CUs0.wavefronts08.dst_reg_operand_dist::stdev 0.493270 # number of executed instructions with N destination register operands 560system.cpu1.CUs0.wavefronts08.dst_reg_operand_dist::underflows 0 0.00% 0.00% # number of executed instructions with N destination register operands 561system.cpu1.CUs0.wavefronts08.dst_reg_operand_dist::0-1 34 100.00% 100.00% # number of executed instructions with N destination register operands 562system.cpu1.CUs0.wavefronts08.dst_reg_operand_dist::2-3 0 0.00% 100.00% # number of executed instructions with N destination register operands 563system.cpu1.CUs0.wavefronts08.dst_reg_operand_dist::overflows 0 0.00% 100.00% # number of executed instructions with N destination register operands 564system.cpu1.CUs0.wavefronts08.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 565system.cpu1.CUs0.wavefronts08.dst_reg_operand_dist::max_value 1 # number of executed instructions with N destination register operands 566system.cpu1.CUs0.wavefronts08.dst_reg_operand_dist::total 34 # number of executed instructions with N destination register operands 567system.cpu1.CUs0.wavefronts09.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 568system.cpu1.CUs0.wavefronts09.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 569system.cpu1.CUs0.wavefronts09.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 570system.cpu1.CUs0.wavefronts09.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 571system.cpu1.CUs0.wavefronts09.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 572system.cpu1.CUs0.wavefronts09.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 573system.cpu1.CUs0.wavefronts09.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 574system.cpu1.CUs0.wavefronts09.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 575system.cpu1.CUs0.wavefronts09.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 576system.cpu1.CUs0.wavefronts09.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 577system.cpu1.CUs0.wavefronts09.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 578system.cpu1.CUs0.wavefronts09.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 579system.cpu1.CUs0.wavefronts09.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 580system.cpu1.CUs0.wavefronts09.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 581system.cpu1.CUs0.wavefronts09.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 582system.cpu1.CUs0.wavefronts09.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 583system.cpu1.CUs0.wavefronts09.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 584system.cpu1.CUs0.wavefronts09.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 585system.cpu1.CUs0.wavefronts09.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 586system.cpu1.CUs0.wavefronts09.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 587system.cpu1.CUs0.wavefronts09.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 588system.cpu1.CUs0.wavefronts09.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 589system.cpu1.CUs0.wavefronts09.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 590system.cpu1.CUs0.wavefronts09.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 591system.cpu1.CUs0.wavefronts10.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 592system.cpu1.CUs0.wavefronts10.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 593system.cpu1.CUs0.wavefronts10.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 594system.cpu1.CUs0.wavefronts10.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 595system.cpu1.CUs0.wavefronts10.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 596system.cpu1.CUs0.wavefronts10.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 597system.cpu1.CUs0.wavefronts10.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 598system.cpu1.CUs0.wavefronts10.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 599system.cpu1.CUs0.wavefronts10.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 600system.cpu1.CUs0.wavefronts10.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 601system.cpu1.CUs0.wavefronts10.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 602system.cpu1.CUs0.wavefronts10.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 603system.cpu1.CUs0.wavefronts10.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 604system.cpu1.CUs0.wavefronts10.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 605system.cpu1.CUs0.wavefronts10.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 606system.cpu1.CUs0.wavefronts10.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 607system.cpu1.CUs0.wavefronts10.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 608system.cpu1.CUs0.wavefronts10.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 609system.cpu1.CUs0.wavefronts10.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 610system.cpu1.CUs0.wavefronts10.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 611system.cpu1.CUs0.wavefronts10.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 612system.cpu1.CUs0.wavefronts10.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 613system.cpu1.CUs0.wavefronts10.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 614system.cpu1.CUs0.wavefronts10.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 615system.cpu1.CUs0.wavefronts11.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 616system.cpu1.CUs0.wavefronts11.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 617system.cpu1.CUs0.wavefronts11.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 618system.cpu1.CUs0.wavefronts11.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 619system.cpu1.CUs0.wavefronts11.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 620system.cpu1.CUs0.wavefronts11.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 621system.cpu1.CUs0.wavefronts11.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 622system.cpu1.CUs0.wavefronts11.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 623system.cpu1.CUs0.wavefronts11.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 624system.cpu1.CUs0.wavefronts11.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 625system.cpu1.CUs0.wavefronts11.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 626system.cpu1.CUs0.wavefronts11.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 627system.cpu1.CUs0.wavefronts11.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 628system.cpu1.CUs0.wavefronts11.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 629system.cpu1.CUs0.wavefronts11.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 630system.cpu1.CUs0.wavefronts11.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 631system.cpu1.CUs0.wavefronts11.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 632system.cpu1.CUs0.wavefronts11.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 633system.cpu1.CUs0.wavefronts11.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 634system.cpu1.CUs0.wavefronts11.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 635system.cpu1.CUs0.wavefronts11.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 636system.cpu1.CUs0.wavefronts11.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 637system.cpu1.CUs0.wavefronts11.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 638system.cpu1.CUs0.wavefronts11.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 639system.cpu1.CUs0.wavefronts12.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 640system.cpu1.CUs0.wavefronts12.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 641system.cpu1.CUs0.wavefronts12.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 642system.cpu1.CUs0.wavefronts12.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 643system.cpu1.CUs0.wavefronts12.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 644system.cpu1.CUs0.wavefronts12.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 645system.cpu1.CUs0.wavefronts12.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 646system.cpu1.CUs0.wavefronts12.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 647system.cpu1.CUs0.wavefronts12.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 648system.cpu1.CUs0.wavefronts12.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 649system.cpu1.CUs0.wavefronts12.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 650system.cpu1.CUs0.wavefronts12.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 651system.cpu1.CUs0.wavefronts12.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 652system.cpu1.CUs0.wavefronts12.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 653system.cpu1.CUs0.wavefronts12.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 654system.cpu1.CUs0.wavefronts12.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 655system.cpu1.CUs0.wavefronts12.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 656system.cpu1.CUs0.wavefronts12.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 657system.cpu1.CUs0.wavefronts12.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 658system.cpu1.CUs0.wavefronts12.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 659system.cpu1.CUs0.wavefronts12.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 660system.cpu1.CUs0.wavefronts12.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 661system.cpu1.CUs0.wavefronts12.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 662system.cpu1.CUs0.wavefronts12.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 663system.cpu1.CUs0.wavefronts13.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 664system.cpu1.CUs0.wavefronts13.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 665system.cpu1.CUs0.wavefronts13.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 666system.cpu1.CUs0.wavefronts13.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 667system.cpu1.CUs0.wavefronts13.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 668system.cpu1.CUs0.wavefronts13.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 669system.cpu1.CUs0.wavefronts13.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 670system.cpu1.CUs0.wavefronts13.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 671system.cpu1.CUs0.wavefronts13.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 672system.cpu1.CUs0.wavefronts13.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 673system.cpu1.CUs0.wavefronts13.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 674system.cpu1.CUs0.wavefronts13.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 675system.cpu1.CUs0.wavefronts13.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 676system.cpu1.CUs0.wavefronts13.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 677system.cpu1.CUs0.wavefronts13.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 678system.cpu1.CUs0.wavefronts13.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 679system.cpu1.CUs0.wavefronts13.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 680system.cpu1.CUs0.wavefronts13.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 681system.cpu1.CUs0.wavefronts13.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 682system.cpu1.CUs0.wavefronts13.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 683system.cpu1.CUs0.wavefronts13.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 684system.cpu1.CUs0.wavefronts13.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 685system.cpu1.CUs0.wavefronts13.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 686system.cpu1.CUs0.wavefronts13.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 687system.cpu1.CUs0.wavefronts14.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 688system.cpu1.CUs0.wavefronts14.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 689system.cpu1.CUs0.wavefronts14.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 690system.cpu1.CUs0.wavefronts14.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 691system.cpu1.CUs0.wavefronts14.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 692system.cpu1.CUs0.wavefronts14.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 693system.cpu1.CUs0.wavefronts14.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 694system.cpu1.CUs0.wavefronts14.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 695system.cpu1.CUs0.wavefronts14.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 696system.cpu1.CUs0.wavefronts14.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 697system.cpu1.CUs0.wavefronts14.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 698system.cpu1.CUs0.wavefronts14.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 699system.cpu1.CUs0.wavefronts14.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 700system.cpu1.CUs0.wavefronts14.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 701system.cpu1.CUs0.wavefronts14.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 702system.cpu1.CUs0.wavefronts14.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 703system.cpu1.CUs0.wavefronts14.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 704system.cpu1.CUs0.wavefronts14.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 705system.cpu1.CUs0.wavefronts14.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 706system.cpu1.CUs0.wavefronts14.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 707system.cpu1.CUs0.wavefronts14.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 708system.cpu1.CUs0.wavefronts14.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 709system.cpu1.CUs0.wavefronts14.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 710system.cpu1.CUs0.wavefronts14.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 711system.cpu1.CUs0.wavefronts15.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 712system.cpu1.CUs0.wavefronts15.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 713system.cpu1.CUs0.wavefronts15.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 714system.cpu1.CUs0.wavefronts15.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 715system.cpu1.CUs0.wavefronts15.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 716system.cpu1.CUs0.wavefronts15.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 717system.cpu1.CUs0.wavefronts15.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 718system.cpu1.CUs0.wavefronts15.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 719system.cpu1.CUs0.wavefronts15.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 720system.cpu1.CUs0.wavefronts15.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 721system.cpu1.CUs0.wavefronts15.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 722system.cpu1.CUs0.wavefronts15.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 723system.cpu1.CUs0.wavefronts15.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 724system.cpu1.CUs0.wavefronts15.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 725system.cpu1.CUs0.wavefronts15.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 726system.cpu1.CUs0.wavefronts15.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 727system.cpu1.CUs0.wavefronts15.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 728system.cpu1.CUs0.wavefronts15.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 729system.cpu1.CUs0.wavefronts15.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 730system.cpu1.CUs0.wavefronts15.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 731system.cpu1.CUs0.wavefronts15.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 732system.cpu1.CUs0.wavefronts15.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 733system.cpu1.CUs0.wavefronts15.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 734system.cpu1.CUs0.wavefronts15.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 735system.cpu1.CUs0.wavefronts16.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 736system.cpu1.CUs0.wavefronts16.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 737system.cpu1.CUs0.wavefronts16.timesBlockedDueRAWDependencies 194 # number of times the wf's instructions are blocked due to RAW dependencies 738system.cpu1.CUs0.wavefronts16.src_reg_operand_dist::samples 34 # number of executed instructions with N source register operands 739system.cpu1.CUs0.wavefronts16.src_reg_operand_dist::mean 0.852941 # number of executed instructions with N source register operands 740system.cpu1.CUs0.wavefronts16.src_reg_operand_dist::stdev 0.857493 # number of executed instructions with N source register operands 741system.cpu1.CUs0.wavefronts16.src_reg_operand_dist::underflows 0 0.00% 0.00% # number of executed instructions with N source register operands 742system.cpu1.CUs0.wavefronts16.src_reg_operand_dist::0-1 24 70.59% 70.59% # number of executed instructions with N source register operands 743system.cpu1.CUs0.wavefronts16.src_reg_operand_dist::2-3 10 29.41% 100.00% # number of executed instructions with N source register operands 744system.cpu1.CUs0.wavefronts16.src_reg_operand_dist::4 0 0.00% 100.00% # number of executed instructions with N source register operands 745system.cpu1.CUs0.wavefronts16.src_reg_operand_dist::overflows 0 0.00% 100.00% # number of executed instructions with N source register operands 746system.cpu1.CUs0.wavefronts16.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 747system.cpu1.CUs0.wavefronts16.src_reg_operand_dist::max_value 2 # number of executed instructions with N source register operands 748system.cpu1.CUs0.wavefronts16.src_reg_operand_dist::total 34 # number of executed instructions with N source register operands 749system.cpu1.CUs0.wavefronts16.dst_reg_operand_dist::samples 34 # number of executed instructions with N destination register operands 750system.cpu1.CUs0.wavefronts16.dst_reg_operand_dist::mean 0.617647 # number of executed instructions with N destination register operands 751system.cpu1.CUs0.wavefronts16.dst_reg_operand_dist::stdev 0.493270 # number of executed instructions with N destination register operands 752system.cpu1.CUs0.wavefronts16.dst_reg_operand_dist::underflows 0 0.00% 0.00% # number of executed instructions with N destination register operands 753system.cpu1.CUs0.wavefronts16.dst_reg_operand_dist::0-1 34 100.00% 100.00% # number of executed instructions with N destination register operands 754system.cpu1.CUs0.wavefronts16.dst_reg_operand_dist::2-3 0 0.00% 100.00% # number of executed instructions with N destination register operands 755system.cpu1.CUs0.wavefronts16.dst_reg_operand_dist::overflows 0 0.00% 100.00% # number of executed instructions with N destination register operands 756system.cpu1.CUs0.wavefronts16.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 757system.cpu1.CUs0.wavefronts16.dst_reg_operand_dist::max_value 1 # number of executed instructions with N destination register operands 758system.cpu1.CUs0.wavefronts16.dst_reg_operand_dist::total 34 # number of executed instructions with N destination register operands 759system.cpu1.CUs0.wavefronts17.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 760system.cpu1.CUs0.wavefronts17.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 761system.cpu1.CUs0.wavefronts17.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 762system.cpu1.CUs0.wavefronts17.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 763system.cpu1.CUs0.wavefronts17.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 764system.cpu1.CUs0.wavefronts17.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 765system.cpu1.CUs0.wavefronts17.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 766system.cpu1.CUs0.wavefronts17.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 767system.cpu1.CUs0.wavefronts17.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 768system.cpu1.CUs0.wavefronts17.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 769system.cpu1.CUs0.wavefronts17.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 770system.cpu1.CUs0.wavefronts17.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 771system.cpu1.CUs0.wavefronts17.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 772system.cpu1.CUs0.wavefronts17.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 773system.cpu1.CUs0.wavefronts17.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 774system.cpu1.CUs0.wavefronts17.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 775system.cpu1.CUs0.wavefronts17.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 776system.cpu1.CUs0.wavefronts17.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 777system.cpu1.CUs0.wavefronts17.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 778system.cpu1.CUs0.wavefronts17.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 779system.cpu1.CUs0.wavefronts17.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 780system.cpu1.CUs0.wavefronts17.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 781system.cpu1.CUs0.wavefronts17.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 782system.cpu1.CUs0.wavefronts17.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 783system.cpu1.CUs0.wavefronts18.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 784system.cpu1.CUs0.wavefronts18.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 785system.cpu1.CUs0.wavefronts18.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 786system.cpu1.CUs0.wavefronts18.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 787system.cpu1.CUs0.wavefronts18.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 788system.cpu1.CUs0.wavefronts18.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 789system.cpu1.CUs0.wavefronts18.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 790system.cpu1.CUs0.wavefronts18.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 791system.cpu1.CUs0.wavefronts18.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 792system.cpu1.CUs0.wavefronts18.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 793system.cpu1.CUs0.wavefronts18.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 794system.cpu1.CUs0.wavefronts18.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 795system.cpu1.CUs0.wavefronts18.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 796system.cpu1.CUs0.wavefronts18.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 797system.cpu1.CUs0.wavefronts18.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 798system.cpu1.CUs0.wavefronts18.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 799system.cpu1.CUs0.wavefronts18.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 800system.cpu1.CUs0.wavefronts18.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 801system.cpu1.CUs0.wavefronts18.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 802system.cpu1.CUs0.wavefronts18.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 803system.cpu1.CUs0.wavefronts18.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 804system.cpu1.CUs0.wavefronts18.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 805system.cpu1.CUs0.wavefronts18.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 806system.cpu1.CUs0.wavefronts18.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 807system.cpu1.CUs0.wavefronts19.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 808system.cpu1.CUs0.wavefronts19.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 809system.cpu1.CUs0.wavefronts19.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 810system.cpu1.CUs0.wavefronts19.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 811system.cpu1.CUs0.wavefronts19.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 812system.cpu1.CUs0.wavefronts19.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 813system.cpu1.CUs0.wavefronts19.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 814system.cpu1.CUs0.wavefronts19.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 815system.cpu1.CUs0.wavefronts19.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 816system.cpu1.CUs0.wavefronts19.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 817system.cpu1.CUs0.wavefronts19.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 818system.cpu1.CUs0.wavefronts19.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 819system.cpu1.CUs0.wavefronts19.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 820system.cpu1.CUs0.wavefronts19.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 821system.cpu1.CUs0.wavefronts19.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 822system.cpu1.CUs0.wavefronts19.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 823system.cpu1.CUs0.wavefronts19.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 824system.cpu1.CUs0.wavefronts19.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 825system.cpu1.CUs0.wavefronts19.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 826system.cpu1.CUs0.wavefronts19.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 827system.cpu1.CUs0.wavefronts19.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 828system.cpu1.CUs0.wavefronts19.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 829system.cpu1.CUs0.wavefronts19.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 830system.cpu1.CUs0.wavefronts19.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 831system.cpu1.CUs0.wavefronts20.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 832system.cpu1.CUs0.wavefronts20.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 833system.cpu1.CUs0.wavefronts20.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 834system.cpu1.CUs0.wavefronts20.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 835system.cpu1.CUs0.wavefronts20.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 836system.cpu1.CUs0.wavefronts20.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 837system.cpu1.CUs0.wavefronts20.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 838system.cpu1.CUs0.wavefronts20.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 839system.cpu1.CUs0.wavefronts20.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 840system.cpu1.CUs0.wavefronts20.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 841system.cpu1.CUs0.wavefronts20.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 842system.cpu1.CUs0.wavefronts20.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 843system.cpu1.CUs0.wavefronts20.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 844system.cpu1.CUs0.wavefronts20.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 845system.cpu1.CUs0.wavefronts20.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 846system.cpu1.CUs0.wavefronts20.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 847system.cpu1.CUs0.wavefronts20.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 848system.cpu1.CUs0.wavefronts20.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 849system.cpu1.CUs0.wavefronts20.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 850system.cpu1.CUs0.wavefronts20.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 851system.cpu1.CUs0.wavefronts20.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 852system.cpu1.CUs0.wavefronts20.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 853system.cpu1.CUs0.wavefronts20.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 854system.cpu1.CUs0.wavefronts20.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 855system.cpu1.CUs0.wavefronts21.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 856system.cpu1.CUs0.wavefronts21.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 857system.cpu1.CUs0.wavefronts21.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 858system.cpu1.CUs0.wavefronts21.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 859system.cpu1.CUs0.wavefronts21.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 860system.cpu1.CUs0.wavefronts21.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 861system.cpu1.CUs0.wavefronts21.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 862system.cpu1.CUs0.wavefronts21.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 863system.cpu1.CUs0.wavefronts21.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 864system.cpu1.CUs0.wavefronts21.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 865system.cpu1.CUs0.wavefronts21.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 866system.cpu1.CUs0.wavefronts21.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 867system.cpu1.CUs0.wavefronts21.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 868system.cpu1.CUs0.wavefronts21.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 869system.cpu1.CUs0.wavefronts21.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 870system.cpu1.CUs0.wavefronts21.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 871system.cpu1.CUs0.wavefronts21.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 872system.cpu1.CUs0.wavefronts21.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 873system.cpu1.CUs0.wavefronts21.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 874system.cpu1.CUs0.wavefronts21.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 875system.cpu1.CUs0.wavefronts21.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 876system.cpu1.CUs0.wavefronts21.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 877system.cpu1.CUs0.wavefronts21.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 878system.cpu1.CUs0.wavefronts21.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 879system.cpu1.CUs0.wavefronts22.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 880system.cpu1.CUs0.wavefronts22.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 881system.cpu1.CUs0.wavefronts22.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 882system.cpu1.CUs0.wavefronts22.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 883system.cpu1.CUs0.wavefronts22.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 884system.cpu1.CUs0.wavefronts22.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 885system.cpu1.CUs0.wavefronts22.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 886system.cpu1.CUs0.wavefronts22.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 887system.cpu1.CUs0.wavefronts22.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 888system.cpu1.CUs0.wavefronts22.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 889system.cpu1.CUs0.wavefronts22.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 890system.cpu1.CUs0.wavefronts22.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 891system.cpu1.CUs0.wavefronts22.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 892system.cpu1.CUs0.wavefronts22.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 893system.cpu1.CUs0.wavefronts22.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 894system.cpu1.CUs0.wavefronts22.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 895system.cpu1.CUs0.wavefronts22.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 896system.cpu1.CUs0.wavefronts22.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 897system.cpu1.CUs0.wavefronts22.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 898system.cpu1.CUs0.wavefronts22.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 899system.cpu1.CUs0.wavefronts22.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 900system.cpu1.CUs0.wavefronts22.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 901system.cpu1.CUs0.wavefronts22.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 902system.cpu1.CUs0.wavefronts22.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 903system.cpu1.CUs0.wavefronts23.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 904system.cpu1.CUs0.wavefronts23.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 905system.cpu1.CUs0.wavefronts23.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 906system.cpu1.CUs0.wavefronts23.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 907system.cpu1.CUs0.wavefronts23.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 908system.cpu1.CUs0.wavefronts23.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 909system.cpu1.CUs0.wavefronts23.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 910system.cpu1.CUs0.wavefronts23.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 911system.cpu1.CUs0.wavefronts23.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 912system.cpu1.CUs0.wavefronts23.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 913system.cpu1.CUs0.wavefronts23.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 914system.cpu1.CUs0.wavefronts23.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 915system.cpu1.CUs0.wavefronts23.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 916system.cpu1.CUs0.wavefronts23.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 917system.cpu1.CUs0.wavefronts23.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 918system.cpu1.CUs0.wavefronts23.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 919system.cpu1.CUs0.wavefronts23.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 920system.cpu1.CUs0.wavefronts23.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 921system.cpu1.CUs0.wavefronts23.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 922system.cpu1.CUs0.wavefronts23.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 923system.cpu1.CUs0.wavefronts23.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 924system.cpu1.CUs0.wavefronts23.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 925system.cpu1.CUs0.wavefronts23.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 926system.cpu1.CUs0.wavefronts23.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 927system.cpu1.CUs0.wavefronts24.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 928system.cpu1.CUs0.wavefronts24.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 929system.cpu1.CUs0.wavefronts24.timesBlockedDueRAWDependencies 177 # number of times the wf's instructions are blocked due to RAW dependencies 930system.cpu1.CUs0.wavefronts24.src_reg_operand_dist::samples 34 # number of executed instructions with N source register operands 931system.cpu1.CUs0.wavefronts24.src_reg_operand_dist::mean 0.852941 # number of executed instructions with N source register operands 932system.cpu1.CUs0.wavefronts24.src_reg_operand_dist::stdev 0.857493 # number of executed instructions with N source register operands 933system.cpu1.CUs0.wavefronts24.src_reg_operand_dist::underflows 0 0.00% 0.00% # number of executed instructions with N source register operands 934system.cpu1.CUs0.wavefronts24.src_reg_operand_dist::0-1 24 70.59% 70.59% # number of executed instructions with N source register operands 935system.cpu1.CUs0.wavefronts24.src_reg_operand_dist::2-3 10 29.41% 100.00% # number of executed instructions with N source register operands 936system.cpu1.CUs0.wavefronts24.src_reg_operand_dist::4 0 0.00% 100.00% # number of executed instructions with N source register operands 937system.cpu1.CUs0.wavefronts24.src_reg_operand_dist::overflows 0 0.00% 100.00% # number of executed instructions with N source register operands 938system.cpu1.CUs0.wavefronts24.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 939system.cpu1.CUs0.wavefronts24.src_reg_operand_dist::max_value 2 # number of executed instructions with N source register operands 940system.cpu1.CUs0.wavefronts24.src_reg_operand_dist::total 34 # number of executed instructions with N source register operands 941system.cpu1.CUs0.wavefronts24.dst_reg_operand_dist::samples 34 # number of executed instructions with N destination register operands 942system.cpu1.CUs0.wavefronts24.dst_reg_operand_dist::mean 0.617647 # number of executed instructions with N destination register operands 943system.cpu1.CUs0.wavefronts24.dst_reg_operand_dist::stdev 0.493270 # number of executed instructions with N destination register operands 944system.cpu1.CUs0.wavefronts24.dst_reg_operand_dist::underflows 0 0.00% 0.00% # number of executed instructions with N destination register operands 945system.cpu1.CUs0.wavefronts24.dst_reg_operand_dist::0-1 34 100.00% 100.00% # number of executed instructions with N destination register operands 946system.cpu1.CUs0.wavefronts24.dst_reg_operand_dist::2-3 0 0.00% 100.00% # number of executed instructions with N destination register operands 947system.cpu1.CUs0.wavefronts24.dst_reg_operand_dist::overflows 0 0.00% 100.00% # number of executed instructions with N destination register operands 948system.cpu1.CUs0.wavefronts24.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 949system.cpu1.CUs0.wavefronts24.dst_reg_operand_dist::max_value 1 # number of executed instructions with N destination register operands 950system.cpu1.CUs0.wavefronts24.dst_reg_operand_dist::total 34 # number of executed instructions with N destination register operands 951system.cpu1.CUs0.wavefronts25.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 952system.cpu1.CUs0.wavefronts25.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 953system.cpu1.CUs0.wavefronts25.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 954system.cpu1.CUs0.wavefronts25.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 955system.cpu1.CUs0.wavefronts25.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 956system.cpu1.CUs0.wavefronts25.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 957system.cpu1.CUs0.wavefronts25.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 958system.cpu1.CUs0.wavefronts25.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 959system.cpu1.CUs0.wavefronts25.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 960system.cpu1.CUs0.wavefronts25.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 961system.cpu1.CUs0.wavefronts25.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 962system.cpu1.CUs0.wavefronts25.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 963system.cpu1.CUs0.wavefronts25.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 964system.cpu1.CUs0.wavefronts25.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 965system.cpu1.CUs0.wavefronts25.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 966system.cpu1.CUs0.wavefronts25.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 967system.cpu1.CUs0.wavefronts25.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 968system.cpu1.CUs0.wavefronts25.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 969system.cpu1.CUs0.wavefronts25.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 970system.cpu1.CUs0.wavefronts25.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 971system.cpu1.CUs0.wavefronts25.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 972system.cpu1.CUs0.wavefronts25.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 973system.cpu1.CUs0.wavefronts25.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 974system.cpu1.CUs0.wavefronts25.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 975system.cpu1.CUs0.wavefronts26.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 976system.cpu1.CUs0.wavefronts26.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 977system.cpu1.CUs0.wavefronts26.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 978system.cpu1.CUs0.wavefronts26.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 979system.cpu1.CUs0.wavefronts26.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 980system.cpu1.CUs0.wavefronts26.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 981system.cpu1.CUs0.wavefronts26.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 982system.cpu1.CUs0.wavefronts26.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 983system.cpu1.CUs0.wavefronts26.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 984system.cpu1.CUs0.wavefronts26.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 985system.cpu1.CUs0.wavefronts26.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 986system.cpu1.CUs0.wavefronts26.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 987system.cpu1.CUs0.wavefronts26.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 988system.cpu1.CUs0.wavefronts26.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 989system.cpu1.CUs0.wavefronts26.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 990system.cpu1.CUs0.wavefronts26.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 991system.cpu1.CUs0.wavefronts26.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 992system.cpu1.CUs0.wavefronts26.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 993system.cpu1.CUs0.wavefronts26.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 994system.cpu1.CUs0.wavefronts26.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 995system.cpu1.CUs0.wavefronts26.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 996system.cpu1.CUs0.wavefronts26.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 997system.cpu1.CUs0.wavefronts26.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 998system.cpu1.CUs0.wavefronts26.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 999system.cpu1.CUs0.wavefronts27.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 1000system.cpu1.CUs0.wavefronts27.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 1001system.cpu1.CUs0.wavefronts27.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 1002system.cpu1.CUs0.wavefronts27.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 1003system.cpu1.CUs0.wavefronts27.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 1004system.cpu1.CUs0.wavefronts27.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 1005system.cpu1.CUs0.wavefronts27.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 1006system.cpu1.CUs0.wavefronts27.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 1007system.cpu1.CUs0.wavefronts27.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 1008system.cpu1.CUs0.wavefronts27.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 1009system.cpu1.CUs0.wavefronts27.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 1010system.cpu1.CUs0.wavefronts27.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 1011system.cpu1.CUs0.wavefronts27.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 1012system.cpu1.CUs0.wavefronts27.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 1013system.cpu1.CUs0.wavefronts27.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 1014system.cpu1.CUs0.wavefronts27.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 1015system.cpu1.CUs0.wavefronts27.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 1016system.cpu1.CUs0.wavefronts27.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 1017system.cpu1.CUs0.wavefronts27.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 1018system.cpu1.CUs0.wavefronts27.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 1019system.cpu1.CUs0.wavefronts27.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 1020system.cpu1.CUs0.wavefronts27.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 1021system.cpu1.CUs0.wavefronts27.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 1022system.cpu1.CUs0.wavefronts27.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 1023system.cpu1.CUs0.wavefronts28.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 1024system.cpu1.CUs0.wavefronts28.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 1025system.cpu1.CUs0.wavefronts28.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 1026system.cpu1.CUs0.wavefronts28.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 1027system.cpu1.CUs0.wavefronts28.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 1028system.cpu1.CUs0.wavefronts28.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 1029system.cpu1.CUs0.wavefronts28.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 1030system.cpu1.CUs0.wavefronts28.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 1031system.cpu1.CUs0.wavefronts28.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 1032system.cpu1.CUs0.wavefronts28.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 1033system.cpu1.CUs0.wavefronts28.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 1034system.cpu1.CUs0.wavefronts28.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 1035system.cpu1.CUs0.wavefronts28.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 1036system.cpu1.CUs0.wavefronts28.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 1037system.cpu1.CUs0.wavefronts28.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 1038system.cpu1.CUs0.wavefronts28.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 1039system.cpu1.CUs0.wavefronts28.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 1040system.cpu1.CUs0.wavefronts28.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 1041system.cpu1.CUs0.wavefronts28.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 1042system.cpu1.CUs0.wavefronts28.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 1043system.cpu1.CUs0.wavefronts28.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 1044system.cpu1.CUs0.wavefronts28.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 1045system.cpu1.CUs0.wavefronts28.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 1046system.cpu1.CUs0.wavefronts28.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 1047system.cpu1.CUs0.wavefronts29.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 1048system.cpu1.CUs0.wavefronts29.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 1049system.cpu1.CUs0.wavefronts29.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 1050system.cpu1.CUs0.wavefronts29.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 1051system.cpu1.CUs0.wavefronts29.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 1052system.cpu1.CUs0.wavefronts29.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 1053system.cpu1.CUs0.wavefronts29.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 1054system.cpu1.CUs0.wavefronts29.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 1055system.cpu1.CUs0.wavefronts29.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 1056system.cpu1.CUs0.wavefronts29.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 1057system.cpu1.CUs0.wavefronts29.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 1058system.cpu1.CUs0.wavefronts29.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 1059system.cpu1.CUs0.wavefronts29.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 1060system.cpu1.CUs0.wavefronts29.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 1061system.cpu1.CUs0.wavefronts29.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 1062system.cpu1.CUs0.wavefronts29.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 1063system.cpu1.CUs0.wavefronts29.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 1064system.cpu1.CUs0.wavefronts29.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 1065system.cpu1.CUs0.wavefronts29.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 1066system.cpu1.CUs0.wavefronts29.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 1067system.cpu1.CUs0.wavefronts29.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 1068system.cpu1.CUs0.wavefronts29.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 1069system.cpu1.CUs0.wavefronts29.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 1070system.cpu1.CUs0.wavefronts29.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 1071system.cpu1.CUs0.wavefronts30.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 1072system.cpu1.CUs0.wavefronts30.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 1073system.cpu1.CUs0.wavefronts30.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 1074system.cpu1.CUs0.wavefronts30.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 1075system.cpu1.CUs0.wavefronts30.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 1076system.cpu1.CUs0.wavefronts30.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 1077system.cpu1.CUs0.wavefronts30.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 1078system.cpu1.CUs0.wavefronts30.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 1079system.cpu1.CUs0.wavefronts30.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 1080system.cpu1.CUs0.wavefronts30.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 1081system.cpu1.CUs0.wavefronts30.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 1082system.cpu1.CUs0.wavefronts30.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 1083system.cpu1.CUs0.wavefronts30.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 1084system.cpu1.CUs0.wavefronts30.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 1085system.cpu1.CUs0.wavefronts30.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 1086system.cpu1.CUs0.wavefronts30.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 1087system.cpu1.CUs0.wavefronts30.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 1088system.cpu1.CUs0.wavefronts30.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 1089system.cpu1.CUs0.wavefronts30.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 1090system.cpu1.CUs0.wavefronts30.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 1091system.cpu1.CUs0.wavefronts30.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 1092system.cpu1.CUs0.wavefronts30.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 1093system.cpu1.CUs0.wavefronts30.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 1094system.cpu1.CUs0.wavefronts30.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 1095system.cpu1.CUs0.wavefronts31.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 1096system.cpu1.CUs0.wavefronts31.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 1097system.cpu1.CUs0.wavefronts31.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 1098system.cpu1.CUs0.wavefronts31.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 1099system.cpu1.CUs0.wavefronts31.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 1100system.cpu1.CUs0.wavefronts31.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 1101system.cpu1.CUs0.wavefronts31.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 1102system.cpu1.CUs0.wavefronts31.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 1103system.cpu1.CUs0.wavefronts31.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 1104system.cpu1.CUs0.wavefronts31.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 1105system.cpu1.CUs0.wavefronts31.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 1106system.cpu1.CUs0.wavefronts31.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 1107system.cpu1.CUs0.wavefronts31.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 1108system.cpu1.CUs0.wavefronts31.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 1109system.cpu1.CUs0.wavefronts31.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 1110system.cpu1.CUs0.wavefronts31.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 1111system.cpu1.CUs0.wavefronts31.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 1112system.cpu1.CUs0.wavefronts31.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 1113system.cpu1.CUs0.wavefronts31.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 1114system.cpu1.CUs0.wavefronts31.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 1115system.cpu1.CUs0.wavefronts31.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 1116system.cpu1.CUs0.wavefronts31.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 1117system.cpu1.CUs0.wavefronts31.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 1118system.cpu1.CUs0.wavefronts31.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 1119system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::samples 43 # For each instruction fetch request recieved record how many instructions you got from it 1120system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::mean 5.813953 # For each instruction fetch request recieved record how many instructions you got from it 1121system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::stdev 2.683777 # For each instruction fetch request recieved record how many instructions you got from it 1122system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::underflows 0 0.00% 0.00% # For each instruction fetch request recieved record how many instructions you got from it 1123system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::1 0 0.00% 0.00% # For each instruction fetch request recieved record how many instructions you got from it 1124system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::2 8 18.60% 18.60% # For each instruction fetch request recieved record how many instructions you got from it 1125system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::3 8 18.60% 37.21% # For each instruction fetch request recieved record how many instructions you got from it 1126system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::4 1 2.33% 39.53% # For each instruction fetch request recieved record how many instructions you got from it 1127system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::5 0 0.00% 39.53% # For each instruction fetch request recieved record how many instructions you got from it 1128system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::6 1 2.33% 41.86% # For each instruction fetch request recieved record how many instructions you got from it 1129system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::7 0 0.00% 41.86% # For each instruction fetch request recieved record how many instructions you got from it 1130system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::8 25 58.14% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 1131system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::9 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 1132system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::10 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 1133system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::11 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 1134system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::12 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 1135system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::13 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 1136system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::14 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 1137system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::15 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 1138system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::16 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 1139system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::17 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 1140system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::18 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 1141system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::19 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 1142system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::20 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 1143system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::21 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 1144system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::22 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 1145system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::23 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 1146system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::24 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 1147system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::25 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 1148system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::26 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 1149system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::27 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 1150system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::28 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 1151system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::29 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 1152system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::30 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 1153system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::31 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 1154system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::32 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 1155system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::overflows 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 1156system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::min_value 2 # For each instruction fetch request recieved record how many instructions you got from it 1157system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::max_value 8 # For each instruction fetch request recieved record how many instructions you got from it 1158system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::total 43 # For each instruction fetch request recieved record how many instructions you got from it 1159system.cpu1.CUs0.ExecStage.num_cycles_with_no_issue 4663 # number of cycles the CU issues nothing 1160system.cpu1.CUs0.ExecStage.num_cycles_with_instr_issued 102 # number of cycles the CU issued at least one instruction 1161system.cpu1.CUs0.ExecStage.num_cycles_with_instrtype_issue::ALU0 30 # Number of cycles at least one instruction of specific type issued 1162system.cpu1.CUs0.ExecStage.num_cycles_with_instrtype_issue::ALU1 29 # Number of cycles at least one instruction of specific type issued 1163system.cpu1.CUs0.ExecStage.num_cycles_with_instrtype_issue::ALU2 29 # Number of cycles at least one instruction of specific type issued 1164system.cpu1.CUs0.ExecStage.num_cycles_with_instrtype_issue::ALU3 29 # Number of cycles at least one instruction of specific type issued 1165system.cpu1.CUs0.ExecStage.num_cycles_with_instrtype_issue::GM 18 # Number of cycles at least one instruction of specific type issued 1166system.cpu1.CUs0.ExecStage.num_cycles_with_instrtype_issue::LM 6 # Number of cycles at least one instruction of specific type issued 1167system.cpu1.CUs0.ExecStage.num_cycles_with_instr_type_no_issue::ALU0 1993 # Number of cycles no instruction of specific type issued 1168system.cpu1.CUs0.ExecStage.num_cycles_with_instr_type_no_issue::ALU1 288 # Number of cycles no instruction of specific type issued 1169system.cpu1.CUs0.ExecStage.num_cycles_with_instr_type_no_issue::ALU2 325 # Number of cycles no instruction of specific type issued 1170system.cpu1.CUs0.ExecStage.num_cycles_with_instr_type_no_issue::ALU3 248 # Number of cycles no instruction of specific type issued 1171system.cpu1.CUs0.ExecStage.num_cycles_with_instr_type_no_issue::GM 341 # Number of cycles no instruction of specific type issued 1172system.cpu1.CUs0.ExecStage.num_cycles_with_instr_type_no_issue::LM 27 # Number of cycles no instruction of specific type issued 1173system.cpu1.CUs0.ExecStage.spc::samples 4765 # Execution units active per cycle (Exec unit=SIMD,MemPipe) 1174system.cpu1.CUs0.ExecStage.spc::mean 0.029591 # Execution units active per cycle (Exec unit=SIMD,MemPipe) 1175system.cpu1.CUs0.ExecStage.spc::stdev 0.214321 # Execution units active per cycle (Exec unit=SIMD,MemPipe) 1176system.cpu1.CUs0.ExecStage.spc::underflows 0 0.00% 0.00% # Execution units active per cycle (Exec unit=SIMD,MemPipe) 1177system.cpu1.CUs0.ExecStage.spc::0 4663 97.86% 97.86% # Execution units active per cycle (Exec unit=SIMD,MemPipe) 1178system.cpu1.CUs0.ExecStage.spc::1 65 1.36% 99.22% # Execution units active per cycle (Exec unit=SIMD,MemPipe) 1179system.cpu1.CUs0.ExecStage.spc::2 35 0.73% 99.96% # Execution units active per cycle (Exec unit=SIMD,MemPipe) 1180system.cpu1.CUs0.ExecStage.spc::3 2 0.04% 100.00% # Execution units active per cycle (Exec unit=SIMD,MemPipe) 1181system.cpu1.CUs0.ExecStage.spc::4 0 0.00% 100.00% # Execution units active per cycle (Exec unit=SIMD,MemPipe) 1182system.cpu1.CUs0.ExecStage.spc::5 0 0.00% 100.00% # Execution units active per cycle (Exec unit=SIMD,MemPipe) 1183system.cpu1.CUs0.ExecStage.spc::6 0 0.00% 100.00% # Execution units active per cycle (Exec unit=SIMD,MemPipe) 1184system.cpu1.CUs0.ExecStage.spc::overflows 0 0.00% 100.00% # Execution units active per cycle (Exec unit=SIMD,MemPipe) 1185system.cpu1.CUs0.ExecStage.spc::min_value 0 # Execution units active per cycle (Exec unit=SIMD,MemPipe) 1186system.cpu1.CUs0.ExecStage.spc::max_value 3 # Execution units active per cycle (Exec unit=SIMD,MemPipe) 1187system.cpu1.CUs0.ExecStage.spc::total 4765 # Execution units active per cycle (Exec unit=SIMD,MemPipe) 1188system.cpu1.CUs0.ExecStage.num_transitions_active_to_idle 66 # number of CU transitions from active to idle 1189system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::samples 66 # duration of idle periods in cycles 1190system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::mean 61.575758 # duration of idle periods in cycles 1191system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::stdev 253.572448 # duration of idle periods in cycles 1192system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::underflows 0 0.00% 0.00% # duration of idle periods in cycles 1193system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::0-4 45 68.18% 68.18% # duration of idle periods in cycles 1194system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::5-9 10 15.15% 83.33% # duration of idle periods in cycles 1195system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::10-14 0 0.00% 83.33% # duration of idle periods in cycles 1196system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::15-19 1 1.52% 84.85% # duration of idle periods in cycles 1197system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::20-24 2 3.03% 87.88% # duration of idle periods in cycles 1198system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::25-29 1 1.52% 89.39% # duration of idle periods in cycles 1199system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::30-34 0 0.00% 89.39% # duration of idle periods in cycles 1200system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::35-39 0 0.00% 89.39% # duration of idle periods in cycles 1201system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::40-44 0 0.00% 89.39% # duration of idle periods in cycles 1202system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::45-49 0 0.00% 89.39% # duration of idle periods in cycles 1203system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::50-54 0 0.00% 89.39% # duration of idle periods in cycles 1204system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::55-59 0 0.00% 89.39% # duration of idle periods in cycles 1205system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::60-64 0 0.00% 89.39% # duration of idle periods in cycles 1206system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::65-69 0 0.00% 89.39% # duration of idle periods in cycles 1207system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::70-74 0 0.00% 89.39% # duration of idle periods in cycles 1208system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::75 0 0.00% 89.39% # duration of idle periods in cycles 1209system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::overflows 7 10.61% 100.00% # duration of idle periods in cycles 1210system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::min_value 1 # duration of idle periods in cycles 1211system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::max_value 1685 # duration of idle periods in cycles 1212system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::total 66 # duration of idle periods in cycles 1213system.cpu1.CUs0.GlobalMemPipeline.load_vrf_bank_conflict_cycles 0 # total number of cycles GM data are delayed before updating the VRF 1214system.cpu1.CUs0.LocalMemPipeline.load_vrf_bank_conflict_cycles 0 # total number of cycles LDS data are delayed before updating the VRF 1215system.cpu1.CUs0.tlb_requests 769 # number of uncoalesced requests 1216system.cpu1.CUs0.tlb_cycles -212991640500 # total number of cycles for all uncoalesced requests 1217system.cpu1.CUs0.avg_translation_latency -276972224.317295 # Avg. translation latency for data translations 1218system.cpu1.CUs0.TLB_hits_distribution::page_table 769 # TLB hits distribution (0 for page table, x for Lx-TLB 1219system.cpu1.CUs0.TLB_hits_distribution::L1_TLB 0 # TLB hits distribution (0 for page table, x for Lx-TLB 1220system.cpu1.CUs0.TLB_hits_distribution::L2_TLB 0 # TLB hits distribution (0 for page table, x for Lx-TLB 1221system.cpu1.CUs0.TLB_hits_distribution::L3_TLB 0 # TLB hits distribution (0 for page table, x for Lx-TLB 1222system.cpu1.CUs0.lds_bank_access_cnt 54 # Total number of LDS bank accesses 1223system.cpu1.CUs0.lds_bank_conflicts::samples 6 # Number of bank conflicts per LDS memory packet 1224system.cpu1.CUs0.lds_bank_conflicts::mean 8 # Number of bank conflicts per LDS memory packet 1225system.cpu1.CUs0.lds_bank_conflicts::stdev 6.196773 # Number of bank conflicts per LDS memory packet 1226system.cpu1.CUs0.lds_bank_conflicts::underflows 0 0.00% 0.00% # Number of bank conflicts per LDS memory packet 1227system.cpu1.CUs0.lds_bank_conflicts::0-1 2 33.33% 33.33% # Number of bank conflicts per LDS memory packet 1228system.cpu1.CUs0.lds_bank_conflicts::2-3 0 0.00% 33.33% # Number of bank conflicts per LDS memory packet 1229system.cpu1.CUs0.lds_bank_conflicts::4-5 0 0.00% 33.33% # Number of bank conflicts per LDS memory packet 1230system.cpu1.CUs0.lds_bank_conflicts::6-7 0 0.00% 33.33% # Number of bank conflicts per LDS memory packet 1231system.cpu1.CUs0.lds_bank_conflicts::8-9 0 0.00% 33.33% # Number of bank conflicts per LDS memory packet 1232system.cpu1.CUs0.lds_bank_conflicts::10-11 0 0.00% 33.33% # Number of bank conflicts per LDS memory packet 1233system.cpu1.CUs0.lds_bank_conflicts::12-13 4 66.67% 100.00% # Number of bank conflicts per LDS memory packet 1234system.cpu1.CUs0.lds_bank_conflicts::14-15 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 1235system.cpu1.CUs0.lds_bank_conflicts::16-17 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 1236system.cpu1.CUs0.lds_bank_conflicts::18-19 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 1237system.cpu1.CUs0.lds_bank_conflicts::20-21 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 1238system.cpu1.CUs0.lds_bank_conflicts::22-23 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 1239system.cpu1.CUs0.lds_bank_conflicts::24-25 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 1240system.cpu1.CUs0.lds_bank_conflicts::26-27 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 1241system.cpu1.CUs0.lds_bank_conflicts::28-29 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 1242system.cpu1.CUs0.lds_bank_conflicts::30-31 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 1243system.cpu1.CUs0.lds_bank_conflicts::32-33 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 1244system.cpu1.CUs0.lds_bank_conflicts::34-35 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 1245system.cpu1.CUs0.lds_bank_conflicts::36-37 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 1246system.cpu1.CUs0.lds_bank_conflicts::38-39 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 1247system.cpu1.CUs0.lds_bank_conflicts::40-41 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 1248system.cpu1.CUs0.lds_bank_conflicts::42-43 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 1249system.cpu1.CUs0.lds_bank_conflicts::44-45 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 1250system.cpu1.CUs0.lds_bank_conflicts::46-47 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 1251system.cpu1.CUs0.lds_bank_conflicts::48-49 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 1252system.cpu1.CUs0.lds_bank_conflicts::50-51 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 1253system.cpu1.CUs0.lds_bank_conflicts::52-53 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 1254system.cpu1.CUs0.lds_bank_conflicts::54-55 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 1255system.cpu1.CUs0.lds_bank_conflicts::56-57 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 1256system.cpu1.CUs0.lds_bank_conflicts::58-59 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 1257system.cpu1.CUs0.lds_bank_conflicts::60-61 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 1258system.cpu1.CUs0.lds_bank_conflicts::62-63 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 1259system.cpu1.CUs0.lds_bank_conflicts::64 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 1260system.cpu1.CUs0.lds_bank_conflicts::overflows 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 1261system.cpu1.CUs0.lds_bank_conflicts::min_value 0 # Number of bank conflicts per LDS memory packet 1262system.cpu1.CUs0.lds_bank_conflicts::max_value 12 # Number of bank conflicts per LDS memory packet 1263system.cpu1.CUs0.lds_bank_conflicts::total 6 # Number of bank conflicts per LDS memory packet 1264system.cpu1.CUs0.page_divergence_dist::samples 17 # pages touched per wf (over all mem. instr.) 1265system.cpu1.CUs0.page_divergence_dist::mean 1 # pages touched per wf (over all mem. instr.) 1266system.cpu1.CUs0.page_divergence_dist::stdev 0 # pages touched per wf (over all mem. instr.) 1267system.cpu1.CUs0.page_divergence_dist::underflows 0 0.00% 0.00% # pages touched per wf (over all mem. instr.) 1268system.cpu1.CUs0.page_divergence_dist::1-4 17 100.00% 100.00% # pages touched per wf (over all mem. instr.) 1269system.cpu1.CUs0.page_divergence_dist::5-8 0 0.00% 100.00% # pages touched per wf (over all mem. instr.) 1270system.cpu1.CUs0.page_divergence_dist::9-12 0 0.00% 100.00% # pages touched per wf (over all mem. instr.) 1271system.cpu1.CUs0.page_divergence_dist::13-16 0 0.00% 100.00% # pages touched per wf (over all mem. instr.) 1272system.cpu1.CUs0.page_divergence_dist::17-20 0 0.00% 100.00% # pages touched per wf (over all mem. instr.) 1273system.cpu1.CUs0.page_divergence_dist::21-24 0 0.00% 100.00% # pages touched per wf (over all mem. instr.) 1274system.cpu1.CUs0.page_divergence_dist::25-28 0 0.00% 100.00% # pages touched per wf (over all mem. instr.) 1275system.cpu1.CUs0.page_divergence_dist::29-32 0 0.00% 100.00% # pages touched per wf (over all mem. instr.) 1276system.cpu1.CUs0.page_divergence_dist::33-36 0 0.00% 100.00% # pages touched per wf (over all mem. instr.) 1277system.cpu1.CUs0.page_divergence_dist::37-40 0 0.00% 100.00% # pages touched per wf (over all mem. instr.) 1278system.cpu1.CUs0.page_divergence_dist::41-44 0 0.00% 100.00% # pages touched per wf (over all mem. instr.) 1279system.cpu1.CUs0.page_divergence_dist::45-48 0 0.00% 100.00% # pages touched per wf (over all mem. instr.) 1280system.cpu1.CUs0.page_divergence_dist::49-52 0 0.00% 100.00% # pages touched per wf (over all mem. instr.) 1281system.cpu1.CUs0.page_divergence_dist::53-56 0 0.00% 100.00% # pages touched per wf (over all mem. instr.) 1282system.cpu1.CUs0.page_divergence_dist::57-60 0 0.00% 100.00% # pages touched per wf (over all mem. instr.) 1283system.cpu1.CUs0.page_divergence_dist::61-64 0 0.00% 100.00% # pages touched per wf (over all mem. instr.) 1284system.cpu1.CUs0.page_divergence_dist::overflows 0 0.00% 100.00% # pages touched per wf (over all mem. instr.) 1285system.cpu1.CUs0.page_divergence_dist::min_value 1 # pages touched per wf (over all mem. instr.) 1286system.cpu1.CUs0.page_divergence_dist::max_value 1 # pages touched per wf (over all mem. instr.) 1287system.cpu1.CUs0.page_divergence_dist::total 17 # pages touched per wf (over all mem. instr.) 1288system.cpu1.CUs0.global_mem_instr_cnt 17 # dynamic global memory instructions count 1289system.cpu1.CUs0.local_mem_instr_cnt 6 # dynamic local memory intruction count 1290system.cpu1.CUs0.wg_blocked_due_lds_alloc 0 # Workgroup blocked due to LDS capacity 1291system.cpu1.CUs0.num_instr_executed 141 # number of instructions executed 1292system.cpu1.CUs0.inst_exec_rate::samples 141 # Instruction Execution Rate: Number of executed vector instructions per cycle 1293system.cpu1.CUs0.inst_exec_rate::mean 81.602837 # Instruction Execution Rate: Number of executed vector instructions per cycle 1294system.cpu1.CUs0.inst_exec_rate::stdev 244.924445 # Instruction Execution Rate: Number of executed vector instructions per cycle 1295system.cpu1.CUs0.inst_exec_rate::underflows 0 0.00% 0.00% # Instruction Execution Rate: Number of executed vector instructions per cycle 1296system.cpu1.CUs0.inst_exec_rate::0-1 1 0.71% 0.71% # Instruction Execution Rate: Number of executed vector instructions per cycle 1297system.cpu1.CUs0.inst_exec_rate::2-3 12 8.51% 9.22% # Instruction Execution Rate: Number of executed vector instructions per cycle 1298system.cpu1.CUs0.inst_exec_rate::4-5 57 40.43% 49.65% # Instruction Execution Rate: Number of executed vector instructions per cycle 1299system.cpu1.CUs0.inst_exec_rate::6-7 28 19.86% 69.50% # Instruction Execution Rate: Number of executed vector instructions per cycle 1300system.cpu1.CUs0.inst_exec_rate::8-9 2 1.42% 70.92% # Instruction Execution Rate: Number of executed vector instructions per cycle 1301system.cpu1.CUs0.inst_exec_rate::10 1 0.71% 71.63% # Instruction Execution Rate: Number of executed vector instructions per cycle 1302system.cpu1.CUs0.inst_exec_rate::overflows 40 28.37% 100.00% # Instruction Execution Rate: Number of executed vector instructions per cycle 1303system.cpu1.CUs0.inst_exec_rate::min_value 1 # Instruction Execution Rate: Number of executed vector instructions per cycle 1304system.cpu1.CUs0.inst_exec_rate::max_value 1686 # Instruction Execution Rate: Number of executed vector instructions per cycle 1305system.cpu1.CUs0.inst_exec_rate::total 141 # Instruction Execution Rate: Number of executed vector instructions per cycle 1306system.cpu1.CUs0.num_vec_ops_executed 6769 # number of vec ops executed (e.g. VSZ/inst) 1307system.cpu1.CUs0.num_total_cycles 4765 # number of cycles the CU ran for 1308system.cpu1.CUs0.vpc 1.420567 # Vector Operations per cycle (this CU only) 1309system.cpu1.CUs0.ipc 0.029591 # Instructions per cycle (this CU only) 1310system.cpu1.CUs0.warp_execution_dist::samples 141 # number of lanes active per instruction (oval all instructions) 1311system.cpu1.CUs0.warp_execution_dist::mean 48.007092 # number of lanes active per instruction (oval all instructions) 1312system.cpu1.CUs0.warp_execution_dist::stdev 23.719942 # number of lanes active per instruction (oval all instructions) 1313system.cpu1.CUs0.warp_execution_dist::underflows 0 0.00% 0.00% # number of lanes active per instruction (oval all instructions) 1314system.cpu1.CUs0.warp_execution_dist::1-4 5 3.55% 3.55% # number of lanes active per instruction (oval all instructions) 1315system.cpu1.CUs0.warp_execution_dist::5-8 0 0.00% 3.55% # number of lanes active per instruction (oval all instructions) 1316system.cpu1.CUs0.warp_execution_dist::9-12 0 0.00% 3.55% # number of lanes active per instruction (oval all instructions) 1317system.cpu1.CUs0.warp_execution_dist::13-16 36 25.53% 29.08% # number of lanes active per instruction (oval all instructions) 1318system.cpu1.CUs0.warp_execution_dist::17-20 0 0.00% 29.08% # number of lanes active per instruction (oval all instructions) 1319system.cpu1.CUs0.warp_execution_dist::21-24 0 0.00% 29.08% # number of lanes active per instruction (oval all instructions) 1320system.cpu1.CUs0.warp_execution_dist::25-28 0 0.00% 29.08% # number of lanes active per instruction (oval all instructions) 1321system.cpu1.CUs0.warp_execution_dist::29-32 0 0.00% 29.08% # number of lanes active per instruction (oval all instructions) 1322system.cpu1.CUs0.warp_execution_dist::33-36 0 0.00% 29.08% # number of lanes active per instruction (oval all instructions) 1323system.cpu1.CUs0.warp_execution_dist::37-40 0 0.00% 29.08% # number of lanes active per instruction (oval all instructions) 1324system.cpu1.CUs0.warp_execution_dist::41-44 0 0.00% 29.08% # number of lanes active per instruction (oval all instructions) 1325system.cpu1.CUs0.warp_execution_dist::45-48 0 0.00% 29.08% # number of lanes active per instruction (oval all instructions) 1326system.cpu1.CUs0.warp_execution_dist::49-52 8 5.67% 34.75% # number of lanes active per instruction (oval all instructions) 1327system.cpu1.CUs0.warp_execution_dist::53-56 0 0.00% 34.75% # number of lanes active per instruction (oval all instructions) 1328system.cpu1.CUs0.warp_execution_dist::57-60 0 0.00% 34.75% # number of lanes active per instruction (oval all instructions) 1329system.cpu1.CUs0.warp_execution_dist::61-64 92 65.25% 100.00% # number of lanes active per instruction (oval all instructions) 1330system.cpu1.CUs0.warp_execution_dist::overflows 0 0.00% 100.00% # number of lanes active per instruction (oval all instructions) 1331system.cpu1.CUs0.warp_execution_dist::min_value 1 # number of lanes active per instruction (oval all instructions) 1332system.cpu1.CUs0.warp_execution_dist::max_value 64 # number of lanes active per instruction (oval all instructions) 1333system.cpu1.CUs0.warp_execution_dist::total 141 # number of lanes active per instruction (oval all instructions) 1334system.cpu1.CUs0.gmem_lanes_execution_dist::samples 18 # number of active lanes per global memory instruction 1335system.cpu1.CUs0.gmem_lanes_execution_dist::mean 37.833333 # number of active lanes per global memory instruction 1336system.cpu1.CUs0.gmem_lanes_execution_dist::stdev 27.064737 # number of active lanes per global memory instruction 1337system.cpu1.CUs0.gmem_lanes_execution_dist::underflows 0 0.00% 0.00% # number of active lanes per global memory instruction 1338system.cpu1.CUs0.gmem_lanes_execution_dist::1-4 1 5.56% 5.56% # number of active lanes per global memory instruction 1339system.cpu1.CUs0.gmem_lanes_execution_dist::5-8 0 0.00% 5.56% # number of active lanes per global memory instruction 1340system.cpu1.CUs0.gmem_lanes_execution_dist::9-12 0 0.00% 5.56% # number of active lanes per global memory instruction 1341system.cpu1.CUs0.gmem_lanes_execution_dist::13-16 8 44.44% 50.00% # number of active lanes per global memory instruction 1342system.cpu1.CUs0.gmem_lanes_execution_dist::17-20 0 0.00% 50.00% # number of active lanes per global memory instruction 1343system.cpu1.CUs0.gmem_lanes_execution_dist::21-24 0 0.00% 50.00% # number of active lanes per global memory instruction 1344system.cpu1.CUs0.gmem_lanes_execution_dist::25-28 0 0.00% 50.00% # number of active lanes per global memory instruction 1345system.cpu1.CUs0.gmem_lanes_execution_dist::29-32 0 0.00% 50.00% # number of active lanes per global memory instruction 1346system.cpu1.CUs0.gmem_lanes_execution_dist::33-36 0 0.00% 50.00% # number of active lanes per global memory instruction 1347system.cpu1.CUs0.gmem_lanes_execution_dist::37-40 0 0.00% 50.00% # number of active lanes per global memory instruction 1348system.cpu1.CUs0.gmem_lanes_execution_dist::41-44 0 0.00% 50.00% # number of active lanes per global memory instruction 1349system.cpu1.CUs0.gmem_lanes_execution_dist::45-48 0 0.00% 50.00% # number of active lanes per global memory instruction 1350system.cpu1.CUs0.gmem_lanes_execution_dist::49-52 0 0.00% 50.00% # number of active lanes per global memory instruction 1351system.cpu1.CUs0.gmem_lanes_execution_dist::53-56 0 0.00% 50.00% # number of active lanes per global memory instruction 1352system.cpu1.CUs0.gmem_lanes_execution_dist::57-60 0 0.00% 50.00% # number of active lanes per global memory instruction 1353system.cpu1.CUs0.gmem_lanes_execution_dist::61-64 9 50.00% 100.00% # number of active lanes per global memory instruction 1354system.cpu1.CUs0.gmem_lanes_execution_dist::overflows 0 0.00% 100.00% # number of active lanes per global memory instruction 1355system.cpu1.CUs0.gmem_lanes_execution_dist::min_value 1 # number of active lanes per global memory instruction 1356system.cpu1.CUs0.gmem_lanes_execution_dist::max_value 64 # number of active lanes per global memory instruction 1357system.cpu1.CUs0.gmem_lanes_execution_dist::total 18 # number of active lanes per global memory instruction 1358system.cpu1.CUs0.lmem_lanes_execution_dist::samples 6 # number of active lanes per local memory instruction 1359system.cpu1.CUs0.lmem_lanes_execution_dist::mean 19.500000 # number of active lanes per local memory instruction 1360system.cpu1.CUs0.lmem_lanes_execution_dist::stdev 22.322634 # number of active lanes per local memory instruction 1361system.cpu1.CUs0.lmem_lanes_execution_dist::underflows 0 0.00% 0.00% # number of active lanes per local memory instruction 1362system.cpu1.CUs0.lmem_lanes_execution_dist::1-4 1 16.67% 16.67% # number of active lanes per local memory instruction 1363system.cpu1.CUs0.lmem_lanes_execution_dist::5-8 0 0.00% 16.67% # number of active lanes per local memory instruction 1364system.cpu1.CUs0.lmem_lanes_execution_dist::9-12 0 0.00% 16.67% # number of active lanes per local memory instruction 1365system.cpu1.CUs0.lmem_lanes_execution_dist::13-16 4 66.67% 83.33% # number of active lanes per local memory instruction 1366system.cpu1.CUs0.lmem_lanes_execution_dist::17-20 0 0.00% 83.33% # number of active lanes per local memory instruction 1367system.cpu1.CUs0.lmem_lanes_execution_dist::21-24 0 0.00% 83.33% # number of active lanes per local memory instruction 1368system.cpu1.CUs0.lmem_lanes_execution_dist::25-28 0 0.00% 83.33% # number of active lanes per local memory instruction 1369system.cpu1.CUs0.lmem_lanes_execution_dist::29-32 0 0.00% 83.33% # number of active lanes per local memory instruction 1370system.cpu1.CUs0.lmem_lanes_execution_dist::33-36 0 0.00% 83.33% # number of active lanes per local memory instruction 1371system.cpu1.CUs0.lmem_lanes_execution_dist::37-40 0 0.00% 83.33% # number of active lanes per local memory instruction 1372system.cpu1.CUs0.lmem_lanes_execution_dist::41-44 0 0.00% 83.33% # number of active lanes per local memory instruction 1373system.cpu1.CUs0.lmem_lanes_execution_dist::45-48 0 0.00% 83.33% # number of active lanes per local memory instruction 1374system.cpu1.CUs0.lmem_lanes_execution_dist::49-52 0 0.00% 83.33% # number of active lanes per local memory instruction 1375system.cpu1.CUs0.lmem_lanes_execution_dist::53-56 0 0.00% 83.33% # number of active lanes per local memory instruction 1376system.cpu1.CUs0.lmem_lanes_execution_dist::57-60 0 0.00% 83.33% # number of active lanes per local memory instruction 1377system.cpu1.CUs0.lmem_lanes_execution_dist::61-64 1 16.67% 100.00% # number of active lanes per local memory instruction 1378system.cpu1.CUs0.lmem_lanes_execution_dist::overflows 0 0.00% 100.00% # number of active lanes per local memory instruction 1379system.cpu1.CUs0.lmem_lanes_execution_dist::min_value 1 # number of active lanes per local memory instruction 1380system.cpu1.CUs0.lmem_lanes_execution_dist::max_value 64 # number of active lanes per local memory instruction 1381system.cpu1.CUs0.lmem_lanes_execution_dist::total 6 # number of active lanes per local memory instruction 1382system.cpu1.CUs0.num_alu_insts_executed 118 # Number of dynamic non-GM memory insts executed 1383system.cpu1.CUs0.times_wg_blocked_due_vgpr_alloc 0 # Number of times WGs are blocked due to VGPR allocation per SIMD 1384system.cpu1.CUs0.num_CAS_ops 0 # number of compare and swap operations 1385system.cpu1.CUs0.num_failed_CAS_ops 0 # number of compare and swap operations that failed 1386system.cpu1.CUs0.num_completed_wfs 4 # number of completed wavefronts 1387system.cpu1.CUs1.wavefronts00.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 1388system.cpu1.CUs1.wavefronts00.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 1389system.cpu1.CUs1.wavefronts00.timesBlockedDueRAWDependencies 216 # number of times the wf's instructions are blocked due to RAW dependencies 1390system.cpu1.CUs1.wavefronts00.src_reg_operand_dist::samples 39 # number of executed instructions with N source register operands 1391system.cpu1.CUs1.wavefronts00.src_reg_operand_dist::mean 0.794872 # number of executed instructions with N source register operands 1392system.cpu1.CUs1.wavefronts00.src_reg_operand_dist::stdev 0.863880 # number of executed instructions with N source register operands 1393system.cpu1.CUs1.wavefronts00.src_reg_operand_dist::underflows 0 0.00% 0.00% # number of executed instructions with N source register operands 1394system.cpu1.CUs1.wavefronts00.src_reg_operand_dist::0-1 28 71.79% 71.79% # number of executed instructions with N source register operands 1395system.cpu1.CUs1.wavefronts00.src_reg_operand_dist::2-3 11 28.21% 100.00% # number of executed instructions with N source register operands 1396system.cpu1.CUs1.wavefronts00.src_reg_operand_dist::4 0 0.00% 100.00% # number of executed instructions with N source register operands 1397system.cpu1.CUs1.wavefronts00.src_reg_operand_dist::overflows 0 0.00% 100.00% # number of executed instructions with N source register operands 1398system.cpu1.CUs1.wavefronts00.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 1399system.cpu1.CUs1.wavefronts00.src_reg_operand_dist::max_value 2 # number of executed instructions with N source register operands 1400system.cpu1.CUs1.wavefronts00.src_reg_operand_dist::total 39 # number of executed instructions with N source register operands 1401system.cpu1.CUs1.wavefronts00.dst_reg_operand_dist::samples 39 # number of executed instructions with N destination register operands 1402system.cpu1.CUs1.wavefronts00.dst_reg_operand_dist::mean 0.589744 # number of executed instructions with N destination register operands 1403system.cpu1.CUs1.wavefronts00.dst_reg_operand_dist::stdev 0.498310 # number of executed instructions with N destination register operands 1404system.cpu1.CUs1.wavefronts00.dst_reg_operand_dist::underflows 0 0.00% 0.00% # number of executed instructions with N destination register operands 1405system.cpu1.CUs1.wavefronts00.dst_reg_operand_dist::0-1 39 100.00% 100.00% # number of executed instructions with N destination register operands 1406system.cpu1.CUs1.wavefronts00.dst_reg_operand_dist::2-3 0 0.00% 100.00% # number of executed instructions with N destination register operands 1407system.cpu1.CUs1.wavefronts00.dst_reg_operand_dist::overflows 0 0.00% 100.00% # number of executed instructions with N destination register operands 1408system.cpu1.CUs1.wavefronts00.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 1409system.cpu1.CUs1.wavefronts00.dst_reg_operand_dist::max_value 1 # number of executed instructions with N destination register operands 1410system.cpu1.CUs1.wavefronts00.dst_reg_operand_dist::total 39 # number of executed instructions with N destination register operands 1411system.cpu1.CUs1.wavefronts01.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 1412system.cpu1.CUs1.wavefronts01.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 1413system.cpu1.CUs1.wavefronts01.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 1414system.cpu1.CUs1.wavefronts01.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 1415system.cpu1.CUs1.wavefronts01.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 1416system.cpu1.CUs1.wavefronts01.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 1417system.cpu1.CUs1.wavefronts01.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 1418system.cpu1.CUs1.wavefronts01.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 1419system.cpu1.CUs1.wavefronts01.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 1420system.cpu1.CUs1.wavefronts01.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 1421system.cpu1.CUs1.wavefronts01.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 1422system.cpu1.CUs1.wavefronts01.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 1423system.cpu1.CUs1.wavefronts01.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 1424system.cpu1.CUs1.wavefronts01.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 1425system.cpu1.CUs1.wavefronts01.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 1426system.cpu1.CUs1.wavefronts01.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 1427system.cpu1.CUs1.wavefronts01.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 1428system.cpu1.CUs1.wavefronts01.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 1429system.cpu1.CUs1.wavefronts01.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 1430system.cpu1.CUs1.wavefronts01.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 1431system.cpu1.CUs1.wavefronts01.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 1432system.cpu1.CUs1.wavefronts01.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 1433system.cpu1.CUs1.wavefronts01.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 1434system.cpu1.CUs1.wavefronts01.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 1435system.cpu1.CUs1.wavefronts02.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 1436system.cpu1.CUs1.wavefronts02.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 1437system.cpu1.CUs1.wavefronts02.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 1438system.cpu1.CUs1.wavefronts02.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 1439system.cpu1.CUs1.wavefronts02.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 1440system.cpu1.CUs1.wavefronts02.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 1441system.cpu1.CUs1.wavefronts02.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 1442system.cpu1.CUs1.wavefronts02.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 1443system.cpu1.CUs1.wavefronts02.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 1444system.cpu1.CUs1.wavefronts02.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 1445system.cpu1.CUs1.wavefronts02.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 1446system.cpu1.CUs1.wavefronts02.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 1447system.cpu1.CUs1.wavefronts02.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 1448system.cpu1.CUs1.wavefronts02.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 1449system.cpu1.CUs1.wavefronts02.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 1450system.cpu1.CUs1.wavefronts02.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 1451system.cpu1.CUs1.wavefronts02.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 1452system.cpu1.CUs1.wavefronts02.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 1453system.cpu1.CUs1.wavefronts02.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 1454system.cpu1.CUs1.wavefronts02.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 1455system.cpu1.CUs1.wavefronts02.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 1456system.cpu1.CUs1.wavefronts02.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 1457system.cpu1.CUs1.wavefronts02.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 1458system.cpu1.CUs1.wavefronts02.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 1459system.cpu1.CUs1.wavefronts03.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 1460system.cpu1.CUs1.wavefronts03.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 1461system.cpu1.CUs1.wavefronts03.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 1462system.cpu1.CUs1.wavefronts03.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 1463system.cpu1.CUs1.wavefronts03.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 1464system.cpu1.CUs1.wavefronts03.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 1465system.cpu1.CUs1.wavefronts03.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 1466system.cpu1.CUs1.wavefronts03.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 1467system.cpu1.CUs1.wavefronts03.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 1468system.cpu1.CUs1.wavefronts03.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 1469system.cpu1.CUs1.wavefronts03.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 1470system.cpu1.CUs1.wavefronts03.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 1471system.cpu1.CUs1.wavefronts03.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 1472system.cpu1.CUs1.wavefronts03.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 1473system.cpu1.CUs1.wavefronts03.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 1474system.cpu1.CUs1.wavefronts03.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 1475system.cpu1.CUs1.wavefronts03.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 1476system.cpu1.CUs1.wavefronts03.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 1477system.cpu1.CUs1.wavefronts03.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 1478system.cpu1.CUs1.wavefronts03.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 1479system.cpu1.CUs1.wavefronts03.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 1480system.cpu1.CUs1.wavefronts03.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 1481system.cpu1.CUs1.wavefronts03.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 1482system.cpu1.CUs1.wavefronts03.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 1483system.cpu1.CUs1.wavefronts04.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 1484system.cpu1.CUs1.wavefronts04.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 1485system.cpu1.CUs1.wavefronts04.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 1486system.cpu1.CUs1.wavefronts04.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 1487system.cpu1.CUs1.wavefronts04.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 1488system.cpu1.CUs1.wavefronts04.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 1489system.cpu1.CUs1.wavefronts04.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 1490system.cpu1.CUs1.wavefronts04.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 1491system.cpu1.CUs1.wavefronts04.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 1492system.cpu1.CUs1.wavefronts04.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 1493system.cpu1.CUs1.wavefronts04.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 1494system.cpu1.CUs1.wavefronts04.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 1495system.cpu1.CUs1.wavefronts04.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 1496system.cpu1.CUs1.wavefronts04.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 1497system.cpu1.CUs1.wavefronts04.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 1498system.cpu1.CUs1.wavefronts04.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 1499system.cpu1.CUs1.wavefronts04.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 1500system.cpu1.CUs1.wavefronts04.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 1501system.cpu1.CUs1.wavefronts04.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 1502system.cpu1.CUs1.wavefronts04.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 1503system.cpu1.CUs1.wavefronts04.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 1504system.cpu1.CUs1.wavefronts04.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 1505system.cpu1.CUs1.wavefronts04.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 1506system.cpu1.CUs1.wavefronts04.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 1507system.cpu1.CUs1.wavefronts05.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 1508system.cpu1.CUs1.wavefronts05.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 1509system.cpu1.CUs1.wavefronts05.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 1510system.cpu1.CUs1.wavefronts05.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 1511system.cpu1.CUs1.wavefronts05.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 1512system.cpu1.CUs1.wavefronts05.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 1513system.cpu1.CUs1.wavefronts05.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 1514system.cpu1.CUs1.wavefronts05.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 1515system.cpu1.CUs1.wavefronts05.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 1516system.cpu1.CUs1.wavefronts05.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 1517system.cpu1.CUs1.wavefronts05.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 1518system.cpu1.CUs1.wavefronts05.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 1519system.cpu1.CUs1.wavefronts05.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 1520system.cpu1.CUs1.wavefronts05.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 1521system.cpu1.CUs1.wavefronts05.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 1522system.cpu1.CUs1.wavefronts05.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 1523system.cpu1.CUs1.wavefronts05.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 1524system.cpu1.CUs1.wavefronts05.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 1525system.cpu1.CUs1.wavefronts05.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 1526system.cpu1.CUs1.wavefronts05.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 1527system.cpu1.CUs1.wavefronts05.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 1528system.cpu1.CUs1.wavefronts05.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 1529system.cpu1.CUs1.wavefronts05.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 1530system.cpu1.CUs1.wavefronts05.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 1531system.cpu1.CUs1.wavefronts06.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 1532system.cpu1.CUs1.wavefronts06.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 1533system.cpu1.CUs1.wavefronts06.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 1534system.cpu1.CUs1.wavefronts06.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 1535system.cpu1.CUs1.wavefronts06.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 1536system.cpu1.CUs1.wavefronts06.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 1537system.cpu1.CUs1.wavefronts06.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 1538system.cpu1.CUs1.wavefronts06.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 1539system.cpu1.CUs1.wavefronts06.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 1540system.cpu1.CUs1.wavefronts06.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 1541system.cpu1.CUs1.wavefronts06.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 1542system.cpu1.CUs1.wavefronts06.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 1543system.cpu1.CUs1.wavefronts06.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 1544system.cpu1.CUs1.wavefronts06.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 1545system.cpu1.CUs1.wavefronts06.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 1546system.cpu1.CUs1.wavefronts06.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 1547system.cpu1.CUs1.wavefronts06.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 1548system.cpu1.CUs1.wavefronts06.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 1549system.cpu1.CUs1.wavefronts06.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 1550system.cpu1.CUs1.wavefronts06.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 1551system.cpu1.CUs1.wavefronts06.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 1552system.cpu1.CUs1.wavefronts06.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 1553system.cpu1.CUs1.wavefronts06.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 1554system.cpu1.CUs1.wavefronts06.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 1555system.cpu1.CUs1.wavefronts07.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 1556system.cpu1.CUs1.wavefronts07.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 1557system.cpu1.CUs1.wavefronts07.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 1558system.cpu1.CUs1.wavefronts07.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 1559system.cpu1.CUs1.wavefronts07.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 1560system.cpu1.CUs1.wavefronts07.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 1561system.cpu1.CUs1.wavefronts07.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 1562system.cpu1.CUs1.wavefronts07.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 1563system.cpu1.CUs1.wavefronts07.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 1564system.cpu1.CUs1.wavefronts07.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 1565system.cpu1.CUs1.wavefronts07.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 1566system.cpu1.CUs1.wavefronts07.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 1567system.cpu1.CUs1.wavefronts07.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 1568system.cpu1.CUs1.wavefronts07.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 1569system.cpu1.CUs1.wavefronts07.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 1570system.cpu1.CUs1.wavefronts07.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 1571system.cpu1.CUs1.wavefronts07.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 1572system.cpu1.CUs1.wavefronts07.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 1573system.cpu1.CUs1.wavefronts07.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 1574system.cpu1.CUs1.wavefronts07.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 1575system.cpu1.CUs1.wavefronts07.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 1576system.cpu1.CUs1.wavefronts07.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 1577system.cpu1.CUs1.wavefronts07.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 1578system.cpu1.CUs1.wavefronts07.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 1579system.cpu1.CUs1.wavefronts08.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 1580system.cpu1.CUs1.wavefronts08.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 1581system.cpu1.CUs1.wavefronts08.timesBlockedDueRAWDependencies 195 # number of times the wf's instructions are blocked due to RAW dependencies 1582system.cpu1.CUs1.wavefronts08.src_reg_operand_dist::samples 34 # number of executed instructions with N source register operands 1583system.cpu1.CUs1.wavefronts08.src_reg_operand_dist::mean 0.852941 # number of executed instructions with N source register operands 1584system.cpu1.CUs1.wavefronts08.src_reg_operand_dist::stdev 0.857493 # number of executed instructions with N source register operands 1585system.cpu1.CUs1.wavefronts08.src_reg_operand_dist::underflows 0 0.00% 0.00% # number of executed instructions with N source register operands 1586system.cpu1.CUs1.wavefronts08.src_reg_operand_dist::0-1 24 70.59% 70.59% # number of executed instructions with N source register operands 1587system.cpu1.CUs1.wavefronts08.src_reg_operand_dist::2-3 10 29.41% 100.00% # number of executed instructions with N source register operands 1588system.cpu1.CUs1.wavefronts08.src_reg_operand_dist::4 0 0.00% 100.00% # number of executed instructions with N source register operands 1589system.cpu1.CUs1.wavefronts08.src_reg_operand_dist::overflows 0 0.00% 100.00% # number of executed instructions with N source register operands 1590system.cpu1.CUs1.wavefronts08.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 1591system.cpu1.CUs1.wavefronts08.src_reg_operand_dist::max_value 2 # number of executed instructions with N source register operands 1592system.cpu1.CUs1.wavefronts08.src_reg_operand_dist::total 34 # number of executed instructions with N source register operands 1593system.cpu1.CUs1.wavefronts08.dst_reg_operand_dist::samples 34 # number of executed instructions with N destination register operands 1594system.cpu1.CUs1.wavefronts08.dst_reg_operand_dist::mean 0.617647 # number of executed instructions with N destination register operands 1595system.cpu1.CUs1.wavefronts08.dst_reg_operand_dist::stdev 0.493270 # number of executed instructions with N destination register operands 1596system.cpu1.CUs1.wavefronts08.dst_reg_operand_dist::underflows 0 0.00% 0.00% # number of executed instructions with N destination register operands 1597system.cpu1.CUs1.wavefronts08.dst_reg_operand_dist::0-1 34 100.00% 100.00% # number of executed instructions with N destination register operands 1598system.cpu1.CUs1.wavefronts08.dst_reg_operand_dist::2-3 0 0.00% 100.00% # number of executed instructions with N destination register operands 1599system.cpu1.CUs1.wavefronts08.dst_reg_operand_dist::overflows 0 0.00% 100.00% # number of executed instructions with N destination register operands 1600system.cpu1.CUs1.wavefronts08.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 1601system.cpu1.CUs1.wavefronts08.dst_reg_operand_dist::max_value 1 # number of executed instructions with N destination register operands 1602system.cpu1.CUs1.wavefronts08.dst_reg_operand_dist::total 34 # number of executed instructions with N destination register operands 1603system.cpu1.CUs1.wavefronts09.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 1604system.cpu1.CUs1.wavefronts09.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 1605system.cpu1.CUs1.wavefronts09.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 1606system.cpu1.CUs1.wavefronts09.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 1607system.cpu1.CUs1.wavefronts09.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 1608system.cpu1.CUs1.wavefronts09.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 1609system.cpu1.CUs1.wavefronts09.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 1610system.cpu1.CUs1.wavefronts09.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 1611system.cpu1.CUs1.wavefronts09.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 1612system.cpu1.CUs1.wavefronts09.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 1613system.cpu1.CUs1.wavefronts09.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 1614system.cpu1.CUs1.wavefronts09.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 1615system.cpu1.CUs1.wavefronts09.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 1616system.cpu1.CUs1.wavefronts09.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 1617system.cpu1.CUs1.wavefronts09.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 1618system.cpu1.CUs1.wavefronts09.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 1619system.cpu1.CUs1.wavefronts09.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 1620system.cpu1.CUs1.wavefronts09.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 1621system.cpu1.CUs1.wavefronts09.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 1622system.cpu1.CUs1.wavefronts09.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 1623system.cpu1.CUs1.wavefronts09.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 1624system.cpu1.CUs1.wavefronts09.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 1625system.cpu1.CUs1.wavefronts09.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 1626system.cpu1.CUs1.wavefronts09.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 1627system.cpu1.CUs1.wavefronts10.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 1628system.cpu1.CUs1.wavefronts10.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 1629system.cpu1.CUs1.wavefronts10.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 1630system.cpu1.CUs1.wavefronts10.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 1631system.cpu1.CUs1.wavefronts10.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 1632system.cpu1.CUs1.wavefronts10.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 1633system.cpu1.CUs1.wavefronts10.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 1634system.cpu1.CUs1.wavefronts10.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 1635system.cpu1.CUs1.wavefronts10.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 1636system.cpu1.CUs1.wavefronts10.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 1637system.cpu1.CUs1.wavefronts10.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 1638system.cpu1.CUs1.wavefronts10.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 1639system.cpu1.CUs1.wavefronts10.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 1640system.cpu1.CUs1.wavefronts10.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 1641system.cpu1.CUs1.wavefronts10.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 1642system.cpu1.CUs1.wavefronts10.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 1643system.cpu1.CUs1.wavefronts10.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 1644system.cpu1.CUs1.wavefronts10.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 1645system.cpu1.CUs1.wavefronts10.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 1646system.cpu1.CUs1.wavefronts10.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 1647system.cpu1.CUs1.wavefronts10.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 1648system.cpu1.CUs1.wavefronts10.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 1649system.cpu1.CUs1.wavefronts10.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 1650system.cpu1.CUs1.wavefronts10.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 1651system.cpu1.CUs1.wavefronts11.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 1652system.cpu1.CUs1.wavefronts11.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 1653system.cpu1.CUs1.wavefronts11.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 1654system.cpu1.CUs1.wavefronts11.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 1655system.cpu1.CUs1.wavefronts11.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 1656system.cpu1.CUs1.wavefronts11.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 1657system.cpu1.CUs1.wavefronts11.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 1658system.cpu1.CUs1.wavefronts11.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 1659system.cpu1.CUs1.wavefronts11.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 1660system.cpu1.CUs1.wavefronts11.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 1661system.cpu1.CUs1.wavefronts11.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 1662system.cpu1.CUs1.wavefronts11.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 1663system.cpu1.CUs1.wavefronts11.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 1664system.cpu1.CUs1.wavefronts11.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 1665system.cpu1.CUs1.wavefronts11.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 1666system.cpu1.CUs1.wavefronts11.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 1667system.cpu1.CUs1.wavefronts11.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 1668system.cpu1.CUs1.wavefronts11.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 1669system.cpu1.CUs1.wavefronts11.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 1670system.cpu1.CUs1.wavefronts11.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 1671system.cpu1.CUs1.wavefronts11.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 1672system.cpu1.CUs1.wavefronts11.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 1673system.cpu1.CUs1.wavefronts11.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 1674system.cpu1.CUs1.wavefronts11.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 1675system.cpu1.CUs1.wavefronts12.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 1676system.cpu1.CUs1.wavefronts12.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 1677system.cpu1.CUs1.wavefronts12.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 1678system.cpu1.CUs1.wavefronts12.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 1679system.cpu1.CUs1.wavefronts12.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 1680system.cpu1.CUs1.wavefronts12.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 1681system.cpu1.CUs1.wavefronts12.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 1682system.cpu1.CUs1.wavefronts12.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 1683system.cpu1.CUs1.wavefronts12.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 1684system.cpu1.CUs1.wavefronts12.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 1685system.cpu1.CUs1.wavefronts12.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 1686system.cpu1.CUs1.wavefronts12.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 1687system.cpu1.CUs1.wavefronts12.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 1688system.cpu1.CUs1.wavefronts12.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 1689system.cpu1.CUs1.wavefronts12.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 1690system.cpu1.CUs1.wavefronts12.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 1691system.cpu1.CUs1.wavefronts12.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 1692system.cpu1.CUs1.wavefronts12.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 1693system.cpu1.CUs1.wavefronts12.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 1694system.cpu1.CUs1.wavefronts12.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 1695system.cpu1.CUs1.wavefronts12.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 1696system.cpu1.CUs1.wavefronts12.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 1697system.cpu1.CUs1.wavefronts12.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 1698system.cpu1.CUs1.wavefronts12.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 1699system.cpu1.CUs1.wavefronts13.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 1700system.cpu1.CUs1.wavefronts13.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 1701system.cpu1.CUs1.wavefronts13.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 1702system.cpu1.CUs1.wavefronts13.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 1703system.cpu1.CUs1.wavefronts13.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 1704system.cpu1.CUs1.wavefronts13.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 1705system.cpu1.CUs1.wavefronts13.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 1706system.cpu1.CUs1.wavefronts13.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 1707system.cpu1.CUs1.wavefronts13.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 1708system.cpu1.CUs1.wavefronts13.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 1709system.cpu1.CUs1.wavefronts13.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 1710system.cpu1.CUs1.wavefronts13.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 1711system.cpu1.CUs1.wavefronts13.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 1712system.cpu1.CUs1.wavefronts13.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 1713system.cpu1.CUs1.wavefronts13.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 1714system.cpu1.CUs1.wavefronts13.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 1715system.cpu1.CUs1.wavefronts13.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 1716system.cpu1.CUs1.wavefronts13.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 1717system.cpu1.CUs1.wavefronts13.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 1718system.cpu1.CUs1.wavefronts13.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 1719system.cpu1.CUs1.wavefronts13.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 1720system.cpu1.CUs1.wavefronts13.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 1721system.cpu1.CUs1.wavefronts13.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 1722system.cpu1.CUs1.wavefronts13.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 1723system.cpu1.CUs1.wavefronts14.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 1724system.cpu1.CUs1.wavefronts14.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 1725system.cpu1.CUs1.wavefronts14.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 1726system.cpu1.CUs1.wavefronts14.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 1727system.cpu1.CUs1.wavefronts14.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 1728system.cpu1.CUs1.wavefronts14.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 1729system.cpu1.CUs1.wavefronts14.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 1730system.cpu1.CUs1.wavefronts14.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 1731system.cpu1.CUs1.wavefronts14.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 1732system.cpu1.CUs1.wavefronts14.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 1733system.cpu1.CUs1.wavefronts14.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 1734system.cpu1.CUs1.wavefronts14.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 1735system.cpu1.CUs1.wavefronts14.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 1736system.cpu1.CUs1.wavefronts14.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 1737system.cpu1.CUs1.wavefronts14.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 1738system.cpu1.CUs1.wavefronts14.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 1739system.cpu1.CUs1.wavefronts14.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 1740system.cpu1.CUs1.wavefronts14.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 1741system.cpu1.CUs1.wavefronts14.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 1742system.cpu1.CUs1.wavefronts14.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 1743system.cpu1.CUs1.wavefronts14.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 1744system.cpu1.CUs1.wavefronts14.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 1745system.cpu1.CUs1.wavefronts14.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 1746system.cpu1.CUs1.wavefronts14.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 1747system.cpu1.CUs1.wavefronts15.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 1748system.cpu1.CUs1.wavefronts15.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 1749system.cpu1.CUs1.wavefronts15.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 1750system.cpu1.CUs1.wavefronts15.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 1751system.cpu1.CUs1.wavefronts15.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 1752system.cpu1.CUs1.wavefronts15.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 1753system.cpu1.CUs1.wavefronts15.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 1754system.cpu1.CUs1.wavefronts15.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 1755system.cpu1.CUs1.wavefronts15.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 1756system.cpu1.CUs1.wavefronts15.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 1757system.cpu1.CUs1.wavefronts15.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 1758system.cpu1.CUs1.wavefronts15.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 1759system.cpu1.CUs1.wavefronts15.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 1760system.cpu1.CUs1.wavefronts15.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 1761system.cpu1.CUs1.wavefronts15.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 1762system.cpu1.CUs1.wavefronts15.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 1763system.cpu1.CUs1.wavefronts15.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 1764system.cpu1.CUs1.wavefronts15.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 1765system.cpu1.CUs1.wavefronts15.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 1766system.cpu1.CUs1.wavefronts15.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 1767system.cpu1.CUs1.wavefronts15.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 1768system.cpu1.CUs1.wavefronts15.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 1769system.cpu1.CUs1.wavefronts15.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 1770system.cpu1.CUs1.wavefronts15.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 1771system.cpu1.CUs1.wavefronts16.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 1772system.cpu1.CUs1.wavefronts16.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 1773system.cpu1.CUs1.wavefronts16.timesBlockedDueRAWDependencies 190 # number of times the wf's instructions are blocked due to RAW dependencies 1774system.cpu1.CUs1.wavefronts16.src_reg_operand_dist::samples 34 # number of executed instructions with N source register operands 1775system.cpu1.CUs1.wavefronts16.src_reg_operand_dist::mean 0.852941 # number of executed instructions with N source register operands 1776system.cpu1.CUs1.wavefronts16.src_reg_operand_dist::stdev 0.857493 # number of executed instructions with N source register operands 1777system.cpu1.CUs1.wavefronts16.src_reg_operand_dist::underflows 0 0.00% 0.00% # number of executed instructions with N source register operands 1778system.cpu1.CUs1.wavefronts16.src_reg_operand_dist::0-1 24 70.59% 70.59% # number of executed instructions with N source register operands 1779system.cpu1.CUs1.wavefronts16.src_reg_operand_dist::2-3 10 29.41% 100.00% # number of executed instructions with N source register operands 1780system.cpu1.CUs1.wavefronts16.src_reg_operand_dist::4 0 0.00% 100.00% # number of executed instructions with N source register operands 1781system.cpu1.CUs1.wavefronts16.src_reg_operand_dist::overflows 0 0.00% 100.00% # number of executed instructions with N source register operands 1782system.cpu1.CUs1.wavefronts16.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 1783system.cpu1.CUs1.wavefronts16.src_reg_operand_dist::max_value 2 # number of executed instructions with N source register operands 1784system.cpu1.CUs1.wavefronts16.src_reg_operand_dist::total 34 # number of executed instructions with N source register operands 1785system.cpu1.CUs1.wavefronts16.dst_reg_operand_dist::samples 34 # number of executed instructions with N destination register operands 1786system.cpu1.CUs1.wavefronts16.dst_reg_operand_dist::mean 0.617647 # number of executed instructions with N destination register operands 1787system.cpu1.CUs1.wavefronts16.dst_reg_operand_dist::stdev 0.493270 # number of executed instructions with N destination register operands 1788system.cpu1.CUs1.wavefronts16.dst_reg_operand_dist::underflows 0 0.00% 0.00% # number of executed instructions with N destination register operands 1789system.cpu1.CUs1.wavefronts16.dst_reg_operand_dist::0-1 34 100.00% 100.00% # number of executed instructions with N destination register operands 1790system.cpu1.CUs1.wavefronts16.dst_reg_operand_dist::2-3 0 0.00% 100.00% # number of executed instructions with N destination register operands 1791system.cpu1.CUs1.wavefronts16.dst_reg_operand_dist::overflows 0 0.00% 100.00% # number of executed instructions with N destination register operands 1792system.cpu1.CUs1.wavefronts16.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 1793system.cpu1.CUs1.wavefronts16.dst_reg_operand_dist::max_value 1 # number of executed instructions with N destination register operands 1794system.cpu1.CUs1.wavefronts16.dst_reg_operand_dist::total 34 # number of executed instructions with N destination register operands 1795system.cpu1.CUs1.wavefronts17.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 1796system.cpu1.CUs1.wavefronts17.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 1797system.cpu1.CUs1.wavefronts17.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 1798system.cpu1.CUs1.wavefronts17.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 1799system.cpu1.CUs1.wavefronts17.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 1800system.cpu1.CUs1.wavefronts17.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 1801system.cpu1.CUs1.wavefronts17.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 1802system.cpu1.CUs1.wavefronts17.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 1803system.cpu1.CUs1.wavefronts17.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 1804system.cpu1.CUs1.wavefronts17.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 1805system.cpu1.CUs1.wavefronts17.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 1806system.cpu1.CUs1.wavefronts17.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 1807system.cpu1.CUs1.wavefronts17.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 1808system.cpu1.CUs1.wavefronts17.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 1809system.cpu1.CUs1.wavefronts17.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 1810system.cpu1.CUs1.wavefronts17.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 1811system.cpu1.CUs1.wavefronts17.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 1812system.cpu1.CUs1.wavefronts17.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 1813system.cpu1.CUs1.wavefronts17.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 1814system.cpu1.CUs1.wavefronts17.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 1815system.cpu1.CUs1.wavefronts17.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 1816system.cpu1.CUs1.wavefronts17.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 1817system.cpu1.CUs1.wavefronts17.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 1818system.cpu1.CUs1.wavefronts17.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 1819system.cpu1.CUs1.wavefronts18.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 1820system.cpu1.CUs1.wavefronts18.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 1821system.cpu1.CUs1.wavefronts18.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 1822system.cpu1.CUs1.wavefronts18.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 1823system.cpu1.CUs1.wavefronts18.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 1824system.cpu1.CUs1.wavefronts18.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 1825system.cpu1.CUs1.wavefronts18.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 1826system.cpu1.CUs1.wavefronts18.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 1827system.cpu1.CUs1.wavefronts18.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 1828system.cpu1.CUs1.wavefronts18.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 1829system.cpu1.CUs1.wavefronts18.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 1830system.cpu1.CUs1.wavefronts18.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 1831system.cpu1.CUs1.wavefronts18.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 1832system.cpu1.CUs1.wavefronts18.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 1833system.cpu1.CUs1.wavefronts18.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 1834system.cpu1.CUs1.wavefronts18.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 1835system.cpu1.CUs1.wavefronts18.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 1836system.cpu1.CUs1.wavefronts18.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 1837system.cpu1.CUs1.wavefronts18.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 1838system.cpu1.CUs1.wavefronts18.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 1839system.cpu1.CUs1.wavefronts18.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 1840system.cpu1.CUs1.wavefronts18.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 1841system.cpu1.CUs1.wavefronts18.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 1842system.cpu1.CUs1.wavefronts18.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 1843system.cpu1.CUs1.wavefronts19.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 1844system.cpu1.CUs1.wavefronts19.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 1845system.cpu1.CUs1.wavefronts19.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 1846system.cpu1.CUs1.wavefronts19.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 1847system.cpu1.CUs1.wavefronts19.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 1848system.cpu1.CUs1.wavefronts19.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 1849system.cpu1.CUs1.wavefronts19.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 1850system.cpu1.CUs1.wavefronts19.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 1851system.cpu1.CUs1.wavefronts19.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 1852system.cpu1.CUs1.wavefronts19.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 1853system.cpu1.CUs1.wavefronts19.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 1854system.cpu1.CUs1.wavefronts19.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 1855system.cpu1.CUs1.wavefronts19.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 1856system.cpu1.CUs1.wavefronts19.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 1857system.cpu1.CUs1.wavefronts19.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 1858system.cpu1.CUs1.wavefronts19.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 1859system.cpu1.CUs1.wavefronts19.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 1860system.cpu1.CUs1.wavefronts19.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 1861system.cpu1.CUs1.wavefronts19.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 1862system.cpu1.CUs1.wavefronts19.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 1863system.cpu1.CUs1.wavefronts19.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 1864system.cpu1.CUs1.wavefronts19.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 1865system.cpu1.CUs1.wavefronts19.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 1866system.cpu1.CUs1.wavefronts19.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 1867system.cpu1.CUs1.wavefronts20.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 1868system.cpu1.CUs1.wavefronts20.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 1869system.cpu1.CUs1.wavefronts20.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 1870system.cpu1.CUs1.wavefronts20.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 1871system.cpu1.CUs1.wavefronts20.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 1872system.cpu1.CUs1.wavefronts20.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 1873system.cpu1.CUs1.wavefronts20.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 1874system.cpu1.CUs1.wavefronts20.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 1875system.cpu1.CUs1.wavefronts20.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 1876system.cpu1.CUs1.wavefronts20.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 1877system.cpu1.CUs1.wavefronts20.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 1878system.cpu1.CUs1.wavefronts20.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 1879system.cpu1.CUs1.wavefronts20.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 1880system.cpu1.CUs1.wavefronts20.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 1881system.cpu1.CUs1.wavefronts20.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 1882system.cpu1.CUs1.wavefronts20.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 1883system.cpu1.CUs1.wavefronts20.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 1884system.cpu1.CUs1.wavefronts20.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 1885system.cpu1.CUs1.wavefronts20.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 1886system.cpu1.CUs1.wavefronts20.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 1887system.cpu1.CUs1.wavefronts20.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 1888system.cpu1.CUs1.wavefronts20.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 1889system.cpu1.CUs1.wavefronts20.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 1890system.cpu1.CUs1.wavefronts20.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 1891system.cpu1.CUs1.wavefronts21.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 1892system.cpu1.CUs1.wavefronts21.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 1893system.cpu1.CUs1.wavefronts21.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 1894system.cpu1.CUs1.wavefronts21.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 1895system.cpu1.CUs1.wavefronts21.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 1896system.cpu1.CUs1.wavefronts21.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 1897system.cpu1.CUs1.wavefronts21.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 1898system.cpu1.CUs1.wavefronts21.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 1899system.cpu1.CUs1.wavefronts21.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 1900system.cpu1.CUs1.wavefronts21.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 1901system.cpu1.CUs1.wavefronts21.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 1902system.cpu1.CUs1.wavefronts21.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 1903system.cpu1.CUs1.wavefronts21.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 1904system.cpu1.CUs1.wavefronts21.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 1905system.cpu1.CUs1.wavefronts21.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 1906system.cpu1.CUs1.wavefronts21.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 1907system.cpu1.CUs1.wavefronts21.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 1908system.cpu1.CUs1.wavefronts21.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 1909system.cpu1.CUs1.wavefronts21.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 1910system.cpu1.CUs1.wavefronts21.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 1911system.cpu1.CUs1.wavefronts21.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 1912system.cpu1.CUs1.wavefronts21.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 1913system.cpu1.CUs1.wavefronts21.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 1914system.cpu1.CUs1.wavefronts21.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 1915system.cpu1.CUs1.wavefronts22.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 1916system.cpu1.CUs1.wavefronts22.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 1917system.cpu1.CUs1.wavefronts22.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 1918system.cpu1.CUs1.wavefronts22.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 1919system.cpu1.CUs1.wavefronts22.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 1920system.cpu1.CUs1.wavefronts22.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 1921system.cpu1.CUs1.wavefronts22.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 1922system.cpu1.CUs1.wavefronts22.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 1923system.cpu1.CUs1.wavefronts22.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 1924system.cpu1.CUs1.wavefronts22.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 1925system.cpu1.CUs1.wavefronts22.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 1926system.cpu1.CUs1.wavefronts22.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 1927system.cpu1.CUs1.wavefronts22.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 1928system.cpu1.CUs1.wavefronts22.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 1929system.cpu1.CUs1.wavefronts22.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 1930system.cpu1.CUs1.wavefronts22.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 1931system.cpu1.CUs1.wavefronts22.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 1932system.cpu1.CUs1.wavefronts22.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 1933system.cpu1.CUs1.wavefronts22.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 1934system.cpu1.CUs1.wavefronts22.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 1935system.cpu1.CUs1.wavefronts22.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 1936system.cpu1.CUs1.wavefronts22.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 1937system.cpu1.CUs1.wavefronts22.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 1938system.cpu1.CUs1.wavefronts22.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 1939system.cpu1.CUs1.wavefronts23.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 1940system.cpu1.CUs1.wavefronts23.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 1941system.cpu1.CUs1.wavefronts23.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 1942system.cpu1.CUs1.wavefronts23.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 1943system.cpu1.CUs1.wavefronts23.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 1944system.cpu1.CUs1.wavefronts23.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 1945system.cpu1.CUs1.wavefronts23.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 1946system.cpu1.CUs1.wavefronts23.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 1947system.cpu1.CUs1.wavefronts23.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 1948system.cpu1.CUs1.wavefronts23.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 1949system.cpu1.CUs1.wavefronts23.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 1950system.cpu1.CUs1.wavefronts23.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 1951system.cpu1.CUs1.wavefronts23.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 1952system.cpu1.CUs1.wavefronts23.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 1953system.cpu1.CUs1.wavefronts23.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 1954system.cpu1.CUs1.wavefronts23.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 1955system.cpu1.CUs1.wavefronts23.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 1956system.cpu1.CUs1.wavefronts23.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 1957system.cpu1.CUs1.wavefronts23.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 1958system.cpu1.CUs1.wavefronts23.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 1959system.cpu1.CUs1.wavefronts23.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 1960system.cpu1.CUs1.wavefronts23.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 1961system.cpu1.CUs1.wavefronts23.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 1962system.cpu1.CUs1.wavefronts23.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 1963system.cpu1.CUs1.wavefronts24.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 1964system.cpu1.CUs1.wavefronts24.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 1965system.cpu1.CUs1.wavefronts24.timesBlockedDueRAWDependencies 176 # number of times the wf's instructions are blocked due to RAW dependencies 1966system.cpu1.CUs1.wavefronts24.src_reg_operand_dist::samples 34 # number of executed instructions with N source register operands 1967system.cpu1.CUs1.wavefronts24.src_reg_operand_dist::mean 0.852941 # number of executed instructions with N source register operands 1968system.cpu1.CUs1.wavefronts24.src_reg_operand_dist::stdev 0.857493 # number of executed instructions with N source register operands 1969system.cpu1.CUs1.wavefronts24.src_reg_operand_dist::underflows 0 0.00% 0.00% # number of executed instructions with N source register operands 1970system.cpu1.CUs1.wavefronts24.src_reg_operand_dist::0-1 24 70.59% 70.59% # number of executed instructions with N source register operands 1971system.cpu1.CUs1.wavefronts24.src_reg_operand_dist::2-3 10 29.41% 100.00% # number of executed instructions with N source register operands 1972system.cpu1.CUs1.wavefronts24.src_reg_operand_dist::4 0 0.00% 100.00% # number of executed instructions with N source register operands 1973system.cpu1.CUs1.wavefronts24.src_reg_operand_dist::overflows 0 0.00% 100.00% # number of executed instructions with N source register operands 1974system.cpu1.CUs1.wavefronts24.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 1975system.cpu1.CUs1.wavefronts24.src_reg_operand_dist::max_value 2 # number of executed instructions with N source register operands 1976system.cpu1.CUs1.wavefronts24.src_reg_operand_dist::total 34 # number of executed instructions with N source register operands 1977system.cpu1.CUs1.wavefronts24.dst_reg_operand_dist::samples 34 # number of executed instructions with N destination register operands 1978system.cpu1.CUs1.wavefronts24.dst_reg_operand_dist::mean 0.617647 # number of executed instructions with N destination register operands 1979system.cpu1.CUs1.wavefronts24.dst_reg_operand_dist::stdev 0.493270 # number of executed instructions with N destination register operands 1980system.cpu1.CUs1.wavefronts24.dst_reg_operand_dist::underflows 0 0.00% 0.00% # number of executed instructions with N destination register operands 1981system.cpu1.CUs1.wavefronts24.dst_reg_operand_dist::0-1 34 100.00% 100.00% # number of executed instructions with N destination register operands 1982system.cpu1.CUs1.wavefronts24.dst_reg_operand_dist::2-3 0 0.00% 100.00% # number of executed instructions with N destination register operands 1983system.cpu1.CUs1.wavefronts24.dst_reg_operand_dist::overflows 0 0.00% 100.00% # number of executed instructions with N destination register operands 1984system.cpu1.CUs1.wavefronts24.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 1985system.cpu1.CUs1.wavefronts24.dst_reg_operand_dist::max_value 1 # number of executed instructions with N destination register operands 1986system.cpu1.CUs1.wavefronts24.dst_reg_operand_dist::total 34 # number of executed instructions with N destination register operands 1987system.cpu1.CUs1.wavefronts25.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 1988system.cpu1.CUs1.wavefronts25.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 1989system.cpu1.CUs1.wavefronts25.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 1990system.cpu1.CUs1.wavefronts25.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 1991system.cpu1.CUs1.wavefronts25.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 1992system.cpu1.CUs1.wavefronts25.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 1993system.cpu1.CUs1.wavefronts25.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 1994system.cpu1.CUs1.wavefronts25.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 1995system.cpu1.CUs1.wavefronts25.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 1996system.cpu1.CUs1.wavefronts25.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 1997system.cpu1.CUs1.wavefronts25.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 1998system.cpu1.CUs1.wavefronts25.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 1999system.cpu1.CUs1.wavefronts25.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 2000system.cpu1.CUs1.wavefronts25.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 2001system.cpu1.CUs1.wavefronts25.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 2002system.cpu1.CUs1.wavefronts25.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 2003system.cpu1.CUs1.wavefronts25.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 2004system.cpu1.CUs1.wavefronts25.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 2005system.cpu1.CUs1.wavefronts25.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 2006system.cpu1.CUs1.wavefronts25.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 2007system.cpu1.CUs1.wavefronts25.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 2008system.cpu1.CUs1.wavefronts25.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 2009system.cpu1.CUs1.wavefronts25.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 2010system.cpu1.CUs1.wavefronts25.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 2011system.cpu1.CUs1.wavefronts26.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 2012system.cpu1.CUs1.wavefronts26.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 2013system.cpu1.CUs1.wavefronts26.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 2014system.cpu1.CUs1.wavefronts26.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 2015system.cpu1.CUs1.wavefronts26.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 2016system.cpu1.CUs1.wavefronts26.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 2017system.cpu1.CUs1.wavefronts26.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 2018system.cpu1.CUs1.wavefronts26.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 2019system.cpu1.CUs1.wavefronts26.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 2020system.cpu1.CUs1.wavefronts26.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 2021system.cpu1.CUs1.wavefronts26.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 2022system.cpu1.CUs1.wavefronts26.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 2023system.cpu1.CUs1.wavefronts26.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 2024system.cpu1.CUs1.wavefronts26.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 2025system.cpu1.CUs1.wavefronts26.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 2026system.cpu1.CUs1.wavefronts26.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 2027system.cpu1.CUs1.wavefronts26.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 2028system.cpu1.CUs1.wavefronts26.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 2029system.cpu1.CUs1.wavefronts26.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 2030system.cpu1.CUs1.wavefronts26.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 2031system.cpu1.CUs1.wavefronts26.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 2032system.cpu1.CUs1.wavefronts26.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 2033system.cpu1.CUs1.wavefronts26.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 2034system.cpu1.CUs1.wavefronts26.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 2035system.cpu1.CUs1.wavefronts27.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 2036system.cpu1.CUs1.wavefronts27.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 2037system.cpu1.CUs1.wavefronts27.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 2038system.cpu1.CUs1.wavefronts27.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 2039system.cpu1.CUs1.wavefronts27.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 2040system.cpu1.CUs1.wavefronts27.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 2041system.cpu1.CUs1.wavefronts27.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 2042system.cpu1.CUs1.wavefronts27.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 2043system.cpu1.CUs1.wavefronts27.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 2044system.cpu1.CUs1.wavefronts27.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 2045system.cpu1.CUs1.wavefronts27.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 2046system.cpu1.CUs1.wavefronts27.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 2047system.cpu1.CUs1.wavefronts27.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 2048system.cpu1.CUs1.wavefronts27.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 2049system.cpu1.CUs1.wavefronts27.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 2050system.cpu1.CUs1.wavefronts27.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 2051system.cpu1.CUs1.wavefronts27.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 2052system.cpu1.CUs1.wavefronts27.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 2053system.cpu1.CUs1.wavefronts27.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 2054system.cpu1.CUs1.wavefronts27.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 2055system.cpu1.CUs1.wavefronts27.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 2056system.cpu1.CUs1.wavefronts27.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 2057system.cpu1.CUs1.wavefronts27.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 2058system.cpu1.CUs1.wavefronts27.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 2059system.cpu1.CUs1.wavefronts28.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 2060system.cpu1.CUs1.wavefronts28.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 2061system.cpu1.CUs1.wavefronts28.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 2062system.cpu1.CUs1.wavefronts28.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 2063system.cpu1.CUs1.wavefronts28.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 2064system.cpu1.CUs1.wavefronts28.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 2065system.cpu1.CUs1.wavefronts28.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 2066system.cpu1.CUs1.wavefronts28.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 2067system.cpu1.CUs1.wavefronts28.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 2068system.cpu1.CUs1.wavefronts28.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 2069system.cpu1.CUs1.wavefronts28.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 2070system.cpu1.CUs1.wavefronts28.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 2071system.cpu1.CUs1.wavefronts28.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 2072system.cpu1.CUs1.wavefronts28.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 2073system.cpu1.CUs1.wavefronts28.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 2074system.cpu1.CUs1.wavefronts28.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 2075system.cpu1.CUs1.wavefronts28.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 2076system.cpu1.CUs1.wavefronts28.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 2077system.cpu1.CUs1.wavefronts28.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 2078system.cpu1.CUs1.wavefronts28.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 2079system.cpu1.CUs1.wavefronts28.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 2080system.cpu1.CUs1.wavefronts28.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 2081system.cpu1.CUs1.wavefronts28.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 2082system.cpu1.CUs1.wavefronts28.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 2083system.cpu1.CUs1.wavefronts29.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 2084system.cpu1.CUs1.wavefronts29.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 2085system.cpu1.CUs1.wavefronts29.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 2086system.cpu1.CUs1.wavefronts29.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 2087system.cpu1.CUs1.wavefronts29.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 2088system.cpu1.CUs1.wavefronts29.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 2089system.cpu1.CUs1.wavefronts29.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 2090system.cpu1.CUs1.wavefronts29.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 2091system.cpu1.CUs1.wavefronts29.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 2092system.cpu1.CUs1.wavefronts29.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 2093system.cpu1.CUs1.wavefronts29.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 2094system.cpu1.CUs1.wavefronts29.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 2095system.cpu1.CUs1.wavefronts29.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 2096system.cpu1.CUs1.wavefronts29.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 2097system.cpu1.CUs1.wavefronts29.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 2098system.cpu1.CUs1.wavefronts29.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 2099system.cpu1.CUs1.wavefronts29.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 2100system.cpu1.CUs1.wavefronts29.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 2101system.cpu1.CUs1.wavefronts29.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 2102system.cpu1.CUs1.wavefronts29.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 2103system.cpu1.CUs1.wavefronts29.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 2104system.cpu1.CUs1.wavefronts29.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 2105system.cpu1.CUs1.wavefronts29.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 2106system.cpu1.CUs1.wavefronts29.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 2107system.cpu1.CUs1.wavefronts30.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 2108system.cpu1.CUs1.wavefronts30.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 2109system.cpu1.CUs1.wavefronts30.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 2110system.cpu1.CUs1.wavefronts30.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 2111system.cpu1.CUs1.wavefronts30.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 2112system.cpu1.CUs1.wavefronts30.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 2113system.cpu1.CUs1.wavefronts30.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 2114system.cpu1.CUs1.wavefronts30.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 2115system.cpu1.CUs1.wavefronts30.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 2116system.cpu1.CUs1.wavefronts30.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 2117system.cpu1.CUs1.wavefronts30.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 2118system.cpu1.CUs1.wavefronts30.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 2119system.cpu1.CUs1.wavefronts30.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 2120system.cpu1.CUs1.wavefronts30.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 2121system.cpu1.CUs1.wavefronts30.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 2122system.cpu1.CUs1.wavefronts30.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 2123system.cpu1.CUs1.wavefronts30.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 2124system.cpu1.CUs1.wavefronts30.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 2125system.cpu1.CUs1.wavefronts30.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 2126system.cpu1.CUs1.wavefronts30.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 2127system.cpu1.CUs1.wavefronts30.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 2128system.cpu1.CUs1.wavefronts30.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 2129system.cpu1.CUs1.wavefronts30.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 2130system.cpu1.CUs1.wavefronts30.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 2131system.cpu1.CUs1.wavefronts31.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 2132system.cpu1.CUs1.wavefronts31.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 2133system.cpu1.CUs1.wavefronts31.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 2134system.cpu1.CUs1.wavefronts31.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 2135system.cpu1.CUs1.wavefronts31.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 2136system.cpu1.CUs1.wavefronts31.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 2137system.cpu1.CUs1.wavefronts31.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 2138system.cpu1.CUs1.wavefronts31.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 2139system.cpu1.CUs1.wavefronts31.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 2140system.cpu1.CUs1.wavefronts31.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 2141system.cpu1.CUs1.wavefronts31.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 2142system.cpu1.CUs1.wavefronts31.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 2143system.cpu1.CUs1.wavefronts31.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 2144system.cpu1.CUs1.wavefronts31.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 2145system.cpu1.CUs1.wavefronts31.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 2146system.cpu1.CUs1.wavefronts31.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 2147system.cpu1.CUs1.wavefronts31.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 2148system.cpu1.CUs1.wavefronts31.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 2149system.cpu1.CUs1.wavefronts31.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 2150system.cpu1.CUs1.wavefronts31.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 2151system.cpu1.CUs1.wavefronts31.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 2152system.cpu1.CUs1.wavefronts31.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 2153system.cpu1.CUs1.wavefronts31.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 2154system.cpu1.CUs1.wavefronts31.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 2155system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::samples 43 # For each instruction fetch request recieved record how many instructions you got from it 2156system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::mean 5.813953 # For each instruction fetch request recieved record how many instructions you got from it 2157system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::stdev 2.683777 # For each instruction fetch request recieved record how many instructions you got from it 2158system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::underflows 0 0.00% 0.00% # For each instruction fetch request recieved record how many instructions you got from it 2159system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::1 0 0.00% 0.00% # For each instruction fetch request recieved record how many instructions you got from it 2160system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::2 8 18.60% 18.60% # For each instruction fetch request recieved record how many instructions you got from it 2161system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::3 8 18.60% 37.21% # For each instruction fetch request recieved record how many instructions you got from it 2162system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::4 1 2.33% 39.53% # For each instruction fetch request recieved record how many instructions you got from it 2163system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::5 0 0.00% 39.53% # For each instruction fetch request recieved record how many instructions you got from it 2164system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::6 1 2.33% 41.86% # For each instruction fetch request recieved record how many instructions you got from it 2165system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::7 0 0.00% 41.86% # For each instruction fetch request recieved record how many instructions you got from it 2166system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::8 25 58.14% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 2167system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::9 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 2168system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::10 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 2169system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::11 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 2170system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::12 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 2171system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::13 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 2172system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::14 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 2173system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::15 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 2174system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::16 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 2175system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::17 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 2176system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::18 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 2177system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::19 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 2178system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::20 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 2179system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::21 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 2180system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::22 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 2181system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::23 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 2182system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::24 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 2183system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::25 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 2184system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::26 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 2185system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::27 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 2186system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::28 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 2187system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::29 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 2188system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::30 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 2189system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::31 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 2190system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::32 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 2191system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::overflows 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 2192system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::min_value 2 # For each instruction fetch request recieved record how many instructions you got from it 2193system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::max_value 8 # For each instruction fetch request recieved record how many instructions you got from it 2194system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::total 43 # For each instruction fetch request recieved record how many instructions you got from it 2195system.cpu1.CUs1.ExecStage.num_cycles_with_no_issue 4667 # number of cycles the CU issues nothing 2196system.cpu1.CUs1.ExecStage.num_cycles_with_instr_issued 98 # number of cycles the CU issued at least one instruction 2197system.cpu1.CUs1.ExecStage.num_cycles_with_instrtype_issue::ALU0 30 # Number of cycles at least one instruction of specific type issued 2198system.cpu1.CUs1.ExecStage.num_cycles_with_instrtype_issue::ALU1 29 # Number of cycles at least one instruction of specific type issued 2199system.cpu1.CUs1.ExecStage.num_cycles_with_instrtype_issue::ALU2 29 # Number of cycles at least one instruction of specific type issued 2200system.cpu1.CUs1.ExecStage.num_cycles_with_instrtype_issue::ALU3 29 # Number of cycles at least one instruction of specific type issued 2201system.cpu1.CUs1.ExecStage.num_cycles_with_instrtype_issue::GM 18 # Number of cycles at least one instruction of specific type issued 2202system.cpu1.CUs1.ExecStage.num_cycles_with_instrtype_issue::LM 6 # Number of cycles at least one instruction of specific type issued 2203system.cpu1.CUs1.ExecStage.num_cycles_with_instr_type_no_issue::ALU0 2052 # Number of cycles no instruction of specific type issued 2204system.cpu1.CUs1.ExecStage.num_cycles_with_instr_type_no_issue::ALU1 327 # Number of cycles no instruction of specific type issued 2205system.cpu1.CUs1.ExecStage.num_cycles_with_instr_type_no_issue::ALU2 265 # Number of cycles no instruction of specific type issued 2206system.cpu1.CUs1.ExecStage.num_cycles_with_instr_type_no_issue::ALU3 285 # Number of cycles no instruction of specific type issued 2207system.cpu1.CUs1.ExecStage.num_cycles_with_instr_type_no_issue::GM 341 # Number of cycles no instruction of specific type issued 2208system.cpu1.CUs1.ExecStage.num_cycles_with_instr_type_no_issue::LM 32 # Number of cycles no instruction of specific type issued 2209system.cpu1.CUs1.ExecStage.spc::samples 4765 # Execution units active per cycle (Exec unit=SIMD,MemPipe) 2210system.cpu1.CUs1.ExecStage.spc::mean 0.029591 # Execution units active per cycle (Exec unit=SIMD,MemPipe) 2211system.cpu1.CUs1.ExecStage.spc::stdev 0.218204 # Execution units active per cycle (Exec unit=SIMD,MemPipe) 2212system.cpu1.CUs1.ExecStage.spc::underflows 0 0.00% 0.00% # Execution units active per cycle (Exec unit=SIMD,MemPipe) 2213system.cpu1.CUs1.ExecStage.spc::0 4667 97.94% 97.94% # Execution units active per cycle (Exec unit=SIMD,MemPipe) 2214system.cpu1.CUs1.ExecStage.spc::1 57 1.20% 99.14% # Execution units active per cycle (Exec unit=SIMD,MemPipe) 2215system.cpu1.CUs1.ExecStage.spc::2 39 0.82% 99.96% # Execution units active per cycle (Exec unit=SIMD,MemPipe) 2216system.cpu1.CUs1.ExecStage.spc::3 2 0.04% 100.00% # Execution units active per cycle (Exec unit=SIMD,MemPipe) 2217system.cpu1.CUs1.ExecStage.spc::4 0 0.00% 100.00% # Execution units active per cycle (Exec unit=SIMD,MemPipe) 2218system.cpu1.CUs1.ExecStage.spc::5 0 0.00% 100.00% # Execution units active per cycle (Exec unit=SIMD,MemPipe) 2219system.cpu1.CUs1.ExecStage.spc::6 0 0.00% 100.00% # Execution units active per cycle (Exec unit=SIMD,MemPipe) 2220system.cpu1.CUs1.ExecStage.spc::overflows 0 0.00% 100.00% # Execution units active per cycle (Exec unit=SIMD,MemPipe) 2221system.cpu1.CUs1.ExecStage.spc::min_value 0 # Execution units active per cycle (Exec unit=SIMD,MemPipe) 2222system.cpu1.CUs1.ExecStage.spc::max_value 3 # Execution units active per cycle (Exec unit=SIMD,MemPipe) 2223system.cpu1.CUs1.ExecStage.spc::total 4765 # Execution units active per cycle (Exec unit=SIMD,MemPipe) 2224system.cpu1.CUs1.ExecStage.num_transitions_active_to_idle 68 # number of CU transitions from active to idle 2225system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::samples 68 # duration of idle periods in cycles 2226system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::mean 61 # duration of idle periods in cycles 2227system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::stdev 257.808908 # duration of idle periods in cycles 2228system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::underflows 0 0.00% 0.00% # duration of idle periods in cycles 2229system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::0-4 49 72.06% 72.06% # duration of idle periods in cycles 2230system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::5-9 8 11.76% 83.82% # duration of idle periods in cycles 2231system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::10-14 0 0.00% 83.82% # duration of idle periods in cycles 2232system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::15-19 2 2.94% 86.76% # duration of idle periods in cycles 2233system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::20-24 1 1.47% 88.24% # duration of idle periods in cycles 2234system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::25-29 1 1.47% 89.71% # duration of idle periods in cycles 2235system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::30-34 0 0.00% 89.71% # duration of idle periods in cycles 2236system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::35-39 0 0.00% 89.71% # duration of idle periods in cycles 2237system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::40-44 0 0.00% 89.71% # duration of idle periods in cycles 2238system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::45-49 0 0.00% 89.71% # duration of idle periods in cycles 2239system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::50-54 0 0.00% 89.71% # duration of idle periods in cycles 2240system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::55-59 0 0.00% 89.71% # duration of idle periods in cycles 2241system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::60-64 0 0.00% 89.71% # duration of idle periods in cycles 2242system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::65-69 0 0.00% 89.71% # duration of idle periods in cycles 2243system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::70-74 0 0.00% 89.71% # duration of idle periods in cycles 2244system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::75 0 0.00% 89.71% # duration of idle periods in cycles 2245system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::overflows 7 10.29% 100.00% # duration of idle periods in cycles 2246system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::min_value 1 # duration of idle periods in cycles 2247system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::max_value 1764 # duration of idle periods in cycles 2248system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::total 68 # duration of idle periods in cycles 2249system.cpu1.CUs1.GlobalMemPipeline.load_vrf_bank_conflict_cycles 0 # total number of cycles GM data are delayed before updating the VRF 2250system.cpu1.CUs1.LocalMemPipeline.load_vrf_bank_conflict_cycles 0 # total number of cycles LDS data are delayed before updating the VRF 2251system.cpu1.CUs1.tlb_requests 769 # number of uncoalesced requests 2252system.cpu1.CUs1.tlb_cycles -212991830500 # total number of cycles for all uncoalesced requests 2253system.cpu1.CUs1.avg_translation_latency -276972471.391417 # Avg. translation latency for data translations 2254system.cpu1.CUs1.TLB_hits_distribution::page_table 769 # TLB hits distribution (0 for page table, x for Lx-TLB 2255system.cpu1.CUs1.TLB_hits_distribution::L1_TLB 0 # TLB hits distribution (0 for page table, x for Lx-TLB 2256system.cpu1.CUs1.TLB_hits_distribution::L2_TLB 0 # TLB hits distribution (0 for page table, x for Lx-TLB 2257system.cpu1.CUs1.TLB_hits_distribution::L3_TLB 0 # TLB hits distribution (0 for page table, x for Lx-TLB 2258system.cpu1.CUs1.lds_bank_access_cnt 53 # Total number of LDS bank accesses 2259system.cpu1.CUs1.lds_bank_conflicts::samples 6 # Number of bank conflicts per LDS memory packet 2260system.cpu1.CUs1.lds_bank_conflicts::mean 7.833333 # Number of bank conflicts per LDS memory packet 2261system.cpu1.CUs1.lds_bank_conflicts::stdev 6.080022 # Number of bank conflicts per LDS memory packet 2262system.cpu1.CUs1.lds_bank_conflicts::underflows 0 0.00% 0.00% # Number of bank conflicts per LDS memory packet 2263system.cpu1.CUs1.lds_bank_conflicts::0-1 2 33.33% 33.33% # Number of bank conflicts per LDS memory packet 2264system.cpu1.CUs1.lds_bank_conflicts::2-3 0 0.00% 33.33% # Number of bank conflicts per LDS memory packet 2265system.cpu1.CUs1.lds_bank_conflicts::4-5 0 0.00% 33.33% # Number of bank conflicts per LDS memory packet 2266system.cpu1.CUs1.lds_bank_conflicts::6-7 0 0.00% 33.33% # Number of bank conflicts per LDS memory packet 2267system.cpu1.CUs1.lds_bank_conflicts::8-9 0 0.00% 33.33% # Number of bank conflicts per LDS memory packet 2268system.cpu1.CUs1.lds_bank_conflicts::10-11 1 16.67% 50.00% # Number of bank conflicts per LDS memory packet 2269system.cpu1.CUs1.lds_bank_conflicts::12-13 3 50.00% 100.00% # Number of bank conflicts per LDS memory packet 2270system.cpu1.CUs1.lds_bank_conflicts::14-15 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 2271system.cpu1.CUs1.lds_bank_conflicts::16-17 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 2272system.cpu1.CUs1.lds_bank_conflicts::18-19 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 2273system.cpu1.CUs1.lds_bank_conflicts::20-21 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 2274system.cpu1.CUs1.lds_bank_conflicts::22-23 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 2275system.cpu1.CUs1.lds_bank_conflicts::24-25 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 2276system.cpu1.CUs1.lds_bank_conflicts::26-27 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 2277system.cpu1.CUs1.lds_bank_conflicts::28-29 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 2278system.cpu1.CUs1.lds_bank_conflicts::30-31 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 2279system.cpu1.CUs1.lds_bank_conflicts::32-33 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 2280system.cpu1.CUs1.lds_bank_conflicts::34-35 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 2281system.cpu1.CUs1.lds_bank_conflicts::36-37 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 2282system.cpu1.CUs1.lds_bank_conflicts::38-39 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 2283system.cpu1.CUs1.lds_bank_conflicts::40-41 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 2284system.cpu1.CUs1.lds_bank_conflicts::42-43 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 2285system.cpu1.CUs1.lds_bank_conflicts::44-45 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 2286system.cpu1.CUs1.lds_bank_conflicts::46-47 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 2287system.cpu1.CUs1.lds_bank_conflicts::48-49 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 2288system.cpu1.CUs1.lds_bank_conflicts::50-51 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 2289system.cpu1.CUs1.lds_bank_conflicts::52-53 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 2290system.cpu1.CUs1.lds_bank_conflicts::54-55 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 2291system.cpu1.CUs1.lds_bank_conflicts::56-57 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 2292system.cpu1.CUs1.lds_bank_conflicts::58-59 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 2293system.cpu1.CUs1.lds_bank_conflicts::60-61 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 2294system.cpu1.CUs1.lds_bank_conflicts::62-63 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 2295system.cpu1.CUs1.lds_bank_conflicts::64 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 2296system.cpu1.CUs1.lds_bank_conflicts::overflows 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 2297system.cpu1.CUs1.lds_bank_conflicts::min_value 0 # Number of bank conflicts per LDS memory packet 2298system.cpu1.CUs1.lds_bank_conflicts::max_value 12 # Number of bank conflicts per LDS memory packet 2299system.cpu1.CUs1.lds_bank_conflicts::total 6 # Number of bank conflicts per LDS memory packet 2300system.cpu1.CUs1.page_divergence_dist::samples 17 # pages touched per wf (over all mem. instr.) 2301system.cpu1.CUs1.page_divergence_dist::mean 1 # pages touched per wf (over all mem. instr.) 2302system.cpu1.CUs1.page_divergence_dist::stdev 0 # pages touched per wf (over all mem. instr.) 2303system.cpu1.CUs1.page_divergence_dist::underflows 0 0.00% 0.00% # pages touched per wf (over all mem. instr.) 2304system.cpu1.CUs1.page_divergence_dist::1-4 17 100.00% 100.00% # pages touched per wf (over all mem. instr.) 2305system.cpu1.CUs1.page_divergence_dist::5-8 0 0.00% 100.00% # pages touched per wf (over all mem. instr.) 2306system.cpu1.CUs1.page_divergence_dist::9-12 0 0.00% 100.00% # pages touched per wf (over all mem. instr.) 2307system.cpu1.CUs1.page_divergence_dist::13-16 0 0.00% 100.00% # pages touched per wf (over all mem. instr.) 2308system.cpu1.CUs1.page_divergence_dist::17-20 0 0.00% 100.00% # pages touched per wf (over all mem. instr.) 2309system.cpu1.CUs1.page_divergence_dist::21-24 0 0.00% 100.00% # pages touched per wf (over all mem. instr.) 2310system.cpu1.CUs1.page_divergence_dist::25-28 0 0.00% 100.00% # pages touched per wf (over all mem. instr.) 2311system.cpu1.CUs1.page_divergence_dist::29-32 0 0.00% 100.00% # pages touched per wf (over all mem. instr.) 2312system.cpu1.CUs1.page_divergence_dist::33-36 0 0.00% 100.00% # pages touched per wf (over all mem. instr.) 2313system.cpu1.CUs1.page_divergence_dist::37-40 0 0.00% 100.00% # pages touched per wf (over all mem. instr.) 2314system.cpu1.CUs1.page_divergence_dist::41-44 0 0.00% 100.00% # pages touched per wf (over all mem. instr.) 2315system.cpu1.CUs1.page_divergence_dist::45-48 0 0.00% 100.00% # pages touched per wf (over all mem. instr.) 2316system.cpu1.CUs1.page_divergence_dist::49-52 0 0.00% 100.00% # pages touched per wf (over all mem. instr.) 2317system.cpu1.CUs1.page_divergence_dist::53-56 0 0.00% 100.00% # pages touched per wf (over all mem. instr.) 2318system.cpu1.CUs1.page_divergence_dist::57-60 0 0.00% 100.00% # pages touched per wf (over all mem. instr.) 2319system.cpu1.CUs1.page_divergence_dist::61-64 0 0.00% 100.00% # pages touched per wf (over all mem. instr.) 2320system.cpu1.CUs1.page_divergence_dist::overflows 0 0.00% 100.00% # pages touched per wf (over all mem. instr.) 2321system.cpu1.CUs1.page_divergence_dist::min_value 1 # pages touched per wf (over all mem. instr.) 2322system.cpu1.CUs1.page_divergence_dist::max_value 1 # pages touched per wf (over all mem. instr.) 2323system.cpu1.CUs1.page_divergence_dist::total 17 # pages touched per wf (over all mem. instr.) 2324system.cpu1.CUs1.global_mem_instr_cnt 17 # dynamic global memory instructions count 2325system.cpu1.CUs1.local_mem_instr_cnt 6 # dynamic local memory intruction count 2326system.cpu1.CUs1.wg_blocked_due_lds_alloc 0 # Workgroup blocked due to LDS capacity 2327system.cpu1.CUs1.num_instr_executed 141 # number of instructions executed 2328system.cpu1.CUs1.inst_exec_rate::samples 141 # Instruction Execution Rate: Number of executed vector instructions per cycle 2329system.cpu1.CUs1.inst_exec_rate::mean 82.212766 # Instruction Execution Rate: Number of executed vector instructions per cycle 2330system.cpu1.CUs1.inst_exec_rate::stdev 248.914352 # Instruction Execution Rate: Number of executed vector instructions per cycle 2331system.cpu1.CUs1.inst_exec_rate::underflows 0 0.00% 0.00% # Instruction Execution Rate: Number of executed vector instructions per cycle 2332system.cpu1.CUs1.inst_exec_rate::0-1 1 0.71% 0.71% # Instruction Execution Rate: Number of executed vector instructions per cycle 2333system.cpu1.CUs1.inst_exec_rate::2-3 12 8.51% 9.22% # Instruction Execution Rate: Number of executed vector instructions per cycle 2334system.cpu1.CUs1.inst_exec_rate::4-5 53 37.59% 46.81% # Instruction Execution Rate: Number of executed vector instructions per cycle 2335system.cpu1.CUs1.inst_exec_rate::6-7 28 19.86% 66.67% # Instruction Execution Rate: Number of executed vector instructions per cycle 2336system.cpu1.CUs1.inst_exec_rate::8-9 5 3.55% 70.21% # Instruction Execution Rate: Number of executed vector instructions per cycle 2337system.cpu1.CUs1.inst_exec_rate::10 1 0.71% 70.92% # Instruction Execution Rate: Number of executed vector instructions per cycle 2338system.cpu1.CUs1.inst_exec_rate::overflows 41 29.08% 100.00% # Instruction Execution Rate: Number of executed vector instructions per cycle 2339system.cpu1.CUs1.inst_exec_rate::min_value 1 # Instruction Execution Rate: Number of executed vector instructions per cycle 2340system.cpu1.CUs1.inst_exec_rate::max_value 1765 # Instruction Execution Rate: Number of executed vector instructions per cycle 2341system.cpu1.CUs1.inst_exec_rate::total 141 # Instruction Execution Rate: Number of executed vector instructions per cycle 2342system.cpu1.CUs1.num_vec_ops_executed 6762 # number of vec ops executed (e.g. VSZ/inst) 2343system.cpu1.CUs1.num_total_cycles 4765 # number of cycles the CU ran for 2344system.cpu1.CUs1.vpc 1.419098 # Vector Operations per cycle (this CU only) 2345system.cpu1.CUs1.ipc 0.029591 # Instructions per cycle (this CU only) 2346system.cpu1.CUs1.warp_execution_dist::samples 141 # number of lanes active per instruction (oval all instructions) 2347system.cpu1.CUs1.warp_execution_dist::mean 47.957447 # number of lanes active per instruction (oval all instructions) 2348system.cpu1.CUs1.warp_execution_dist::stdev 23.818022 # number of lanes active per instruction (oval all instructions) 2349system.cpu1.CUs1.warp_execution_dist::underflows 0 0.00% 0.00% # number of lanes active per instruction (oval all instructions) 2350system.cpu1.CUs1.warp_execution_dist::1-4 5 3.55% 3.55% # number of lanes active per instruction (oval all instructions) 2351system.cpu1.CUs1.warp_execution_dist::5-8 0 0.00% 3.55% # number of lanes active per instruction (oval all instructions) 2352system.cpu1.CUs1.warp_execution_dist::9-12 9 6.38% 9.93% # number of lanes active per instruction (oval all instructions) 2353system.cpu1.CUs1.warp_execution_dist::13-16 27 19.15% 29.08% # number of lanes active per instruction (oval all instructions) 2354system.cpu1.CUs1.warp_execution_dist::17-20 0 0.00% 29.08% # number of lanes active per instruction (oval all instructions) 2355system.cpu1.CUs1.warp_execution_dist::21-24 0 0.00% 29.08% # number of lanes active per instruction (oval all instructions) 2356system.cpu1.CUs1.warp_execution_dist::25-28 0 0.00% 29.08% # number of lanes active per instruction (oval all instructions) 2357system.cpu1.CUs1.warp_execution_dist::29-32 0 0.00% 29.08% # number of lanes active per instruction (oval all instructions) 2358system.cpu1.CUs1.warp_execution_dist::33-36 0 0.00% 29.08% # number of lanes active per instruction (oval all instructions) 2359system.cpu1.CUs1.warp_execution_dist::37-40 0 0.00% 29.08% # number of lanes active per instruction (oval all instructions) 2360system.cpu1.CUs1.warp_execution_dist::41-44 0 0.00% 29.08% # number of lanes active per instruction (oval all instructions) 2361system.cpu1.CUs1.warp_execution_dist::45-48 0 0.00% 29.08% # number of lanes active per instruction (oval all instructions) 2362system.cpu1.CUs1.warp_execution_dist::49-52 8 5.67% 34.75% # number of lanes active per instruction (oval all instructions) 2363system.cpu1.CUs1.warp_execution_dist::53-56 0 0.00% 34.75% # number of lanes active per instruction (oval all instructions) 2364system.cpu1.CUs1.warp_execution_dist::57-60 0 0.00% 34.75% # number of lanes active per instruction (oval all instructions) 2365system.cpu1.CUs1.warp_execution_dist::61-64 92 65.25% 100.00% # number of lanes active per instruction (oval all instructions) 2366system.cpu1.CUs1.warp_execution_dist::overflows 0 0.00% 100.00% # number of lanes active per instruction (oval all instructions) 2367system.cpu1.CUs1.warp_execution_dist::min_value 1 # number of lanes active per instruction (oval all instructions) 2368system.cpu1.CUs1.warp_execution_dist::max_value 64 # number of lanes active per instruction (oval all instructions) 2369system.cpu1.CUs1.warp_execution_dist::total 141 # number of lanes active per instruction (oval all instructions) 2370system.cpu1.CUs1.gmem_lanes_execution_dist::samples 18 # number of active lanes per global memory instruction 2371system.cpu1.CUs1.gmem_lanes_execution_dist::mean 37.722222 # number of active lanes per global memory instruction 2372system.cpu1.CUs1.gmem_lanes_execution_dist::stdev 27.174394 # number of active lanes per global memory instruction 2373system.cpu1.CUs1.gmem_lanes_execution_dist::underflows 0 0.00% 0.00% # number of active lanes per global memory instruction 2374system.cpu1.CUs1.gmem_lanes_execution_dist::1-4 1 5.56% 5.56% # number of active lanes per global memory instruction 2375system.cpu1.CUs1.gmem_lanes_execution_dist::5-8 0 0.00% 5.56% # number of active lanes per global memory instruction 2376system.cpu1.CUs1.gmem_lanes_execution_dist::9-12 2 11.11% 16.67% # number of active lanes per global memory instruction 2377system.cpu1.CUs1.gmem_lanes_execution_dist::13-16 6 33.33% 50.00% # number of active lanes per global memory instruction 2378system.cpu1.CUs1.gmem_lanes_execution_dist::17-20 0 0.00% 50.00% # number of active lanes per global memory instruction 2379system.cpu1.CUs1.gmem_lanes_execution_dist::21-24 0 0.00% 50.00% # number of active lanes per global memory instruction 2380system.cpu1.CUs1.gmem_lanes_execution_dist::25-28 0 0.00% 50.00% # number of active lanes per global memory instruction 2381system.cpu1.CUs1.gmem_lanes_execution_dist::29-32 0 0.00% 50.00% # number of active lanes per global memory instruction 2382system.cpu1.CUs1.gmem_lanes_execution_dist::33-36 0 0.00% 50.00% # number of active lanes per global memory instruction 2383system.cpu1.CUs1.gmem_lanes_execution_dist::37-40 0 0.00% 50.00% # number of active lanes per global memory instruction 2384system.cpu1.CUs1.gmem_lanes_execution_dist::41-44 0 0.00% 50.00% # number of active lanes per global memory instruction 2385system.cpu1.CUs1.gmem_lanes_execution_dist::45-48 0 0.00% 50.00% # number of active lanes per global memory instruction 2386system.cpu1.CUs1.gmem_lanes_execution_dist::49-52 0 0.00% 50.00% # number of active lanes per global memory instruction 2387system.cpu1.CUs1.gmem_lanes_execution_dist::53-56 0 0.00% 50.00% # number of active lanes per global memory instruction 2388system.cpu1.CUs1.gmem_lanes_execution_dist::57-60 0 0.00% 50.00% # number of active lanes per global memory instruction 2389system.cpu1.CUs1.gmem_lanes_execution_dist::61-64 9 50.00% 100.00% # number of active lanes per global memory instruction 2390system.cpu1.CUs1.gmem_lanes_execution_dist::overflows 0 0.00% 100.00% # number of active lanes per global memory instruction 2391system.cpu1.CUs1.gmem_lanes_execution_dist::min_value 1 # number of active lanes per global memory instruction 2392system.cpu1.CUs1.gmem_lanes_execution_dist::max_value 64 # number of active lanes per global memory instruction 2393system.cpu1.CUs1.gmem_lanes_execution_dist::total 18 # number of active lanes per global memory instruction 2394system.cpu1.CUs1.lmem_lanes_execution_dist::samples 6 # number of active lanes per local memory instruction 2395system.cpu1.CUs1.lmem_lanes_execution_dist::mean 19.333333 # number of active lanes per local memory instruction 2396system.cpu1.CUs1.lmem_lanes_execution_dist::stdev 22.384518 # number of active lanes per local memory instruction 2397system.cpu1.CUs1.lmem_lanes_execution_dist::underflows 0 0.00% 0.00% # number of active lanes per local memory instruction 2398system.cpu1.CUs1.lmem_lanes_execution_dist::1-4 1 16.67% 16.67% # number of active lanes per local memory instruction 2399system.cpu1.CUs1.lmem_lanes_execution_dist::5-8 0 0.00% 16.67% # number of active lanes per local memory instruction 2400system.cpu1.CUs1.lmem_lanes_execution_dist::9-12 1 16.67% 33.33% # number of active lanes per local memory instruction 2401system.cpu1.CUs1.lmem_lanes_execution_dist::13-16 3 50.00% 83.33% # number of active lanes per local memory instruction 2402system.cpu1.CUs1.lmem_lanes_execution_dist::17-20 0 0.00% 83.33% # number of active lanes per local memory instruction 2403system.cpu1.CUs1.lmem_lanes_execution_dist::21-24 0 0.00% 83.33% # number of active lanes per local memory instruction 2404system.cpu1.CUs1.lmem_lanes_execution_dist::25-28 0 0.00% 83.33% # number of active lanes per local memory instruction 2405system.cpu1.CUs1.lmem_lanes_execution_dist::29-32 0 0.00% 83.33% # number of active lanes per local memory instruction 2406system.cpu1.CUs1.lmem_lanes_execution_dist::33-36 0 0.00% 83.33% # number of active lanes per local memory instruction 2407system.cpu1.CUs1.lmem_lanes_execution_dist::37-40 0 0.00% 83.33% # number of active lanes per local memory instruction 2408system.cpu1.CUs1.lmem_lanes_execution_dist::41-44 0 0.00% 83.33% # number of active lanes per local memory instruction 2409system.cpu1.CUs1.lmem_lanes_execution_dist::45-48 0 0.00% 83.33% # number of active lanes per local memory instruction 2410system.cpu1.CUs1.lmem_lanes_execution_dist::49-52 0 0.00% 83.33% # number of active lanes per local memory instruction 2411system.cpu1.CUs1.lmem_lanes_execution_dist::53-56 0 0.00% 83.33% # number of active lanes per local memory instruction 2412system.cpu1.CUs1.lmem_lanes_execution_dist::57-60 0 0.00% 83.33% # number of active lanes per local memory instruction 2413system.cpu1.CUs1.lmem_lanes_execution_dist::61-64 1 16.67% 100.00% # number of active lanes per local memory instruction 2414system.cpu1.CUs1.lmem_lanes_execution_dist::overflows 0 0.00% 100.00% # number of active lanes per local memory instruction 2415system.cpu1.CUs1.lmem_lanes_execution_dist::min_value 1 # number of active lanes per local memory instruction 2416system.cpu1.CUs1.lmem_lanes_execution_dist::max_value 64 # number of active lanes per local memory instruction 2417system.cpu1.CUs1.lmem_lanes_execution_dist::total 6 # number of active lanes per local memory instruction 2418system.cpu1.CUs1.num_alu_insts_executed 118 # Number of dynamic non-GM memory insts executed 2419system.cpu1.CUs1.times_wg_blocked_due_vgpr_alloc 0 # Number of times WGs are blocked due to VGPR allocation per SIMD 2420system.cpu1.CUs1.num_CAS_ops 0 # number of compare and swap operations 2421system.cpu1.CUs1.num_failed_CAS_ops 0 # number of compare and swap operations that failed 2422system.cpu1.CUs1.num_completed_wfs 4 # number of completed wavefronts 2423system.cpu2.num_kernel_launched 1 # number of kernel launched 2424system.dispatcher_coalescer.clk_domain.voltage_domain.voltage 1 # Voltage in Volts 2425system.dispatcher_coalescer.clk_domain.clock 1000 # Clock period in ticks 2426system.dispatcher_coalescer.uncoalesced_accesses 0 # Number of uncoalesced TLB accesses 2427system.dispatcher_coalescer.coalesced_accesses 0 # Number of coalesced TLB accesses 2428system.dispatcher_coalescer.queuing_cycles 0 # Number of cycles spent in queue 2429system.dispatcher_coalescer.local_queuing_cycles 0 # Number of cycles spent in queue for all incoming reqs 2430system.dispatcher_coalescer.local_latency nan # Avg. latency over all incoming pkts 2431system.dispatcher_tlb.clk_domain.voltage_domain.voltage 1 # Voltage in Volts 2432system.dispatcher_tlb.clk_domain.clock 1000 # Clock period in ticks 2433system.dispatcher_tlb.local_TLB_accesses 0 # Number of TLB accesses 2434system.dispatcher_tlb.local_TLB_hits 0 # Number of TLB hits 2435system.dispatcher_tlb.local_TLB_misses 0 # Number of TLB misses 2436system.dispatcher_tlb.local_TLB_miss_rate nan # TLB miss rate 2437system.dispatcher_tlb.global_TLB_accesses 0 # Number of TLB accesses 2438system.dispatcher_tlb.global_TLB_hits 0 # Number of TLB hits 2439system.dispatcher_tlb.global_TLB_misses 0 # Number of TLB misses 2440system.dispatcher_tlb.global_TLB_miss_rate nan # TLB miss rate 2441system.dispatcher_tlb.access_cycles 0 # Cycles spent accessing this TLB level 2442system.dispatcher_tlb.page_table_cycles 0 # Cycles spent accessing the page table 2443system.dispatcher_tlb.unique_pages 0 # Number of unique pages touched 2444system.dispatcher_tlb.local_cycles 0 # Number of cycles spent in queue for all incoming reqs 2445system.dispatcher_tlb.local_latency nan # Avg. latency over incoming coalesced reqs 2446system.dispatcher_tlb.avg_reuse_distance 0 # avg. reuse distance over all pages (in ticks) 2447system.l1_coalescer0.clk_domain.voltage_domain.voltage 1 # Voltage in Volts 2448system.l1_coalescer0.clk_domain.clock 1000 # Clock period in ticks 2449system.l1_coalescer0.uncoalesced_accesses 778 # Number of uncoalesced TLB accesses 2450system.l1_coalescer0.coalesced_accesses 0 # Number of coalesced TLB accesses 2451system.l1_coalescer0.queuing_cycles 0 # Number of cycles spent in queue 2452system.l1_coalescer0.local_queuing_cycles 0 # Number of cycles spent in queue for all incoming reqs 2453system.l1_coalescer0.local_latency 0 # Avg. latency over all incoming pkts 2454system.l1_coalescer1.clk_domain.voltage_domain.voltage 1 # Voltage in Volts 2455system.l1_coalescer1.clk_domain.clock 1000 # Clock period in ticks 2456system.l1_coalescer1.uncoalesced_accesses 769 # Number of uncoalesced TLB accesses 2457system.l1_coalescer1.coalesced_accesses 0 # Number of coalesced TLB accesses 2458system.l1_coalescer1.queuing_cycles 0 # Number of cycles spent in queue 2459system.l1_coalescer1.local_queuing_cycles 0 # Number of cycles spent in queue for all incoming reqs 2460system.l1_coalescer1.local_latency 0 # Avg. latency over all incoming pkts 2461system.l1_tlb0.clk_domain.voltage_domain.voltage 1 # Voltage in Volts 2462system.l1_tlb0.clk_domain.clock 1000 # Clock period in ticks 2463system.l1_tlb0.local_TLB_accesses 778 # Number of TLB accesses 2464system.l1_tlb0.local_TLB_hits 774 # Number of TLB hits 2465system.l1_tlb0.local_TLB_misses 4 # Number of TLB misses 2466system.l1_tlb0.local_TLB_miss_rate 0.514139 # TLB miss rate 2467system.l1_tlb0.global_TLB_accesses 778 # Number of TLB accesses 2468system.l1_tlb0.global_TLB_hits 774 # Number of TLB hits 2469system.l1_tlb0.global_TLB_misses 4 # Number of TLB misses 2470system.l1_tlb0.global_TLB_miss_rate 0.514139 # TLB miss rate 2471system.l1_tlb0.access_cycles 0 # Cycles spent accessing this TLB level 2472system.l1_tlb0.page_table_cycles 0 # Cycles spent accessing the page table 2473system.l1_tlb0.unique_pages 4 # Number of unique pages touched 2474system.l1_tlb0.local_cycles 0 # Number of cycles spent in queue for all incoming reqs 2475system.l1_tlb0.local_latency 0 # Avg. latency over incoming coalesced reqs 2476system.l1_tlb0.avg_reuse_distance 0 # avg. reuse distance over all pages (in ticks) 2477system.l1_tlb1.clk_domain.voltage_domain.voltage 1 # Voltage in Volts 2478system.l1_tlb1.clk_domain.clock 1000 # Clock period in ticks 2479system.l1_tlb1.local_TLB_accesses 769 # Number of TLB accesses 2480system.l1_tlb1.local_TLB_hits 766 # Number of TLB hits 2481system.l1_tlb1.local_TLB_misses 3 # Number of TLB misses 2482system.l1_tlb1.local_TLB_miss_rate 0.390117 # TLB miss rate 2483system.l1_tlb1.global_TLB_accesses 769 # Number of TLB accesses 2484system.l1_tlb1.global_TLB_hits 766 # Number of TLB hits 2485system.l1_tlb1.global_TLB_misses 3 # Number of TLB misses 2486system.l1_tlb1.global_TLB_miss_rate 0.390117 # TLB miss rate 2487system.l1_tlb1.access_cycles 0 # Cycles spent accessing this TLB level 2488system.l1_tlb1.page_table_cycles 0 # Cycles spent accessing the page table 2489system.l1_tlb1.unique_pages 3 # Number of unique pages touched 2490system.l1_tlb1.local_cycles 0 # Number of cycles spent in queue for all incoming reqs 2491system.l1_tlb1.local_latency 0 # Avg. latency over incoming coalesced reqs 2492system.l1_tlb1.avg_reuse_distance 0 # avg. reuse distance over all pages (in ticks) 2493system.l2_coalescer.clk_domain.voltage_domain.voltage 1 # Voltage in Volts 2494system.l2_coalescer.clk_domain.clock 1000 # Clock period in ticks 2495system.l2_coalescer.uncoalesced_accesses 8 # Number of uncoalesced TLB accesses 2496system.l2_coalescer.coalesced_accesses 1 # Number of coalesced TLB accesses 2497system.l2_coalescer.queuing_cycles 8000 # Number of cycles spent in queue 2498system.l2_coalescer.local_queuing_cycles 1000 # Number of cycles spent in queue for all incoming reqs 2499system.l2_coalescer.local_latency 125 # Avg. latency over all incoming pkts 2500system.l2_tlb.clk_domain.voltage_domain.voltage 1 # Voltage in Volts 2501system.l2_tlb.clk_domain.clock 1000 # Clock period in ticks 2502system.l2_tlb.local_TLB_accesses 8 # Number of TLB accesses 2503system.l2_tlb.local_TLB_hits 3 # Number of TLB hits 2504system.l2_tlb.local_TLB_misses 5 # Number of TLB misses 2505system.l2_tlb.local_TLB_miss_rate 62.500000 # TLB miss rate 2506system.l2_tlb.global_TLB_accesses 15 # Number of TLB accesses 2507system.l2_tlb.global_TLB_hits 3 # Number of TLB hits 2508system.l2_tlb.global_TLB_misses 12 # Number of TLB misses 2509system.l2_tlb.global_TLB_miss_rate 80 # TLB miss rate 2510system.l2_tlb.access_cycles 552008 # Cycles spent accessing this TLB level 2511system.l2_tlb.page_table_cycles 0 # Cycles spent accessing the page table 2512system.l2_tlb.unique_pages 5 # Number of unique pages touched 2513system.l2_tlb.local_cycles 69001 # Number of cycles spent in queue for all incoming reqs 2514system.l2_tlb.local_latency 8625.125000 # Avg. latency over incoming coalesced reqs 2515system.l2_tlb.avg_reuse_distance 0 # avg. reuse distance over all pages (in ticks) 2516system.l3_coalescer.clk_domain.voltage_domain.voltage 1 # Voltage in Volts 2517system.l3_coalescer.clk_domain.clock 1000 # Clock period in ticks 2518system.l3_coalescer.uncoalesced_accesses 5 # Number of uncoalesced TLB accesses 2519system.l3_coalescer.coalesced_accesses 1 # Number of coalesced TLB accesses 2520system.l3_coalescer.queuing_cycles 8000 # Number of cycles spent in queue 2521system.l3_coalescer.local_queuing_cycles 1000 # Number of cycles spent in queue for all incoming reqs 2522system.l3_coalescer.local_latency 200 # Avg. latency over all incoming pkts 2523system.l3_tlb.clk_domain.voltage_domain.voltage 1 # Voltage in Volts 2524system.l3_tlb.clk_domain.clock 1000 # Clock period in ticks 2525system.l3_tlb.local_TLB_accesses 5 # Number of TLB accesses 2526system.l3_tlb.local_TLB_hits 0 # Number of TLB hits 2527system.l3_tlb.local_TLB_misses 5 # Number of TLB misses 2528system.l3_tlb.local_TLB_miss_rate 100 # TLB miss rate 2529system.l3_tlb.global_TLB_accesses 12 # Number of TLB accesses 2530system.l3_tlb.global_TLB_hits 0 # Number of TLB hits 2531system.l3_tlb.global_TLB_misses 12 # Number of TLB misses 2532system.l3_tlb.global_TLB_miss_rate 100 # TLB miss rate 2533system.l3_tlb.access_cycles 1200000 # Cycles spent accessing this TLB level 2534system.l3_tlb.page_table_cycles 6000000 # Cycles spent accessing the page table 2535system.l3_tlb.unique_pages 5 # Number of unique pages touched 2536system.l3_tlb.local_cycles 150000 # Number of cycles spent in queue for all incoming reqs 2537system.l3_tlb.local_latency 30000 # Avg. latency over incoming coalesced reqs 2538system.l3_tlb.avg_reuse_distance 0 # avg. reuse distance over all pages (in ticks) 2539system.piobus.trans_dist::WriteReq 94 # Transaction distribution 2540system.piobus.trans_dist::WriteResp 94 # Transaction distribution 2541system.piobus.pkt_count_system.ruby.cp_cntrl0.sequencer.mem-master-port::system.cpu2.pio 188 # Packet count per connected master and slave (bytes) 2542system.piobus.pkt_count::total 188 # Packet count per connected master and slave (bytes) 2543system.piobus.pkt_size_system.ruby.cp_cntrl0.sequencer.mem-master-port::system.cpu2.pio 748 # Cumulative packet size per connected master and slave (bytes) 2544system.piobus.pkt_size::total 748 # Cumulative packet size per connected master and slave (bytes) 2545system.piobus.reqLayer0.occupancy 234500 # Layer occupancy (ticks) 2546system.piobus.reqLayer0.utilization 0.1 # Layer utilization (%) 2547system.piobus.respLayer0.occupancy 94000 # Layer occupancy (ticks) 2548system.piobus.respLayer0.utilization 0.0 # Layer utilization (%) 2549system.ruby.outstanding_req_hist::bucket_size 1 2550system.ruby.outstanding_req_hist::max_bucket 9 2551system.ruby.outstanding_req_hist::samples 114203 2552system.ruby.outstanding_req_hist::mean 1.000035 2553system.ruby.outstanding_req_hist::gmean 1.000024 2554system.ruby.outstanding_req_hist::stdev 0.005918 2555system.ruby.outstanding_req_hist \| 0 0.00% 0.00% \| 114199 100.00% 100.00% \| 4 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% 2556system.ruby.outstanding_req_hist::total 114203 2557system.ruby.latency_hist::bucket_size 128 2558system.ruby.latency_hist::max_bucket 1279 2559system.ruby.latency_hist::samples 114203 2560system.ruby.latency_hist::mean 4.423518 2561system.ruby.latency_hist::gmean 1.078765 2562system.ruby.latency_hist::stdev 30.010569 2563system.ruby.latency_hist \| 112668 98.66% 98.66% \| 1136 0.99% 99.65% \| 372 0.33% 99.98% \| 3 0.00% 99.98% \| 8 0.01% 99.99% \| 14 0.01% 100.00% \| 2 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% 2564system.ruby.latency_hist::total 114203 2565system.ruby.hit_latency_hist::bucket_size 128 2566system.ruby.hit_latency_hist::max_bucket 1279 2567system.ruby.hit_latency_hist::samples 1535 2568system.ruby.hit_latency_hist::mean 255.015635 2569system.ruby.hit_latency_hist::gmean 251.519163 2570system.ruby.hit_latency_hist::stdev 57.825523 2571system.ruby.hit_latency_hist \| 0 0.00% 0.00% \| 1136 74.01% 74.01% \| 372 24.23% 98.24% \| 3 0.20% 98.44% \| 8 0.52% 98.96% \| 14 0.91% 99.87% \| 2 0.13% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% 2572system.ruby.hit_latency_hist::total 1535 2573system.ruby.miss_latency_hist::bucket_size 2 2574system.ruby.miss_latency_hist::max_bucket 19 2575system.ruby.miss_latency_hist::samples 112668 2576system.ruby.miss_latency_hist::mean 1.009426 2577system.ruby.miss_latency_hist::gmean 1.001543 2578system.ruby.miss_latency_hist::stdev 0.411800 2579system.ruby.miss_latency_hist \| 112609 99.95% 99.95% \| 0 0.00% 99.95% \| 0 0.00% 99.95% \| 0 0.00% 99.95% \| 0 0.00% 99.95% \| 0 0.00% 99.95% \| 0 0.00% 99.95% \| 0 0.00% 99.95% \| 0 0.00% 99.95% \| 59 0.05% 100.00% 2580system.ruby.miss_latency_hist::total 112668 2581system.ruby.L1Cache.incomplete_times 112609 2582system.ruby.L2Cache.incomplete_times 59 2583system.ruby.cp_cntrl0.L1D0cache.demand_hits 0 # Number of cache demand hits 2584system.ruby.cp_cntrl0.L1D0cache.demand_misses 506 # Number of cache demand misses 2585system.ruby.cp_cntrl0.L1D0cache.demand_accesses 506 # Number of cache demand accesses 2586system.ruby.cp_cntrl0.L1D0cache.num_data_array_reads 16155 # number of data array reads 2587system.ruby.cp_cntrl0.L1D0cache.num_data_array_writes 11985 # number of data array writes 2588system.ruby.cp_cntrl0.L1D0cache.num_tag_array_reads 27132 # number of tag array reads 2589system.ruby.cp_cntrl0.L1D0cache.num_tag_array_writes 1584 # number of tag array writes 2590system.ruby.cp_cntrl0.L1D1cache.demand_hits 0 # Number of cache demand hits 2591system.ruby.cp_cntrl0.L1D1cache.demand_misses 0 # Number of cache demand misses 2592system.ruby.cp_cntrl0.L1D1cache.demand_accesses 0 # Number of cache demand accesses 2593system.ruby.cp_cntrl0.L1Icache.demand_hits 0 # Number of cache demand hits 2594system.ruby.cp_cntrl0.L1Icache.demand_misses 1088 # Number of cache demand misses 2595system.ruby.cp_cntrl0.L1Icache.demand_accesses 1088 # Number of cache demand accesses 2596system.ruby.cp_cntrl0.L1Icache.num_data_array_reads 86007 # number of data array reads 2597system.ruby.cp_cntrl0.L1Icache.num_data_array_writes 54 # number of data array writes 2598system.ruby.cp_cntrl0.L1Icache.num_tag_array_reads 87684 # number of tag array reads 2599system.ruby.cp_cntrl0.L1Icache.num_tag_array_writes 54 # number of tag array writes 2600system.ruby.cp_cntrl0.L2cache.demand_hits 0 # Number of cache demand hits 2601system.ruby.cp_cntrl0.L2cache.demand_misses 1535 # Number of cache demand misses 2602system.ruby.cp_cntrl0.L2cache.demand_accesses 1535 # Number of cache demand accesses 2603system.ruby.cp_cntrl0.L2cache.num_data_array_reads 120 # number of data array reads 2604system.ruby.cp_cntrl0.L2cache.num_data_array_writes 11982 # number of data array writes 2605system.ruby.cp_cntrl0.L2cache.num_tag_array_reads 12068 # number of tag array reads 2606system.ruby.cp_cntrl0.L2cache.num_tag_array_writes 1658 # number of tag array writes 2607system.ruby.dir_cntrl0.L3CacheMemory.demand_hits 0 # Number of cache demand hits 2608system.ruby.dir_cntrl0.L3CacheMemory.demand_misses 0 # Number of cache demand misses 2609system.ruby.dir_cntrl0.L3CacheMemory.demand_accesses 0 # Number of cache demand accesses 2610system.ruby.dir_cntrl0.L3CacheMemory.num_data_array_writes 1560 # number of data array writes 2611system.ruby.dir_cntrl0.L3CacheMemory.num_tag_array_reads 1560 # number of tag array reads 2612system.ruby.dir_cntrl0.L3CacheMemory.num_tag_array_writes 1578 # number of tag array writes 2613system.ruby.network.ext_links0.int_node.percent_links_utilized 1.075754 2614system.ruby.network.ext_links0.int_node.msg_count.Control::0 1560 2615system.ruby.network.ext_links0.int_node.msg_count.Data::0 18 2616system.ruby.network.ext_links0.int_node.msg_count.Request_Control::0 1542 2617system.ruby.network.ext_links0.int_node.msg_count.Response_Data::2 1546 2618system.ruby.network.ext_links0.int_node.msg_count.Response_Control::2 1558 2619system.ruby.network.ext_links0.int_node.msg_count.Writeback_Control::2 16 2620system.ruby.network.ext_links0.int_node.msg_count.Unblock_Control::4 1541 2621system.ruby.network.ext_links0.int_node.msg_bytes.Control::0 12480 2622system.ruby.network.ext_links0.int_node.msg_bytes.Data::0 1296 2623system.ruby.network.ext_links0.int_node.msg_bytes.Request_Control::0 12336 2624system.ruby.network.ext_links0.int_node.msg_bytes.Response_Data::2 111312 2625system.ruby.network.ext_links0.int_node.msg_bytes.Response_Control::2 12464 2626system.ruby.network.ext_links0.int_node.msg_bytes.Writeback_Control::2 128 2627system.ruby.network.ext_links0.int_node.msg_bytes.Unblock_Control::4 12328 2628system.ruby.network.ext_links1.int_node.percent_links_utilized 1.347807 2629system.ruby.network.ext_links1.int_node.msg_count.Control::0 25 2630system.ruby.network.ext_links1.int_node.msg_count.Request_Control::0 1535 2631system.ruby.network.ext_links1.int_node.msg_count.Response_Data::2 1537 2632system.ruby.network.ext_links1.int_node.msg_count.Response_Control::2 23 2633system.ruby.network.ext_links1.int_node.msg_count.Unblock_Control::4 1534 2634system.ruby.network.ext_links1.int_node.msg_bytes.Control::0 200 2635system.ruby.network.ext_links1.int_node.msg_bytes.Request_Control::0 12280 2636system.ruby.network.ext_links1.int_node.msg_bytes.Response_Data::2 110664 2637system.ruby.network.ext_links1.int_node.msg_bytes.Response_Control::2 184 2638system.ruby.network.ext_links1.int_node.msg_bytes.Unblock_Control::4 12272 2639system.ruby.tcp_cntrl0.L1cache.demand_hits 0 # Number of cache demand hits 2640system.ruby.tcp_cntrl0.L1cache.demand_misses 0 # Number of cache demand misses 2641system.ruby.tcp_cntrl0.L1cache.demand_accesses 0 # Number of cache demand accesses 2642system.ruby.tcp_cntrl0.L1cache.num_data_array_reads 6 # number of data array reads 2643system.ruby.tcp_cntrl0.L1cache.num_data_array_writes 11 # number of data array writes 2644system.ruby.tcp_cntrl0.L1cache.num_tag_array_reads 1297 # number of tag array reads 2645system.ruby.tcp_cntrl0.L1cache.num_tag_array_writes 11 # number of tag array writes 2646system.ruby.tcp_cntrl0.L1cache.num_tag_array_stalls 5082 # number of stalls caused by tag array 2647system.ruby.tcp_cntrl0.L1cache.num_data_array_stalls 6 # number of stalls caused by data array 2648system.ruby.tcp_cntrl0.coalescer.gpu_tcp_ld_hits 0 # loads that hit in the TCP 2649system.ruby.tcp_cntrl0.coalescer.gpu_tcp_ld_transfers 0 # TCP to TCP load transfers 2650system.ruby.tcp_cntrl0.coalescer.gpu_tcc_ld_hits 0 # loads that hit in the TCC 2651system.ruby.tcp_cntrl0.coalescer.gpu_ld_misses 5 # loads that miss in the GPU 2652system.ruby.tcp_cntrl0.coalescer.gpu_tcp_st_hits 0 # stores that hit in the TCP 2653system.ruby.tcp_cntrl0.coalescer.gpu_tcp_st_transfers 0 # TCP to TCP store transfers 2654system.ruby.tcp_cntrl0.coalescer.gpu_tcc_st_hits 0 # stores that hit in the TCC 2655system.ruby.tcp_cntrl0.coalescer.gpu_st_misses 9 # stores that miss in the GPU 2656system.ruby.tcp_cntrl0.coalescer.cp_tcp_ld_hits 0 # loads that hit in the TCP 2657system.ruby.tcp_cntrl0.coalescer.cp_tcp_ld_transfers 0 # TCP to TCP load transfers 2658system.ruby.tcp_cntrl0.coalescer.cp_tcc_ld_hits 0 # loads that hit in the TCC 2659system.ruby.tcp_cntrl0.coalescer.cp_ld_misses 0 # loads that miss in the GPU 2660system.ruby.tcp_cntrl0.coalescer.cp_tcp_st_hits 0 # stores that hit in the TCP 2661system.ruby.tcp_cntrl0.coalescer.cp_tcp_st_transfers 0 # TCP to TCP store transfers 2662system.ruby.tcp_cntrl0.coalescer.cp_tcc_st_hits 0 # stores that hit in the TCC 2663system.ruby.tcp_cntrl0.coalescer.cp_st_misses 0 # stores that miss in the GPU 2664system.ruby.network.ext_links2.int_node.percent_links_utilized 0.115426 2665system.ruby.network.ext_links2.int_node.msg_count.Control::0 1535 2666system.ruby.network.ext_links2.int_node.msg_count.Data::0 18 2667system.ruby.network.ext_links2.int_node.msg_count.Data::1 18 2668system.ruby.network.ext_links2.int_node.msg_count.Request_Control::0 7 2669system.ruby.network.ext_links2.int_node.msg_count.Request_Control::1 9 2670system.ruby.network.ext_links2.int_node.msg_count.Response_Data::2 9 2671system.ruby.network.ext_links2.int_node.msg_count.Response_Data::3 11 2672system.ruby.network.ext_links2.int_node.msg_count.Response_Control::2 1535 2673system.ruby.network.ext_links2.int_node.msg_count.Writeback_Control::2 16 2674system.ruby.network.ext_links2.int_node.msg_count.Writeback_Control::3 16 2675system.ruby.network.ext_links2.int_node.msg_count.Unblock_Control::4 7 2676system.ruby.network.ext_links2.int_node.msg_bytes.Control::0 12280 2677system.ruby.network.ext_links2.int_node.msg_bytes.Data::0 1296 2678system.ruby.network.ext_links2.int_node.msg_bytes.Data::1 1296 2679system.ruby.network.ext_links2.int_node.msg_bytes.Request_Control::0 56 2680system.ruby.network.ext_links2.int_node.msg_bytes.Request_Control::1 72 2681system.ruby.network.ext_links2.int_node.msg_bytes.Response_Data::2 648 2682system.ruby.network.ext_links2.int_node.msg_bytes.Response_Data::3 792 2683system.ruby.network.ext_links2.int_node.msg_bytes.Response_Control::2 12280 2684system.ruby.network.ext_links2.int_node.msg_bytes.Writeback_Control::2 128 2685system.ruby.network.ext_links2.int_node.msg_bytes.Writeback_Control::3 128 2686system.ruby.network.ext_links2.int_node.msg_bytes.Unblock_Control::4 56 2687system.ruby.tcp_cntrl1.L1cache.demand_hits 0 # Number of cache demand hits 2688system.ruby.tcp_cntrl1.L1cache.demand_misses 0 # Number of cache demand misses 2689system.ruby.tcp_cntrl1.L1cache.demand_accesses 0 # Number of cache demand accesses 2690system.ruby.tcp_cntrl1.L1cache.num_data_array_reads 6 # number of data array reads 2691system.ruby.tcp_cntrl1.L1cache.num_data_array_writes 11 # number of data array writes 2692system.ruby.tcp_cntrl1.L1cache.num_tag_array_reads 1297 # number of tag array reads 2693system.ruby.tcp_cntrl1.L1cache.num_tag_array_writes 11 # number of tag array writes 2694system.ruby.tcp_cntrl1.L1cache.num_tag_array_stalls 5082 # number of stalls caused by tag array 2695system.ruby.tcp_cntrl1.L1cache.num_data_array_stalls 6 # number of stalls caused by data array 2696system.ruby.tcp_cntrl1.coalescer.gpu_tcp_ld_hits 0 # loads that hit in the TCP 2697system.ruby.tcp_cntrl1.coalescer.gpu_tcp_ld_transfers 0 # TCP to TCP load transfers 2698system.ruby.tcp_cntrl1.coalescer.gpu_tcc_ld_hits 0 # loads that hit in the TCC 2699system.ruby.tcp_cntrl1.coalescer.gpu_ld_misses 5 # loads that miss in the GPU 2700system.ruby.tcp_cntrl1.coalescer.gpu_tcp_st_hits 0 # stores that hit in the TCP 2701system.ruby.tcp_cntrl1.coalescer.gpu_tcp_st_transfers 0 # TCP to TCP store transfers 2702system.ruby.tcp_cntrl1.coalescer.gpu_tcc_st_hits 0 # stores that hit in the TCC 2703system.ruby.tcp_cntrl1.coalescer.gpu_st_misses 9 # stores that miss in the GPU 2704system.ruby.tcp_cntrl1.coalescer.cp_tcp_ld_hits 0 # loads that hit in the TCP 2705system.ruby.tcp_cntrl1.coalescer.cp_tcp_ld_transfers 0 # TCP to TCP load transfers 2706system.ruby.tcp_cntrl1.coalescer.cp_tcc_ld_hits 0 # loads that hit in the TCC 2707system.ruby.tcp_cntrl1.coalescer.cp_ld_misses 0 # loads that miss in the GPU 2708system.ruby.tcp_cntrl1.coalescer.cp_tcp_st_hits 0 # stores that hit in the TCP 2709system.ruby.tcp_cntrl1.coalescer.cp_tcp_st_transfers 0 # TCP to TCP store transfers 2710system.ruby.tcp_cntrl1.coalescer.cp_tcc_st_hits 0 # stores that hit in the TCC 2711system.ruby.tcp_cntrl1.coalescer.cp_st_misses 0 # stores that miss in the GPU 2712system.ruby.sqc_cntrl0.L1cache.demand_hits 0 # Number of cache demand hits 2713system.ruby.sqc_cntrl0.L1cache.demand_misses 0 # Number of cache demand misses 2714system.ruby.sqc_cntrl0.L1cache.demand_accesses 0 # Number of cache demand accesses 2715system.ruby.sqc_cntrl0.L1cache.num_data_array_reads 86 # number of data array reads 2716system.ruby.sqc_cntrl0.L1cache.num_tag_array_reads 91 # number of tag array reads 2717system.ruby.sqc_cntrl0.L1cache.num_tag_array_writes 10 # number of tag array writes 2718system.ruby.sqc_cntrl0.sequencer.load_waiting_on_load 97 # Number of times a load aliased with a pending load 2719system.ruby.tcc_cntrl0.L2cache.demand_hits 0 # Number of cache demand hits 2720system.ruby.tcc_cntrl0.L2cache.demand_misses 0 # Number of cache demand misses 2721system.ruby.tcc_cntrl0.L2cache.demand_accesses 0 # Number of cache demand accesses 2722system.ruby.tcc_cntrl0.L2cache.num_data_array_writes 9 # number of data array writes 2723system.ruby.tcc_cntrl0.L2cache.num_tag_array_reads 1569 # number of tag array reads 2724system.ruby.tcc_cntrl0.L2cache.num_tag_array_writes 1545 # number of tag array writes 2725system.ruby.tcc_cntrl0.L2cache.num_tag_array_stalls 1 # number of stalls caused by tag array 2726system.ruby.network.msg_count.Control 3120 2727system.ruby.network.msg_count.Data 54 2728system.ruby.network.msg_count.Request_Control 3093 2729system.ruby.network.msg_count.Response_Data 3103 2730system.ruby.network.msg_count.Response_Control 3116 2731system.ruby.network.msg_count.Writeback_Control 48 2732system.ruby.network.msg_count.Unblock_Control 3082 2733system.ruby.network.msg_byte.Control 24960 2734system.ruby.network.msg_byte.Data 3888 2735system.ruby.network.msg_byte.Request_Control 24744 2736system.ruby.network.msg_byte.Response_Data 223416 2737system.ruby.network.msg_byte.Response_Control 24928 2738system.ruby.network.msg_byte.Writeback_Control 384 2739system.ruby.network.msg_byte.Unblock_Control 24656 2740system.sqc_coalescer.clk_domain.voltage_domain.voltage 1 # Voltage in Volts 2741system.sqc_coalescer.clk_domain.clock 1000 # Clock period in ticks 2742system.sqc_coalescer.uncoalesced_accesses 86 # Number of uncoalesced TLB accesses 2743system.sqc_coalescer.coalesced_accesses 48 # Number of coalesced TLB accesses 2744system.sqc_coalescer.queuing_cycles 211000 # Number of cycles spent in queue 2745system.sqc_coalescer.local_queuing_cycles 211000 # Number of cycles spent in queue for all incoming reqs 2746system.sqc_coalescer.local_latency 2453.488372 # Avg. latency over all incoming pkts 2747system.sqc_tlb.clk_domain.voltage_domain.voltage 1 # Voltage in Volts 2748system.sqc_tlb.clk_domain.clock 1000 # Clock period in ticks 2749system.sqc_tlb.local_TLB_accesses 48 # Number of TLB accesses 2750system.sqc_tlb.local_TLB_hits 47 # Number of TLB hits 2751system.sqc_tlb.local_TLB_misses 1 # Number of TLB misses 2752system.sqc_tlb.local_TLB_miss_rate 2.083333 # TLB miss rate 2753system.sqc_tlb.global_TLB_accesses 86 # Number of TLB accesses 2754system.sqc_tlb.global_TLB_hits 78 # Number of TLB hits 2755system.sqc_tlb.global_TLB_misses 8 # Number of TLB misses 2756system.sqc_tlb.global_TLB_miss_rate 9.302326 # TLB miss rate 2757system.sqc_tlb.access_cycles 86008 # Cycles spent accessing this TLB level 2758system.sqc_tlb.page_table_cycles 0 # Cycles spent accessing the page table 2759system.sqc_tlb.unique_pages 1 # Number of unique pages touched 2760system.sqc_tlb.local_cycles 48001 # Number of cycles spent in queue for all incoming reqs 2761system.sqc_tlb.local_latency 1000.020833 # Avg. latency over incoming coalesced reqs 2762system.sqc_tlb.avg_reuse_distance 0 # avg. reuse distance over all pages (in ticks) 2763system.ruby.network.ext_links0.int_node.throttle0.link_utilization 0.766700 2764system.ruby.network.ext_links0.int_node.throttle0.msg_count.Data::0 18 2765system.ruby.network.ext_links0.int_node.throttle0.msg_count.Request_Control::0 1542 2766system.ruby.network.ext_links0.int_node.throttle0.msg_count.Response_Data::2 2 2767system.ruby.network.ext_links0.int_node.throttle0.msg_count.Response_Control::2 1558 2768system.ruby.network.ext_links0.int_node.throttle0.msg_count.Unblock_Control::4 1541 2769system.ruby.network.ext_links0.int_node.throttle0.msg_bytes.Data::0 1296 2770system.ruby.network.ext_links0.int_node.throttle0.msg_bytes.Request_Control::0 12336 2771system.ruby.network.ext_links0.int_node.throttle0.msg_bytes.Response_Data::2 144 2772system.ruby.network.ext_links0.int_node.throttle0.msg_bytes.Response_Control::2 12464 2773system.ruby.network.ext_links0.int_node.throttle0.msg_bytes.Unblock_Control::4 12328 2774system.ruby.network.ext_links0.int_node.throttle1.link_utilization 2.201021 2775system.ruby.network.ext_links0.int_node.throttle1.msg_count.Control::0 25 2776system.ruby.network.ext_links0.int_node.throttle1.msg_count.Response_Data::2 1535 2777system.ruby.network.ext_links0.int_node.throttle1.msg_bytes.Control::0 200 2778system.ruby.network.ext_links0.int_node.throttle1.msg_bytes.Response_Data::2 110520 2779system.ruby.network.ext_links0.int_node.throttle2.link_utilization 0.259542 2780system.ruby.network.ext_links0.int_node.throttle2.msg_count.Control::0 1535 2781system.ruby.network.ext_links0.int_node.throttle2.msg_count.Response_Data::2 9 2782system.ruby.network.ext_links0.int_node.throttle2.msg_count.Writeback_Control::2 16 2783system.ruby.network.ext_links0.int_node.throttle2.msg_bytes.Control::0 12280 2784system.ruby.network.ext_links0.int_node.throttle2.msg_bytes.Response_Data::2 648 2785system.ruby.network.ext_links0.int_node.throttle2.msg_bytes.Writeback_Control::2 128 2786system.ruby.network.ext_links1.int_node.throttle0.link_utilization 2.201021 2787system.ruby.network.ext_links1.int_node.throttle0.msg_count.Control::0 25 2788system.ruby.network.ext_links1.int_node.throttle0.msg_count.Response_Data::2 1535 2789system.ruby.network.ext_links1.int_node.throttle0.msg_bytes.Control::0 200 2790system.ruby.network.ext_links1.int_node.throttle0.msg_bytes.Response_Data::2 110520 2791system.ruby.network.ext_links1.int_node.throttle1.link_utilization 0.494594 2792system.ruby.network.ext_links1.int_node.throttle1.msg_count.Request_Control::0 1535 2793system.ruby.network.ext_links1.int_node.throttle1.msg_count.Response_Data::2 2 2794system.ruby.network.ext_links1.int_node.throttle1.msg_count.Response_Control::2 23 2795system.ruby.network.ext_links1.int_node.throttle1.msg_count.Unblock_Control::4 1534 2796system.ruby.network.ext_links1.int_node.throttle1.msg_bytes.Request_Control::0 12280 2797system.ruby.network.ext_links1.int_node.throttle1.msg_bytes.Response_Data::2 144 2798system.ruby.network.ext_links1.int_node.throttle1.msg_bytes.Response_Control::2 184 2799system.ruby.network.ext_links1.int_node.throttle1.msg_bytes.Unblock_Control::4 12272 2800system.ruby.network.ext_links2.int_node.throttle0.link_utilization 0.005566 2801system.ruby.network.ext_links2.int_node.throttle0.msg_count.Response_Data::3 3 2802system.ruby.network.ext_links2.int_node.throttle0.msg_count.Writeback_Control::3 8 2803system.ruby.network.ext_links2.int_node.throttle0.msg_bytes.Response_Data::3 216 2804system.ruby.network.ext_links2.int_node.throttle0.msg_bytes.Writeback_Control::3 64 2805system.ruby.network.ext_links2.int_node.throttle1.link_utilization 0.005566 2806system.ruby.network.ext_links2.int_node.throttle1.msg_count.Response_Data::3 3 2807system.ruby.network.ext_links2.int_node.throttle1.msg_count.Writeback_Control::3 8 2808system.ruby.network.ext_links2.int_node.throttle1.msg_bytes.Response_Data::3 216 2809system.ruby.network.ext_links2.int_node.throttle1.msg_bytes.Writeback_Control::3 64 2810system.ruby.network.ext_links2.int_node.throttle2.link_utilization 0.286737 2811system.ruby.network.ext_links2.int_node.throttle2.msg_count.Control::0 1535 2812system.ruby.network.ext_links2.int_node.throttle2.msg_count.Data::1 18 2813system.ruby.network.ext_links2.int_node.throttle2.msg_count.Request_Control::1 9 2814system.ruby.network.ext_links2.int_node.throttle2.msg_count.Response_Data::2 9 2815system.ruby.network.ext_links2.int_node.throttle2.msg_count.Writeback_Control::2 16 2816system.ruby.network.ext_links2.int_node.throttle2.msg_bytes.Control::0 12280 2817system.ruby.network.ext_links2.int_node.throttle2.msg_bytes.Data::1 1296 2818system.ruby.network.ext_links2.int_node.throttle2.msg_bytes.Request_Control::1 72 2819system.ruby.network.ext_links2.int_node.throttle2.msg_bytes.Response_Data::2 648 2820system.ruby.network.ext_links2.int_node.throttle2.msg_bytes.Writeback_Control::2 128 2821system.ruby.network.ext_links2.int_node.throttle3.link_utilization 0.007156 2822system.ruby.network.ext_links2.int_node.throttle3.msg_count.Response_Data::3 5 2823system.ruby.network.ext_links2.int_node.throttle3.msg_bytes.Response_Data::3 360 2824system.ruby.network.ext_links2.int_node.throttle4.link_utilization 0.272106 2825system.ruby.network.ext_links2.int_node.throttle4.msg_count.Data::0 18 2826system.ruby.network.ext_links2.int_node.throttle4.msg_count.Request_Control::0 7 2827system.ruby.network.ext_links2.int_node.throttle4.msg_count.Response_Control::2 1535 2828system.ruby.network.ext_links2.int_node.throttle4.msg_count.Unblock_Control::4 7 2829system.ruby.network.ext_links2.int_node.throttle4.msg_bytes.Data::0 1296 2830system.ruby.network.ext_links2.int_node.throttle4.msg_bytes.Request_Control::0 56 2831system.ruby.network.ext_links2.int_node.throttle4.msg_bytes.Response_Control::2 12280 2832system.ruby.network.ext_links2.int_node.throttle4.msg_bytes.Unblock_Control::4 56 2833system.ruby.LD.latency_hist::bucket_size 128 2834system.ruby.LD.latency_hist::max_bucket 1279 2835system.ruby.LD.latency_hist::samples 16335 2836system.ruby.LD.latency_hist::mean 3.784451 2837system.ruby.LD.latency_hist::gmean 1.062267 2838system.ruby.LD.latency_hist::stdev 27.056562 2839system.ruby.LD.latency_hist \| 16160 98.93% 98.93% \| 90 0.55% 99.48% \| 84 0.51% 99.99% \| 0 0.00% 99.99% \| 0 0.00% 99.99% \| 1 0.01% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% 2840system.ruby.LD.latency_hist::total 16335 2841system.ruby.LD.hit_latency_hist::bucket_size 128 2842system.ruby.LD.hit_latency_hist::max_bucket 1279 2843system.ruby.LD.hit_latency_hist::samples 175 2844system.ruby.LD.hit_latency_hist::mean 260.394286 2845system.ruby.LD.hit_latency_hist::gmean 258.339713 2846system.ruby.LD.hit_latency_hist::stdev 42.039376 2847system.ruby.LD.hit_latency_hist \| 0 0.00% 0.00% \| 90 51.43% 51.43% \| 84 48.00% 99.43% \| 0 0.00% 99.43% \| 0 0.00% 99.43% \| 1 0.57% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% 2848system.ruby.LD.hit_latency_hist::total 175 2849system.ruby.LD.miss_latency_hist::bucket_size 2 2850system.ruby.LD.miss_latency_hist::max_bucket 19 2851system.ruby.LD.miss_latency_hist::samples 16160 2852system.ruby.LD.miss_latency_hist::mean 1.005569 2853system.ruby.LD.miss_latency_hist::gmean 1.000911 2854system.ruby.LD.miss_latency_hist::stdev 0.316580 2855system.ruby.LD.miss_latency_hist \| 16155 99.97% 99.97% \| 0 0.00% 99.97% \| 0 0.00% 99.97% \| 0 0.00% 99.97% \| 0 0.00% 99.97% \| 0 0.00% 99.97% \| 0 0.00% 99.97% \| 0 0.00% 99.97% \| 0 0.00% 99.97% \| 5 0.03% 100.00% 2856system.ruby.LD.miss_latency_hist::total 16160 2857system.ruby.ST.latency_hist::bucket_size 128 2858system.ruby.ST.latency_hist::max_bucket 1279 2859system.ruby.ST.latency_hist::samples 10412 2860system.ruby.ST.latency_hist::mean 8.839992 2861system.ruby.ST.latency_hist::gmean 1.186243 2862system.ruby.ST.latency_hist::stdev 45.390081 2863system.ruby.ST.latency_hist \| 10090 96.91% 96.91% \| 254 2.44% 99.35% \| 62 0.60% 99.94% \| 0 0.00% 99.94% \| 1 0.01% 99.95% \| 4 0.04% 99.99% \| 1 0.01% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% 2864system.ruby.ST.latency_hist::total 10412 2865system.ruby.ST.hit_latency_hist::bucket_size 128 2866system.ruby.ST.hit_latency_hist::max_bucket 1279 2867system.ruby.ST.hit_latency_hist::samples 322 2868system.ruby.ST.hit_latency_hist::mean 254.509317 2869system.ruby.ST.hit_latency_hist::gmean 250.282441 2870system.ruby.ST.hit_latency_hist::stdev 65.931487 2871system.ruby.ST.hit_latency_hist \| 0 0.00% 0.00% \| 254 78.88% 78.88% \| 62 19.25% 98.14% \| 0 0.00% 98.14% \| 1 0.31% 98.45% \| 4 1.24% 99.69% \| 1 0.31% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% 2872system.ruby.ST.hit_latency_hist::total 322 2873system.ruby.ST.miss_latency_hist::bucket_size 1 2874system.ruby.ST.miss_latency_hist::max_bucket 9 2875system.ruby.ST.miss_latency_hist::samples 10090 2876system.ruby.ST.miss_latency_hist::mean 1 2877system.ruby.ST.miss_latency_hist::gmean 1 2878system.ruby.ST.miss_latency_hist \| 0 0.00% 0.00% \| 10090 100.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% 2879system.ruby.ST.miss_latency_hist::total 10090 2880system.ruby.IFETCH.latency_hist::bucket_size 128 2881system.ruby.IFETCH.latency_hist::max_bucket 1279 2882system.ruby.IFETCH.latency_hist::samples 87095 2883system.ruby.IFETCH.latency_hist::mean 4.017395 2884system.ruby.IFETCH.latency_hist::gmean 1.069735 2885system.ruby.IFETCH.latency_hist::stdev 28.134930 2886system.ruby.IFETCH.latency_hist \| 86061 98.81% 98.81% \| 790 0.91% 99.72% \| 224 0.26% 99.98% \| 3 0.00% 99.98% \| 7 0.01% 99.99% \| 9 0.01% 100.00% \| 1 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% 2887system.ruby.IFETCH.latency_hist::total 87095 2888system.ruby.IFETCH.hit_latency_hist::bucket_size 128 2889system.ruby.IFETCH.hit_latency_hist::max_bucket 1279 2890system.ruby.IFETCH.hit_latency_hist::samples 1034 2891system.ruby.IFETCH.hit_latency_hist::mean 254.218569 2892system.ruby.IFETCH.hit_latency_hist::gmean 250.716467 2893system.ruby.IFETCH.hit_latency_hist::stdev 57.514968 2894system.ruby.IFETCH.hit_latency_hist \| 0 0.00% 0.00% \| 790 76.40% 76.40% \| 224 21.66% 98.07% \| 3 0.29% 98.36% \| 7 0.68% 99.03% \| 9 0.87% 99.90% \| 1 0.10% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% 2895system.ruby.IFETCH.hit_latency_hist::total 1034 2896system.ruby.IFETCH.miss_latency_hist::bucket_size 2 2897system.ruby.IFETCH.miss_latency_hist::max_bucket 19 2898system.ruby.IFETCH.miss_latency_hist::samples 86061 2899system.ruby.IFETCH.miss_latency_hist::mean 1.011294 2900system.ruby.IFETCH.miss_latency_hist::gmean 1.001849 2901system.ruby.IFETCH.miss_latency_hist::stdev 0.450747 2902system.ruby.IFETCH.miss_latency_hist \| 86007 99.94% 99.94% \| 0 0.00% 99.94% \| 0 0.00% 99.94% \| 0 0.00% 99.94% \| 0 0.00% 99.94% \| 0 0.00% 99.94% \| 0 0.00% 99.94% \| 0 0.00% 99.94% \| 0 0.00% 99.94% \| 54 0.06% 100.00% 2903system.ruby.IFETCH.miss_latency_hist::total 86061 2904system.ruby.RMW_Read.latency_hist::bucket_size 32 2905system.ruby.RMW_Read.latency_hist::max_bucket 319 2906system.ruby.RMW_Read.latency_hist::samples 341 2907system.ruby.RMW_Read.latency_hist::mean 4.114370 2908system.ruby.RMW_Read.latency_hist::gmean 1.067644 2909system.ruby.RMW_Read.latency_hist::stdev 28.783090 2910system.ruby.RMW_Read.latency_hist \| 337 98.83% 98.83% \| 0 0.00% 98.83% \| 0 0.00% 98.83% \| 0 0.00% 98.83% \| 0 0.00% 98.83% \| 0 0.00% 98.83% \| 0 0.00% 98.83% \| 2 0.59% 99.41% \| 0 0.00% 99.41% \| 2 0.59% 100.00% 2911system.ruby.RMW_Read.latency_hist::total 341 2912system.ruby.RMW_Read.hit_latency_hist::bucket_size 32 2913system.ruby.RMW_Read.hit_latency_hist::max_bucket 319 2914system.ruby.RMW_Read.hit_latency_hist::samples 4 2915system.ruby.RMW_Read.hit_latency_hist::mean 266.500000 2916system.ruby.RMW_Read.hit_latency_hist::gmean 265.077347 2917system.ruby.RMW_Read.hit_latency_hist::stdev 31.754265 2918system.ruby.RMW_Read.hit_latency_hist \| 0 0.00% 0.00% \| 0 0.00% 0.00% \| 0 0.00% 0.00% \| 0 0.00% 0.00% \| 0 0.00% 0.00% \| 0 0.00% 0.00% \| 0 0.00% 0.00% \| 2 50.00% 50.00% \| 0 0.00% 50.00% \| 2 50.00% 100.00% 2919system.ruby.RMW_Read.hit_latency_hist::total 4 2920system.ruby.RMW_Read.miss_latency_hist::bucket_size 1 2921system.ruby.RMW_Read.miss_latency_hist::max_bucket 9 2922system.ruby.RMW_Read.miss_latency_hist::samples 337 2923system.ruby.RMW_Read.miss_latency_hist::mean 1 2924system.ruby.RMW_Read.miss_latency_hist::gmean 1 2925system.ruby.RMW_Read.miss_latency_hist \| 0 0.00% 0.00% \| 337 100.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% 2926system.ruby.RMW_Read.miss_latency_hist::total 337 2927system.ruby.Locked_RMW_Read.latency_hist::bucket_size 1 2928system.ruby.Locked_RMW_Read.latency_hist::max_bucket 9 2929system.ruby.Locked_RMW_Read.latency_hist::samples 10 2930system.ruby.Locked_RMW_Read.latency_hist::mean 1 2931system.ruby.Locked_RMW_Read.latency_hist::gmean 1 2932system.ruby.Locked_RMW_Read.latency_hist \| 0 0.00% 0.00% \| 10 100.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% 2933system.ruby.Locked_RMW_Read.latency_hist::total 10 2934system.ruby.Locked_RMW_Read.miss_latency_hist::bucket_size 1 2935system.ruby.Locked_RMW_Read.miss_latency_hist::max_bucket 9 2936system.ruby.Locked_RMW_Read.miss_latency_hist::samples 10 2937system.ruby.Locked_RMW_Read.miss_latency_hist::mean 1 2938system.ruby.Locked_RMW_Read.miss_latency_hist::gmean 1 2939system.ruby.Locked_RMW_Read.miss_latency_hist \| 0 0.00% 0.00% \| 10 100.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% 2940system.ruby.Locked_RMW_Read.miss_latency_hist::total 10 2941system.ruby.Locked_RMW_Write.latency_hist::bucket_size 1 2942system.ruby.Locked_RMW_Write.latency_hist::max_bucket 9 2943system.ruby.Locked_RMW_Write.latency_hist::samples 10 2944system.ruby.Locked_RMW_Write.latency_hist::mean 1 2945system.ruby.Locked_RMW_Write.latency_hist::gmean 1 2946system.ruby.Locked_RMW_Write.latency_hist \| 0 0.00% 0.00% \| 10 100.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% 2947system.ruby.Locked_RMW_Write.latency_hist::total 10 2948system.ruby.Locked_RMW_Write.miss_latency_hist::bucket_size 1 2949system.ruby.Locked_RMW_Write.miss_latency_hist::max_bucket 9 2950system.ruby.Locked_RMW_Write.miss_latency_hist::samples 10 2951system.ruby.Locked_RMW_Write.miss_latency_hist::mean 1 2952system.ruby.Locked_RMW_Write.miss_latency_hist::gmean 1 2953system.ruby.Locked_RMW_Write.miss_latency_hist \| 0 0.00% 0.00% \| 10 100.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% 2954system.ruby.Locked_RMW_Write.miss_latency_hist::total 10 2955system.ruby.L1Cache.miss_mach_latency_hist::bucket_size 1 2956system.ruby.L1Cache.miss_mach_latency_hist::max_bucket 9 2957system.ruby.L1Cache.miss_mach_latency_hist::samples 112609 2958system.ruby.L1Cache.miss_mach_latency_hist::mean 1 2959system.ruby.L1Cache.miss_mach_latency_hist::gmean 1 2960system.ruby.L1Cache.miss_mach_latency_hist \| 0 0.00% 0.00% \| 112609 100.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% 2961system.ruby.L1Cache.miss_mach_latency_hist::total 112609 2962system.ruby.L2Cache.miss_mach_latency_hist::bucket_size 2 2963system.ruby.L2Cache.miss_mach_latency_hist::max_bucket 19 2964system.ruby.L2Cache.miss_mach_latency_hist::samples 59 2965system.ruby.L2Cache.miss_mach_latency_hist::mean 19 2966system.ruby.L2Cache.miss_mach_latency_hist::gmean 19.000000 2967system.ruby.L2Cache.miss_mach_latency_hist \| 0 0.00% 0.00% \| 0 0.00% 0.00% \| 0 0.00% 0.00% \| 0 0.00% 0.00% \| 0 0.00% 0.00% \| 0 0.00% 0.00% \| 0 0.00% 0.00% \| 0 0.00% 0.00% \| 0 0.00% 0.00% \| 59 100.00% 100.00% 2968system.ruby.L2Cache.miss_mach_latency_hist::total 59 2969system.ruby.Directory.hit_mach_latency_hist::bucket_size 128 2970system.ruby.Directory.hit_mach_latency_hist::max_bucket 1279 2971system.ruby.Directory.hit_mach_latency_hist::samples 1535 2972system.ruby.Directory.hit_mach_latency_hist::mean 255.015635 2973system.ruby.Directory.hit_mach_latency_hist::gmean 251.519163 2974system.ruby.Directory.hit_mach_latency_hist::stdev 57.825523 2975system.ruby.Directory.hit_mach_latency_hist \| 0 0.00% 0.00% \| 1136 74.01% 74.01% \| 372 24.23% 98.24% \| 3 0.20% 98.44% \| 8 0.52% 98.96% \| 14 0.91% 99.87% \| 2 0.13% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% 2976system.ruby.Directory.hit_mach_latency_hist::total 1535 2977system.ruby.LD.L1Cache.miss_type_mach_latency_hist::bucket_size 1 2978system.ruby.LD.L1Cache.miss_type_mach_latency_hist::max_bucket 9 2979system.ruby.LD.L1Cache.miss_type_mach_latency_hist::samples 16155 2980system.ruby.LD.L1Cache.miss_type_mach_latency_hist::mean 1 2981system.ruby.LD.L1Cache.miss_type_mach_latency_hist::gmean 1 2982system.ruby.LD.L1Cache.miss_type_mach_latency_hist \| 0 0.00% 0.00% \| 16155 100.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% 2983system.ruby.LD.L1Cache.miss_type_mach_latency_hist::total 16155 2984system.ruby.LD.L2Cache.miss_type_mach_latency_hist::bucket_size 2 2985system.ruby.LD.L2Cache.miss_type_mach_latency_hist::max_bucket 19 2986system.ruby.LD.L2Cache.miss_type_mach_latency_hist::samples 5 2987system.ruby.LD.L2Cache.miss_type_mach_latency_hist::mean 19 2988system.ruby.LD.L2Cache.miss_type_mach_latency_hist::gmean 19.000000 2989system.ruby.LD.L2Cache.miss_type_mach_latency_hist \| 0 0.00% 0.00% \| 0 0.00% 0.00% \| 0 0.00% 0.00% \| 0 0.00% 0.00% \| 0 0.00% 0.00% \| 0 0.00% 0.00% \| 0 0.00% 0.00% \| 0 0.00% 0.00% \| 0 0.00% 0.00% \| 5 100.00% 100.00% 2990system.ruby.LD.L2Cache.miss_type_mach_latency_hist::total 5 2991system.ruby.LD.Directory.hit_type_mach_latency_hist::bucket_size 128 2992system.ruby.LD.Directory.hit_type_mach_latency_hist::max_bucket 1279 2993system.ruby.LD.Directory.hit_type_mach_latency_hist::samples 175 2994system.ruby.LD.Directory.hit_type_mach_latency_hist::mean 260.394286 2995system.ruby.LD.Directory.hit_type_mach_latency_hist::gmean 258.339713 2996system.ruby.LD.Directory.hit_type_mach_latency_hist::stdev 42.039376 2997system.ruby.LD.Directory.hit_type_mach_latency_hist \| 0 0.00% 0.00% \| 90 51.43% 51.43% \| 84 48.00% 99.43% \| 0 0.00% 99.43% \| 0 0.00% 99.43% \| 1 0.57% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% 2998system.ruby.LD.Directory.hit_type_mach_latency_hist::total 175 2999system.ruby.ST.L1Cache.miss_type_mach_latency_hist::bucket_size 1 3000system.ruby.ST.L1Cache.miss_type_mach_latency_hist::max_bucket 9 3001system.ruby.ST.L1Cache.miss_type_mach_latency_hist::samples 10090 3002system.ruby.ST.L1Cache.miss_type_mach_latency_hist::mean 1 3003system.ruby.ST.L1Cache.miss_type_mach_latency_hist::gmean 1 3004system.ruby.ST.L1Cache.miss_type_mach_latency_hist \| 0 0.00% 0.00% \| 10090 100.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% 3005system.ruby.ST.L1Cache.miss_type_mach_latency_hist::total 10090 3006system.ruby.ST.Directory.hit_type_mach_latency_hist::bucket_size 128 3007system.ruby.ST.Directory.hit_type_mach_latency_hist::max_bucket 1279 3008system.ruby.ST.Directory.hit_type_mach_latency_hist::samples 322 3009system.ruby.ST.Directory.hit_type_mach_latency_hist::mean 254.509317 3010system.ruby.ST.Directory.hit_type_mach_latency_hist::gmean 250.282441 3011system.ruby.ST.Directory.hit_type_mach_latency_hist::stdev 65.931487 3012system.ruby.ST.Directory.hit_type_mach_latency_hist \| 0 0.00% 0.00% \| 254 78.88% 78.88% \| 62 19.25% 98.14% \| 0 0.00% 98.14% \| 1 0.31% 98.45% \| 4 1.24% 99.69% \| 1 0.31% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% 3013system.ruby.ST.Directory.hit_type_mach_latency_hist::total 322 3014system.ruby.IFETCH.L1Cache.miss_type_mach_latency_hist::bucket_size 1 3015system.ruby.IFETCH.L1Cache.miss_type_mach_latency_hist::max_bucket 9 3016system.ruby.IFETCH.L1Cache.miss_type_mach_latency_hist::samples 86007 3017system.ruby.IFETCH.L1Cache.miss_type_mach_latency_hist::mean 1 3018system.ruby.IFETCH.L1Cache.miss_type_mach_latency_hist::gmean 1 3019system.ruby.IFETCH.L1Cache.miss_type_mach_latency_hist \| 0 0.00% 0.00% \| 86007 100.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% 3020system.ruby.IFETCH.L1Cache.miss_type_mach_latency_hist::total 86007 3021system.ruby.IFETCH.L2Cache.miss_type_mach_latency_hist::bucket_size 2 3022system.ruby.IFETCH.L2Cache.miss_type_mach_latency_hist::max_bucket 19 3023system.ruby.IFETCH.L2Cache.miss_type_mach_latency_hist::samples 54 3024system.ruby.IFETCH.L2Cache.miss_type_mach_latency_hist::mean 19 3025system.ruby.IFETCH.L2Cache.miss_type_mach_latency_hist::gmean 19.000000 3026system.ruby.IFETCH.L2Cache.miss_type_mach_latency_hist \| 0 0.00% 0.00% \| 0 0.00% 0.00% \| 0 0.00% 0.00% \| 0 0.00% 0.00% \| 0 0.00% 0.00% \| 0 0.00% 0.00% \| 0 0.00% 0.00% \| 0 0.00% 0.00% \| 0 0.00% 0.00% \| 54 100.00% 100.00% 3027system.ruby.IFETCH.L2Cache.miss_type_mach_latency_hist::total 54 3028system.ruby.IFETCH.Directory.hit_type_mach_latency_hist::bucket_size 128 3029system.ruby.IFETCH.Directory.hit_type_mach_latency_hist::max_bucket 1279 3030system.ruby.IFETCH.Directory.hit_type_mach_latency_hist::samples 1034 3031system.ruby.IFETCH.Directory.hit_type_mach_latency_hist::mean 254.218569 3032system.ruby.IFETCH.Directory.hit_type_mach_latency_hist::gmean 250.716467 3033system.ruby.IFETCH.Directory.hit_type_mach_latency_hist::stdev 57.514968 3034system.ruby.IFETCH.Directory.hit_type_mach_latency_hist \| 0 0.00% 0.00% \| 790 76.40% 76.40% \| 224 21.66% 98.07% \| 3 0.29% 98.36% \| 7 0.68% 99.03% \| 9 0.87% 99.90% \| 1 0.10% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% 3035system.ruby.IFETCH.Directory.hit_type_mach_latency_hist::total 1034 3036system.ruby.RMW_Read.L1Cache.miss_type_mach_latency_hist::bucket_size 1 3037system.ruby.RMW_Read.L1Cache.miss_type_mach_latency_hist::max_bucket 9 3038system.ruby.RMW_Read.L1Cache.miss_type_mach_latency_hist::samples 337 3039system.ruby.RMW_Read.L1Cache.miss_type_mach_latency_hist::mean 1 3040system.ruby.RMW_Read.L1Cache.miss_type_mach_latency_hist::gmean 1 3041system.ruby.RMW_Read.L1Cache.miss_type_mach_latency_hist \| 0 0.00% 0.00% \| 337 100.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% 3042system.ruby.RMW_Read.L1Cache.miss_type_mach_latency_hist::total 337 3043system.ruby.RMW_Read.Directory.hit_type_mach_latency_hist::bucket_size 32 3044system.ruby.RMW_Read.Directory.hit_type_mach_latency_hist::max_bucket 319 3045system.ruby.RMW_Read.Directory.hit_type_mach_latency_hist::samples 4 3046system.ruby.RMW_Read.Directory.hit_type_mach_latency_hist::mean 266.500000 3047system.ruby.RMW_Read.Directory.hit_type_mach_latency_hist::gmean 265.077347 3048system.ruby.RMW_Read.Directory.hit_type_mach_latency_hist::stdev 31.754265 3049system.ruby.RMW_Read.Directory.hit_type_mach_latency_hist \| 0 0.00% 0.00% \| 0 0.00% 0.00% \| 0 0.00% 0.00% \| 0 0.00% 0.00% \| 0 0.00% 0.00% \| 0 0.00% 0.00% \| 0 0.00% 0.00% \| 2 50.00% 50.00% \| 0 0.00% 50.00% \| 2 50.00% 100.00% 3050system.ruby.RMW_Read.Directory.hit_type_mach_latency_hist::total 4 3051system.ruby.Locked_RMW_Read.L1Cache.miss_type_mach_latency_hist::bucket_size 1 3052system.ruby.Locked_RMW_Read.L1Cache.miss_type_mach_latency_hist::max_bucket 9 3053system.ruby.Locked_RMW_Read.L1Cache.miss_type_mach_latency_hist::samples 10 3054system.ruby.Locked_RMW_Read.L1Cache.miss_type_mach_latency_hist::mean 1 3055system.ruby.Locked_RMW_Read.L1Cache.miss_type_mach_latency_hist::gmean 1 3056system.ruby.Locked_RMW_Read.L1Cache.miss_type_mach_latency_hist \| 0 0.00% 0.00% \| 10 100.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% 3057system.ruby.Locked_RMW_Read.L1Cache.miss_type_mach_latency_hist::total 10 3058system.ruby.Locked_RMW_Write.L1Cache.miss_type_mach_latency_hist::bucket_size 1 3059system.ruby.Locked_RMW_Write.L1Cache.miss_type_mach_latency_hist::max_bucket 9 3060system.ruby.Locked_RMW_Write.L1Cache.miss_type_mach_latency_hist::samples 10 3061system.ruby.Locked_RMW_Write.L1Cache.miss_type_mach_latency_hist::mean 1 3062system.ruby.Locked_RMW_Write.L1Cache.miss_type_mach_latency_hist::gmean 1 3063system.ruby.Locked_RMW_Write.L1Cache.miss_type_mach_latency_hist \| 0 0.00% 0.00% \| 10 100.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% 3064system.ruby.Locked_RMW_Write.L1Cache.miss_type_mach_latency_hist::total 10 3065system.ruby.CorePair_Controller.C0_Load_L1miss 180 0.00% 0.00% 3066system.ruby.CorePair_Controller.C0_Load_L1hit 16155 0.00% 0.00% 3067system.ruby.CorePair_Controller.Ifetch0_L1hit 86007 0.00% 0.00% 3068system.ruby.CorePair_Controller.Ifetch0_L1miss 1088 0.00% 0.00% 3069system.ruby.CorePair_Controller.C0_Store_L1miss 325 0.00% 0.00% 3070system.ruby.CorePair_Controller.C0_Store_L1hit 10448 0.00% 0.00% 3071system.ruby.CorePair_Controller.NB_AckS 1034 0.00% 0.00% 3072system.ruby.CorePair_Controller.NB_AckM 326 0.00% 0.00% 3073system.ruby.CorePair_Controller.NB_AckE 175 0.00% 0.00% 3074system.ruby.CorePair_Controller.L1I_Repl 589 0.00% 0.00% 3075system.ruby.CorePair_Controller.L1D0_Repl 24 0.00% 0.00% 3076system.ruby.CorePair_Controller.L2_to_L1D0 5 0.00% 0.00% 3077system.ruby.CorePair_Controller.L2_to_L1I 54 0.00% 0.00% 3078system.ruby.CorePair_Controller.PrbInvData 18 0.00% 0.00% 3079system.ruby.CorePair_Controller.PrbShrData 7 0.00% 0.00% 3080system.ruby.CorePair_Controller.I.C0_Load_L1miss 175 0.00% 0.00% 3081system.ruby.CorePair_Controller.I.Ifetch0_L1miss 1034 0.00% 0.00% 3082system.ruby.CorePair_Controller.I.C0_Store_L1miss 325 0.00% 0.00% 3083system.ruby.CorePair_Controller.I.PrbInvData 17 0.00% 0.00% 3084system.ruby.CorePair_Controller.I.PrbShrData 5 0.00% 0.00% 3085system.ruby.CorePair_Controller.S.Ifetch0_L1hit 86007 0.00% 0.00% 3086system.ruby.CorePair_Controller.S.Ifetch0_L1miss 54 0.00% 0.00% 3087system.ruby.CorePair_Controller.S.L1I_Repl 589 0.00% 0.00% 3088system.ruby.CorePair_Controller.E0.C0_Load_L1miss 2 0.00% 0.00% 3089system.ruby.CorePair_Controller.E0.C0_Load_L1hit 3356 0.00% 0.00% 3090system.ruby.CorePair_Controller.E0.C0_Store_L1hit 46 0.00% 0.00% 3091system.ruby.CorePair_Controller.E0.L1D0_Repl 16 0.00% 0.00% 3092system.ruby.CorePair_Controller.E0.PrbShrData 1 0.00% 0.00% 3093system.ruby.CorePair_Controller.O.C0_Load_L1hit 3 0.00% 0.00% 3094system.ruby.CorePair_Controller.O.C0_Store_L1hit 1 0.00% 0.00% 3095system.ruby.CorePair_Controller.M0.C0_Load_L1miss 3 0.00% 0.00% 3096system.ruby.CorePair_Controller.M0.C0_Load_L1hit 12796 0.00% 0.00% 3097system.ruby.CorePair_Controller.M0.C0_Store_L1hit 10401 0.00% 0.00% 3098system.ruby.CorePair_Controller.M0.L1D0_Repl 8 0.00% 0.00% 3099system.ruby.CorePair_Controller.M0.PrbInvData 1 0.00% 0.00% 3100system.ruby.CorePair_Controller.M0.PrbShrData 1 0.00% 0.00% 3101system.ruby.CorePair_Controller.I_M0.NB_AckM 325 0.00% 0.00% 3102system.ruby.CorePair_Controller.I_E0S.NB_AckE 175 0.00% 0.00% 3103system.ruby.CorePair_Controller.Si_F0.L2_to_L1I 54 0.00% 0.00% 3104system.ruby.CorePair_Controller.O_M0.NB_AckM 1 0.00% 0.00% 3105system.ruby.CorePair_Controller.S0.NB_AckS 1034 0.00% 0.00% 3106system.ruby.CorePair_Controller.E0_F.L2_to_L1D0 2 0.00% 0.00% 3107system.ruby.CorePair_Controller.M0_F.L2_to_L1D0 3 0.00% 0.00% 3108system.ruby.Directory_Controller.RdBlkS 1034 0.00% 0.00% 3109system.ruby.Directory_Controller.RdBlkM 326 0.00% 0.00% 3110system.ruby.Directory_Controller.RdBlk 182 0.00% 0.00% 3111system.ruby.Directory_Controller.WriteThrough 16 0.00% 0.00% 3112system.ruby.Directory_Controller.Atomic 3 0.00% 0.00% 3113system.ruby.Directory_Controller.CPUPrbResp 1560 0.00% 0.00% 3114system.ruby.Directory_Controller.ProbeAcksComplete 1560 0.00% 0.00% 3115system.ruby.Directory_Controller.MemData 1560 0.00% 0.00% 3116system.ruby.Directory_Controller.CoreUnblock 1541 0.00% 0.00% 3117system.ruby.Directory_Controller.UnblockWriteThrough 18 0.00% 0.00% 3118system.ruby.Directory_Controller.U.RdBlkS 1034 0.00% 0.00% 3119system.ruby.Directory_Controller.U.RdBlkM 326 0.00% 0.00% 3120system.ruby.Directory_Controller.U.RdBlk 182 0.00% 0.00% 3121system.ruby.Directory_Controller.U.WriteThrough 16 0.00% 0.00% 3122system.ruby.Directory_Controller.U.Atomic 2 0.00% 0.00% 3123system.ruby.Directory_Controller.BS_M.MemData 1034 0.00% 0.00% 3124system.ruby.Directory_Controller.BM_M.MemData 326 0.00% 0.00% 3125system.ruby.Directory_Controller.B_M.MemData 175 0.00% 0.00% 3126system.ruby.Directory_Controller.BS_PM.CPUPrbResp 1034 0.00% 0.00% 3127system.ruby.Directory_Controller.BS_PM.ProbeAcksComplete 1034 0.00% 0.00% 3128system.ruby.Directory_Controller.BM_PM.Atomic 1 0.00% 0.00% 3129system.ruby.Directory_Controller.BM_PM.CPUPrbResp 326 0.00% 0.00% 3130system.ruby.Directory_Controller.BM_PM.ProbeAcksComplete 326 0.00% 0.00% 3131system.ruby.Directory_Controller.BM_PM.MemData 18 0.00% 0.00% 3132system.ruby.Directory_Controller.B_PM.CPUPrbResp 175 0.00% 0.00% 3133system.ruby.Directory_Controller.B_PM.ProbeAcksComplete 175 0.00% 0.00% 3134system.ruby.Directory_Controller.B_PM.MemData 7 0.00% 0.00% 3135system.ruby.Directory_Controller.BM_Pm.CPUPrbResp 18 0.00% 0.00% 3136system.ruby.Directory_Controller.BM_Pm.ProbeAcksComplete 18 0.00% 0.00% 3137system.ruby.Directory_Controller.B_Pm.CPUPrbResp 7 0.00% 0.00% 3138system.ruby.Directory_Controller.B_Pm.ProbeAcksComplete 7 0.00% 0.00% 3139system.ruby.Directory_Controller.B.CoreUnblock 1541 0.00% 0.00% 3140system.ruby.Directory_Controller.B.UnblockWriteThrough 18 0.00% 0.00% 3141system.ruby.SQC_Controller.Fetch 86 0.00% 0.00% 3142system.ruby.SQC_Controller.Data 5 0.00% 0.00% 3143system.ruby.SQC_Controller.I.Fetch 5 0.00% 0.00% 3144system.ruby.SQC_Controller.I.Data 5 0.00% 0.00% 3145system.ruby.SQC_Controller.V.Fetch 81 0.00% 0.00% 3146system.ruby.TCC_Controller.RdBlk 9 0.00% 0.00% 3147system.ruby.TCC_Controller.WrVicBlk 16 0.00% 0.00% 3148system.ruby.TCC_Controller.Atomic 2 0.00% 0.00% 3149system.ruby.TCC_Controller.AtomicDone 1 0.00% 0.00% 3150system.ruby.TCC_Controller.Data 9 0.00% 0.00% 3151system.ruby.TCC_Controller.PrbInv 1535 0.00% 0.00% 3152system.ruby.TCC_Controller.WBAck 16 0.00% 0.00% 3153system.ruby.TCC_Controller.V.PrbInv 1 0.00% 0.00% 3154system.ruby.TCC_Controller.I.RdBlk 7 0.00% 0.00% 3155system.ruby.TCC_Controller.I.WrVicBlk 16 0.00% 0.00% 3156system.ruby.TCC_Controller.I.Atomic 1 0.00% 0.00% 3157system.ruby.TCC_Controller.I.PrbInv 1534 0.00% 0.00% 3158system.ruby.TCC_Controller.I.WBAck 16 0.00% 0.00% 3159system.ruby.TCC_Controller.IV.RdBlk 2 0.00% 0.00% 3160system.ruby.TCC_Controller.IV.Data 7 0.00% 0.00% 3161system.ruby.TCC_Controller.A.Atomic 1 0.00% 0.00% 3162system.ruby.TCC_Controller.A.AtomicDone 1 0.00% 0.00% 3163system.ruby.TCC_Controller.A.Data 2 0.00% 0.00% 3164system.ruby.TCP_Controller.Load \| 5 50.00% 50.00% \| 5 50.00% 100.00% 3165system.ruby.TCP_Controller.Load::total 10 3166system.ruby.TCP_Controller.StoreThrough \| 8 50.00% 50.00% \| 8 50.00% 100.00% 3167system.ruby.TCP_Controller.StoreThrough::total 16 3168system.ruby.TCP_Controller.Atomic \| 1 50.00% 50.00% \| 1 50.00% 100.00% 3169system.ruby.TCP_Controller.Atomic::total 2 3170system.ruby.TCP_Controller.Flush \| 768 50.00% 50.00% \| 768 50.00% 100.00% 3171system.ruby.TCP_Controller.Flush::total 1536 3172system.ruby.TCP_Controller.Evict \| 512 50.00% 50.00% \| 512 50.00% 100.00% 3173system.ruby.TCP_Controller.Evict::total 1024 3174system.ruby.TCP_Controller.TCC_Ack \| 3 50.00% 50.00% \| 3 50.00% 100.00% 3175system.ruby.TCP_Controller.TCC_Ack::total 6 3176system.ruby.TCP_Controller.TCC_AckWB \| 8 50.00% 50.00% \| 8 50.00% 100.00% 3177system.ruby.TCP_Controller.TCC_AckWB::total 16 3178system.ruby.TCP_Controller.I.Load \| 2 50.00% 50.00% \| 2 50.00% 100.00% 3179system.ruby.TCP_Controller.I.Load::total 4 3180system.ruby.TCP_Controller.I.StoreThrough \| 8 50.00% 50.00% \| 8 50.00% 100.00% 3181system.ruby.TCP_Controller.I.StoreThrough::total 16 3182system.ruby.TCP_Controller.I.Atomic \| 1 50.00% 50.00% \| 1 50.00% 100.00% 3183system.ruby.TCP_Controller.I.Atomic::total 2 3184system.ruby.TCP_Controller.I.Flush \| 766 50.00% 50.00% \| 766 50.00% 100.00% 3185system.ruby.TCP_Controller.I.Flush::total 1532 3186system.ruby.TCP_Controller.I.Evict \| 510 50.00% 50.00% \| 510 50.00% 100.00% 3187system.ruby.TCP_Controller.I.Evict::total 1020 3188system.ruby.TCP_Controller.I.TCC_Ack \| 2 50.00% 50.00% \| 2 50.00% 100.00% 3189system.ruby.TCP_Controller.I.TCC_Ack::total 4 3190system.ruby.TCP_Controller.I.TCC_AckWB \| 8 50.00% 50.00% \| 8 50.00% 100.00% 3191system.ruby.TCP_Controller.I.TCC_AckWB::total 16 3192system.ruby.TCP_Controller.V.Load \| 3 50.00% 50.00% \| 3 50.00% 100.00% 3193system.ruby.TCP_Controller.V.Load::total 6 3194system.ruby.TCP_Controller.V.Flush \| 2 50.00% 50.00% \| 2 50.00% 100.00% 3195system.ruby.TCP_Controller.V.Flush::total 4 3196system.ruby.TCP_Controller.V.Evict \| 2 50.00% 50.00% \| 2 50.00% 100.00% 3197system.ruby.TCP_Controller.V.Evict::total 4 3198system.ruby.TCP_Controller.A.TCC_Ack \| 1 50.00% 50.00% \| 1 50.00% 100.00% 3199system.ruby.TCP_Controller.A.TCC_Ack::total 2 3200 3201---------- End Simulation Statistics ----------	289system.cpu0.numCycles 628799 # number of cpu cycles simulated 290system.cpu0.numWorkItemsStarted 0 # number of work items this cpu started 291system.cpu0.numWorkItemsCompleted 0 # number of work items this cpu completed 292system.cpu0.committedInsts 66963 # Number of instructions committed 293system.cpu0.committedOps 137705 # Number of ops (including micro ops) committed 294system.cpu0.num_int_alu_accesses 136380 # Number of integer alu accesses 295system.cpu0.num_fp_alu_accesses 1279 # Number of float alu accesses 296system.cpu0.num_func_calls 3196 # number of times a function call or return occured 297system.cpu0.num_conditional_control_insts 12151 # number of instructions that are conditional controls 298system.cpu0.num_int_insts 136380 # number of integer instructions 299system.cpu0.num_fp_insts 1279 # number of float instructions 300system.cpu0.num_int_register_reads 257490 # number of times the integer registers were read 301system.cpu0.num_int_register_writes 110039 # number of times the integer registers were written 302system.cpu0.num_fp_register_reads 1981 # number of times the floating registers were read 303system.cpu0.num_fp_register_writes 981 # number of times the floating registers were written 304system.cpu0.num_cc_register_reads 78262 # number of times the CC registers were read 305system.cpu0.num_cc_register_writes 42183 # number of times the CC registers were written 306system.cpu0.num_mem_refs 27198 # number of memory refs 307system.cpu0.num_load_insts 16684 # Number of load instructions 308system.cpu0.num_store_insts 10514 # Number of store instructions 309system.cpu0.num_idle_cycles 8671.003972 # Number of idle cycles 310system.cpu0.num_busy_cycles 620127.996028 # Number of busy cycles 311system.cpu0.not_idle_fraction 0.986210 # Percentage of non-idle cycles 312system.cpu0.idle_fraction 0.013790 # Percentage of idle cycles 313system.cpu0.Branches 16199 # Number of branches fetched 314system.cpu0.op_class::No_OpClass 615 0.45% 0.45% # Class of executed instruction 315system.cpu0.op_class::IntAlu 108791 79.00% 79.45% # Class of executed instruction 316system.cpu0.op_class::IntMult 13 0.01% 79.46% # Class of executed instruction 317system.cpu0.op_class::IntDiv 138 0.10% 79.56% # Class of executed instruction 318system.cpu0.op_class::FloatAdd 950 0.69% 80.25% # Class of executed instruction 319system.cpu0.op_class::FloatCmp 0 0.00% 80.25% # Class of executed instruction 320system.cpu0.op_class::FloatCvt 0 0.00% 80.25% # Class of executed instruction 321system.cpu0.op_class::FloatMult 0 0.00% 80.25% # Class of executed instruction 322system.cpu0.op_class::FloatDiv 0 0.00% 80.25% # Class of executed instruction 323system.cpu0.op_class::FloatSqrt 0 0.00% 80.25% # Class of executed instruction 324system.cpu0.op_class::SimdAdd 0 0.00% 80.25% # Class of executed instruction 325system.cpu0.op_class::SimdAddAcc 0 0.00% 80.25% # Class of executed instruction 326system.cpu0.op_class::SimdAlu 0 0.00% 80.25% # Class of executed instruction 327system.cpu0.op_class::SimdCmp 0 0.00% 80.25% # Class of executed instruction 328system.cpu0.op_class::SimdCvt 0 0.00% 80.25% # Class of executed instruction 329system.cpu0.op_class::SimdMisc 0 0.00% 80.25% # Class of executed instruction 330system.cpu0.op_class::SimdMult 0 0.00% 80.25% # Class of executed instruction 331system.cpu0.op_class::SimdMultAcc 0 0.00% 80.25% # Class of executed instruction 332system.cpu0.op_class::SimdShift 0 0.00% 80.25% # Class of executed instruction 333system.cpu0.op_class::SimdShiftAcc 0 0.00% 80.25% # Class of executed instruction 334system.cpu0.op_class::SimdSqrt 0 0.00% 80.25% # Class of executed instruction 335system.cpu0.op_class::SimdFloatAdd 0 0.00% 80.25% # Class of executed instruction 336system.cpu0.op_class::SimdFloatAlu 0 0.00% 80.25% # Class of executed instruction 337system.cpu0.op_class::SimdFloatCmp 0 0.00% 80.25% # Class of executed instruction 338system.cpu0.op_class::SimdFloatCvt 0 0.00% 80.25% # Class of executed instruction 339system.cpu0.op_class::SimdFloatDiv 0 0.00% 80.25% # Class of executed instruction 340system.cpu0.op_class::SimdFloatMisc 0 0.00% 80.25% # Class of executed instruction 341system.cpu0.op_class::SimdFloatMult 0 0.00% 80.25% # Class of executed instruction 342system.cpu0.op_class::SimdFloatMultAcc 0 0.00% 80.25% # Class of executed instruction 343system.cpu0.op_class::SimdFloatSqrt 0 0.00% 80.25% # Class of executed instruction 344system.cpu0.op_class::MemRead 16684 12.12% 92.36% # Class of executed instruction 345system.cpu0.op_class::MemWrite 10514 7.64% 100.00% # Class of executed instruction 346system.cpu0.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction 347system.cpu0.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction 348system.cpu0.op_class::total 137705 # Class of executed instruction 349system.cpu1.clk_domain.voltage_domain.voltage 1 # Voltage in Volts 350system.cpu1.clk_domain.clock 1000 # Clock period in ticks 351system.cpu1.CUs0.wavefronts00.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 352system.cpu1.CUs0.wavefronts00.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 353system.cpu1.CUs0.wavefronts00.timesBlockedDueRAWDependencies 216 # number of times the wf's instructions are blocked due to RAW dependencies 354system.cpu1.CUs0.wavefronts00.src_reg_operand_dist::samples 39 # number of executed instructions with N source register operands 355system.cpu1.CUs0.wavefronts00.src_reg_operand_dist::mean 0.794872 # number of executed instructions with N source register operands 356system.cpu1.CUs0.wavefronts00.src_reg_operand_dist::stdev 0.863880 # number of executed instructions with N source register operands 357system.cpu1.CUs0.wavefronts00.src_reg_operand_dist::underflows 0 0.00% 0.00% # number of executed instructions with N source register operands 358system.cpu1.CUs0.wavefronts00.src_reg_operand_dist::0-1 28 71.79% 71.79% # number of executed instructions with N source register operands 359system.cpu1.CUs0.wavefronts00.src_reg_operand_dist::2-3 11 28.21% 100.00% # number of executed instructions with N source register operands 360system.cpu1.CUs0.wavefronts00.src_reg_operand_dist::4 0 0.00% 100.00% # number of executed instructions with N source register operands 361system.cpu1.CUs0.wavefronts00.src_reg_operand_dist::overflows 0 0.00% 100.00% # number of executed instructions with N source register operands 362system.cpu1.CUs0.wavefronts00.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 363system.cpu1.CUs0.wavefronts00.src_reg_operand_dist::max_value 2 # number of executed instructions with N source register operands 364system.cpu1.CUs0.wavefronts00.src_reg_operand_dist::total 39 # number of executed instructions with N source register operands 365system.cpu1.CUs0.wavefronts00.dst_reg_operand_dist::samples 39 # number of executed instructions with N destination register operands 366system.cpu1.CUs0.wavefronts00.dst_reg_operand_dist::mean 0.589744 # number of executed instructions with N destination register operands 367system.cpu1.CUs0.wavefronts00.dst_reg_operand_dist::stdev 0.498310 # number of executed instructions with N destination register operands 368system.cpu1.CUs0.wavefronts00.dst_reg_operand_dist::underflows 0 0.00% 0.00% # number of executed instructions with N destination register operands 369system.cpu1.CUs0.wavefronts00.dst_reg_operand_dist::0-1 39 100.00% 100.00% # number of executed instructions with N destination register operands 370system.cpu1.CUs0.wavefronts00.dst_reg_operand_dist::2-3 0 0.00% 100.00% # number of executed instructions with N destination register operands 371system.cpu1.CUs0.wavefronts00.dst_reg_operand_dist::overflows 0 0.00% 100.00% # number of executed instructions with N destination register operands 372system.cpu1.CUs0.wavefronts00.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 373system.cpu1.CUs0.wavefronts00.dst_reg_operand_dist::max_value 1 # number of executed instructions with N destination register operands 374system.cpu1.CUs0.wavefronts00.dst_reg_operand_dist::total 39 # number of executed instructions with N destination register operands 375system.cpu1.CUs0.wavefronts01.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 376system.cpu1.CUs0.wavefronts01.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 377system.cpu1.CUs0.wavefronts01.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 378system.cpu1.CUs0.wavefronts01.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 379system.cpu1.CUs0.wavefronts01.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 380system.cpu1.CUs0.wavefronts01.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 381system.cpu1.CUs0.wavefronts01.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 382system.cpu1.CUs0.wavefronts01.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 383system.cpu1.CUs0.wavefronts01.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 384system.cpu1.CUs0.wavefronts01.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 385system.cpu1.CUs0.wavefronts01.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 386system.cpu1.CUs0.wavefronts01.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 387system.cpu1.CUs0.wavefronts01.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 388system.cpu1.CUs0.wavefronts01.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 389system.cpu1.CUs0.wavefronts01.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 390system.cpu1.CUs0.wavefronts01.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 391system.cpu1.CUs0.wavefronts01.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 392system.cpu1.CUs0.wavefronts01.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 393system.cpu1.CUs0.wavefronts01.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 394system.cpu1.CUs0.wavefronts01.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 395system.cpu1.CUs0.wavefronts01.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 396system.cpu1.CUs0.wavefronts01.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 397system.cpu1.CUs0.wavefronts01.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 398system.cpu1.CUs0.wavefronts01.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 399system.cpu1.CUs0.wavefronts02.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 400system.cpu1.CUs0.wavefronts02.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 401system.cpu1.CUs0.wavefronts02.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 402system.cpu1.CUs0.wavefronts02.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 403system.cpu1.CUs0.wavefronts02.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 404system.cpu1.CUs0.wavefronts02.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 405system.cpu1.CUs0.wavefronts02.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 406system.cpu1.CUs0.wavefronts02.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 407system.cpu1.CUs0.wavefronts02.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 408system.cpu1.CUs0.wavefronts02.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 409system.cpu1.CUs0.wavefronts02.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 410system.cpu1.CUs0.wavefronts02.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 411system.cpu1.CUs0.wavefronts02.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 412system.cpu1.CUs0.wavefronts02.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 413system.cpu1.CUs0.wavefronts02.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 414system.cpu1.CUs0.wavefronts02.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 415system.cpu1.CUs0.wavefronts02.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 416system.cpu1.CUs0.wavefronts02.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 417system.cpu1.CUs0.wavefronts02.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 418system.cpu1.CUs0.wavefronts02.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 419system.cpu1.CUs0.wavefronts02.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 420system.cpu1.CUs0.wavefronts02.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 421system.cpu1.CUs0.wavefronts02.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 422system.cpu1.CUs0.wavefronts02.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 423system.cpu1.CUs0.wavefronts03.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 424system.cpu1.CUs0.wavefronts03.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 425system.cpu1.CUs0.wavefronts03.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 426system.cpu1.CUs0.wavefronts03.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 427system.cpu1.CUs0.wavefronts03.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 428system.cpu1.CUs0.wavefronts03.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 429system.cpu1.CUs0.wavefronts03.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 430system.cpu1.CUs0.wavefronts03.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 431system.cpu1.CUs0.wavefronts03.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 432system.cpu1.CUs0.wavefronts03.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 433system.cpu1.CUs0.wavefronts03.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 434system.cpu1.CUs0.wavefronts03.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 435system.cpu1.CUs0.wavefronts03.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 436system.cpu1.CUs0.wavefronts03.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 437system.cpu1.CUs0.wavefronts03.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 438system.cpu1.CUs0.wavefronts03.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 439system.cpu1.CUs0.wavefronts03.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 440system.cpu1.CUs0.wavefronts03.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 441system.cpu1.CUs0.wavefronts03.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 442system.cpu1.CUs0.wavefronts03.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 443system.cpu1.CUs0.wavefronts03.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 444system.cpu1.CUs0.wavefronts03.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 445system.cpu1.CUs0.wavefronts03.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 446system.cpu1.CUs0.wavefronts03.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 447system.cpu1.CUs0.wavefronts04.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 448system.cpu1.CUs0.wavefronts04.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 449system.cpu1.CUs0.wavefronts04.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 450system.cpu1.CUs0.wavefronts04.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 451system.cpu1.CUs0.wavefronts04.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 452system.cpu1.CUs0.wavefronts04.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 453system.cpu1.CUs0.wavefronts04.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 454system.cpu1.CUs0.wavefronts04.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 455system.cpu1.CUs0.wavefronts04.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 456system.cpu1.CUs0.wavefronts04.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 457system.cpu1.CUs0.wavefronts04.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 458system.cpu1.CUs0.wavefronts04.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 459system.cpu1.CUs0.wavefronts04.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 460system.cpu1.CUs0.wavefronts04.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 461system.cpu1.CUs0.wavefronts04.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 462system.cpu1.CUs0.wavefronts04.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 463system.cpu1.CUs0.wavefronts04.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 464system.cpu1.CUs0.wavefronts04.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 465system.cpu1.CUs0.wavefronts04.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 466system.cpu1.CUs0.wavefronts04.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 467system.cpu1.CUs0.wavefronts04.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 468system.cpu1.CUs0.wavefronts04.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 469system.cpu1.CUs0.wavefronts04.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 470system.cpu1.CUs0.wavefronts04.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 471system.cpu1.CUs0.wavefronts05.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 472system.cpu1.CUs0.wavefronts05.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 473system.cpu1.CUs0.wavefronts05.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 474system.cpu1.CUs0.wavefronts05.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 475system.cpu1.CUs0.wavefronts05.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 476system.cpu1.CUs0.wavefronts05.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 477system.cpu1.CUs0.wavefronts05.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 478system.cpu1.CUs0.wavefronts05.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 479system.cpu1.CUs0.wavefronts05.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 480system.cpu1.CUs0.wavefronts05.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 481system.cpu1.CUs0.wavefronts05.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 482system.cpu1.CUs0.wavefronts05.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 483system.cpu1.CUs0.wavefronts05.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 484system.cpu1.CUs0.wavefronts05.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 485system.cpu1.CUs0.wavefronts05.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 486system.cpu1.CUs0.wavefronts05.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 487system.cpu1.CUs0.wavefronts05.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 488system.cpu1.CUs0.wavefronts05.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 489system.cpu1.CUs0.wavefronts05.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 490system.cpu1.CUs0.wavefronts05.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 491system.cpu1.CUs0.wavefronts05.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 492system.cpu1.CUs0.wavefronts05.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 493system.cpu1.CUs0.wavefronts05.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 494system.cpu1.CUs0.wavefronts05.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 495system.cpu1.CUs0.wavefronts06.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 496system.cpu1.CUs0.wavefronts06.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 497system.cpu1.CUs0.wavefronts06.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 498system.cpu1.CUs0.wavefronts06.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 499system.cpu1.CUs0.wavefronts06.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 500system.cpu1.CUs0.wavefronts06.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 501system.cpu1.CUs0.wavefronts06.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 502system.cpu1.CUs0.wavefronts06.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 503system.cpu1.CUs0.wavefronts06.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 504system.cpu1.CUs0.wavefronts06.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 505system.cpu1.CUs0.wavefronts06.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 506system.cpu1.CUs0.wavefronts06.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 507system.cpu1.CUs0.wavefronts06.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 508system.cpu1.CUs0.wavefronts06.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 509system.cpu1.CUs0.wavefronts06.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 510system.cpu1.CUs0.wavefronts06.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 511system.cpu1.CUs0.wavefronts06.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 512system.cpu1.CUs0.wavefronts06.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 513system.cpu1.CUs0.wavefronts06.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 514system.cpu1.CUs0.wavefronts06.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 515system.cpu1.CUs0.wavefronts06.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 516system.cpu1.CUs0.wavefronts06.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 517system.cpu1.CUs0.wavefronts06.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 518system.cpu1.CUs0.wavefronts06.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 519system.cpu1.CUs0.wavefronts07.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 520system.cpu1.CUs0.wavefronts07.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 521system.cpu1.CUs0.wavefronts07.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 522system.cpu1.CUs0.wavefronts07.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 523system.cpu1.CUs0.wavefronts07.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 524system.cpu1.CUs0.wavefronts07.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 525system.cpu1.CUs0.wavefronts07.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 526system.cpu1.CUs0.wavefronts07.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 527system.cpu1.CUs0.wavefronts07.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 528system.cpu1.CUs0.wavefronts07.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 529system.cpu1.CUs0.wavefronts07.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 530system.cpu1.CUs0.wavefronts07.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 531system.cpu1.CUs0.wavefronts07.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 532system.cpu1.CUs0.wavefronts07.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 533system.cpu1.CUs0.wavefronts07.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 534system.cpu1.CUs0.wavefronts07.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 535system.cpu1.CUs0.wavefronts07.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 536system.cpu1.CUs0.wavefronts07.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 537system.cpu1.CUs0.wavefronts07.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 538system.cpu1.CUs0.wavefronts07.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 539system.cpu1.CUs0.wavefronts07.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 540system.cpu1.CUs0.wavefronts07.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 541system.cpu1.CUs0.wavefronts07.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 542system.cpu1.CUs0.wavefronts07.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 543system.cpu1.CUs0.wavefronts08.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 544system.cpu1.CUs0.wavefronts08.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 545system.cpu1.CUs0.wavefronts08.timesBlockedDueRAWDependencies 195 # number of times the wf's instructions are blocked due to RAW dependencies 546system.cpu1.CUs0.wavefronts08.src_reg_operand_dist::samples 34 # number of executed instructions with N source register operands 547system.cpu1.CUs0.wavefronts08.src_reg_operand_dist::mean 0.852941 # number of executed instructions with N source register operands 548system.cpu1.CUs0.wavefronts08.src_reg_operand_dist::stdev 0.857493 # number of executed instructions with N source register operands 549system.cpu1.CUs0.wavefronts08.src_reg_operand_dist::underflows 0 0.00% 0.00% # number of executed instructions with N source register operands 550system.cpu1.CUs0.wavefronts08.src_reg_operand_dist::0-1 24 70.59% 70.59% # number of executed instructions with N source register operands 551system.cpu1.CUs0.wavefronts08.src_reg_operand_dist::2-3 10 29.41% 100.00% # number of executed instructions with N source register operands 552system.cpu1.CUs0.wavefronts08.src_reg_operand_dist::4 0 0.00% 100.00% # number of executed instructions with N source register operands 553system.cpu1.CUs0.wavefronts08.src_reg_operand_dist::overflows 0 0.00% 100.00% # number of executed instructions with N source register operands 554system.cpu1.CUs0.wavefronts08.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 555system.cpu1.CUs0.wavefronts08.src_reg_operand_dist::max_value 2 # number of executed instructions with N source register operands 556system.cpu1.CUs0.wavefronts08.src_reg_operand_dist::total 34 # number of executed instructions with N source register operands 557system.cpu1.CUs0.wavefronts08.dst_reg_operand_dist::samples 34 # number of executed instructions with N destination register operands 558system.cpu1.CUs0.wavefronts08.dst_reg_operand_dist::mean 0.617647 # number of executed instructions with N destination register operands 559system.cpu1.CUs0.wavefronts08.dst_reg_operand_dist::stdev 0.493270 # number of executed instructions with N destination register operands 560system.cpu1.CUs0.wavefronts08.dst_reg_operand_dist::underflows 0 0.00% 0.00% # number of executed instructions with N destination register operands 561system.cpu1.CUs0.wavefronts08.dst_reg_operand_dist::0-1 34 100.00% 100.00% # number of executed instructions with N destination register operands 562system.cpu1.CUs0.wavefronts08.dst_reg_operand_dist::2-3 0 0.00% 100.00% # number of executed instructions with N destination register operands 563system.cpu1.CUs0.wavefronts08.dst_reg_operand_dist::overflows 0 0.00% 100.00% # number of executed instructions with N destination register operands 564system.cpu1.CUs0.wavefronts08.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 565system.cpu1.CUs0.wavefronts08.dst_reg_operand_dist::max_value 1 # number of executed instructions with N destination register operands 566system.cpu1.CUs0.wavefronts08.dst_reg_operand_dist::total 34 # number of executed instructions with N destination register operands 567system.cpu1.CUs0.wavefronts09.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 568system.cpu1.CUs0.wavefronts09.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 569system.cpu1.CUs0.wavefronts09.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 570system.cpu1.CUs0.wavefronts09.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 571system.cpu1.CUs0.wavefronts09.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 572system.cpu1.CUs0.wavefronts09.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 573system.cpu1.CUs0.wavefronts09.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 574system.cpu1.CUs0.wavefronts09.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 575system.cpu1.CUs0.wavefronts09.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 576system.cpu1.CUs0.wavefronts09.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 577system.cpu1.CUs0.wavefronts09.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 578system.cpu1.CUs0.wavefronts09.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 579system.cpu1.CUs0.wavefronts09.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 580system.cpu1.CUs0.wavefronts09.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 581system.cpu1.CUs0.wavefronts09.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 582system.cpu1.CUs0.wavefronts09.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 583system.cpu1.CUs0.wavefronts09.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 584system.cpu1.CUs0.wavefronts09.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 585system.cpu1.CUs0.wavefronts09.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 586system.cpu1.CUs0.wavefronts09.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 587system.cpu1.CUs0.wavefronts09.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 588system.cpu1.CUs0.wavefronts09.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 589system.cpu1.CUs0.wavefronts09.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 590system.cpu1.CUs0.wavefronts09.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 591system.cpu1.CUs0.wavefronts10.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 592system.cpu1.CUs0.wavefronts10.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 593system.cpu1.CUs0.wavefronts10.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 594system.cpu1.CUs0.wavefronts10.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 595system.cpu1.CUs0.wavefronts10.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 596system.cpu1.CUs0.wavefronts10.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 597system.cpu1.CUs0.wavefronts10.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 598system.cpu1.CUs0.wavefronts10.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 599system.cpu1.CUs0.wavefronts10.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 600system.cpu1.CUs0.wavefronts10.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 601system.cpu1.CUs0.wavefronts10.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 602system.cpu1.CUs0.wavefronts10.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 603system.cpu1.CUs0.wavefronts10.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 604system.cpu1.CUs0.wavefronts10.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 605system.cpu1.CUs0.wavefronts10.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 606system.cpu1.CUs0.wavefronts10.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 607system.cpu1.CUs0.wavefronts10.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 608system.cpu1.CUs0.wavefronts10.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 609system.cpu1.CUs0.wavefronts10.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 610system.cpu1.CUs0.wavefronts10.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 611system.cpu1.CUs0.wavefronts10.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 612system.cpu1.CUs0.wavefronts10.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 613system.cpu1.CUs0.wavefronts10.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 614system.cpu1.CUs0.wavefronts10.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 615system.cpu1.CUs0.wavefronts11.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 616system.cpu1.CUs0.wavefronts11.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 617system.cpu1.CUs0.wavefronts11.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 618system.cpu1.CUs0.wavefronts11.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 619system.cpu1.CUs0.wavefronts11.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 620system.cpu1.CUs0.wavefronts11.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 621system.cpu1.CUs0.wavefronts11.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 622system.cpu1.CUs0.wavefronts11.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 623system.cpu1.CUs0.wavefronts11.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 624system.cpu1.CUs0.wavefronts11.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 625system.cpu1.CUs0.wavefronts11.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 626system.cpu1.CUs0.wavefronts11.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 627system.cpu1.CUs0.wavefronts11.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 628system.cpu1.CUs0.wavefronts11.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 629system.cpu1.CUs0.wavefronts11.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 630system.cpu1.CUs0.wavefronts11.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 631system.cpu1.CUs0.wavefronts11.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 632system.cpu1.CUs0.wavefronts11.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 633system.cpu1.CUs0.wavefronts11.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 634system.cpu1.CUs0.wavefronts11.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 635system.cpu1.CUs0.wavefronts11.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 636system.cpu1.CUs0.wavefronts11.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 637system.cpu1.CUs0.wavefronts11.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 638system.cpu1.CUs0.wavefronts11.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 639system.cpu1.CUs0.wavefronts12.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 640system.cpu1.CUs0.wavefronts12.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 641system.cpu1.CUs0.wavefronts12.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 642system.cpu1.CUs0.wavefronts12.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 643system.cpu1.CUs0.wavefronts12.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 644system.cpu1.CUs0.wavefronts12.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 645system.cpu1.CUs0.wavefronts12.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 646system.cpu1.CUs0.wavefronts12.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 647system.cpu1.CUs0.wavefronts12.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 648system.cpu1.CUs0.wavefronts12.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 649system.cpu1.CUs0.wavefronts12.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 650system.cpu1.CUs0.wavefronts12.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 651system.cpu1.CUs0.wavefronts12.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 652system.cpu1.CUs0.wavefronts12.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 653system.cpu1.CUs0.wavefronts12.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 654system.cpu1.CUs0.wavefronts12.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 655system.cpu1.CUs0.wavefronts12.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 656system.cpu1.CUs0.wavefronts12.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 657system.cpu1.CUs0.wavefronts12.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 658system.cpu1.CUs0.wavefronts12.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 659system.cpu1.CUs0.wavefronts12.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 660system.cpu1.CUs0.wavefronts12.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 661system.cpu1.CUs0.wavefronts12.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 662system.cpu1.CUs0.wavefronts12.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 663system.cpu1.CUs0.wavefronts13.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 664system.cpu1.CUs0.wavefronts13.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 665system.cpu1.CUs0.wavefronts13.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 666system.cpu1.CUs0.wavefronts13.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 667system.cpu1.CUs0.wavefronts13.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 668system.cpu1.CUs0.wavefronts13.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 669system.cpu1.CUs0.wavefronts13.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 670system.cpu1.CUs0.wavefronts13.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 671system.cpu1.CUs0.wavefronts13.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 672system.cpu1.CUs0.wavefronts13.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 673system.cpu1.CUs0.wavefronts13.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 674system.cpu1.CUs0.wavefronts13.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 675system.cpu1.CUs0.wavefronts13.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 676system.cpu1.CUs0.wavefronts13.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 677system.cpu1.CUs0.wavefronts13.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 678system.cpu1.CUs0.wavefronts13.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 679system.cpu1.CUs0.wavefronts13.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 680system.cpu1.CUs0.wavefronts13.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 681system.cpu1.CUs0.wavefronts13.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 682system.cpu1.CUs0.wavefronts13.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 683system.cpu1.CUs0.wavefronts13.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 684system.cpu1.CUs0.wavefronts13.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 685system.cpu1.CUs0.wavefronts13.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 686system.cpu1.CUs0.wavefronts13.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 687system.cpu1.CUs0.wavefronts14.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 688system.cpu1.CUs0.wavefronts14.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 689system.cpu1.CUs0.wavefronts14.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 690system.cpu1.CUs0.wavefronts14.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 691system.cpu1.CUs0.wavefronts14.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 692system.cpu1.CUs0.wavefronts14.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 693system.cpu1.CUs0.wavefronts14.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 694system.cpu1.CUs0.wavefronts14.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 695system.cpu1.CUs0.wavefronts14.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 696system.cpu1.CUs0.wavefronts14.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 697system.cpu1.CUs0.wavefronts14.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 698system.cpu1.CUs0.wavefronts14.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 699system.cpu1.CUs0.wavefronts14.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 700system.cpu1.CUs0.wavefronts14.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 701system.cpu1.CUs0.wavefronts14.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 702system.cpu1.CUs0.wavefronts14.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 703system.cpu1.CUs0.wavefronts14.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 704system.cpu1.CUs0.wavefronts14.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 705system.cpu1.CUs0.wavefronts14.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 706system.cpu1.CUs0.wavefronts14.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 707system.cpu1.CUs0.wavefronts14.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 708system.cpu1.CUs0.wavefronts14.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 709system.cpu1.CUs0.wavefronts14.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 710system.cpu1.CUs0.wavefronts14.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 711system.cpu1.CUs0.wavefronts15.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 712system.cpu1.CUs0.wavefronts15.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 713system.cpu1.CUs0.wavefronts15.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 714system.cpu1.CUs0.wavefronts15.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 715system.cpu1.CUs0.wavefronts15.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 716system.cpu1.CUs0.wavefronts15.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 717system.cpu1.CUs0.wavefronts15.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 718system.cpu1.CUs0.wavefronts15.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 719system.cpu1.CUs0.wavefronts15.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 720system.cpu1.CUs0.wavefronts15.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 721system.cpu1.CUs0.wavefronts15.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 722system.cpu1.CUs0.wavefronts15.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 723system.cpu1.CUs0.wavefronts15.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 724system.cpu1.CUs0.wavefronts15.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 725system.cpu1.CUs0.wavefronts15.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 726system.cpu1.CUs0.wavefronts15.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 727system.cpu1.CUs0.wavefronts15.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 728system.cpu1.CUs0.wavefronts15.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 729system.cpu1.CUs0.wavefronts15.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 730system.cpu1.CUs0.wavefronts15.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 731system.cpu1.CUs0.wavefronts15.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 732system.cpu1.CUs0.wavefronts15.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 733system.cpu1.CUs0.wavefronts15.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 734system.cpu1.CUs0.wavefronts15.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 735system.cpu1.CUs0.wavefronts16.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 736system.cpu1.CUs0.wavefronts16.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 737system.cpu1.CUs0.wavefronts16.timesBlockedDueRAWDependencies 194 # number of times the wf's instructions are blocked due to RAW dependencies 738system.cpu1.CUs0.wavefronts16.src_reg_operand_dist::samples 34 # number of executed instructions with N source register operands 739system.cpu1.CUs0.wavefronts16.src_reg_operand_dist::mean 0.852941 # number of executed instructions with N source register operands 740system.cpu1.CUs0.wavefronts16.src_reg_operand_dist::stdev 0.857493 # number of executed instructions with N source register operands 741system.cpu1.CUs0.wavefronts16.src_reg_operand_dist::underflows 0 0.00% 0.00% # number of executed instructions with N source register operands 742system.cpu1.CUs0.wavefronts16.src_reg_operand_dist::0-1 24 70.59% 70.59% # number of executed instructions with N source register operands 743system.cpu1.CUs0.wavefronts16.src_reg_operand_dist::2-3 10 29.41% 100.00% # number of executed instructions with N source register operands 744system.cpu1.CUs0.wavefronts16.src_reg_operand_dist::4 0 0.00% 100.00% # number of executed instructions with N source register operands 745system.cpu1.CUs0.wavefronts16.src_reg_operand_dist::overflows 0 0.00% 100.00% # number of executed instructions with N source register operands 746system.cpu1.CUs0.wavefronts16.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 747system.cpu1.CUs0.wavefronts16.src_reg_operand_dist::max_value 2 # number of executed instructions with N source register operands 748system.cpu1.CUs0.wavefronts16.src_reg_operand_dist::total 34 # number of executed instructions with N source register operands 749system.cpu1.CUs0.wavefronts16.dst_reg_operand_dist::samples 34 # number of executed instructions with N destination register operands 750system.cpu1.CUs0.wavefronts16.dst_reg_operand_dist::mean 0.617647 # number of executed instructions with N destination register operands 751system.cpu1.CUs0.wavefronts16.dst_reg_operand_dist::stdev 0.493270 # number of executed instructions with N destination register operands 752system.cpu1.CUs0.wavefronts16.dst_reg_operand_dist::underflows 0 0.00% 0.00% # number of executed instructions with N destination register operands 753system.cpu1.CUs0.wavefronts16.dst_reg_operand_dist::0-1 34 100.00% 100.00% # number of executed instructions with N destination register operands 754system.cpu1.CUs0.wavefronts16.dst_reg_operand_dist::2-3 0 0.00% 100.00% # number of executed instructions with N destination register operands 755system.cpu1.CUs0.wavefronts16.dst_reg_operand_dist::overflows 0 0.00% 100.00% # number of executed instructions with N destination register operands 756system.cpu1.CUs0.wavefronts16.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 757system.cpu1.CUs0.wavefronts16.dst_reg_operand_dist::max_value 1 # number of executed instructions with N destination register operands 758system.cpu1.CUs0.wavefronts16.dst_reg_operand_dist::total 34 # number of executed instructions with N destination register operands 759system.cpu1.CUs0.wavefronts17.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 760system.cpu1.CUs0.wavefronts17.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 761system.cpu1.CUs0.wavefronts17.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 762system.cpu1.CUs0.wavefronts17.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 763system.cpu1.CUs0.wavefronts17.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 764system.cpu1.CUs0.wavefronts17.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 765system.cpu1.CUs0.wavefronts17.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 766system.cpu1.CUs0.wavefronts17.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 767system.cpu1.CUs0.wavefronts17.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 768system.cpu1.CUs0.wavefronts17.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 769system.cpu1.CUs0.wavefronts17.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 770system.cpu1.CUs0.wavefronts17.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 771system.cpu1.CUs0.wavefronts17.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 772system.cpu1.CUs0.wavefronts17.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 773system.cpu1.CUs0.wavefronts17.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 774system.cpu1.CUs0.wavefronts17.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 775system.cpu1.CUs0.wavefronts17.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 776system.cpu1.CUs0.wavefronts17.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 777system.cpu1.CUs0.wavefronts17.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 778system.cpu1.CUs0.wavefronts17.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 779system.cpu1.CUs0.wavefronts17.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 780system.cpu1.CUs0.wavefronts17.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 781system.cpu1.CUs0.wavefronts17.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 782system.cpu1.CUs0.wavefronts17.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 783system.cpu1.CUs0.wavefronts18.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 784system.cpu1.CUs0.wavefronts18.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 785system.cpu1.CUs0.wavefronts18.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 786system.cpu1.CUs0.wavefronts18.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 787system.cpu1.CUs0.wavefronts18.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 788system.cpu1.CUs0.wavefronts18.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 789system.cpu1.CUs0.wavefronts18.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 790system.cpu1.CUs0.wavefronts18.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 791system.cpu1.CUs0.wavefronts18.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 792system.cpu1.CUs0.wavefronts18.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 793system.cpu1.CUs0.wavefronts18.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 794system.cpu1.CUs0.wavefronts18.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 795system.cpu1.CUs0.wavefronts18.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 796system.cpu1.CUs0.wavefronts18.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 797system.cpu1.CUs0.wavefronts18.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 798system.cpu1.CUs0.wavefronts18.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 799system.cpu1.CUs0.wavefronts18.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 800system.cpu1.CUs0.wavefronts18.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 801system.cpu1.CUs0.wavefronts18.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 802system.cpu1.CUs0.wavefronts18.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 803system.cpu1.CUs0.wavefronts18.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 804system.cpu1.CUs0.wavefronts18.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 805system.cpu1.CUs0.wavefronts18.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 806system.cpu1.CUs0.wavefronts18.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 807system.cpu1.CUs0.wavefronts19.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 808system.cpu1.CUs0.wavefronts19.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 809system.cpu1.CUs0.wavefronts19.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 810system.cpu1.CUs0.wavefronts19.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 811system.cpu1.CUs0.wavefronts19.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 812system.cpu1.CUs0.wavefronts19.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 813system.cpu1.CUs0.wavefronts19.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 814system.cpu1.CUs0.wavefronts19.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 815system.cpu1.CUs0.wavefronts19.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 816system.cpu1.CUs0.wavefronts19.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 817system.cpu1.CUs0.wavefronts19.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 818system.cpu1.CUs0.wavefronts19.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 819system.cpu1.CUs0.wavefronts19.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 820system.cpu1.CUs0.wavefronts19.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 821system.cpu1.CUs0.wavefronts19.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 822system.cpu1.CUs0.wavefronts19.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 823system.cpu1.CUs0.wavefronts19.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 824system.cpu1.CUs0.wavefronts19.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 825system.cpu1.CUs0.wavefronts19.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 826system.cpu1.CUs0.wavefronts19.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 827system.cpu1.CUs0.wavefronts19.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 828system.cpu1.CUs0.wavefronts19.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 829system.cpu1.CUs0.wavefronts19.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 830system.cpu1.CUs0.wavefronts19.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 831system.cpu1.CUs0.wavefronts20.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 832system.cpu1.CUs0.wavefronts20.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 833system.cpu1.CUs0.wavefronts20.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 834system.cpu1.CUs0.wavefronts20.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 835system.cpu1.CUs0.wavefronts20.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 836system.cpu1.CUs0.wavefronts20.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 837system.cpu1.CUs0.wavefronts20.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 838system.cpu1.CUs0.wavefronts20.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 839system.cpu1.CUs0.wavefronts20.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 840system.cpu1.CUs0.wavefronts20.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 841system.cpu1.CUs0.wavefronts20.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 842system.cpu1.CUs0.wavefronts20.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 843system.cpu1.CUs0.wavefronts20.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 844system.cpu1.CUs0.wavefronts20.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 845system.cpu1.CUs0.wavefronts20.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 846system.cpu1.CUs0.wavefronts20.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 847system.cpu1.CUs0.wavefronts20.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 848system.cpu1.CUs0.wavefronts20.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 849system.cpu1.CUs0.wavefronts20.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 850system.cpu1.CUs0.wavefronts20.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 851system.cpu1.CUs0.wavefronts20.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 852system.cpu1.CUs0.wavefronts20.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 853system.cpu1.CUs0.wavefronts20.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 854system.cpu1.CUs0.wavefronts20.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 855system.cpu1.CUs0.wavefronts21.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 856system.cpu1.CUs0.wavefronts21.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 857system.cpu1.CUs0.wavefronts21.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 858system.cpu1.CUs0.wavefronts21.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 859system.cpu1.CUs0.wavefronts21.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 860system.cpu1.CUs0.wavefronts21.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 861system.cpu1.CUs0.wavefronts21.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 862system.cpu1.CUs0.wavefronts21.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 863system.cpu1.CUs0.wavefronts21.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 864system.cpu1.CUs0.wavefronts21.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 865system.cpu1.CUs0.wavefronts21.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 866system.cpu1.CUs0.wavefronts21.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 867system.cpu1.CUs0.wavefronts21.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 868system.cpu1.CUs0.wavefronts21.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 869system.cpu1.CUs0.wavefronts21.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 870system.cpu1.CUs0.wavefronts21.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 871system.cpu1.CUs0.wavefronts21.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 872system.cpu1.CUs0.wavefronts21.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 873system.cpu1.CUs0.wavefronts21.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 874system.cpu1.CUs0.wavefronts21.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 875system.cpu1.CUs0.wavefronts21.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 876system.cpu1.CUs0.wavefronts21.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 877system.cpu1.CUs0.wavefronts21.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 878system.cpu1.CUs0.wavefronts21.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 879system.cpu1.CUs0.wavefronts22.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 880system.cpu1.CUs0.wavefronts22.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 881system.cpu1.CUs0.wavefronts22.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 882system.cpu1.CUs0.wavefronts22.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 883system.cpu1.CUs0.wavefronts22.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 884system.cpu1.CUs0.wavefronts22.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 885system.cpu1.CUs0.wavefronts22.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 886system.cpu1.CUs0.wavefronts22.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 887system.cpu1.CUs0.wavefronts22.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 888system.cpu1.CUs0.wavefronts22.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 889system.cpu1.CUs0.wavefronts22.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 890system.cpu1.CUs0.wavefronts22.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 891system.cpu1.CUs0.wavefronts22.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 892system.cpu1.CUs0.wavefronts22.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 893system.cpu1.CUs0.wavefronts22.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 894system.cpu1.CUs0.wavefronts22.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 895system.cpu1.CUs0.wavefronts22.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 896system.cpu1.CUs0.wavefronts22.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 897system.cpu1.CUs0.wavefronts22.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 898system.cpu1.CUs0.wavefronts22.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 899system.cpu1.CUs0.wavefronts22.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 900system.cpu1.CUs0.wavefronts22.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 901system.cpu1.CUs0.wavefronts22.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 902system.cpu1.CUs0.wavefronts22.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 903system.cpu1.CUs0.wavefronts23.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 904system.cpu1.CUs0.wavefronts23.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 905system.cpu1.CUs0.wavefronts23.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 906system.cpu1.CUs0.wavefronts23.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 907system.cpu1.CUs0.wavefronts23.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 908system.cpu1.CUs0.wavefronts23.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 909system.cpu1.CUs0.wavefronts23.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 910system.cpu1.CUs0.wavefronts23.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 911system.cpu1.CUs0.wavefronts23.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 912system.cpu1.CUs0.wavefronts23.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 913system.cpu1.CUs0.wavefronts23.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 914system.cpu1.CUs0.wavefronts23.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 915system.cpu1.CUs0.wavefronts23.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 916system.cpu1.CUs0.wavefronts23.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 917system.cpu1.CUs0.wavefronts23.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 918system.cpu1.CUs0.wavefronts23.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 919system.cpu1.CUs0.wavefronts23.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 920system.cpu1.CUs0.wavefronts23.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 921system.cpu1.CUs0.wavefronts23.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 922system.cpu1.CUs0.wavefronts23.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 923system.cpu1.CUs0.wavefronts23.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 924system.cpu1.CUs0.wavefronts23.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 925system.cpu1.CUs0.wavefronts23.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 926system.cpu1.CUs0.wavefronts23.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 927system.cpu1.CUs0.wavefronts24.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 928system.cpu1.CUs0.wavefronts24.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 929system.cpu1.CUs0.wavefronts24.timesBlockedDueRAWDependencies 177 # number of times the wf's instructions are blocked due to RAW dependencies 930system.cpu1.CUs0.wavefronts24.src_reg_operand_dist::samples 34 # number of executed instructions with N source register operands 931system.cpu1.CUs0.wavefronts24.src_reg_operand_dist::mean 0.852941 # number of executed instructions with N source register operands 932system.cpu1.CUs0.wavefronts24.src_reg_operand_dist::stdev 0.857493 # number of executed instructions with N source register operands 933system.cpu1.CUs0.wavefronts24.src_reg_operand_dist::underflows 0 0.00% 0.00% # number of executed instructions with N source register operands 934system.cpu1.CUs0.wavefronts24.src_reg_operand_dist::0-1 24 70.59% 70.59% # number of executed instructions with N source register operands 935system.cpu1.CUs0.wavefronts24.src_reg_operand_dist::2-3 10 29.41% 100.00% # number of executed instructions with N source register operands 936system.cpu1.CUs0.wavefronts24.src_reg_operand_dist::4 0 0.00% 100.00% # number of executed instructions with N source register operands 937system.cpu1.CUs0.wavefronts24.src_reg_operand_dist::overflows 0 0.00% 100.00% # number of executed instructions with N source register operands 938system.cpu1.CUs0.wavefronts24.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 939system.cpu1.CUs0.wavefronts24.src_reg_operand_dist::max_value 2 # number of executed instructions with N source register operands 940system.cpu1.CUs0.wavefronts24.src_reg_operand_dist::total 34 # number of executed instructions with N source register operands 941system.cpu1.CUs0.wavefronts24.dst_reg_operand_dist::samples 34 # number of executed instructions with N destination register operands 942system.cpu1.CUs0.wavefronts24.dst_reg_operand_dist::mean 0.617647 # number of executed instructions with N destination register operands 943system.cpu1.CUs0.wavefronts24.dst_reg_operand_dist::stdev 0.493270 # number of executed instructions with N destination register operands 944system.cpu1.CUs0.wavefronts24.dst_reg_operand_dist::underflows 0 0.00% 0.00% # number of executed instructions with N destination register operands 945system.cpu1.CUs0.wavefronts24.dst_reg_operand_dist::0-1 34 100.00% 100.00% # number of executed instructions with N destination register operands 946system.cpu1.CUs0.wavefronts24.dst_reg_operand_dist::2-3 0 0.00% 100.00% # number of executed instructions with N destination register operands 947system.cpu1.CUs0.wavefronts24.dst_reg_operand_dist::overflows 0 0.00% 100.00% # number of executed instructions with N destination register operands 948system.cpu1.CUs0.wavefronts24.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 949system.cpu1.CUs0.wavefronts24.dst_reg_operand_dist::max_value 1 # number of executed instructions with N destination register operands 950system.cpu1.CUs0.wavefronts24.dst_reg_operand_dist::total 34 # number of executed instructions with N destination register operands 951system.cpu1.CUs0.wavefronts25.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 952system.cpu1.CUs0.wavefronts25.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 953system.cpu1.CUs0.wavefronts25.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 954system.cpu1.CUs0.wavefronts25.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 955system.cpu1.CUs0.wavefronts25.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 956system.cpu1.CUs0.wavefronts25.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 957system.cpu1.CUs0.wavefronts25.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 958system.cpu1.CUs0.wavefronts25.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 959system.cpu1.CUs0.wavefronts25.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 960system.cpu1.CUs0.wavefronts25.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 961system.cpu1.CUs0.wavefronts25.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 962system.cpu1.CUs0.wavefronts25.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 963system.cpu1.CUs0.wavefronts25.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 964system.cpu1.CUs0.wavefronts25.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 965system.cpu1.CUs0.wavefronts25.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 966system.cpu1.CUs0.wavefronts25.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 967system.cpu1.CUs0.wavefronts25.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 968system.cpu1.CUs0.wavefronts25.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 969system.cpu1.CUs0.wavefronts25.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 970system.cpu1.CUs0.wavefronts25.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 971system.cpu1.CUs0.wavefronts25.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 972system.cpu1.CUs0.wavefronts25.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 973system.cpu1.CUs0.wavefronts25.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 974system.cpu1.CUs0.wavefronts25.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 975system.cpu1.CUs0.wavefronts26.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 976system.cpu1.CUs0.wavefronts26.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 977system.cpu1.CUs0.wavefronts26.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 978system.cpu1.CUs0.wavefronts26.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 979system.cpu1.CUs0.wavefronts26.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 980system.cpu1.CUs0.wavefronts26.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 981system.cpu1.CUs0.wavefronts26.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 982system.cpu1.CUs0.wavefronts26.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 983system.cpu1.CUs0.wavefronts26.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 984system.cpu1.CUs0.wavefronts26.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 985system.cpu1.CUs0.wavefronts26.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 986system.cpu1.CUs0.wavefronts26.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 987system.cpu1.CUs0.wavefronts26.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 988system.cpu1.CUs0.wavefronts26.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 989system.cpu1.CUs0.wavefronts26.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 990system.cpu1.CUs0.wavefronts26.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 991system.cpu1.CUs0.wavefronts26.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 992system.cpu1.CUs0.wavefronts26.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 993system.cpu1.CUs0.wavefronts26.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 994system.cpu1.CUs0.wavefronts26.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 995system.cpu1.CUs0.wavefronts26.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 996system.cpu1.CUs0.wavefronts26.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 997system.cpu1.CUs0.wavefronts26.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 998system.cpu1.CUs0.wavefronts26.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 999system.cpu1.CUs0.wavefronts27.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 1000system.cpu1.CUs0.wavefronts27.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 1001system.cpu1.CUs0.wavefronts27.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 1002system.cpu1.CUs0.wavefronts27.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 1003system.cpu1.CUs0.wavefronts27.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 1004system.cpu1.CUs0.wavefronts27.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 1005system.cpu1.CUs0.wavefronts27.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 1006system.cpu1.CUs0.wavefronts27.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 1007system.cpu1.CUs0.wavefronts27.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 1008system.cpu1.CUs0.wavefronts27.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 1009system.cpu1.CUs0.wavefronts27.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 1010system.cpu1.CUs0.wavefronts27.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 1011system.cpu1.CUs0.wavefronts27.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 1012system.cpu1.CUs0.wavefronts27.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 1013system.cpu1.CUs0.wavefronts27.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 1014system.cpu1.CUs0.wavefronts27.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 1015system.cpu1.CUs0.wavefronts27.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 1016system.cpu1.CUs0.wavefronts27.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 1017system.cpu1.CUs0.wavefronts27.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 1018system.cpu1.CUs0.wavefronts27.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 1019system.cpu1.CUs0.wavefronts27.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 1020system.cpu1.CUs0.wavefronts27.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 1021system.cpu1.CUs0.wavefronts27.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 1022system.cpu1.CUs0.wavefronts27.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 1023system.cpu1.CUs0.wavefronts28.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 1024system.cpu1.CUs0.wavefronts28.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 1025system.cpu1.CUs0.wavefronts28.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 1026system.cpu1.CUs0.wavefronts28.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 1027system.cpu1.CUs0.wavefronts28.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 1028system.cpu1.CUs0.wavefronts28.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 1029system.cpu1.CUs0.wavefronts28.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 1030system.cpu1.CUs0.wavefronts28.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 1031system.cpu1.CUs0.wavefronts28.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 1032system.cpu1.CUs0.wavefronts28.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 1033system.cpu1.CUs0.wavefronts28.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 1034system.cpu1.CUs0.wavefronts28.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 1035system.cpu1.CUs0.wavefronts28.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 1036system.cpu1.CUs0.wavefronts28.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 1037system.cpu1.CUs0.wavefronts28.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 1038system.cpu1.CUs0.wavefronts28.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 1039system.cpu1.CUs0.wavefronts28.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 1040system.cpu1.CUs0.wavefronts28.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 1041system.cpu1.CUs0.wavefronts28.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 1042system.cpu1.CUs0.wavefronts28.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 1043system.cpu1.CUs0.wavefronts28.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 1044system.cpu1.CUs0.wavefronts28.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 1045system.cpu1.CUs0.wavefronts28.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 1046system.cpu1.CUs0.wavefronts28.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 1047system.cpu1.CUs0.wavefronts29.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 1048system.cpu1.CUs0.wavefronts29.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 1049system.cpu1.CUs0.wavefronts29.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 1050system.cpu1.CUs0.wavefronts29.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 1051system.cpu1.CUs0.wavefronts29.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 1052system.cpu1.CUs0.wavefronts29.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 1053system.cpu1.CUs0.wavefronts29.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 1054system.cpu1.CUs0.wavefronts29.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 1055system.cpu1.CUs0.wavefronts29.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 1056system.cpu1.CUs0.wavefronts29.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 1057system.cpu1.CUs0.wavefronts29.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 1058system.cpu1.CUs0.wavefronts29.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 1059system.cpu1.CUs0.wavefronts29.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 1060system.cpu1.CUs0.wavefronts29.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 1061system.cpu1.CUs0.wavefronts29.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 1062system.cpu1.CUs0.wavefronts29.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 1063system.cpu1.CUs0.wavefronts29.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 1064system.cpu1.CUs0.wavefronts29.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 1065system.cpu1.CUs0.wavefronts29.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 1066system.cpu1.CUs0.wavefronts29.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 1067system.cpu1.CUs0.wavefronts29.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 1068system.cpu1.CUs0.wavefronts29.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 1069system.cpu1.CUs0.wavefronts29.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 1070system.cpu1.CUs0.wavefronts29.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 1071system.cpu1.CUs0.wavefronts30.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 1072system.cpu1.CUs0.wavefronts30.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 1073system.cpu1.CUs0.wavefronts30.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 1074system.cpu1.CUs0.wavefronts30.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 1075system.cpu1.CUs0.wavefronts30.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 1076system.cpu1.CUs0.wavefronts30.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 1077system.cpu1.CUs0.wavefronts30.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 1078system.cpu1.CUs0.wavefronts30.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 1079system.cpu1.CUs0.wavefronts30.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 1080system.cpu1.CUs0.wavefronts30.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 1081system.cpu1.CUs0.wavefronts30.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 1082system.cpu1.CUs0.wavefronts30.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 1083system.cpu1.CUs0.wavefronts30.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 1084system.cpu1.CUs0.wavefronts30.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 1085system.cpu1.CUs0.wavefronts30.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 1086system.cpu1.CUs0.wavefronts30.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 1087system.cpu1.CUs0.wavefronts30.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 1088system.cpu1.CUs0.wavefronts30.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 1089system.cpu1.CUs0.wavefronts30.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 1090system.cpu1.CUs0.wavefronts30.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 1091system.cpu1.CUs0.wavefronts30.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 1092system.cpu1.CUs0.wavefronts30.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 1093system.cpu1.CUs0.wavefronts30.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 1094system.cpu1.CUs0.wavefronts30.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 1095system.cpu1.CUs0.wavefronts31.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 1096system.cpu1.CUs0.wavefronts31.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 1097system.cpu1.CUs0.wavefronts31.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 1098system.cpu1.CUs0.wavefronts31.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 1099system.cpu1.CUs0.wavefronts31.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 1100system.cpu1.CUs0.wavefronts31.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 1101system.cpu1.CUs0.wavefronts31.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 1102system.cpu1.CUs0.wavefronts31.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 1103system.cpu1.CUs0.wavefronts31.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 1104system.cpu1.CUs0.wavefronts31.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 1105system.cpu1.CUs0.wavefronts31.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 1106system.cpu1.CUs0.wavefronts31.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 1107system.cpu1.CUs0.wavefronts31.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 1108system.cpu1.CUs0.wavefronts31.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 1109system.cpu1.CUs0.wavefronts31.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 1110system.cpu1.CUs0.wavefronts31.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 1111system.cpu1.CUs0.wavefronts31.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 1112system.cpu1.CUs0.wavefronts31.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 1113system.cpu1.CUs0.wavefronts31.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 1114system.cpu1.CUs0.wavefronts31.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 1115system.cpu1.CUs0.wavefronts31.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 1116system.cpu1.CUs0.wavefronts31.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 1117system.cpu1.CUs0.wavefronts31.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 1118system.cpu1.CUs0.wavefronts31.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 1119system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::samples 43 # For each instruction fetch request recieved record how many instructions you got from it 1120system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::mean 5.813953 # For each instruction fetch request recieved record how many instructions you got from it 1121system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::stdev 2.683777 # For each instruction fetch request recieved record how many instructions you got from it 1122system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::underflows 0 0.00% 0.00% # For each instruction fetch request recieved record how many instructions you got from it 1123system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::1 0 0.00% 0.00% # For each instruction fetch request recieved record how many instructions you got from it 1124system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::2 8 18.60% 18.60% # For each instruction fetch request recieved record how many instructions you got from it 1125system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::3 8 18.60% 37.21% # For each instruction fetch request recieved record how many instructions you got from it 1126system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::4 1 2.33% 39.53% # For each instruction fetch request recieved record how many instructions you got from it 1127system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::5 0 0.00% 39.53% # For each instruction fetch request recieved record how many instructions you got from it 1128system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::6 1 2.33% 41.86% # For each instruction fetch request recieved record how many instructions you got from it 1129system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::7 0 0.00% 41.86% # For each instruction fetch request recieved record how many instructions you got from it 1130system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::8 25 58.14% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 1131system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::9 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 1132system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::10 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 1133system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::11 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 1134system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::12 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 1135system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::13 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 1136system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::14 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 1137system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::15 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 1138system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::16 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 1139system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::17 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 1140system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::18 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 1141system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::19 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 1142system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::20 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 1143system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::21 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 1144system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::22 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 1145system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::23 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 1146system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::24 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 1147system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::25 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 1148system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::26 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 1149system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::27 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 1150system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::28 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 1151system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::29 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 1152system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::30 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 1153system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::31 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 1154system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::32 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 1155system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::overflows 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 1156system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::min_value 2 # For each instruction fetch request recieved record how many instructions you got from it 1157system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::max_value 8 # For each instruction fetch request recieved record how many instructions you got from it 1158system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::total 43 # For each instruction fetch request recieved record how many instructions you got from it 1159system.cpu1.CUs0.ExecStage.num_cycles_with_no_issue 4663 # number of cycles the CU issues nothing 1160system.cpu1.CUs0.ExecStage.num_cycles_with_instr_issued 102 # number of cycles the CU issued at least one instruction 1161system.cpu1.CUs0.ExecStage.num_cycles_with_instrtype_issue::ALU0 30 # Number of cycles at least one instruction of specific type issued 1162system.cpu1.CUs0.ExecStage.num_cycles_with_instrtype_issue::ALU1 29 # Number of cycles at least one instruction of specific type issued 1163system.cpu1.CUs0.ExecStage.num_cycles_with_instrtype_issue::ALU2 29 # Number of cycles at least one instruction of specific type issued 1164system.cpu1.CUs0.ExecStage.num_cycles_with_instrtype_issue::ALU3 29 # Number of cycles at least one instruction of specific type issued 1165system.cpu1.CUs0.ExecStage.num_cycles_with_instrtype_issue::GM 18 # Number of cycles at least one instruction of specific type issued 1166system.cpu1.CUs0.ExecStage.num_cycles_with_instrtype_issue::LM 6 # Number of cycles at least one instruction of specific type issued 1167system.cpu1.CUs0.ExecStage.num_cycles_with_instr_type_no_issue::ALU0 1993 # Number of cycles no instruction of specific type issued 1168system.cpu1.CUs0.ExecStage.num_cycles_with_instr_type_no_issue::ALU1 288 # Number of cycles no instruction of specific type issued 1169system.cpu1.CUs0.ExecStage.num_cycles_with_instr_type_no_issue::ALU2 325 # Number of cycles no instruction of specific type issued 1170system.cpu1.CUs0.ExecStage.num_cycles_with_instr_type_no_issue::ALU3 248 # Number of cycles no instruction of specific type issued 1171system.cpu1.CUs0.ExecStage.num_cycles_with_instr_type_no_issue::GM 341 # Number of cycles no instruction of specific type issued 1172system.cpu1.CUs0.ExecStage.num_cycles_with_instr_type_no_issue::LM 27 # Number of cycles no instruction of specific type issued 1173system.cpu1.CUs0.ExecStage.spc::samples 4765 # Execution units active per cycle (Exec unit=SIMD,MemPipe) 1174system.cpu1.CUs0.ExecStage.spc::mean 0.029591 # Execution units active per cycle (Exec unit=SIMD,MemPipe) 1175system.cpu1.CUs0.ExecStage.spc::stdev 0.214321 # Execution units active per cycle (Exec unit=SIMD,MemPipe) 1176system.cpu1.CUs0.ExecStage.spc::underflows 0 0.00% 0.00% # Execution units active per cycle (Exec unit=SIMD,MemPipe) 1177system.cpu1.CUs0.ExecStage.spc::0 4663 97.86% 97.86% # Execution units active per cycle (Exec unit=SIMD,MemPipe) 1178system.cpu1.CUs0.ExecStage.spc::1 65 1.36% 99.22% # Execution units active per cycle (Exec unit=SIMD,MemPipe) 1179system.cpu1.CUs0.ExecStage.spc::2 35 0.73% 99.96% # Execution units active per cycle (Exec unit=SIMD,MemPipe) 1180system.cpu1.CUs0.ExecStage.spc::3 2 0.04% 100.00% # Execution units active per cycle (Exec unit=SIMD,MemPipe) 1181system.cpu1.CUs0.ExecStage.spc::4 0 0.00% 100.00% # Execution units active per cycle (Exec unit=SIMD,MemPipe) 1182system.cpu1.CUs0.ExecStage.spc::5 0 0.00% 100.00% # Execution units active per cycle (Exec unit=SIMD,MemPipe) 1183system.cpu1.CUs0.ExecStage.spc::6 0 0.00% 100.00% # Execution units active per cycle (Exec unit=SIMD,MemPipe) 1184system.cpu1.CUs0.ExecStage.spc::overflows 0 0.00% 100.00% # Execution units active per cycle (Exec unit=SIMD,MemPipe) 1185system.cpu1.CUs0.ExecStage.spc::min_value 0 # Execution units active per cycle (Exec unit=SIMD,MemPipe) 1186system.cpu1.CUs0.ExecStage.spc::max_value 3 # Execution units active per cycle (Exec unit=SIMD,MemPipe) 1187system.cpu1.CUs0.ExecStage.spc::total 4765 # Execution units active per cycle (Exec unit=SIMD,MemPipe) 1188system.cpu1.CUs0.ExecStage.num_transitions_active_to_idle 66 # number of CU transitions from active to idle 1189system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::samples 66 # duration of idle periods in cycles 1190system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::mean 61.575758 # duration of idle periods in cycles 1191system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::stdev 253.572448 # duration of idle periods in cycles 1192system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::underflows 0 0.00% 0.00% # duration of idle periods in cycles 1193system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::0-4 45 68.18% 68.18% # duration of idle periods in cycles 1194system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::5-9 10 15.15% 83.33% # duration of idle periods in cycles 1195system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::10-14 0 0.00% 83.33% # duration of idle periods in cycles 1196system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::15-19 1 1.52% 84.85% # duration of idle periods in cycles 1197system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::20-24 2 3.03% 87.88% # duration of idle periods in cycles 1198system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::25-29 1 1.52% 89.39% # duration of idle periods in cycles 1199system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::30-34 0 0.00% 89.39% # duration of idle periods in cycles 1200system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::35-39 0 0.00% 89.39% # duration of idle periods in cycles 1201system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::40-44 0 0.00% 89.39% # duration of idle periods in cycles 1202system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::45-49 0 0.00% 89.39% # duration of idle periods in cycles 1203system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::50-54 0 0.00% 89.39% # duration of idle periods in cycles 1204system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::55-59 0 0.00% 89.39% # duration of idle periods in cycles 1205system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::60-64 0 0.00% 89.39% # duration of idle periods in cycles 1206system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::65-69 0 0.00% 89.39% # duration of idle periods in cycles 1207system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::70-74 0 0.00% 89.39% # duration of idle periods in cycles 1208system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::75 0 0.00% 89.39% # duration of idle periods in cycles 1209system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::overflows 7 10.61% 100.00% # duration of idle periods in cycles 1210system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::min_value 1 # duration of idle periods in cycles 1211system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::max_value 1685 # duration of idle periods in cycles 1212system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::total 66 # duration of idle periods in cycles 1213system.cpu1.CUs0.GlobalMemPipeline.load_vrf_bank_conflict_cycles 0 # total number of cycles GM data are delayed before updating the VRF 1214system.cpu1.CUs0.LocalMemPipeline.load_vrf_bank_conflict_cycles 0 # total number of cycles LDS data are delayed before updating the VRF 1215system.cpu1.CUs0.tlb_requests 769 # number of uncoalesced requests 1216system.cpu1.CUs0.tlb_cycles -212991640500 # total number of cycles for all uncoalesced requests 1217system.cpu1.CUs0.avg_translation_latency -276972224.317295 # Avg. translation latency for data translations 1218system.cpu1.CUs0.TLB_hits_distribution::page_table 769 # TLB hits distribution (0 for page table, x for Lx-TLB 1219system.cpu1.CUs0.TLB_hits_distribution::L1_TLB 0 # TLB hits distribution (0 for page table, x for Lx-TLB 1220system.cpu1.CUs0.TLB_hits_distribution::L2_TLB 0 # TLB hits distribution (0 for page table, x for Lx-TLB 1221system.cpu1.CUs0.TLB_hits_distribution::L3_TLB 0 # TLB hits distribution (0 for page table, x for Lx-TLB 1222system.cpu1.CUs0.lds_bank_access_cnt 54 # Total number of LDS bank accesses 1223system.cpu1.CUs0.lds_bank_conflicts::samples 6 # Number of bank conflicts per LDS memory packet 1224system.cpu1.CUs0.lds_bank_conflicts::mean 8 # Number of bank conflicts per LDS memory packet 1225system.cpu1.CUs0.lds_bank_conflicts::stdev 6.196773 # Number of bank conflicts per LDS memory packet 1226system.cpu1.CUs0.lds_bank_conflicts::underflows 0 0.00% 0.00% # Number of bank conflicts per LDS memory packet 1227system.cpu1.CUs0.lds_bank_conflicts::0-1 2 33.33% 33.33% # Number of bank conflicts per LDS memory packet 1228system.cpu1.CUs0.lds_bank_conflicts::2-3 0 0.00% 33.33% # Number of bank conflicts per LDS memory packet 1229system.cpu1.CUs0.lds_bank_conflicts::4-5 0 0.00% 33.33% # Number of bank conflicts per LDS memory packet 1230system.cpu1.CUs0.lds_bank_conflicts::6-7 0 0.00% 33.33% # Number of bank conflicts per LDS memory packet 1231system.cpu1.CUs0.lds_bank_conflicts::8-9 0 0.00% 33.33% # Number of bank conflicts per LDS memory packet 1232system.cpu1.CUs0.lds_bank_conflicts::10-11 0 0.00% 33.33% # Number of bank conflicts per LDS memory packet 1233system.cpu1.CUs0.lds_bank_conflicts::12-13 4 66.67% 100.00% # Number of bank conflicts per LDS memory packet 1234system.cpu1.CUs0.lds_bank_conflicts::14-15 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 1235system.cpu1.CUs0.lds_bank_conflicts::16-17 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 1236system.cpu1.CUs0.lds_bank_conflicts::18-19 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 1237system.cpu1.CUs0.lds_bank_conflicts::20-21 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 1238system.cpu1.CUs0.lds_bank_conflicts::22-23 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 1239system.cpu1.CUs0.lds_bank_conflicts::24-25 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 1240system.cpu1.CUs0.lds_bank_conflicts::26-27 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 1241system.cpu1.CUs0.lds_bank_conflicts::28-29 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 1242system.cpu1.CUs0.lds_bank_conflicts::30-31 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 1243system.cpu1.CUs0.lds_bank_conflicts::32-33 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 1244system.cpu1.CUs0.lds_bank_conflicts::34-35 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 1245system.cpu1.CUs0.lds_bank_conflicts::36-37 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 1246system.cpu1.CUs0.lds_bank_conflicts::38-39 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 1247system.cpu1.CUs0.lds_bank_conflicts::40-41 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 1248system.cpu1.CUs0.lds_bank_conflicts::42-43 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 1249system.cpu1.CUs0.lds_bank_conflicts::44-45 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 1250system.cpu1.CUs0.lds_bank_conflicts::46-47 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 1251system.cpu1.CUs0.lds_bank_conflicts::48-49 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 1252system.cpu1.CUs0.lds_bank_conflicts::50-51 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 1253system.cpu1.CUs0.lds_bank_conflicts::52-53 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 1254system.cpu1.CUs0.lds_bank_conflicts::54-55 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 1255system.cpu1.CUs0.lds_bank_conflicts::56-57 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 1256system.cpu1.CUs0.lds_bank_conflicts::58-59 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 1257system.cpu1.CUs0.lds_bank_conflicts::60-61 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 1258system.cpu1.CUs0.lds_bank_conflicts::62-63 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 1259system.cpu1.CUs0.lds_bank_conflicts::64 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 1260system.cpu1.CUs0.lds_bank_conflicts::overflows 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 1261system.cpu1.CUs0.lds_bank_conflicts::min_value 0 # Number of bank conflicts per LDS memory packet 1262system.cpu1.CUs0.lds_bank_conflicts::max_value 12 # Number of bank conflicts per LDS memory packet 1263system.cpu1.CUs0.lds_bank_conflicts::total 6 # Number of bank conflicts per LDS memory packet 1264system.cpu1.CUs0.page_divergence_dist::samples 17 # pages touched per wf (over all mem. instr.) 1265system.cpu1.CUs0.page_divergence_dist::mean 1 # pages touched per wf (over all mem. instr.) 1266system.cpu1.CUs0.page_divergence_dist::stdev 0 # pages touched per wf (over all mem. instr.) 1267system.cpu1.CUs0.page_divergence_dist::underflows 0 0.00% 0.00% # pages touched per wf (over all mem. instr.) 1268system.cpu1.CUs0.page_divergence_dist::1-4 17 100.00% 100.00% # pages touched per wf (over all mem. instr.) 1269system.cpu1.CUs0.page_divergence_dist::5-8 0 0.00% 100.00% # pages touched per wf (over all mem. instr.) 1270system.cpu1.CUs0.page_divergence_dist::9-12 0 0.00% 100.00% # pages touched per wf (over all mem. instr.) 1271system.cpu1.CUs0.page_divergence_dist::13-16 0 0.00% 100.00% # pages touched per wf (over all mem. instr.) 1272system.cpu1.CUs0.page_divergence_dist::17-20 0 0.00% 100.00% # pages touched per wf (over all mem. instr.) 1273system.cpu1.CUs0.page_divergence_dist::21-24 0 0.00% 100.00% # pages touched per wf (over all mem. instr.) 1274system.cpu1.CUs0.page_divergence_dist::25-28 0 0.00% 100.00% # pages touched per wf (over all mem. instr.) 1275system.cpu1.CUs0.page_divergence_dist::29-32 0 0.00% 100.00% # pages touched per wf (over all mem. instr.) 1276system.cpu1.CUs0.page_divergence_dist::33-36 0 0.00% 100.00% # pages touched per wf (over all mem. instr.) 1277system.cpu1.CUs0.page_divergence_dist::37-40 0 0.00% 100.00% # pages touched per wf (over all mem. instr.) 1278system.cpu1.CUs0.page_divergence_dist::41-44 0 0.00% 100.00% # pages touched per wf (over all mem. instr.) 1279system.cpu1.CUs0.page_divergence_dist::45-48 0 0.00% 100.00% # pages touched per wf (over all mem. instr.) 1280system.cpu1.CUs0.page_divergence_dist::49-52 0 0.00% 100.00% # pages touched per wf (over all mem. instr.) 1281system.cpu1.CUs0.page_divergence_dist::53-56 0 0.00% 100.00% # pages touched per wf (over all mem. instr.) 1282system.cpu1.CUs0.page_divergence_dist::57-60 0 0.00% 100.00% # pages touched per wf (over all mem. instr.) 1283system.cpu1.CUs0.page_divergence_dist::61-64 0 0.00% 100.00% # pages touched per wf (over all mem. instr.) 1284system.cpu1.CUs0.page_divergence_dist::overflows 0 0.00% 100.00% # pages touched per wf (over all mem. instr.) 1285system.cpu1.CUs0.page_divergence_dist::min_value 1 # pages touched per wf (over all mem. instr.) 1286system.cpu1.CUs0.page_divergence_dist::max_value 1 # pages touched per wf (over all mem. instr.) 1287system.cpu1.CUs0.page_divergence_dist::total 17 # pages touched per wf (over all mem. instr.) 1288system.cpu1.CUs0.global_mem_instr_cnt 17 # dynamic global memory instructions count 1289system.cpu1.CUs0.local_mem_instr_cnt 6 # dynamic local memory intruction count 1290system.cpu1.CUs0.wg_blocked_due_lds_alloc 0 # Workgroup blocked due to LDS capacity 1291system.cpu1.CUs0.num_instr_executed 141 # number of instructions executed 1292system.cpu1.CUs0.inst_exec_rate::samples 141 # Instruction Execution Rate: Number of executed vector instructions per cycle 1293system.cpu1.CUs0.inst_exec_rate::mean 81.602837 # Instruction Execution Rate: Number of executed vector instructions per cycle 1294system.cpu1.CUs0.inst_exec_rate::stdev 244.924445 # Instruction Execution Rate: Number of executed vector instructions per cycle 1295system.cpu1.CUs0.inst_exec_rate::underflows 0 0.00% 0.00% # Instruction Execution Rate: Number of executed vector instructions per cycle 1296system.cpu1.CUs0.inst_exec_rate::0-1 1 0.71% 0.71% # Instruction Execution Rate: Number of executed vector instructions per cycle 1297system.cpu1.CUs0.inst_exec_rate::2-3 12 8.51% 9.22% # Instruction Execution Rate: Number of executed vector instructions per cycle 1298system.cpu1.CUs0.inst_exec_rate::4-5 57 40.43% 49.65% # Instruction Execution Rate: Number of executed vector instructions per cycle 1299system.cpu1.CUs0.inst_exec_rate::6-7 28 19.86% 69.50% # Instruction Execution Rate: Number of executed vector instructions per cycle 1300system.cpu1.CUs0.inst_exec_rate::8-9 2 1.42% 70.92% # Instruction Execution Rate: Number of executed vector instructions per cycle 1301system.cpu1.CUs0.inst_exec_rate::10 1 0.71% 71.63% # Instruction Execution Rate: Number of executed vector instructions per cycle 1302system.cpu1.CUs0.inst_exec_rate::overflows 40 28.37% 100.00% # Instruction Execution Rate: Number of executed vector instructions per cycle 1303system.cpu1.CUs0.inst_exec_rate::min_value 1 # Instruction Execution Rate: Number of executed vector instructions per cycle 1304system.cpu1.CUs0.inst_exec_rate::max_value 1686 # Instruction Execution Rate: Number of executed vector instructions per cycle 1305system.cpu1.CUs0.inst_exec_rate::total 141 # Instruction Execution Rate: Number of executed vector instructions per cycle 1306system.cpu1.CUs0.num_vec_ops_executed 6769 # number of vec ops executed (e.g. VSZ/inst) 1307system.cpu1.CUs0.num_total_cycles 4765 # number of cycles the CU ran for 1308system.cpu1.CUs0.vpc 1.420567 # Vector Operations per cycle (this CU only) 1309system.cpu1.CUs0.ipc 0.029591 # Instructions per cycle (this CU only) 1310system.cpu1.CUs0.warp_execution_dist::samples 141 # number of lanes active per instruction (oval all instructions) 1311system.cpu1.CUs0.warp_execution_dist::mean 48.007092 # number of lanes active per instruction (oval all instructions) 1312system.cpu1.CUs0.warp_execution_dist::stdev 23.719942 # number of lanes active per instruction (oval all instructions) 1313system.cpu1.CUs0.warp_execution_dist::underflows 0 0.00% 0.00% # number of lanes active per instruction (oval all instructions) 1314system.cpu1.CUs0.warp_execution_dist::1-4 5 3.55% 3.55% # number of lanes active per instruction (oval all instructions) 1315system.cpu1.CUs0.warp_execution_dist::5-8 0 0.00% 3.55% # number of lanes active per instruction (oval all instructions) 1316system.cpu1.CUs0.warp_execution_dist::9-12 0 0.00% 3.55% # number of lanes active per instruction (oval all instructions) 1317system.cpu1.CUs0.warp_execution_dist::13-16 36 25.53% 29.08% # number of lanes active per instruction (oval all instructions) 1318system.cpu1.CUs0.warp_execution_dist::17-20 0 0.00% 29.08% # number of lanes active per instruction (oval all instructions) 1319system.cpu1.CUs0.warp_execution_dist::21-24 0 0.00% 29.08% # number of lanes active per instruction (oval all instructions) 1320system.cpu1.CUs0.warp_execution_dist::25-28 0 0.00% 29.08% # number of lanes active per instruction (oval all instructions) 1321system.cpu1.CUs0.warp_execution_dist::29-32 0 0.00% 29.08% # number of lanes active per instruction (oval all instructions) 1322system.cpu1.CUs0.warp_execution_dist::33-36 0 0.00% 29.08% # number of lanes active per instruction (oval all instructions) 1323system.cpu1.CUs0.warp_execution_dist::37-40 0 0.00% 29.08% # number of lanes active per instruction (oval all instructions) 1324system.cpu1.CUs0.warp_execution_dist::41-44 0 0.00% 29.08% # number of lanes active per instruction (oval all instructions) 1325system.cpu1.CUs0.warp_execution_dist::45-48 0 0.00% 29.08% # number of lanes active per instruction (oval all instructions) 1326system.cpu1.CUs0.warp_execution_dist::49-52 8 5.67% 34.75% # number of lanes active per instruction (oval all instructions) 1327system.cpu1.CUs0.warp_execution_dist::53-56 0 0.00% 34.75% # number of lanes active per instruction (oval all instructions) 1328system.cpu1.CUs0.warp_execution_dist::57-60 0 0.00% 34.75% # number of lanes active per instruction (oval all instructions) 1329system.cpu1.CUs0.warp_execution_dist::61-64 92 65.25% 100.00% # number of lanes active per instruction (oval all instructions) 1330system.cpu1.CUs0.warp_execution_dist::overflows 0 0.00% 100.00% # number of lanes active per instruction (oval all instructions) 1331system.cpu1.CUs0.warp_execution_dist::min_value 1 # number of lanes active per instruction (oval all instructions) 1332system.cpu1.CUs0.warp_execution_dist::max_value 64 # number of lanes active per instruction (oval all instructions) 1333system.cpu1.CUs0.warp_execution_dist::total 141 # number of lanes active per instruction (oval all instructions) 1334system.cpu1.CUs0.gmem_lanes_execution_dist::samples 18 # number of active lanes per global memory instruction 1335system.cpu1.CUs0.gmem_lanes_execution_dist::mean 37.833333 # number of active lanes per global memory instruction 1336system.cpu1.CUs0.gmem_lanes_execution_dist::stdev 27.064737 # number of active lanes per global memory instruction 1337system.cpu1.CUs0.gmem_lanes_execution_dist::underflows 0 0.00% 0.00% # number of active lanes per global memory instruction 1338system.cpu1.CUs0.gmem_lanes_execution_dist::1-4 1 5.56% 5.56% # number of active lanes per global memory instruction 1339system.cpu1.CUs0.gmem_lanes_execution_dist::5-8 0 0.00% 5.56% # number of active lanes per global memory instruction 1340system.cpu1.CUs0.gmem_lanes_execution_dist::9-12 0 0.00% 5.56% # number of active lanes per global memory instruction 1341system.cpu1.CUs0.gmem_lanes_execution_dist::13-16 8 44.44% 50.00% # number of active lanes per global memory instruction 1342system.cpu1.CUs0.gmem_lanes_execution_dist::17-20 0 0.00% 50.00% # number of active lanes per global memory instruction 1343system.cpu1.CUs0.gmem_lanes_execution_dist::21-24 0 0.00% 50.00% # number of active lanes per global memory instruction 1344system.cpu1.CUs0.gmem_lanes_execution_dist::25-28 0 0.00% 50.00% # number of active lanes per global memory instruction 1345system.cpu1.CUs0.gmem_lanes_execution_dist::29-32 0 0.00% 50.00% # number of active lanes per global memory instruction 1346system.cpu1.CUs0.gmem_lanes_execution_dist::33-36 0 0.00% 50.00% # number of active lanes per global memory instruction 1347system.cpu1.CUs0.gmem_lanes_execution_dist::37-40 0 0.00% 50.00% # number of active lanes per global memory instruction 1348system.cpu1.CUs0.gmem_lanes_execution_dist::41-44 0 0.00% 50.00% # number of active lanes per global memory instruction 1349system.cpu1.CUs0.gmem_lanes_execution_dist::45-48 0 0.00% 50.00% # number of active lanes per global memory instruction 1350system.cpu1.CUs0.gmem_lanes_execution_dist::49-52 0 0.00% 50.00% # number of active lanes per global memory instruction 1351system.cpu1.CUs0.gmem_lanes_execution_dist::53-56 0 0.00% 50.00% # number of active lanes per global memory instruction 1352system.cpu1.CUs0.gmem_lanes_execution_dist::57-60 0 0.00% 50.00% # number of active lanes per global memory instruction 1353system.cpu1.CUs0.gmem_lanes_execution_dist::61-64 9 50.00% 100.00% # number of active lanes per global memory instruction 1354system.cpu1.CUs0.gmem_lanes_execution_dist::overflows 0 0.00% 100.00% # number of active lanes per global memory instruction 1355system.cpu1.CUs0.gmem_lanes_execution_dist::min_value 1 # number of active lanes per global memory instruction 1356system.cpu1.CUs0.gmem_lanes_execution_dist::max_value 64 # number of active lanes per global memory instruction 1357system.cpu1.CUs0.gmem_lanes_execution_dist::total 18 # number of active lanes per global memory instruction 1358system.cpu1.CUs0.lmem_lanes_execution_dist::samples 6 # number of active lanes per local memory instruction 1359system.cpu1.CUs0.lmem_lanes_execution_dist::mean 19.500000 # number of active lanes per local memory instruction 1360system.cpu1.CUs0.lmem_lanes_execution_dist::stdev 22.322634 # number of active lanes per local memory instruction 1361system.cpu1.CUs0.lmem_lanes_execution_dist::underflows 0 0.00% 0.00% # number of active lanes per local memory instruction 1362system.cpu1.CUs0.lmem_lanes_execution_dist::1-4 1 16.67% 16.67% # number of active lanes per local memory instruction 1363system.cpu1.CUs0.lmem_lanes_execution_dist::5-8 0 0.00% 16.67% # number of active lanes per local memory instruction 1364system.cpu1.CUs0.lmem_lanes_execution_dist::9-12 0 0.00% 16.67% # number of active lanes per local memory instruction 1365system.cpu1.CUs0.lmem_lanes_execution_dist::13-16 4 66.67% 83.33% # number of active lanes per local memory instruction 1366system.cpu1.CUs0.lmem_lanes_execution_dist::17-20 0 0.00% 83.33% # number of active lanes per local memory instruction 1367system.cpu1.CUs0.lmem_lanes_execution_dist::21-24 0 0.00% 83.33% # number of active lanes per local memory instruction 1368system.cpu1.CUs0.lmem_lanes_execution_dist::25-28 0 0.00% 83.33% # number of active lanes per local memory instruction 1369system.cpu1.CUs0.lmem_lanes_execution_dist::29-32 0 0.00% 83.33% # number of active lanes per local memory instruction 1370system.cpu1.CUs0.lmem_lanes_execution_dist::33-36 0 0.00% 83.33% # number of active lanes per local memory instruction 1371system.cpu1.CUs0.lmem_lanes_execution_dist::37-40 0 0.00% 83.33% # number of active lanes per local memory instruction 1372system.cpu1.CUs0.lmem_lanes_execution_dist::41-44 0 0.00% 83.33% # number of active lanes per local memory instruction 1373system.cpu1.CUs0.lmem_lanes_execution_dist::45-48 0 0.00% 83.33% # number of active lanes per local memory instruction 1374system.cpu1.CUs0.lmem_lanes_execution_dist::49-52 0 0.00% 83.33% # number of active lanes per local memory instruction 1375system.cpu1.CUs0.lmem_lanes_execution_dist::53-56 0 0.00% 83.33% # number of active lanes per local memory instruction 1376system.cpu1.CUs0.lmem_lanes_execution_dist::57-60 0 0.00% 83.33% # number of active lanes per local memory instruction 1377system.cpu1.CUs0.lmem_lanes_execution_dist::61-64 1 16.67% 100.00% # number of active lanes per local memory instruction 1378system.cpu1.CUs0.lmem_lanes_execution_dist::overflows 0 0.00% 100.00% # number of active lanes per local memory instruction 1379system.cpu1.CUs0.lmem_lanes_execution_dist::min_value 1 # number of active lanes per local memory instruction 1380system.cpu1.CUs0.lmem_lanes_execution_dist::max_value 64 # number of active lanes per local memory instruction 1381system.cpu1.CUs0.lmem_lanes_execution_dist::total 6 # number of active lanes per local memory instruction 1382system.cpu1.CUs0.num_alu_insts_executed 118 # Number of dynamic non-GM memory insts executed 1383system.cpu1.CUs0.times_wg_blocked_due_vgpr_alloc 0 # Number of times WGs are blocked due to VGPR allocation per SIMD 1384system.cpu1.CUs0.num_CAS_ops 0 # number of compare and swap operations 1385system.cpu1.CUs0.num_failed_CAS_ops 0 # number of compare and swap operations that failed 1386system.cpu1.CUs0.num_completed_wfs 4 # number of completed wavefronts 1387system.cpu1.CUs1.wavefronts00.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 1388system.cpu1.CUs1.wavefronts00.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 1389system.cpu1.CUs1.wavefronts00.timesBlockedDueRAWDependencies 216 # number of times the wf's instructions are blocked due to RAW dependencies 1390system.cpu1.CUs1.wavefronts00.src_reg_operand_dist::samples 39 # number of executed instructions with N source register operands 1391system.cpu1.CUs1.wavefronts00.src_reg_operand_dist::mean 0.794872 # number of executed instructions with N source register operands 1392system.cpu1.CUs1.wavefronts00.src_reg_operand_dist::stdev 0.863880 # number of executed instructions with N source register operands 1393system.cpu1.CUs1.wavefronts00.src_reg_operand_dist::underflows 0 0.00% 0.00% # number of executed instructions with N source register operands 1394system.cpu1.CUs1.wavefronts00.src_reg_operand_dist::0-1 28 71.79% 71.79% # number of executed instructions with N source register operands 1395system.cpu1.CUs1.wavefronts00.src_reg_operand_dist::2-3 11 28.21% 100.00% # number of executed instructions with N source register operands 1396system.cpu1.CUs1.wavefronts00.src_reg_operand_dist::4 0 0.00% 100.00% # number of executed instructions with N source register operands 1397system.cpu1.CUs1.wavefronts00.src_reg_operand_dist::overflows 0 0.00% 100.00% # number of executed instructions with N source register operands 1398system.cpu1.CUs1.wavefronts00.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 1399system.cpu1.CUs1.wavefronts00.src_reg_operand_dist::max_value 2 # number of executed instructions with N source register operands 1400system.cpu1.CUs1.wavefronts00.src_reg_operand_dist::total 39 # number of executed instructions with N source register operands 1401system.cpu1.CUs1.wavefronts00.dst_reg_operand_dist::samples 39 # number of executed instructions with N destination register operands 1402system.cpu1.CUs1.wavefronts00.dst_reg_operand_dist::mean 0.589744 # number of executed instructions with N destination register operands 1403system.cpu1.CUs1.wavefronts00.dst_reg_operand_dist::stdev 0.498310 # number of executed instructions with N destination register operands 1404system.cpu1.CUs1.wavefronts00.dst_reg_operand_dist::underflows 0 0.00% 0.00% # number of executed instructions with N destination register operands 1405system.cpu1.CUs1.wavefronts00.dst_reg_operand_dist::0-1 39 100.00% 100.00% # number of executed instructions with N destination register operands 1406system.cpu1.CUs1.wavefronts00.dst_reg_operand_dist::2-3 0 0.00% 100.00% # number of executed instructions with N destination register operands 1407system.cpu1.CUs1.wavefronts00.dst_reg_operand_dist::overflows 0 0.00% 100.00% # number of executed instructions with N destination register operands 1408system.cpu1.CUs1.wavefronts00.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 1409system.cpu1.CUs1.wavefronts00.dst_reg_operand_dist::max_value 1 # number of executed instructions with N destination register operands 1410system.cpu1.CUs1.wavefronts00.dst_reg_operand_dist::total 39 # number of executed instructions with N destination register operands 1411system.cpu1.CUs1.wavefronts01.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 1412system.cpu1.CUs1.wavefronts01.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 1413system.cpu1.CUs1.wavefronts01.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 1414system.cpu1.CUs1.wavefronts01.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 1415system.cpu1.CUs1.wavefronts01.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 1416system.cpu1.CUs1.wavefronts01.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 1417system.cpu1.CUs1.wavefronts01.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 1418system.cpu1.CUs1.wavefronts01.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 1419system.cpu1.CUs1.wavefronts01.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 1420system.cpu1.CUs1.wavefronts01.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 1421system.cpu1.CUs1.wavefronts01.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 1422system.cpu1.CUs1.wavefronts01.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 1423system.cpu1.CUs1.wavefronts01.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 1424system.cpu1.CUs1.wavefronts01.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 1425system.cpu1.CUs1.wavefronts01.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 1426system.cpu1.CUs1.wavefronts01.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 1427system.cpu1.CUs1.wavefronts01.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 1428system.cpu1.CUs1.wavefronts01.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 1429system.cpu1.CUs1.wavefronts01.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 1430system.cpu1.CUs1.wavefronts01.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 1431system.cpu1.CUs1.wavefronts01.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 1432system.cpu1.CUs1.wavefronts01.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 1433system.cpu1.CUs1.wavefronts01.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 1434system.cpu1.CUs1.wavefronts01.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 1435system.cpu1.CUs1.wavefronts02.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 1436system.cpu1.CUs1.wavefronts02.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 1437system.cpu1.CUs1.wavefronts02.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 1438system.cpu1.CUs1.wavefronts02.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 1439system.cpu1.CUs1.wavefronts02.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 1440system.cpu1.CUs1.wavefronts02.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 1441system.cpu1.CUs1.wavefronts02.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 1442system.cpu1.CUs1.wavefronts02.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 1443system.cpu1.CUs1.wavefronts02.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 1444system.cpu1.CUs1.wavefronts02.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 1445system.cpu1.CUs1.wavefronts02.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 1446system.cpu1.CUs1.wavefronts02.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 1447system.cpu1.CUs1.wavefronts02.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 1448system.cpu1.CUs1.wavefronts02.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 1449system.cpu1.CUs1.wavefronts02.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 1450system.cpu1.CUs1.wavefronts02.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 1451system.cpu1.CUs1.wavefronts02.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 1452system.cpu1.CUs1.wavefronts02.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 1453system.cpu1.CUs1.wavefronts02.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 1454system.cpu1.CUs1.wavefronts02.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 1455system.cpu1.CUs1.wavefronts02.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 1456system.cpu1.CUs1.wavefronts02.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 1457system.cpu1.CUs1.wavefronts02.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 1458system.cpu1.CUs1.wavefronts02.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 1459system.cpu1.CUs1.wavefronts03.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 1460system.cpu1.CUs1.wavefronts03.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 1461system.cpu1.CUs1.wavefronts03.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 1462system.cpu1.CUs1.wavefronts03.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 1463system.cpu1.CUs1.wavefronts03.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 1464system.cpu1.CUs1.wavefronts03.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 1465system.cpu1.CUs1.wavefronts03.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 1466system.cpu1.CUs1.wavefronts03.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 1467system.cpu1.CUs1.wavefronts03.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 1468system.cpu1.CUs1.wavefronts03.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 1469system.cpu1.CUs1.wavefronts03.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 1470system.cpu1.CUs1.wavefronts03.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 1471system.cpu1.CUs1.wavefronts03.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 1472system.cpu1.CUs1.wavefronts03.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 1473system.cpu1.CUs1.wavefronts03.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 1474system.cpu1.CUs1.wavefronts03.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 1475system.cpu1.CUs1.wavefronts03.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 1476system.cpu1.CUs1.wavefronts03.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 1477system.cpu1.CUs1.wavefronts03.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 1478system.cpu1.CUs1.wavefronts03.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 1479system.cpu1.CUs1.wavefronts03.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 1480system.cpu1.CUs1.wavefronts03.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 1481system.cpu1.CUs1.wavefronts03.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 1482system.cpu1.CUs1.wavefronts03.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 1483system.cpu1.CUs1.wavefronts04.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 1484system.cpu1.CUs1.wavefronts04.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 1485system.cpu1.CUs1.wavefronts04.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 1486system.cpu1.CUs1.wavefronts04.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 1487system.cpu1.CUs1.wavefronts04.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 1488system.cpu1.CUs1.wavefronts04.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 1489system.cpu1.CUs1.wavefronts04.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 1490system.cpu1.CUs1.wavefronts04.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 1491system.cpu1.CUs1.wavefronts04.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 1492system.cpu1.CUs1.wavefronts04.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 1493system.cpu1.CUs1.wavefronts04.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 1494system.cpu1.CUs1.wavefronts04.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 1495system.cpu1.CUs1.wavefronts04.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 1496system.cpu1.CUs1.wavefronts04.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 1497system.cpu1.CUs1.wavefronts04.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 1498system.cpu1.CUs1.wavefronts04.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 1499system.cpu1.CUs1.wavefronts04.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 1500system.cpu1.CUs1.wavefronts04.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 1501system.cpu1.CUs1.wavefronts04.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 1502system.cpu1.CUs1.wavefronts04.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 1503system.cpu1.CUs1.wavefronts04.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 1504system.cpu1.CUs1.wavefronts04.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 1505system.cpu1.CUs1.wavefronts04.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 1506system.cpu1.CUs1.wavefronts04.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 1507system.cpu1.CUs1.wavefronts05.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 1508system.cpu1.CUs1.wavefronts05.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 1509system.cpu1.CUs1.wavefronts05.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 1510system.cpu1.CUs1.wavefronts05.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 1511system.cpu1.CUs1.wavefronts05.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 1512system.cpu1.CUs1.wavefronts05.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 1513system.cpu1.CUs1.wavefronts05.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 1514system.cpu1.CUs1.wavefronts05.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 1515system.cpu1.CUs1.wavefronts05.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 1516system.cpu1.CUs1.wavefronts05.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 1517system.cpu1.CUs1.wavefronts05.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 1518system.cpu1.CUs1.wavefronts05.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 1519system.cpu1.CUs1.wavefronts05.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 1520system.cpu1.CUs1.wavefronts05.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 1521system.cpu1.CUs1.wavefronts05.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 1522system.cpu1.CUs1.wavefronts05.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 1523system.cpu1.CUs1.wavefronts05.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 1524system.cpu1.CUs1.wavefronts05.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 1525system.cpu1.CUs1.wavefronts05.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 1526system.cpu1.CUs1.wavefronts05.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 1527system.cpu1.CUs1.wavefronts05.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 1528system.cpu1.CUs1.wavefronts05.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 1529system.cpu1.CUs1.wavefronts05.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 1530system.cpu1.CUs1.wavefronts05.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 1531system.cpu1.CUs1.wavefronts06.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 1532system.cpu1.CUs1.wavefronts06.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 1533system.cpu1.CUs1.wavefronts06.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 1534system.cpu1.CUs1.wavefronts06.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 1535system.cpu1.CUs1.wavefronts06.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 1536system.cpu1.CUs1.wavefronts06.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 1537system.cpu1.CUs1.wavefronts06.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 1538system.cpu1.CUs1.wavefronts06.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 1539system.cpu1.CUs1.wavefronts06.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 1540system.cpu1.CUs1.wavefronts06.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 1541system.cpu1.CUs1.wavefronts06.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 1542system.cpu1.CUs1.wavefronts06.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 1543system.cpu1.CUs1.wavefronts06.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 1544system.cpu1.CUs1.wavefronts06.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 1545system.cpu1.CUs1.wavefronts06.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 1546system.cpu1.CUs1.wavefronts06.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 1547system.cpu1.CUs1.wavefronts06.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 1548system.cpu1.CUs1.wavefronts06.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 1549system.cpu1.CUs1.wavefronts06.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 1550system.cpu1.CUs1.wavefronts06.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 1551system.cpu1.CUs1.wavefronts06.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 1552system.cpu1.CUs1.wavefronts06.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 1553system.cpu1.CUs1.wavefronts06.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 1554system.cpu1.CUs1.wavefronts06.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 1555system.cpu1.CUs1.wavefronts07.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 1556system.cpu1.CUs1.wavefronts07.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 1557system.cpu1.CUs1.wavefronts07.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 1558system.cpu1.CUs1.wavefronts07.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 1559system.cpu1.CUs1.wavefronts07.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 1560system.cpu1.CUs1.wavefronts07.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 1561system.cpu1.CUs1.wavefronts07.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 1562system.cpu1.CUs1.wavefronts07.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 1563system.cpu1.CUs1.wavefronts07.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 1564system.cpu1.CUs1.wavefronts07.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 1565system.cpu1.CUs1.wavefronts07.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 1566system.cpu1.CUs1.wavefronts07.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 1567system.cpu1.CUs1.wavefronts07.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 1568system.cpu1.CUs1.wavefronts07.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 1569system.cpu1.CUs1.wavefronts07.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 1570system.cpu1.CUs1.wavefronts07.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 1571system.cpu1.CUs1.wavefronts07.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 1572system.cpu1.CUs1.wavefronts07.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 1573system.cpu1.CUs1.wavefronts07.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 1574system.cpu1.CUs1.wavefronts07.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 1575system.cpu1.CUs1.wavefronts07.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 1576system.cpu1.CUs1.wavefronts07.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 1577system.cpu1.CUs1.wavefronts07.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 1578system.cpu1.CUs1.wavefronts07.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 1579system.cpu1.CUs1.wavefronts08.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 1580system.cpu1.CUs1.wavefronts08.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 1581system.cpu1.CUs1.wavefronts08.timesBlockedDueRAWDependencies 195 # number of times the wf's instructions are blocked due to RAW dependencies 1582system.cpu1.CUs1.wavefronts08.src_reg_operand_dist::samples 34 # number of executed instructions with N source register operands 1583system.cpu1.CUs1.wavefronts08.src_reg_operand_dist::mean 0.852941 # number of executed instructions with N source register operands 1584system.cpu1.CUs1.wavefronts08.src_reg_operand_dist::stdev 0.857493 # number of executed instructions with N source register operands 1585system.cpu1.CUs1.wavefronts08.src_reg_operand_dist::underflows 0 0.00% 0.00% # number of executed instructions with N source register operands 1586system.cpu1.CUs1.wavefronts08.src_reg_operand_dist::0-1 24 70.59% 70.59% # number of executed instructions with N source register operands 1587system.cpu1.CUs1.wavefronts08.src_reg_operand_dist::2-3 10 29.41% 100.00% # number of executed instructions with N source register operands 1588system.cpu1.CUs1.wavefronts08.src_reg_operand_dist::4 0 0.00% 100.00% # number of executed instructions with N source register operands 1589system.cpu1.CUs1.wavefronts08.src_reg_operand_dist::overflows 0 0.00% 100.00% # number of executed instructions with N source register operands 1590system.cpu1.CUs1.wavefronts08.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 1591system.cpu1.CUs1.wavefronts08.src_reg_operand_dist::max_value 2 # number of executed instructions with N source register operands 1592system.cpu1.CUs1.wavefronts08.src_reg_operand_dist::total 34 # number of executed instructions with N source register operands 1593system.cpu1.CUs1.wavefronts08.dst_reg_operand_dist::samples 34 # number of executed instructions with N destination register operands 1594system.cpu1.CUs1.wavefronts08.dst_reg_operand_dist::mean 0.617647 # number of executed instructions with N destination register operands 1595system.cpu1.CUs1.wavefronts08.dst_reg_operand_dist::stdev 0.493270 # number of executed instructions with N destination register operands 1596system.cpu1.CUs1.wavefronts08.dst_reg_operand_dist::underflows 0 0.00% 0.00% # number of executed instructions with N destination register operands 1597system.cpu1.CUs1.wavefronts08.dst_reg_operand_dist::0-1 34 100.00% 100.00% # number of executed instructions with N destination register operands 1598system.cpu1.CUs1.wavefronts08.dst_reg_operand_dist::2-3 0 0.00% 100.00% # number of executed instructions with N destination register operands 1599system.cpu1.CUs1.wavefronts08.dst_reg_operand_dist::overflows 0 0.00% 100.00% # number of executed instructions with N destination register operands 1600system.cpu1.CUs1.wavefronts08.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 1601system.cpu1.CUs1.wavefronts08.dst_reg_operand_dist::max_value 1 # number of executed instructions with N destination register operands 1602system.cpu1.CUs1.wavefronts08.dst_reg_operand_dist::total 34 # number of executed instructions with N destination register operands 1603system.cpu1.CUs1.wavefronts09.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 1604system.cpu1.CUs1.wavefronts09.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 1605system.cpu1.CUs1.wavefronts09.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 1606system.cpu1.CUs1.wavefronts09.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 1607system.cpu1.CUs1.wavefronts09.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 1608system.cpu1.CUs1.wavefronts09.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 1609system.cpu1.CUs1.wavefronts09.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 1610system.cpu1.CUs1.wavefronts09.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 1611system.cpu1.CUs1.wavefronts09.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 1612system.cpu1.CUs1.wavefronts09.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 1613system.cpu1.CUs1.wavefronts09.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 1614system.cpu1.CUs1.wavefronts09.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 1615system.cpu1.CUs1.wavefronts09.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 1616system.cpu1.CUs1.wavefronts09.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 1617system.cpu1.CUs1.wavefronts09.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 1618system.cpu1.CUs1.wavefronts09.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 1619system.cpu1.CUs1.wavefronts09.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 1620system.cpu1.CUs1.wavefronts09.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 1621system.cpu1.CUs1.wavefronts09.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 1622system.cpu1.CUs1.wavefronts09.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 1623system.cpu1.CUs1.wavefronts09.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 1624system.cpu1.CUs1.wavefronts09.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 1625system.cpu1.CUs1.wavefronts09.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 1626system.cpu1.CUs1.wavefronts09.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 1627system.cpu1.CUs1.wavefronts10.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 1628system.cpu1.CUs1.wavefronts10.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 1629system.cpu1.CUs1.wavefronts10.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 1630system.cpu1.CUs1.wavefronts10.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 1631system.cpu1.CUs1.wavefronts10.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 1632system.cpu1.CUs1.wavefronts10.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 1633system.cpu1.CUs1.wavefronts10.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 1634system.cpu1.CUs1.wavefronts10.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 1635system.cpu1.CUs1.wavefronts10.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 1636system.cpu1.CUs1.wavefronts10.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 1637system.cpu1.CUs1.wavefronts10.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 1638system.cpu1.CUs1.wavefronts10.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 1639system.cpu1.CUs1.wavefronts10.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 1640system.cpu1.CUs1.wavefronts10.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 1641system.cpu1.CUs1.wavefronts10.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 1642system.cpu1.CUs1.wavefronts10.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 1643system.cpu1.CUs1.wavefronts10.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 1644system.cpu1.CUs1.wavefronts10.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 1645system.cpu1.CUs1.wavefronts10.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 1646system.cpu1.CUs1.wavefronts10.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 1647system.cpu1.CUs1.wavefronts10.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 1648system.cpu1.CUs1.wavefronts10.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 1649system.cpu1.CUs1.wavefronts10.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 1650system.cpu1.CUs1.wavefronts10.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 1651system.cpu1.CUs1.wavefronts11.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 1652system.cpu1.CUs1.wavefronts11.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 1653system.cpu1.CUs1.wavefronts11.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 1654system.cpu1.CUs1.wavefronts11.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 1655system.cpu1.CUs1.wavefronts11.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 1656system.cpu1.CUs1.wavefronts11.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 1657system.cpu1.CUs1.wavefronts11.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 1658system.cpu1.CUs1.wavefronts11.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 1659system.cpu1.CUs1.wavefronts11.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 1660system.cpu1.CUs1.wavefronts11.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 1661system.cpu1.CUs1.wavefronts11.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 1662system.cpu1.CUs1.wavefronts11.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 1663system.cpu1.CUs1.wavefronts11.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 1664system.cpu1.CUs1.wavefronts11.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 1665system.cpu1.CUs1.wavefronts11.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 1666system.cpu1.CUs1.wavefronts11.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 1667system.cpu1.CUs1.wavefronts11.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 1668system.cpu1.CUs1.wavefronts11.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 1669system.cpu1.CUs1.wavefronts11.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 1670system.cpu1.CUs1.wavefronts11.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 1671system.cpu1.CUs1.wavefronts11.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 1672system.cpu1.CUs1.wavefronts11.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 1673system.cpu1.CUs1.wavefronts11.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 1674system.cpu1.CUs1.wavefronts11.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 1675system.cpu1.CUs1.wavefronts12.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 1676system.cpu1.CUs1.wavefronts12.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 1677system.cpu1.CUs1.wavefronts12.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 1678system.cpu1.CUs1.wavefronts12.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 1679system.cpu1.CUs1.wavefronts12.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 1680system.cpu1.CUs1.wavefronts12.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 1681system.cpu1.CUs1.wavefronts12.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 1682system.cpu1.CUs1.wavefronts12.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 1683system.cpu1.CUs1.wavefronts12.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 1684system.cpu1.CUs1.wavefronts12.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 1685system.cpu1.CUs1.wavefronts12.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 1686system.cpu1.CUs1.wavefronts12.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 1687system.cpu1.CUs1.wavefronts12.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 1688system.cpu1.CUs1.wavefronts12.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 1689system.cpu1.CUs1.wavefronts12.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 1690system.cpu1.CUs1.wavefronts12.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 1691system.cpu1.CUs1.wavefronts12.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 1692system.cpu1.CUs1.wavefronts12.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 1693system.cpu1.CUs1.wavefronts12.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 1694system.cpu1.CUs1.wavefronts12.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 1695system.cpu1.CUs1.wavefronts12.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 1696system.cpu1.CUs1.wavefronts12.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 1697system.cpu1.CUs1.wavefronts12.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 1698system.cpu1.CUs1.wavefronts12.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 1699system.cpu1.CUs1.wavefronts13.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 1700system.cpu1.CUs1.wavefronts13.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 1701system.cpu1.CUs1.wavefronts13.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 1702system.cpu1.CUs1.wavefronts13.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 1703system.cpu1.CUs1.wavefronts13.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 1704system.cpu1.CUs1.wavefronts13.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 1705system.cpu1.CUs1.wavefronts13.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 1706system.cpu1.CUs1.wavefronts13.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 1707system.cpu1.CUs1.wavefronts13.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 1708system.cpu1.CUs1.wavefronts13.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 1709system.cpu1.CUs1.wavefronts13.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 1710system.cpu1.CUs1.wavefronts13.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 1711system.cpu1.CUs1.wavefronts13.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 1712system.cpu1.CUs1.wavefronts13.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 1713system.cpu1.CUs1.wavefronts13.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 1714system.cpu1.CUs1.wavefronts13.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 1715system.cpu1.CUs1.wavefronts13.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 1716system.cpu1.CUs1.wavefronts13.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 1717system.cpu1.CUs1.wavefronts13.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 1718system.cpu1.CUs1.wavefronts13.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 1719system.cpu1.CUs1.wavefronts13.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 1720system.cpu1.CUs1.wavefronts13.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 1721system.cpu1.CUs1.wavefronts13.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 1722system.cpu1.CUs1.wavefronts13.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 1723system.cpu1.CUs1.wavefronts14.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 1724system.cpu1.CUs1.wavefronts14.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 1725system.cpu1.CUs1.wavefronts14.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 1726system.cpu1.CUs1.wavefronts14.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 1727system.cpu1.CUs1.wavefronts14.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 1728system.cpu1.CUs1.wavefronts14.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 1729system.cpu1.CUs1.wavefronts14.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 1730system.cpu1.CUs1.wavefronts14.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 1731system.cpu1.CUs1.wavefronts14.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 1732system.cpu1.CUs1.wavefronts14.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 1733system.cpu1.CUs1.wavefronts14.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 1734system.cpu1.CUs1.wavefronts14.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 1735system.cpu1.CUs1.wavefronts14.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 1736system.cpu1.CUs1.wavefronts14.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 1737system.cpu1.CUs1.wavefronts14.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 1738system.cpu1.CUs1.wavefronts14.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 1739system.cpu1.CUs1.wavefronts14.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 1740system.cpu1.CUs1.wavefronts14.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 1741system.cpu1.CUs1.wavefronts14.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 1742system.cpu1.CUs1.wavefronts14.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 1743system.cpu1.CUs1.wavefronts14.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 1744system.cpu1.CUs1.wavefronts14.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 1745system.cpu1.CUs1.wavefronts14.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 1746system.cpu1.CUs1.wavefronts14.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 1747system.cpu1.CUs1.wavefronts15.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 1748system.cpu1.CUs1.wavefronts15.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 1749system.cpu1.CUs1.wavefronts15.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 1750system.cpu1.CUs1.wavefronts15.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 1751system.cpu1.CUs1.wavefronts15.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 1752system.cpu1.CUs1.wavefronts15.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 1753system.cpu1.CUs1.wavefronts15.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 1754system.cpu1.CUs1.wavefronts15.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 1755system.cpu1.CUs1.wavefronts15.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 1756system.cpu1.CUs1.wavefronts15.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 1757system.cpu1.CUs1.wavefronts15.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 1758system.cpu1.CUs1.wavefronts15.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 1759system.cpu1.CUs1.wavefronts15.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 1760system.cpu1.CUs1.wavefronts15.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 1761system.cpu1.CUs1.wavefronts15.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 1762system.cpu1.CUs1.wavefronts15.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 1763system.cpu1.CUs1.wavefronts15.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 1764system.cpu1.CUs1.wavefronts15.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 1765system.cpu1.CUs1.wavefronts15.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 1766system.cpu1.CUs1.wavefronts15.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 1767system.cpu1.CUs1.wavefronts15.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 1768system.cpu1.CUs1.wavefronts15.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 1769system.cpu1.CUs1.wavefronts15.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 1770system.cpu1.CUs1.wavefronts15.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 1771system.cpu1.CUs1.wavefronts16.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 1772system.cpu1.CUs1.wavefronts16.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 1773system.cpu1.CUs1.wavefronts16.timesBlockedDueRAWDependencies 190 # number of times the wf's instructions are blocked due to RAW dependencies 1774system.cpu1.CUs1.wavefronts16.src_reg_operand_dist::samples 34 # number of executed instructions with N source register operands 1775system.cpu1.CUs1.wavefronts16.src_reg_operand_dist::mean 0.852941 # number of executed instructions with N source register operands 1776system.cpu1.CUs1.wavefronts16.src_reg_operand_dist::stdev 0.857493 # number of executed instructions with N source register operands 1777system.cpu1.CUs1.wavefronts16.src_reg_operand_dist::underflows 0 0.00% 0.00% # number of executed instructions with N source register operands 1778system.cpu1.CUs1.wavefronts16.src_reg_operand_dist::0-1 24 70.59% 70.59% # number of executed instructions with N source register operands 1779system.cpu1.CUs1.wavefronts16.src_reg_operand_dist::2-3 10 29.41% 100.00% # number of executed instructions with N source register operands 1780system.cpu1.CUs1.wavefronts16.src_reg_operand_dist::4 0 0.00% 100.00% # number of executed instructions with N source register operands 1781system.cpu1.CUs1.wavefronts16.src_reg_operand_dist::overflows 0 0.00% 100.00% # number of executed instructions with N source register operands 1782system.cpu1.CUs1.wavefronts16.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 1783system.cpu1.CUs1.wavefronts16.src_reg_operand_dist::max_value 2 # number of executed instructions with N source register operands 1784system.cpu1.CUs1.wavefronts16.src_reg_operand_dist::total 34 # number of executed instructions with N source register operands 1785system.cpu1.CUs1.wavefronts16.dst_reg_operand_dist::samples 34 # number of executed instructions with N destination register operands 1786system.cpu1.CUs1.wavefronts16.dst_reg_operand_dist::mean 0.617647 # number of executed instructions with N destination register operands 1787system.cpu1.CUs1.wavefronts16.dst_reg_operand_dist::stdev 0.493270 # number of executed instructions with N destination register operands 1788system.cpu1.CUs1.wavefronts16.dst_reg_operand_dist::underflows 0 0.00% 0.00% # number of executed instructions with N destination register operands 1789system.cpu1.CUs1.wavefronts16.dst_reg_operand_dist::0-1 34 100.00% 100.00% # number of executed instructions with N destination register operands 1790system.cpu1.CUs1.wavefronts16.dst_reg_operand_dist::2-3 0 0.00% 100.00% # number of executed instructions with N destination register operands 1791system.cpu1.CUs1.wavefronts16.dst_reg_operand_dist::overflows 0 0.00% 100.00% # number of executed instructions with N destination register operands 1792system.cpu1.CUs1.wavefronts16.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 1793system.cpu1.CUs1.wavefronts16.dst_reg_operand_dist::max_value 1 # number of executed instructions with N destination register operands 1794system.cpu1.CUs1.wavefronts16.dst_reg_operand_dist::total 34 # number of executed instructions with N destination register operands 1795system.cpu1.CUs1.wavefronts17.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 1796system.cpu1.CUs1.wavefronts17.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 1797system.cpu1.CUs1.wavefronts17.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 1798system.cpu1.CUs1.wavefronts17.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 1799system.cpu1.CUs1.wavefronts17.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 1800system.cpu1.CUs1.wavefronts17.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 1801system.cpu1.CUs1.wavefronts17.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 1802system.cpu1.CUs1.wavefronts17.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 1803system.cpu1.CUs1.wavefronts17.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 1804system.cpu1.CUs1.wavefronts17.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 1805system.cpu1.CUs1.wavefronts17.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 1806system.cpu1.CUs1.wavefronts17.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 1807system.cpu1.CUs1.wavefronts17.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 1808system.cpu1.CUs1.wavefronts17.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 1809system.cpu1.CUs1.wavefronts17.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 1810system.cpu1.CUs1.wavefronts17.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 1811system.cpu1.CUs1.wavefronts17.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 1812system.cpu1.CUs1.wavefronts17.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 1813system.cpu1.CUs1.wavefronts17.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 1814system.cpu1.CUs1.wavefronts17.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 1815system.cpu1.CUs1.wavefronts17.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 1816system.cpu1.CUs1.wavefronts17.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 1817system.cpu1.CUs1.wavefronts17.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 1818system.cpu1.CUs1.wavefronts17.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 1819system.cpu1.CUs1.wavefronts18.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 1820system.cpu1.CUs1.wavefronts18.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 1821system.cpu1.CUs1.wavefronts18.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 1822system.cpu1.CUs1.wavefronts18.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 1823system.cpu1.CUs1.wavefronts18.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 1824system.cpu1.CUs1.wavefronts18.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 1825system.cpu1.CUs1.wavefronts18.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 1826system.cpu1.CUs1.wavefronts18.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 1827system.cpu1.CUs1.wavefronts18.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 1828system.cpu1.CUs1.wavefronts18.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 1829system.cpu1.CUs1.wavefronts18.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 1830system.cpu1.CUs1.wavefronts18.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 1831system.cpu1.CUs1.wavefronts18.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 1832system.cpu1.CUs1.wavefronts18.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 1833system.cpu1.CUs1.wavefronts18.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 1834system.cpu1.CUs1.wavefronts18.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 1835system.cpu1.CUs1.wavefronts18.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 1836system.cpu1.CUs1.wavefronts18.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 1837system.cpu1.CUs1.wavefronts18.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 1838system.cpu1.CUs1.wavefronts18.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 1839system.cpu1.CUs1.wavefronts18.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 1840system.cpu1.CUs1.wavefronts18.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 1841system.cpu1.CUs1.wavefronts18.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 1842system.cpu1.CUs1.wavefronts18.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 1843system.cpu1.CUs1.wavefronts19.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 1844system.cpu1.CUs1.wavefronts19.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 1845system.cpu1.CUs1.wavefronts19.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 1846system.cpu1.CUs1.wavefronts19.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 1847system.cpu1.CUs1.wavefronts19.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 1848system.cpu1.CUs1.wavefronts19.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 1849system.cpu1.CUs1.wavefronts19.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 1850system.cpu1.CUs1.wavefronts19.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 1851system.cpu1.CUs1.wavefronts19.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 1852system.cpu1.CUs1.wavefronts19.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 1853system.cpu1.CUs1.wavefronts19.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 1854system.cpu1.CUs1.wavefronts19.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 1855system.cpu1.CUs1.wavefronts19.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 1856system.cpu1.CUs1.wavefronts19.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 1857system.cpu1.CUs1.wavefronts19.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 1858system.cpu1.CUs1.wavefronts19.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 1859system.cpu1.CUs1.wavefronts19.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 1860system.cpu1.CUs1.wavefronts19.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 1861system.cpu1.CUs1.wavefronts19.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 1862system.cpu1.CUs1.wavefronts19.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 1863system.cpu1.CUs1.wavefronts19.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 1864system.cpu1.CUs1.wavefronts19.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 1865system.cpu1.CUs1.wavefronts19.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 1866system.cpu1.CUs1.wavefronts19.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 1867system.cpu1.CUs1.wavefronts20.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 1868system.cpu1.CUs1.wavefronts20.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 1869system.cpu1.CUs1.wavefronts20.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 1870system.cpu1.CUs1.wavefronts20.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 1871system.cpu1.CUs1.wavefronts20.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 1872system.cpu1.CUs1.wavefronts20.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 1873system.cpu1.CUs1.wavefronts20.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 1874system.cpu1.CUs1.wavefronts20.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 1875system.cpu1.CUs1.wavefronts20.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 1876system.cpu1.CUs1.wavefronts20.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 1877system.cpu1.CUs1.wavefronts20.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 1878system.cpu1.CUs1.wavefronts20.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 1879system.cpu1.CUs1.wavefronts20.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 1880system.cpu1.CUs1.wavefronts20.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 1881system.cpu1.CUs1.wavefronts20.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 1882system.cpu1.CUs1.wavefronts20.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 1883system.cpu1.CUs1.wavefronts20.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 1884system.cpu1.CUs1.wavefronts20.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 1885system.cpu1.CUs1.wavefronts20.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 1886system.cpu1.CUs1.wavefronts20.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 1887system.cpu1.CUs1.wavefronts20.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 1888system.cpu1.CUs1.wavefronts20.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 1889system.cpu1.CUs1.wavefronts20.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 1890system.cpu1.CUs1.wavefronts20.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 1891system.cpu1.CUs1.wavefronts21.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 1892system.cpu1.CUs1.wavefronts21.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 1893system.cpu1.CUs1.wavefronts21.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 1894system.cpu1.CUs1.wavefronts21.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 1895system.cpu1.CUs1.wavefronts21.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 1896system.cpu1.CUs1.wavefronts21.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 1897system.cpu1.CUs1.wavefronts21.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 1898system.cpu1.CUs1.wavefronts21.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 1899system.cpu1.CUs1.wavefronts21.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 1900system.cpu1.CUs1.wavefronts21.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 1901system.cpu1.CUs1.wavefronts21.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 1902system.cpu1.CUs1.wavefronts21.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 1903system.cpu1.CUs1.wavefronts21.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 1904system.cpu1.CUs1.wavefronts21.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 1905system.cpu1.CUs1.wavefronts21.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 1906system.cpu1.CUs1.wavefronts21.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 1907system.cpu1.CUs1.wavefronts21.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 1908system.cpu1.CUs1.wavefronts21.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 1909system.cpu1.CUs1.wavefronts21.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 1910system.cpu1.CUs1.wavefronts21.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 1911system.cpu1.CUs1.wavefronts21.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 1912system.cpu1.CUs1.wavefronts21.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 1913system.cpu1.CUs1.wavefronts21.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 1914system.cpu1.CUs1.wavefronts21.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 1915system.cpu1.CUs1.wavefronts22.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 1916system.cpu1.CUs1.wavefronts22.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 1917system.cpu1.CUs1.wavefronts22.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 1918system.cpu1.CUs1.wavefronts22.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 1919system.cpu1.CUs1.wavefronts22.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 1920system.cpu1.CUs1.wavefronts22.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 1921system.cpu1.CUs1.wavefronts22.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 1922system.cpu1.CUs1.wavefronts22.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 1923system.cpu1.CUs1.wavefronts22.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 1924system.cpu1.CUs1.wavefronts22.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 1925system.cpu1.CUs1.wavefronts22.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 1926system.cpu1.CUs1.wavefronts22.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 1927system.cpu1.CUs1.wavefronts22.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 1928system.cpu1.CUs1.wavefronts22.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 1929system.cpu1.CUs1.wavefronts22.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 1930system.cpu1.CUs1.wavefronts22.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 1931system.cpu1.CUs1.wavefronts22.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 1932system.cpu1.CUs1.wavefronts22.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 1933system.cpu1.CUs1.wavefronts22.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 1934system.cpu1.CUs1.wavefronts22.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 1935system.cpu1.CUs1.wavefronts22.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 1936system.cpu1.CUs1.wavefronts22.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 1937system.cpu1.CUs1.wavefronts22.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 1938system.cpu1.CUs1.wavefronts22.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 1939system.cpu1.CUs1.wavefronts23.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 1940system.cpu1.CUs1.wavefronts23.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 1941system.cpu1.CUs1.wavefronts23.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 1942system.cpu1.CUs1.wavefronts23.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 1943system.cpu1.CUs1.wavefronts23.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 1944system.cpu1.CUs1.wavefronts23.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 1945system.cpu1.CUs1.wavefronts23.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 1946system.cpu1.CUs1.wavefronts23.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 1947system.cpu1.CUs1.wavefronts23.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 1948system.cpu1.CUs1.wavefronts23.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 1949system.cpu1.CUs1.wavefronts23.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 1950system.cpu1.CUs1.wavefronts23.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 1951system.cpu1.CUs1.wavefronts23.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 1952system.cpu1.CUs1.wavefronts23.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 1953system.cpu1.CUs1.wavefronts23.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 1954system.cpu1.CUs1.wavefronts23.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 1955system.cpu1.CUs1.wavefronts23.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 1956system.cpu1.CUs1.wavefronts23.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 1957system.cpu1.CUs1.wavefronts23.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 1958system.cpu1.CUs1.wavefronts23.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 1959system.cpu1.CUs1.wavefronts23.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 1960system.cpu1.CUs1.wavefronts23.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 1961system.cpu1.CUs1.wavefronts23.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 1962system.cpu1.CUs1.wavefronts23.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 1963system.cpu1.CUs1.wavefronts24.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 1964system.cpu1.CUs1.wavefronts24.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 1965system.cpu1.CUs1.wavefronts24.timesBlockedDueRAWDependencies 176 # number of times the wf's instructions are blocked due to RAW dependencies 1966system.cpu1.CUs1.wavefronts24.src_reg_operand_dist::samples 34 # number of executed instructions with N source register operands 1967system.cpu1.CUs1.wavefronts24.src_reg_operand_dist::mean 0.852941 # number of executed instructions with N source register operands 1968system.cpu1.CUs1.wavefronts24.src_reg_operand_dist::stdev 0.857493 # number of executed instructions with N source register operands 1969system.cpu1.CUs1.wavefronts24.src_reg_operand_dist::underflows 0 0.00% 0.00% # number of executed instructions with N source register operands 1970system.cpu1.CUs1.wavefronts24.src_reg_operand_dist::0-1 24 70.59% 70.59% # number of executed instructions with N source register operands 1971system.cpu1.CUs1.wavefronts24.src_reg_operand_dist::2-3 10 29.41% 100.00% # number of executed instructions with N source register operands 1972system.cpu1.CUs1.wavefronts24.src_reg_operand_dist::4 0 0.00% 100.00% # number of executed instructions with N source register operands 1973system.cpu1.CUs1.wavefronts24.src_reg_operand_dist::overflows 0 0.00% 100.00% # number of executed instructions with N source register operands 1974system.cpu1.CUs1.wavefronts24.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 1975system.cpu1.CUs1.wavefronts24.src_reg_operand_dist::max_value 2 # number of executed instructions with N source register operands 1976system.cpu1.CUs1.wavefronts24.src_reg_operand_dist::total 34 # number of executed instructions with N source register operands 1977system.cpu1.CUs1.wavefronts24.dst_reg_operand_dist::samples 34 # number of executed instructions with N destination register operands 1978system.cpu1.CUs1.wavefronts24.dst_reg_operand_dist::mean 0.617647 # number of executed instructions with N destination register operands 1979system.cpu1.CUs1.wavefronts24.dst_reg_operand_dist::stdev 0.493270 # number of executed instructions with N destination register operands 1980system.cpu1.CUs1.wavefronts24.dst_reg_operand_dist::underflows 0 0.00% 0.00% # number of executed instructions with N destination register operands 1981system.cpu1.CUs1.wavefronts24.dst_reg_operand_dist::0-1 34 100.00% 100.00% # number of executed instructions with N destination register operands 1982system.cpu1.CUs1.wavefronts24.dst_reg_operand_dist::2-3 0 0.00% 100.00% # number of executed instructions with N destination register operands 1983system.cpu1.CUs1.wavefronts24.dst_reg_operand_dist::overflows 0 0.00% 100.00% # number of executed instructions with N destination register operands 1984system.cpu1.CUs1.wavefronts24.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 1985system.cpu1.CUs1.wavefronts24.dst_reg_operand_dist::max_value 1 # number of executed instructions with N destination register operands 1986system.cpu1.CUs1.wavefronts24.dst_reg_operand_dist::total 34 # number of executed instructions with N destination register operands 1987system.cpu1.CUs1.wavefronts25.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 1988system.cpu1.CUs1.wavefronts25.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 1989system.cpu1.CUs1.wavefronts25.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 1990system.cpu1.CUs1.wavefronts25.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 1991system.cpu1.CUs1.wavefronts25.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 1992system.cpu1.CUs1.wavefronts25.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 1993system.cpu1.CUs1.wavefronts25.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 1994system.cpu1.CUs1.wavefronts25.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 1995system.cpu1.CUs1.wavefronts25.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 1996system.cpu1.CUs1.wavefronts25.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 1997system.cpu1.CUs1.wavefronts25.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 1998system.cpu1.CUs1.wavefronts25.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 1999system.cpu1.CUs1.wavefronts25.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 2000system.cpu1.CUs1.wavefronts25.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 2001system.cpu1.CUs1.wavefronts25.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 2002system.cpu1.CUs1.wavefronts25.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 2003system.cpu1.CUs1.wavefronts25.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 2004system.cpu1.CUs1.wavefronts25.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 2005system.cpu1.CUs1.wavefronts25.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 2006system.cpu1.CUs1.wavefronts25.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 2007system.cpu1.CUs1.wavefronts25.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 2008system.cpu1.CUs1.wavefronts25.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 2009system.cpu1.CUs1.wavefronts25.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 2010system.cpu1.CUs1.wavefronts25.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 2011system.cpu1.CUs1.wavefronts26.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 2012system.cpu1.CUs1.wavefronts26.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 2013system.cpu1.CUs1.wavefronts26.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 2014system.cpu1.CUs1.wavefronts26.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 2015system.cpu1.CUs1.wavefronts26.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 2016system.cpu1.CUs1.wavefronts26.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 2017system.cpu1.CUs1.wavefronts26.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 2018system.cpu1.CUs1.wavefronts26.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 2019system.cpu1.CUs1.wavefronts26.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 2020system.cpu1.CUs1.wavefronts26.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 2021system.cpu1.CUs1.wavefronts26.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 2022system.cpu1.CUs1.wavefronts26.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 2023system.cpu1.CUs1.wavefronts26.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 2024system.cpu1.CUs1.wavefronts26.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 2025system.cpu1.CUs1.wavefronts26.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 2026system.cpu1.CUs1.wavefronts26.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 2027system.cpu1.CUs1.wavefronts26.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 2028system.cpu1.CUs1.wavefronts26.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 2029system.cpu1.CUs1.wavefronts26.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 2030system.cpu1.CUs1.wavefronts26.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 2031system.cpu1.CUs1.wavefronts26.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 2032system.cpu1.CUs1.wavefronts26.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 2033system.cpu1.CUs1.wavefronts26.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 2034system.cpu1.CUs1.wavefronts26.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 2035system.cpu1.CUs1.wavefronts27.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 2036system.cpu1.CUs1.wavefronts27.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 2037system.cpu1.CUs1.wavefronts27.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 2038system.cpu1.CUs1.wavefronts27.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 2039system.cpu1.CUs1.wavefronts27.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 2040system.cpu1.CUs1.wavefronts27.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 2041system.cpu1.CUs1.wavefronts27.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 2042system.cpu1.CUs1.wavefronts27.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 2043system.cpu1.CUs1.wavefronts27.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 2044system.cpu1.CUs1.wavefronts27.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 2045system.cpu1.CUs1.wavefronts27.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 2046system.cpu1.CUs1.wavefronts27.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 2047system.cpu1.CUs1.wavefronts27.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 2048system.cpu1.CUs1.wavefronts27.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 2049system.cpu1.CUs1.wavefronts27.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 2050system.cpu1.CUs1.wavefronts27.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 2051system.cpu1.CUs1.wavefronts27.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 2052system.cpu1.CUs1.wavefronts27.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 2053system.cpu1.CUs1.wavefronts27.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 2054system.cpu1.CUs1.wavefronts27.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 2055system.cpu1.CUs1.wavefronts27.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 2056system.cpu1.CUs1.wavefronts27.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 2057system.cpu1.CUs1.wavefronts27.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 2058system.cpu1.CUs1.wavefronts27.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 2059system.cpu1.CUs1.wavefronts28.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 2060system.cpu1.CUs1.wavefronts28.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 2061system.cpu1.CUs1.wavefronts28.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 2062system.cpu1.CUs1.wavefronts28.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 2063system.cpu1.CUs1.wavefronts28.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 2064system.cpu1.CUs1.wavefronts28.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 2065system.cpu1.CUs1.wavefronts28.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 2066system.cpu1.CUs1.wavefronts28.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 2067system.cpu1.CUs1.wavefronts28.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 2068system.cpu1.CUs1.wavefronts28.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 2069system.cpu1.CUs1.wavefronts28.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 2070system.cpu1.CUs1.wavefronts28.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 2071system.cpu1.CUs1.wavefronts28.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 2072system.cpu1.CUs1.wavefronts28.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 2073system.cpu1.CUs1.wavefronts28.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 2074system.cpu1.CUs1.wavefronts28.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 2075system.cpu1.CUs1.wavefronts28.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 2076system.cpu1.CUs1.wavefronts28.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 2077system.cpu1.CUs1.wavefronts28.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 2078system.cpu1.CUs1.wavefronts28.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 2079system.cpu1.CUs1.wavefronts28.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 2080system.cpu1.CUs1.wavefronts28.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 2081system.cpu1.CUs1.wavefronts28.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 2082system.cpu1.CUs1.wavefronts28.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 2083system.cpu1.CUs1.wavefronts29.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 2084system.cpu1.CUs1.wavefronts29.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 2085system.cpu1.CUs1.wavefronts29.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 2086system.cpu1.CUs1.wavefronts29.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 2087system.cpu1.CUs1.wavefronts29.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 2088system.cpu1.CUs1.wavefronts29.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 2089system.cpu1.CUs1.wavefronts29.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 2090system.cpu1.CUs1.wavefronts29.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 2091system.cpu1.CUs1.wavefronts29.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 2092system.cpu1.CUs1.wavefronts29.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 2093system.cpu1.CUs1.wavefronts29.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 2094system.cpu1.CUs1.wavefronts29.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 2095system.cpu1.CUs1.wavefronts29.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 2096system.cpu1.CUs1.wavefronts29.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 2097system.cpu1.CUs1.wavefronts29.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 2098system.cpu1.CUs1.wavefronts29.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 2099system.cpu1.CUs1.wavefronts29.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 2100system.cpu1.CUs1.wavefronts29.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 2101system.cpu1.CUs1.wavefronts29.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 2102system.cpu1.CUs1.wavefronts29.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 2103system.cpu1.CUs1.wavefronts29.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 2104system.cpu1.CUs1.wavefronts29.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 2105system.cpu1.CUs1.wavefronts29.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 2106system.cpu1.CUs1.wavefronts29.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 2107system.cpu1.CUs1.wavefronts30.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 2108system.cpu1.CUs1.wavefronts30.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 2109system.cpu1.CUs1.wavefronts30.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 2110system.cpu1.CUs1.wavefronts30.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 2111system.cpu1.CUs1.wavefronts30.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 2112system.cpu1.CUs1.wavefronts30.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 2113system.cpu1.CUs1.wavefronts30.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 2114system.cpu1.CUs1.wavefronts30.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 2115system.cpu1.CUs1.wavefronts30.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 2116system.cpu1.CUs1.wavefronts30.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 2117system.cpu1.CUs1.wavefronts30.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 2118system.cpu1.CUs1.wavefronts30.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 2119system.cpu1.CUs1.wavefronts30.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 2120system.cpu1.CUs1.wavefronts30.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 2121system.cpu1.CUs1.wavefronts30.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 2122system.cpu1.CUs1.wavefronts30.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 2123system.cpu1.CUs1.wavefronts30.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 2124system.cpu1.CUs1.wavefronts30.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 2125system.cpu1.CUs1.wavefronts30.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 2126system.cpu1.CUs1.wavefronts30.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 2127system.cpu1.CUs1.wavefronts30.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 2128system.cpu1.CUs1.wavefronts30.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 2129system.cpu1.CUs1.wavefronts30.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 2130system.cpu1.CUs1.wavefronts30.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 2131system.cpu1.CUs1.wavefronts31.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability 2132system.cpu1.CUs1.wavefronts31.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies 2133system.cpu1.CUs1.wavefronts31.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies 2134system.cpu1.CUs1.wavefronts31.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands 2135system.cpu1.CUs1.wavefronts31.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands 2136system.cpu1.CUs1.wavefronts31.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands 2137system.cpu1.CUs1.wavefronts31.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands 2138system.cpu1.CUs1.wavefronts31.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands 2139system.cpu1.CUs1.wavefronts31.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands 2140system.cpu1.CUs1.wavefronts31.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands 2141system.cpu1.CUs1.wavefronts31.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands 2142system.cpu1.CUs1.wavefronts31.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands 2143system.cpu1.CUs1.wavefronts31.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands 2144system.cpu1.CUs1.wavefronts31.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands 2145system.cpu1.CUs1.wavefronts31.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands 2146system.cpu1.CUs1.wavefronts31.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands 2147system.cpu1.CUs1.wavefronts31.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands 2148system.cpu1.CUs1.wavefronts31.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands 2149system.cpu1.CUs1.wavefronts31.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands 2150system.cpu1.CUs1.wavefronts31.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands 2151system.cpu1.CUs1.wavefronts31.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands 2152system.cpu1.CUs1.wavefronts31.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands 2153system.cpu1.CUs1.wavefronts31.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands 2154system.cpu1.CUs1.wavefronts31.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands 2155system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::samples 43 # For each instruction fetch request recieved record how many instructions you got from it 2156system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::mean 5.813953 # For each instruction fetch request recieved record how many instructions you got from it 2157system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::stdev 2.683777 # For each instruction fetch request recieved record how many instructions you got from it 2158system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::underflows 0 0.00% 0.00% # For each instruction fetch request recieved record how many instructions you got from it 2159system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::1 0 0.00% 0.00% # For each instruction fetch request recieved record how many instructions you got from it 2160system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::2 8 18.60% 18.60% # For each instruction fetch request recieved record how many instructions you got from it 2161system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::3 8 18.60% 37.21% # For each instruction fetch request recieved record how many instructions you got from it 2162system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::4 1 2.33% 39.53% # For each instruction fetch request recieved record how many instructions you got from it 2163system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::5 0 0.00% 39.53% # For each instruction fetch request recieved record how many instructions you got from it 2164system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::6 1 2.33% 41.86% # For each instruction fetch request recieved record how many instructions you got from it 2165system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::7 0 0.00% 41.86% # For each instruction fetch request recieved record how many instructions you got from it 2166system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::8 25 58.14% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 2167system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::9 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 2168system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::10 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 2169system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::11 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 2170system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::12 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 2171system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::13 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 2172system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::14 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 2173system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::15 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 2174system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::16 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 2175system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::17 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 2176system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::18 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 2177system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::19 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 2178system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::20 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 2179system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::21 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 2180system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::22 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 2181system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::23 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 2182system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::24 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 2183system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::25 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 2184system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::26 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 2185system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::27 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 2186system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::28 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 2187system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::29 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 2188system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::30 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 2189system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::31 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 2190system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::32 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 2191system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::overflows 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it 2192system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::min_value 2 # For each instruction fetch request recieved record how many instructions you got from it 2193system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::max_value 8 # For each instruction fetch request recieved record how many instructions you got from it 2194system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::total 43 # For each instruction fetch request recieved record how many instructions you got from it 2195system.cpu1.CUs1.ExecStage.num_cycles_with_no_issue 4667 # number of cycles the CU issues nothing 2196system.cpu1.CUs1.ExecStage.num_cycles_with_instr_issued 98 # number of cycles the CU issued at least one instruction 2197system.cpu1.CUs1.ExecStage.num_cycles_with_instrtype_issue::ALU0 30 # Number of cycles at least one instruction of specific type issued 2198system.cpu1.CUs1.ExecStage.num_cycles_with_instrtype_issue::ALU1 29 # Number of cycles at least one instruction of specific type issued 2199system.cpu1.CUs1.ExecStage.num_cycles_with_instrtype_issue::ALU2 29 # Number of cycles at least one instruction of specific type issued 2200system.cpu1.CUs1.ExecStage.num_cycles_with_instrtype_issue::ALU3 29 # Number of cycles at least one instruction of specific type issued 2201system.cpu1.CUs1.ExecStage.num_cycles_with_instrtype_issue::GM 18 # Number of cycles at least one instruction of specific type issued 2202system.cpu1.CUs1.ExecStage.num_cycles_with_instrtype_issue::LM 6 # Number of cycles at least one instruction of specific type issued 2203system.cpu1.CUs1.ExecStage.num_cycles_with_instr_type_no_issue::ALU0 2052 # Number of cycles no instruction of specific type issued 2204system.cpu1.CUs1.ExecStage.num_cycles_with_instr_type_no_issue::ALU1 327 # Number of cycles no instruction of specific type issued 2205system.cpu1.CUs1.ExecStage.num_cycles_with_instr_type_no_issue::ALU2 265 # Number of cycles no instruction of specific type issued 2206system.cpu1.CUs1.ExecStage.num_cycles_with_instr_type_no_issue::ALU3 285 # Number of cycles no instruction of specific type issued 2207system.cpu1.CUs1.ExecStage.num_cycles_with_instr_type_no_issue::GM 341 # Number of cycles no instruction of specific type issued 2208system.cpu1.CUs1.ExecStage.num_cycles_with_instr_type_no_issue::LM 32 # Number of cycles no instruction of specific type issued 2209system.cpu1.CUs1.ExecStage.spc::samples 4765 # Execution units active per cycle (Exec unit=SIMD,MemPipe) 2210system.cpu1.CUs1.ExecStage.spc::mean 0.029591 # Execution units active per cycle (Exec unit=SIMD,MemPipe) 2211system.cpu1.CUs1.ExecStage.spc::stdev 0.218204 # Execution units active per cycle (Exec unit=SIMD,MemPipe) 2212system.cpu1.CUs1.ExecStage.spc::underflows 0 0.00% 0.00% # Execution units active per cycle (Exec unit=SIMD,MemPipe) 2213system.cpu1.CUs1.ExecStage.spc::0 4667 97.94% 97.94% # Execution units active per cycle (Exec unit=SIMD,MemPipe) 2214system.cpu1.CUs1.ExecStage.spc::1 57 1.20% 99.14% # Execution units active per cycle (Exec unit=SIMD,MemPipe) 2215system.cpu1.CUs1.ExecStage.spc::2 39 0.82% 99.96% # Execution units active per cycle (Exec unit=SIMD,MemPipe) 2216system.cpu1.CUs1.ExecStage.spc::3 2 0.04% 100.00% # Execution units active per cycle (Exec unit=SIMD,MemPipe) 2217system.cpu1.CUs1.ExecStage.spc::4 0 0.00% 100.00% # Execution units active per cycle (Exec unit=SIMD,MemPipe) 2218system.cpu1.CUs1.ExecStage.spc::5 0 0.00% 100.00% # Execution units active per cycle (Exec unit=SIMD,MemPipe) 2219system.cpu1.CUs1.ExecStage.spc::6 0 0.00% 100.00% # Execution units active per cycle (Exec unit=SIMD,MemPipe) 2220system.cpu1.CUs1.ExecStage.spc::overflows 0 0.00% 100.00% # Execution units active per cycle (Exec unit=SIMD,MemPipe) 2221system.cpu1.CUs1.ExecStage.spc::min_value 0 # Execution units active per cycle (Exec unit=SIMD,MemPipe) 2222system.cpu1.CUs1.ExecStage.spc::max_value 3 # Execution units active per cycle (Exec unit=SIMD,MemPipe) 2223system.cpu1.CUs1.ExecStage.spc::total 4765 # Execution units active per cycle (Exec unit=SIMD,MemPipe) 2224system.cpu1.CUs1.ExecStage.num_transitions_active_to_idle 68 # number of CU transitions from active to idle 2225system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::samples 68 # duration of idle periods in cycles 2226system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::mean 61 # duration of idle periods in cycles 2227system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::stdev 257.808908 # duration of idle periods in cycles 2228system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::underflows 0 0.00% 0.00% # duration of idle periods in cycles 2229system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::0-4 49 72.06% 72.06% # duration of idle periods in cycles 2230system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::5-9 8 11.76% 83.82% # duration of idle periods in cycles 2231system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::10-14 0 0.00% 83.82% # duration of idle periods in cycles 2232system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::15-19 2 2.94% 86.76% # duration of idle periods in cycles 2233system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::20-24 1 1.47% 88.24% # duration of idle periods in cycles 2234system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::25-29 1 1.47% 89.71% # duration of idle periods in cycles 2235system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::30-34 0 0.00% 89.71% # duration of idle periods in cycles 2236system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::35-39 0 0.00% 89.71% # duration of idle periods in cycles 2237system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::40-44 0 0.00% 89.71% # duration of idle periods in cycles 2238system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::45-49 0 0.00% 89.71% # duration of idle periods in cycles 2239system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::50-54 0 0.00% 89.71% # duration of idle periods in cycles 2240system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::55-59 0 0.00% 89.71% # duration of idle periods in cycles 2241system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::60-64 0 0.00% 89.71% # duration of idle periods in cycles 2242system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::65-69 0 0.00% 89.71% # duration of idle periods in cycles 2243system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::70-74 0 0.00% 89.71% # duration of idle periods in cycles 2244system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::75 0 0.00% 89.71% # duration of idle periods in cycles 2245system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::overflows 7 10.29% 100.00% # duration of idle periods in cycles 2246system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::min_value 1 # duration of idle periods in cycles 2247system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::max_value 1764 # duration of idle periods in cycles 2248system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::total 68 # duration of idle periods in cycles 2249system.cpu1.CUs1.GlobalMemPipeline.load_vrf_bank_conflict_cycles 0 # total number of cycles GM data are delayed before updating the VRF 2250system.cpu1.CUs1.LocalMemPipeline.load_vrf_bank_conflict_cycles 0 # total number of cycles LDS data are delayed before updating the VRF 2251system.cpu1.CUs1.tlb_requests 769 # number of uncoalesced requests 2252system.cpu1.CUs1.tlb_cycles -212991830500 # total number of cycles for all uncoalesced requests 2253system.cpu1.CUs1.avg_translation_latency -276972471.391417 # Avg. translation latency for data translations 2254system.cpu1.CUs1.TLB_hits_distribution::page_table 769 # TLB hits distribution (0 for page table, x for Lx-TLB 2255system.cpu1.CUs1.TLB_hits_distribution::L1_TLB 0 # TLB hits distribution (0 for page table, x for Lx-TLB 2256system.cpu1.CUs1.TLB_hits_distribution::L2_TLB 0 # TLB hits distribution (0 for page table, x for Lx-TLB 2257system.cpu1.CUs1.TLB_hits_distribution::L3_TLB 0 # TLB hits distribution (0 for page table, x for Lx-TLB 2258system.cpu1.CUs1.lds_bank_access_cnt 53 # Total number of LDS bank accesses 2259system.cpu1.CUs1.lds_bank_conflicts::samples 6 # Number of bank conflicts per LDS memory packet 2260system.cpu1.CUs1.lds_bank_conflicts::mean 7.833333 # Number of bank conflicts per LDS memory packet 2261system.cpu1.CUs1.lds_bank_conflicts::stdev 6.080022 # Number of bank conflicts per LDS memory packet 2262system.cpu1.CUs1.lds_bank_conflicts::underflows 0 0.00% 0.00% # Number of bank conflicts per LDS memory packet 2263system.cpu1.CUs1.lds_bank_conflicts::0-1 2 33.33% 33.33% # Number of bank conflicts per LDS memory packet 2264system.cpu1.CUs1.lds_bank_conflicts::2-3 0 0.00% 33.33% # Number of bank conflicts per LDS memory packet 2265system.cpu1.CUs1.lds_bank_conflicts::4-5 0 0.00% 33.33% # Number of bank conflicts per LDS memory packet 2266system.cpu1.CUs1.lds_bank_conflicts::6-7 0 0.00% 33.33% # Number of bank conflicts per LDS memory packet 2267system.cpu1.CUs1.lds_bank_conflicts::8-9 0 0.00% 33.33% # Number of bank conflicts per LDS memory packet 2268system.cpu1.CUs1.lds_bank_conflicts::10-11 1 16.67% 50.00% # Number of bank conflicts per LDS memory packet 2269system.cpu1.CUs1.lds_bank_conflicts::12-13 3 50.00% 100.00% # Number of bank conflicts per LDS memory packet 2270system.cpu1.CUs1.lds_bank_conflicts::14-15 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 2271system.cpu1.CUs1.lds_bank_conflicts::16-17 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 2272system.cpu1.CUs1.lds_bank_conflicts::18-19 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 2273system.cpu1.CUs1.lds_bank_conflicts::20-21 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 2274system.cpu1.CUs1.lds_bank_conflicts::22-23 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 2275system.cpu1.CUs1.lds_bank_conflicts::24-25 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 2276system.cpu1.CUs1.lds_bank_conflicts::26-27 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 2277system.cpu1.CUs1.lds_bank_conflicts::28-29 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 2278system.cpu1.CUs1.lds_bank_conflicts::30-31 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 2279system.cpu1.CUs1.lds_bank_conflicts::32-33 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 2280system.cpu1.CUs1.lds_bank_conflicts::34-35 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 2281system.cpu1.CUs1.lds_bank_conflicts::36-37 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 2282system.cpu1.CUs1.lds_bank_conflicts::38-39 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 2283system.cpu1.CUs1.lds_bank_conflicts::40-41 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 2284system.cpu1.CUs1.lds_bank_conflicts::42-43 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 2285system.cpu1.CUs1.lds_bank_conflicts::44-45 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 2286system.cpu1.CUs1.lds_bank_conflicts::46-47 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 2287system.cpu1.CUs1.lds_bank_conflicts::48-49 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 2288system.cpu1.CUs1.lds_bank_conflicts::50-51 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 2289system.cpu1.CUs1.lds_bank_conflicts::52-53 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 2290system.cpu1.CUs1.lds_bank_conflicts::54-55 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 2291system.cpu1.CUs1.lds_bank_conflicts::56-57 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 2292system.cpu1.CUs1.lds_bank_conflicts::58-59 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 2293system.cpu1.CUs1.lds_bank_conflicts::60-61 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 2294system.cpu1.CUs1.lds_bank_conflicts::62-63 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 2295system.cpu1.CUs1.lds_bank_conflicts::64 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 2296system.cpu1.CUs1.lds_bank_conflicts::overflows 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet 2297system.cpu1.CUs1.lds_bank_conflicts::min_value 0 # Number of bank conflicts per LDS memory packet 2298system.cpu1.CUs1.lds_bank_conflicts::max_value 12 # Number of bank conflicts per LDS memory packet 2299system.cpu1.CUs1.lds_bank_conflicts::total 6 # Number of bank conflicts per LDS memory packet 2300system.cpu1.CUs1.page_divergence_dist::samples 17 # pages touched per wf (over all mem. instr.) 2301system.cpu1.CUs1.page_divergence_dist::mean 1 # pages touched per wf (over all mem. instr.) 2302system.cpu1.CUs1.page_divergence_dist::stdev 0 # pages touched per wf (over all mem. instr.) 2303system.cpu1.CUs1.page_divergence_dist::underflows 0 0.00% 0.00% # pages touched per wf (over all mem. instr.) 2304system.cpu1.CUs1.page_divergence_dist::1-4 17 100.00% 100.00% # pages touched per wf (over all mem. instr.) 2305system.cpu1.CUs1.page_divergence_dist::5-8 0 0.00% 100.00% # pages touched per wf (over all mem. instr.) 2306system.cpu1.CUs1.page_divergence_dist::9-12 0 0.00% 100.00% # pages touched per wf (over all mem. instr.) 2307system.cpu1.CUs1.page_divergence_dist::13-16 0 0.00% 100.00% # pages touched per wf (over all mem. instr.) 2308system.cpu1.CUs1.page_divergence_dist::17-20 0 0.00% 100.00% # pages touched per wf (over all mem. instr.) 2309system.cpu1.CUs1.page_divergence_dist::21-24 0 0.00% 100.00% # pages touched per wf (over all mem. instr.) 2310system.cpu1.CUs1.page_divergence_dist::25-28 0 0.00% 100.00% # pages touched per wf (over all mem. instr.) 2311system.cpu1.CUs1.page_divergence_dist::29-32 0 0.00% 100.00% # pages touched per wf (over all mem. instr.) 2312system.cpu1.CUs1.page_divergence_dist::33-36 0 0.00% 100.00% # pages touched per wf (over all mem. instr.) 2313system.cpu1.CUs1.page_divergence_dist::37-40 0 0.00% 100.00% # pages touched per wf (over all mem. instr.) 2314system.cpu1.CUs1.page_divergence_dist::41-44 0 0.00% 100.00% # pages touched per wf (over all mem. instr.) 2315system.cpu1.CUs1.page_divergence_dist::45-48 0 0.00% 100.00% # pages touched per wf (over all mem. instr.) 2316system.cpu1.CUs1.page_divergence_dist::49-52 0 0.00% 100.00% # pages touched per wf (over all mem. instr.) 2317system.cpu1.CUs1.page_divergence_dist::53-56 0 0.00% 100.00% # pages touched per wf (over all mem. instr.) 2318system.cpu1.CUs1.page_divergence_dist::57-60 0 0.00% 100.00% # pages touched per wf (over all mem. instr.) 2319system.cpu1.CUs1.page_divergence_dist::61-64 0 0.00% 100.00% # pages touched per wf (over all mem. instr.) 2320system.cpu1.CUs1.page_divergence_dist::overflows 0 0.00% 100.00% # pages touched per wf (over all mem. instr.) 2321system.cpu1.CUs1.page_divergence_dist::min_value 1 # pages touched per wf (over all mem. instr.) 2322system.cpu1.CUs1.page_divergence_dist::max_value 1 # pages touched per wf (over all mem. instr.) 2323system.cpu1.CUs1.page_divergence_dist::total 17 # pages touched per wf (over all mem. instr.) 2324system.cpu1.CUs1.global_mem_instr_cnt 17 # dynamic global memory instructions count 2325system.cpu1.CUs1.local_mem_instr_cnt 6 # dynamic local memory intruction count 2326system.cpu1.CUs1.wg_blocked_due_lds_alloc 0 # Workgroup blocked due to LDS capacity 2327system.cpu1.CUs1.num_instr_executed 141 # number of instructions executed 2328system.cpu1.CUs1.inst_exec_rate::samples 141 # Instruction Execution Rate: Number of executed vector instructions per cycle 2329system.cpu1.CUs1.inst_exec_rate::mean 82.212766 # Instruction Execution Rate: Number of executed vector instructions per cycle 2330system.cpu1.CUs1.inst_exec_rate::stdev 248.914352 # Instruction Execution Rate: Number of executed vector instructions per cycle 2331system.cpu1.CUs1.inst_exec_rate::underflows 0 0.00% 0.00% # Instruction Execution Rate: Number of executed vector instructions per cycle 2332system.cpu1.CUs1.inst_exec_rate::0-1 1 0.71% 0.71% # Instruction Execution Rate: Number of executed vector instructions per cycle 2333system.cpu1.CUs1.inst_exec_rate::2-3 12 8.51% 9.22% # Instruction Execution Rate: Number of executed vector instructions per cycle 2334system.cpu1.CUs1.inst_exec_rate::4-5 53 37.59% 46.81% # Instruction Execution Rate: Number of executed vector instructions per cycle 2335system.cpu1.CUs1.inst_exec_rate::6-7 28 19.86% 66.67% # Instruction Execution Rate: Number of executed vector instructions per cycle 2336system.cpu1.CUs1.inst_exec_rate::8-9 5 3.55% 70.21% # Instruction Execution Rate: Number of executed vector instructions per cycle 2337system.cpu1.CUs1.inst_exec_rate::10 1 0.71% 70.92% # Instruction Execution Rate: Number of executed vector instructions per cycle 2338system.cpu1.CUs1.inst_exec_rate::overflows 41 29.08% 100.00% # Instruction Execution Rate: Number of executed vector instructions per cycle 2339system.cpu1.CUs1.inst_exec_rate::min_value 1 # Instruction Execution Rate: Number of executed vector instructions per cycle 2340system.cpu1.CUs1.inst_exec_rate::max_value 1765 # Instruction Execution Rate: Number of executed vector instructions per cycle 2341system.cpu1.CUs1.inst_exec_rate::total 141 # Instruction Execution Rate: Number of executed vector instructions per cycle 2342system.cpu1.CUs1.num_vec_ops_executed 6762 # number of vec ops executed (e.g. VSZ/inst) 2343system.cpu1.CUs1.num_total_cycles 4765 # number of cycles the CU ran for 2344system.cpu1.CUs1.vpc 1.419098 # Vector Operations per cycle (this CU only) 2345system.cpu1.CUs1.ipc 0.029591 # Instructions per cycle (this CU only) 2346system.cpu1.CUs1.warp_execution_dist::samples 141 # number of lanes active per instruction (oval all instructions) 2347system.cpu1.CUs1.warp_execution_dist::mean 47.957447 # number of lanes active per instruction (oval all instructions) 2348system.cpu1.CUs1.warp_execution_dist::stdev 23.818022 # number of lanes active per instruction (oval all instructions) 2349system.cpu1.CUs1.warp_execution_dist::underflows 0 0.00% 0.00% # number of lanes active per instruction (oval all instructions) 2350system.cpu1.CUs1.warp_execution_dist::1-4 5 3.55% 3.55% # number of lanes active per instruction (oval all instructions) 2351system.cpu1.CUs1.warp_execution_dist::5-8 0 0.00% 3.55% # number of lanes active per instruction (oval all instructions) 2352system.cpu1.CUs1.warp_execution_dist::9-12 9 6.38% 9.93% # number of lanes active per instruction (oval all instructions) 2353system.cpu1.CUs1.warp_execution_dist::13-16 27 19.15% 29.08% # number of lanes active per instruction (oval all instructions) 2354system.cpu1.CUs1.warp_execution_dist::17-20 0 0.00% 29.08% # number of lanes active per instruction (oval all instructions) 2355system.cpu1.CUs1.warp_execution_dist::21-24 0 0.00% 29.08% # number of lanes active per instruction (oval all instructions) 2356system.cpu1.CUs1.warp_execution_dist::25-28 0 0.00% 29.08% # number of lanes active per instruction (oval all instructions) 2357system.cpu1.CUs1.warp_execution_dist::29-32 0 0.00% 29.08% # number of lanes active per instruction (oval all instructions) 2358system.cpu1.CUs1.warp_execution_dist::33-36 0 0.00% 29.08% # number of lanes active per instruction (oval all instructions) 2359system.cpu1.CUs1.warp_execution_dist::37-40 0 0.00% 29.08% # number of lanes active per instruction (oval all instructions) 2360system.cpu1.CUs1.warp_execution_dist::41-44 0 0.00% 29.08% # number of lanes active per instruction (oval all instructions) 2361system.cpu1.CUs1.warp_execution_dist::45-48 0 0.00% 29.08% # number of lanes active per instruction (oval all instructions) 2362system.cpu1.CUs1.warp_execution_dist::49-52 8 5.67% 34.75% # number of lanes active per instruction (oval all instructions) 2363system.cpu1.CUs1.warp_execution_dist::53-56 0 0.00% 34.75% # number of lanes active per instruction (oval all instructions) 2364system.cpu1.CUs1.warp_execution_dist::57-60 0 0.00% 34.75% # number of lanes active per instruction (oval all instructions) 2365system.cpu1.CUs1.warp_execution_dist::61-64 92 65.25% 100.00% # number of lanes active per instruction (oval all instructions) 2366system.cpu1.CUs1.warp_execution_dist::overflows 0 0.00% 100.00% # number of lanes active per instruction (oval all instructions) 2367system.cpu1.CUs1.warp_execution_dist::min_value 1 # number of lanes active per instruction (oval all instructions) 2368system.cpu1.CUs1.warp_execution_dist::max_value 64 # number of lanes active per instruction (oval all instructions) 2369system.cpu1.CUs1.warp_execution_dist::total 141 # number of lanes active per instruction (oval all instructions) 2370system.cpu1.CUs1.gmem_lanes_execution_dist::samples 18 # number of active lanes per global memory instruction 2371system.cpu1.CUs1.gmem_lanes_execution_dist::mean 37.722222 # number of active lanes per global memory instruction 2372system.cpu1.CUs1.gmem_lanes_execution_dist::stdev 27.174394 # number of active lanes per global memory instruction 2373system.cpu1.CUs1.gmem_lanes_execution_dist::underflows 0 0.00% 0.00% # number of active lanes per global memory instruction 2374system.cpu1.CUs1.gmem_lanes_execution_dist::1-4 1 5.56% 5.56% # number of active lanes per global memory instruction 2375system.cpu1.CUs1.gmem_lanes_execution_dist::5-8 0 0.00% 5.56% # number of active lanes per global memory instruction 2376system.cpu1.CUs1.gmem_lanes_execution_dist::9-12 2 11.11% 16.67% # number of active lanes per global memory instruction 2377system.cpu1.CUs1.gmem_lanes_execution_dist::13-16 6 33.33% 50.00% # number of active lanes per global memory instruction 2378system.cpu1.CUs1.gmem_lanes_execution_dist::17-20 0 0.00% 50.00% # number of active lanes per global memory instruction 2379system.cpu1.CUs1.gmem_lanes_execution_dist::21-24 0 0.00% 50.00% # number of active lanes per global memory instruction 2380system.cpu1.CUs1.gmem_lanes_execution_dist::25-28 0 0.00% 50.00% # number of active lanes per global memory instruction 2381system.cpu1.CUs1.gmem_lanes_execution_dist::29-32 0 0.00% 50.00% # number of active lanes per global memory instruction 2382system.cpu1.CUs1.gmem_lanes_execution_dist::33-36 0 0.00% 50.00% # number of active lanes per global memory instruction 2383system.cpu1.CUs1.gmem_lanes_execution_dist::37-40 0 0.00% 50.00% # number of active lanes per global memory instruction 2384system.cpu1.CUs1.gmem_lanes_execution_dist::41-44 0 0.00% 50.00% # number of active lanes per global memory instruction 2385system.cpu1.CUs1.gmem_lanes_execution_dist::45-48 0 0.00% 50.00% # number of active lanes per global memory instruction 2386system.cpu1.CUs1.gmem_lanes_execution_dist::49-52 0 0.00% 50.00% # number of active lanes per global memory instruction 2387system.cpu1.CUs1.gmem_lanes_execution_dist::53-56 0 0.00% 50.00% # number of active lanes per global memory instruction 2388system.cpu1.CUs1.gmem_lanes_execution_dist::57-60 0 0.00% 50.00% # number of active lanes per global memory instruction 2389system.cpu1.CUs1.gmem_lanes_execution_dist::61-64 9 50.00% 100.00% # number of active lanes per global memory instruction 2390system.cpu1.CUs1.gmem_lanes_execution_dist::overflows 0 0.00% 100.00% # number of active lanes per global memory instruction 2391system.cpu1.CUs1.gmem_lanes_execution_dist::min_value 1 # number of active lanes per global memory instruction 2392system.cpu1.CUs1.gmem_lanes_execution_dist::max_value 64 # number of active lanes per global memory instruction 2393system.cpu1.CUs1.gmem_lanes_execution_dist::total 18 # number of active lanes per global memory instruction 2394system.cpu1.CUs1.lmem_lanes_execution_dist::samples 6 # number of active lanes per local memory instruction 2395system.cpu1.CUs1.lmem_lanes_execution_dist::mean 19.333333 # number of active lanes per local memory instruction 2396system.cpu1.CUs1.lmem_lanes_execution_dist::stdev 22.384518 # number of active lanes per local memory instruction 2397system.cpu1.CUs1.lmem_lanes_execution_dist::underflows 0 0.00% 0.00% # number of active lanes per local memory instruction 2398system.cpu1.CUs1.lmem_lanes_execution_dist::1-4 1 16.67% 16.67% # number of active lanes per local memory instruction 2399system.cpu1.CUs1.lmem_lanes_execution_dist::5-8 0 0.00% 16.67% # number of active lanes per local memory instruction 2400system.cpu1.CUs1.lmem_lanes_execution_dist::9-12 1 16.67% 33.33% # number of active lanes per local memory instruction 2401system.cpu1.CUs1.lmem_lanes_execution_dist::13-16 3 50.00% 83.33% # number of active lanes per local memory instruction 2402system.cpu1.CUs1.lmem_lanes_execution_dist::17-20 0 0.00% 83.33% # number of active lanes per local memory instruction 2403system.cpu1.CUs1.lmem_lanes_execution_dist::21-24 0 0.00% 83.33% # number of active lanes per local memory instruction 2404system.cpu1.CUs1.lmem_lanes_execution_dist::25-28 0 0.00% 83.33% # number of active lanes per local memory instruction 2405system.cpu1.CUs1.lmem_lanes_execution_dist::29-32 0 0.00% 83.33% # number of active lanes per local memory instruction 2406system.cpu1.CUs1.lmem_lanes_execution_dist::33-36 0 0.00% 83.33% # number of active lanes per local memory instruction 2407system.cpu1.CUs1.lmem_lanes_execution_dist::37-40 0 0.00% 83.33% # number of active lanes per local memory instruction 2408system.cpu1.CUs1.lmem_lanes_execution_dist::41-44 0 0.00% 83.33% # number of active lanes per local memory instruction 2409system.cpu1.CUs1.lmem_lanes_execution_dist::45-48 0 0.00% 83.33% # number of active lanes per local memory instruction 2410system.cpu1.CUs1.lmem_lanes_execution_dist::49-52 0 0.00% 83.33% # number of active lanes per local memory instruction 2411system.cpu1.CUs1.lmem_lanes_execution_dist::53-56 0 0.00% 83.33% # number of active lanes per local memory instruction 2412system.cpu1.CUs1.lmem_lanes_execution_dist::57-60 0 0.00% 83.33% # number of active lanes per local memory instruction 2413system.cpu1.CUs1.lmem_lanes_execution_dist::61-64 1 16.67% 100.00% # number of active lanes per local memory instruction 2414system.cpu1.CUs1.lmem_lanes_execution_dist::overflows 0 0.00% 100.00% # number of active lanes per local memory instruction 2415system.cpu1.CUs1.lmem_lanes_execution_dist::min_value 1 # number of active lanes per local memory instruction 2416system.cpu1.CUs1.lmem_lanes_execution_dist::max_value 64 # number of active lanes per local memory instruction 2417system.cpu1.CUs1.lmem_lanes_execution_dist::total 6 # number of active lanes per local memory instruction 2418system.cpu1.CUs1.num_alu_insts_executed 118 # Number of dynamic non-GM memory insts executed 2419system.cpu1.CUs1.times_wg_blocked_due_vgpr_alloc 0 # Number of times WGs are blocked due to VGPR allocation per SIMD 2420system.cpu1.CUs1.num_CAS_ops 0 # number of compare and swap operations 2421system.cpu1.CUs1.num_failed_CAS_ops 0 # number of compare and swap operations that failed 2422system.cpu1.CUs1.num_completed_wfs 4 # number of completed wavefronts 2423system.cpu2.num_kernel_launched 1 # number of kernel launched 2424system.dispatcher_coalescer.clk_domain.voltage_domain.voltage 1 # Voltage in Volts 2425system.dispatcher_coalescer.clk_domain.clock 1000 # Clock period in ticks 2426system.dispatcher_coalescer.uncoalesced_accesses 0 # Number of uncoalesced TLB accesses 2427system.dispatcher_coalescer.coalesced_accesses 0 # Number of coalesced TLB accesses 2428system.dispatcher_coalescer.queuing_cycles 0 # Number of cycles spent in queue 2429system.dispatcher_coalescer.local_queuing_cycles 0 # Number of cycles spent in queue for all incoming reqs 2430system.dispatcher_coalescer.local_latency nan # Avg. latency over all incoming pkts 2431system.dispatcher_tlb.clk_domain.voltage_domain.voltage 1 # Voltage in Volts 2432system.dispatcher_tlb.clk_domain.clock 1000 # Clock period in ticks 2433system.dispatcher_tlb.local_TLB_accesses 0 # Number of TLB accesses 2434system.dispatcher_tlb.local_TLB_hits 0 # Number of TLB hits 2435system.dispatcher_tlb.local_TLB_misses 0 # Number of TLB misses 2436system.dispatcher_tlb.local_TLB_miss_rate nan # TLB miss rate 2437system.dispatcher_tlb.global_TLB_accesses 0 # Number of TLB accesses 2438system.dispatcher_tlb.global_TLB_hits 0 # Number of TLB hits 2439system.dispatcher_tlb.global_TLB_misses 0 # Number of TLB misses 2440system.dispatcher_tlb.global_TLB_miss_rate nan # TLB miss rate 2441system.dispatcher_tlb.access_cycles 0 # Cycles spent accessing this TLB level 2442system.dispatcher_tlb.page_table_cycles 0 # Cycles spent accessing the page table 2443system.dispatcher_tlb.unique_pages 0 # Number of unique pages touched 2444system.dispatcher_tlb.local_cycles 0 # Number of cycles spent in queue for all incoming reqs 2445system.dispatcher_tlb.local_latency nan # Avg. latency over incoming coalesced reqs 2446system.dispatcher_tlb.avg_reuse_distance 0 # avg. reuse distance over all pages (in ticks) 2447system.l1_coalescer0.clk_domain.voltage_domain.voltage 1 # Voltage in Volts 2448system.l1_coalescer0.clk_domain.clock 1000 # Clock period in ticks 2449system.l1_coalescer0.uncoalesced_accesses 778 # Number of uncoalesced TLB accesses 2450system.l1_coalescer0.coalesced_accesses 0 # Number of coalesced TLB accesses 2451system.l1_coalescer0.queuing_cycles 0 # Number of cycles spent in queue 2452system.l1_coalescer0.local_queuing_cycles 0 # Number of cycles spent in queue for all incoming reqs 2453system.l1_coalescer0.local_latency 0 # Avg. latency over all incoming pkts 2454system.l1_coalescer1.clk_domain.voltage_domain.voltage 1 # Voltage in Volts 2455system.l1_coalescer1.clk_domain.clock 1000 # Clock period in ticks 2456system.l1_coalescer1.uncoalesced_accesses 769 # Number of uncoalesced TLB accesses 2457system.l1_coalescer1.coalesced_accesses 0 # Number of coalesced TLB accesses 2458system.l1_coalescer1.queuing_cycles 0 # Number of cycles spent in queue 2459system.l1_coalescer1.local_queuing_cycles 0 # Number of cycles spent in queue for all incoming reqs 2460system.l1_coalescer1.local_latency 0 # Avg. latency over all incoming pkts 2461system.l1_tlb0.clk_domain.voltage_domain.voltage 1 # Voltage in Volts 2462system.l1_tlb0.clk_domain.clock 1000 # Clock period in ticks 2463system.l1_tlb0.local_TLB_accesses 778 # Number of TLB accesses 2464system.l1_tlb0.local_TLB_hits 774 # Number of TLB hits 2465system.l1_tlb0.local_TLB_misses 4 # Number of TLB misses 2466system.l1_tlb0.local_TLB_miss_rate 0.514139 # TLB miss rate 2467system.l1_tlb0.global_TLB_accesses 778 # Number of TLB accesses 2468system.l1_tlb0.global_TLB_hits 774 # Number of TLB hits 2469system.l1_tlb0.global_TLB_misses 4 # Number of TLB misses 2470system.l1_tlb0.global_TLB_miss_rate 0.514139 # TLB miss rate 2471system.l1_tlb0.access_cycles 0 # Cycles spent accessing this TLB level 2472system.l1_tlb0.page_table_cycles 0 # Cycles spent accessing the page table 2473system.l1_tlb0.unique_pages 4 # Number of unique pages touched 2474system.l1_tlb0.local_cycles 0 # Number of cycles spent in queue for all incoming reqs 2475system.l1_tlb0.local_latency 0 # Avg. latency over incoming coalesced reqs 2476system.l1_tlb0.avg_reuse_distance 0 # avg. reuse distance over all pages (in ticks) 2477system.l1_tlb1.clk_domain.voltage_domain.voltage 1 # Voltage in Volts 2478system.l1_tlb1.clk_domain.clock 1000 # Clock period in ticks 2479system.l1_tlb1.local_TLB_accesses 769 # Number of TLB accesses 2480system.l1_tlb1.local_TLB_hits 766 # Number of TLB hits 2481system.l1_tlb1.local_TLB_misses 3 # Number of TLB misses 2482system.l1_tlb1.local_TLB_miss_rate 0.390117 # TLB miss rate 2483system.l1_tlb1.global_TLB_accesses 769 # Number of TLB accesses 2484system.l1_tlb1.global_TLB_hits 766 # Number of TLB hits 2485system.l1_tlb1.global_TLB_misses 3 # Number of TLB misses 2486system.l1_tlb1.global_TLB_miss_rate 0.390117 # TLB miss rate 2487system.l1_tlb1.access_cycles 0 # Cycles spent accessing this TLB level 2488system.l1_tlb1.page_table_cycles 0 # Cycles spent accessing the page table 2489system.l1_tlb1.unique_pages 3 # Number of unique pages touched 2490system.l1_tlb1.local_cycles 0 # Number of cycles spent in queue for all incoming reqs 2491system.l1_tlb1.local_latency 0 # Avg. latency over incoming coalesced reqs 2492system.l1_tlb1.avg_reuse_distance 0 # avg. reuse distance over all pages (in ticks) 2493system.l2_coalescer.clk_domain.voltage_domain.voltage 1 # Voltage in Volts 2494system.l2_coalescer.clk_domain.clock 1000 # Clock period in ticks 2495system.l2_coalescer.uncoalesced_accesses 8 # Number of uncoalesced TLB accesses 2496system.l2_coalescer.coalesced_accesses 1 # Number of coalesced TLB accesses 2497system.l2_coalescer.queuing_cycles 8000 # Number of cycles spent in queue 2498system.l2_coalescer.local_queuing_cycles 1000 # Number of cycles spent in queue for all incoming reqs 2499system.l2_coalescer.local_latency 125 # Avg. latency over all incoming pkts 2500system.l2_tlb.clk_domain.voltage_domain.voltage 1 # Voltage in Volts 2501system.l2_tlb.clk_domain.clock 1000 # Clock period in ticks 2502system.l2_tlb.local_TLB_accesses 8 # Number of TLB accesses 2503system.l2_tlb.local_TLB_hits 3 # Number of TLB hits 2504system.l2_tlb.local_TLB_misses 5 # Number of TLB misses 2505system.l2_tlb.local_TLB_miss_rate 62.500000 # TLB miss rate 2506system.l2_tlb.global_TLB_accesses 15 # Number of TLB accesses 2507system.l2_tlb.global_TLB_hits 3 # Number of TLB hits 2508system.l2_tlb.global_TLB_misses 12 # Number of TLB misses 2509system.l2_tlb.global_TLB_miss_rate 80 # TLB miss rate 2510system.l2_tlb.access_cycles 552008 # Cycles spent accessing this TLB level 2511system.l2_tlb.page_table_cycles 0 # Cycles spent accessing the page table 2512system.l2_tlb.unique_pages 5 # Number of unique pages touched 2513system.l2_tlb.local_cycles 69001 # Number of cycles spent in queue for all incoming reqs 2514system.l2_tlb.local_latency 8625.125000 # Avg. latency over incoming coalesced reqs 2515system.l2_tlb.avg_reuse_distance 0 # avg. reuse distance over all pages (in ticks) 2516system.l3_coalescer.clk_domain.voltage_domain.voltage 1 # Voltage in Volts 2517system.l3_coalescer.clk_domain.clock 1000 # Clock period in ticks 2518system.l3_coalescer.uncoalesced_accesses 5 # Number of uncoalesced TLB accesses 2519system.l3_coalescer.coalesced_accesses 1 # Number of coalesced TLB accesses 2520system.l3_coalescer.queuing_cycles 8000 # Number of cycles spent in queue 2521system.l3_coalescer.local_queuing_cycles 1000 # Number of cycles spent in queue for all incoming reqs 2522system.l3_coalescer.local_latency 200 # Avg. latency over all incoming pkts 2523system.l3_tlb.clk_domain.voltage_domain.voltage 1 # Voltage in Volts 2524system.l3_tlb.clk_domain.clock 1000 # Clock period in ticks 2525system.l3_tlb.local_TLB_accesses 5 # Number of TLB accesses 2526system.l3_tlb.local_TLB_hits 0 # Number of TLB hits 2527system.l3_tlb.local_TLB_misses 5 # Number of TLB misses 2528system.l3_tlb.local_TLB_miss_rate 100 # TLB miss rate 2529system.l3_tlb.global_TLB_accesses 12 # Number of TLB accesses 2530system.l3_tlb.global_TLB_hits 0 # Number of TLB hits 2531system.l3_tlb.global_TLB_misses 12 # Number of TLB misses 2532system.l3_tlb.global_TLB_miss_rate 100 # TLB miss rate 2533system.l3_tlb.access_cycles 1200000 # Cycles spent accessing this TLB level 2534system.l3_tlb.page_table_cycles 6000000 # Cycles spent accessing the page table 2535system.l3_tlb.unique_pages 5 # Number of unique pages touched 2536system.l3_tlb.local_cycles 150000 # Number of cycles spent in queue for all incoming reqs 2537system.l3_tlb.local_latency 30000 # Avg. latency over incoming coalesced reqs 2538system.l3_tlb.avg_reuse_distance 0 # avg. reuse distance over all pages (in ticks) 2539system.piobus.trans_dist::WriteReq 94 # Transaction distribution 2540system.piobus.trans_dist::WriteResp 94 # Transaction distribution 2541system.piobus.pkt_count_system.ruby.cp_cntrl0.sequencer.mem-master-port::system.cpu2.pio 188 # Packet count per connected master and slave (bytes) 2542system.piobus.pkt_count::total 188 # Packet count per connected master and slave (bytes) 2543system.piobus.pkt_size_system.ruby.cp_cntrl0.sequencer.mem-master-port::system.cpu2.pio 748 # Cumulative packet size per connected master and slave (bytes) 2544system.piobus.pkt_size::total 748 # Cumulative packet size per connected master and slave (bytes) 2545system.piobus.reqLayer0.occupancy 234500 # Layer occupancy (ticks) 2546system.piobus.reqLayer0.utilization 0.1 # Layer utilization (%) 2547system.piobus.respLayer0.occupancy 94000 # Layer occupancy (ticks) 2548system.piobus.respLayer0.utilization 0.0 # Layer utilization (%) 2549system.ruby.outstanding_req_hist::bucket_size 1 2550system.ruby.outstanding_req_hist::max_bucket 9 2551system.ruby.outstanding_req_hist::samples 114203 2552system.ruby.outstanding_req_hist::mean 1.000035 2553system.ruby.outstanding_req_hist::gmean 1.000024 2554system.ruby.outstanding_req_hist::stdev 0.005918 2555system.ruby.outstanding_req_hist \| 0 0.00% 0.00% \| 114199 100.00% 100.00% \| 4 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% 2556system.ruby.outstanding_req_hist::total 114203 2557system.ruby.latency_hist::bucket_size 128 2558system.ruby.latency_hist::max_bucket 1279 2559system.ruby.latency_hist::samples 114203 2560system.ruby.latency_hist::mean 4.423518 2561system.ruby.latency_hist::gmean 1.078765 2562system.ruby.latency_hist::stdev 30.010569 2563system.ruby.latency_hist \| 112668 98.66% 98.66% \| 1136 0.99% 99.65% \| 372 0.33% 99.98% \| 3 0.00% 99.98% \| 8 0.01% 99.99% \| 14 0.01% 100.00% \| 2 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% 2564system.ruby.latency_hist::total 114203 2565system.ruby.hit_latency_hist::bucket_size 128 2566system.ruby.hit_latency_hist::max_bucket 1279 2567system.ruby.hit_latency_hist::samples 1535 2568system.ruby.hit_latency_hist::mean 255.015635 2569system.ruby.hit_latency_hist::gmean 251.519163 2570system.ruby.hit_latency_hist::stdev 57.825523 2571system.ruby.hit_latency_hist \| 0 0.00% 0.00% \| 1136 74.01% 74.01% \| 372 24.23% 98.24% \| 3 0.20% 98.44% \| 8 0.52% 98.96% \| 14 0.91% 99.87% \| 2 0.13% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% 2572system.ruby.hit_latency_hist::total 1535 2573system.ruby.miss_latency_hist::bucket_size 2 2574system.ruby.miss_latency_hist::max_bucket 19 2575system.ruby.miss_latency_hist::samples 112668 2576system.ruby.miss_latency_hist::mean 1.009426 2577system.ruby.miss_latency_hist::gmean 1.001543 2578system.ruby.miss_latency_hist::stdev 0.411800 2579system.ruby.miss_latency_hist \| 112609 99.95% 99.95% \| 0 0.00% 99.95% \| 0 0.00% 99.95% \| 0 0.00% 99.95% \| 0 0.00% 99.95% \| 0 0.00% 99.95% \| 0 0.00% 99.95% \| 0 0.00% 99.95% \| 0 0.00% 99.95% \| 59 0.05% 100.00% 2580system.ruby.miss_latency_hist::total 112668 2581system.ruby.L1Cache.incomplete_times 112609 2582system.ruby.L2Cache.incomplete_times 59 2583system.ruby.cp_cntrl0.L1D0cache.demand_hits 0 # Number of cache demand hits 2584system.ruby.cp_cntrl0.L1D0cache.demand_misses 506 # Number of cache demand misses 2585system.ruby.cp_cntrl0.L1D0cache.demand_accesses 506 # Number of cache demand accesses 2586system.ruby.cp_cntrl0.L1D0cache.num_data_array_reads 16155 # number of data array reads 2587system.ruby.cp_cntrl0.L1D0cache.num_data_array_writes 11985 # number of data array writes 2588system.ruby.cp_cntrl0.L1D0cache.num_tag_array_reads 27132 # number of tag array reads 2589system.ruby.cp_cntrl0.L1D0cache.num_tag_array_writes 1584 # number of tag array writes 2590system.ruby.cp_cntrl0.L1D1cache.demand_hits 0 # Number of cache demand hits 2591system.ruby.cp_cntrl0.L1D1cache.demand_misses 0 # Number of cache demand misses 2592system.ruby.cp_cntrl0.L1D1cache.demand_accesses 0 # Number of cache demand accesses 2593system.ruby.cp_cntrl0.L1Icache.demand_hits 0 # Number of cache demand hits 2594system.ruby.cp_cntrl0.L1Icache.demand_misses 1088 # Number of cache demand misses 2595system.ruby.cp_cntrl0.L1Icache.demand_accesses 1088 # Number of cache demand accesses 2596system.ruby.cp_cntrl0.L1Icache.num_data_array_reads 86007 # number of data array reads 2597system.ruby.cp_cntrl0.L1Icache.num_data_array_writes 54 # number of data array writes 2598system.ruby.cp_cntrl0.L1Icache.num_tag_array_reads 87684 # number of tag array reads 2599system.ruby.cp_cntrl0.L1Icache.num_tag_array_writes 54 # number of tag array writes 2600system.ruby.cp_cntrl0.L2cache.demand_hits 0 # Number of cache demand hits 2601system.ruby.cp_cntrl0.L2cache.demand_misses 1535 # Number of cache demand misses 2602system.ruby.cp_cntrl0.L2cache.demand_accesses 1535 # Number of cache demand accesses 2603system.ruby.cp_cntrl0.L2cache.num_data_array_reads 120 # number of data array reads 2604system.ruby.cp_cntrl0.L2cache.num_data_array_writes 11982 # number of data array writes 2605system.ruby.cp_cntrl0.L2cache.num_tag_array_reads 12068 # number of tag array reads 2606system.ruby.cp_cntrl0.L2cache.num_tag_array_writes 1658 # number of tag array writes 2607system.ruby.dir_cntrl0.L3CacheMemory.demand_hits 0 # Number of cache demand hits 2608system.ruby.dir_cntrl0.L3CacheMemory.demand_misses 0 # Number of cache demand misses 2609system.ruby.dir_cntrl0.L3CacheMemory.demand_accesses 0 # Number of cache demand accesses 2610system.ruby.dir_cntrl0.L3CacheMemory.num_data_array_writes 1560 # number of data array writes 2611system.ruby.dir_cntrl0.L3CacheMemory.num_tag_array_reads 1560 # number of tag array reads 2612system.ruby.dir_cntrl0.L3CacheMemory.num_tag_array_writes 1578 # number of tag array writes 2613system.ruby.network.ext_links0.int_node.percent_links_utilized 1.075754 2614system.ruby.network.ext_links0.int_node.msg_count.Control::0 1560 2615system.ruby.network.ext_links0.int_node.msg_count.Data::0 18 2616system.ruby.network.ext_links0.int_node.msg_count.Request_Control::0 1542 2617system.ruby.network.ext_links0.int_node.msg_count.Response_Data::2 1546 2618system.ruby.network.ext_links0.int_node.msg_count.Response_Control::2 1558 2619system.ruby.network.ext_links0.int_node.msg_count.Writeback_Control::2 16 2620system.ruby.network.ext_links0.int_node.msg_count.Unblock_Control::4 1541 2621system.ruby.network.ext_links0.int_node.msg_bytes.Control::0 12480 2622system.ruby.network.ext_links0.int_node.msg_bytes.Data::0 1296 2623system.ruby.network.ext_links0.int_node.msg_bytes.Request_Control::0 12336 2624system.ruby.network.ext_links0.int_node.msg_bytes.Response_Data::2 111312 2625system.ruby.network.ext_links0.int_node.msg_bytes.Response_Control::2 12464 2626system.ruby.network.ext_links0.int_node.msg_bytes.Writeback_Control::2 128 2627system.ruby.network.ext_links0.int_node.msg_bytes.Unblock_Control::4 12328 2628system.ruby.network.ext_links1.int_node.percent_links_utilized 1.347807 2629system.ruby.network.ext_links1.int_node.msg_count.Control::0 25 2630system.ruby.network.ext_links1.int_node.msg_count.Request_Control::0 1535 2631system.ruby.network.ext_links1.int_node.msg_count.Response_Data::2 1537 2632system.ruby.network.ext_links1.int_node.msg_count.Response_Control::2 23 2633system.ruby.network.ext_links1.int_node.msg_count.Unblock_Control::4 1534 2634system.ruby.network.ext_links1.int_node.msg_bytes.Control::0 200 2635system.ruby.network.ext_links1.int_node.msg_bytes.Request_Control::0 12280 2636system.ruby.network.ext_links1.int_node.msg_bytes.Response_Data::2 110664 2637system.ruby.network.ext_links1.int_node.msg_bytes.Response_Control::2 184 2638system.ruby.network.ext_links1.int_node.msg_bytes.Unblock_Control::4 12272 2639system.ruby.tcp_cntrl0.L1cache.demand_hits 0 # Number of cache demand hits 2640system.ruby.tcp_cntrl0.L1cache.demand_misses 0 # Number of cache demand misses 2641system.ruby.tcp_cntrl0.L1cache.demand_accesses 0 # Number of cache demand accesses 2642system.ruby.tcp_cntrl0.L1cache.num_data_array_reads 6 # number of data array reads 2643system.ruby.tcp_cntrl0.L1cache.num_data_array_writes 11 # number of data array writes 2644system.ruby.tcp_cntrl0.L1cache.num_tag_array_reads 1297 # number of tag array reads 2645system.ruby.tcp_cntrl0.L1cache.num_tag_array_writes 11 # number of tag array writes 2646system.ruby.tcp_cntrl0.L1cache.num_tag_array_stalls 5082 # number of stalls caused by tag array 2647system.ruby.tcp_cntrl0.L1cache.num_data_array_stalls 6 # number of stalls caused by data array 2648system.ruby.tcp_cntrl0.coalescer.gpu_tcp_ld_hits 0 # loads that hit in the TCP 2649system.ruby.tcp_cntrl0.coalescer.gpu_tcp_ld_transfers 0 # TCP to TCP load transfers 2650system.ruby.tcp_cntrl0.coalescer.gpu_tcc_ld_hits 0 # loads that hit in the TCC 2651system.ruby.tcp_cntrl0.coalescer.gpu_ld_misses 5 # loads that miss in the GPU 2652system.ruby.tcp_cntrl0.coalescer.gpu_tcp_st_hits 0 # stores that hit in the TCP 2653system.ruby.tcp_cntrl0.coalescer.gpu_tcp_st_transfers 0 # TCP to TCP store transfers 2654system.ruby.tcp_cntrl0.coalescer.gpu_tcc_st_hits 0 # stores that hit in the TCC 2655system.ruby.tcp_cntrl0.coalescer.gpu_st_misses 9 # stores that miss in the GPU 2656system.ruby.tcp_cntrl0.coalescer.cp_tcp_ld_hits 0 # loads that hit in the TCP 2657system.ruby.tcp_cntrl0.coalescer.cp_tcp_ld_transfers 0 # TCP to TCP load transfers 2658system.ruby.tcp_cntrl0.coalescer.cp_tcc_ld_hits 0 # loads that hit in the TCC 2659system.ruby.tcp_cntrl0.coalescer.cp_ld_misses 0 # loads that miss in the GPU 2660system.ruby.tcp_cntrl0.coalescer.cp_tcp_st_hits 0 # stores that hit in the TCP 2661system.ruby.tcp_cntrl0.coalescer.cp_tcp_st_transfers 0 # TCP to TCP store transfers 2662system.ruby.tcp_cntrl0.coalescer.cp_tcc_st_hits 0 # stores that hit in the TCC 2663system.ruby.tcp_cntrl0.coalescer.cp_st_misses 0 # stores that miss in the GPU 2664system.ruby.network.ext_links2.int_node.percent_links_utilized 0.115426 2665system.ruby.network.ext_links2.int_node.msg_count.Control::0 1535 2666system.ruby.network.ext_links2.int_node.msg_count.Data::0 18 2667system.ruby.network.ext_links2.int_node.msg_count.Data::1 18 2668system.ruby.network.ext_links2.int_node.msg_count.Request_Control::0 7 2669system.ruby.network.ext_links2.int_node.msg_count.Request_Control::1 9 2670system.ruby.network.ext_links2.int_node.msg_count.Response_Data::2 9 2671system.ruby.network.ext_links2.int_node.msg_count.Response_Data::3 11 2672system.ruby.network.ext_links2.int_node.msg_count.Response_Control::2 1535 2673system.ruby.network.ext_links2.int_node.msg_count.Writeback_Control::2 16 2674system.ruby.network.ext_links2.int_node.msg_count.Writeback_Control::3 16 2675system.ruby.network.ext_links2.int_node.msg_count.Unblock_Control::4 7 2676system.ruby.network.ext_links2.int_node.msg_bytes.Control::0 12280 2677system.ruby.network.ext_links2.int_node.msg_bytes.Data::0 1296 2678system.ruby.network.ext_links2.int_node.msg_bytes.Data::1 1296 2679system.ruby.network.ext_links2.int_node.msg_bytes.Request_Control::0 56 2680system.ruby.network.ext_links2.int_node.msg_bytes.Request_Control::1 72 2681system.ruby.network.ext_links2.int_node.msg_bytes.Response_Data::2 648 2682system.ruby.network.ext_links2.int_node.msg_bytes.Response_Data::3 792 2683system.ruby.network.ext_links2.int_node.msg_bytes.Response_Control::2 12280 2684system.ruby.network.ext_links2.int_node.msg_bytes.Writeback_Control::2 128 2685system.ruby.network.ext_links2.int_node.msg_bytes.Writeback_Control::3 128 2686system.ruby.network.ext_links2.int_node.msg_bytes.Unblock_Control::4 56 2687system.ruby.tcp_cntrl1.L1cache.demand_hits 0 # Number of cache demand hits 2688system.ruby.tcp_cntrl1.L1cache.demand_misses 0 # Number of cache demand misses 2689system.ruby.tcp_cntrl1.L1cache.demand_accesses 0 # Number of cache demand accesses 2690system.ruby.tcp_cntrl1.L1cache.num_data_array_reads 6 # number of data array reads 2691system.ruby.tcp_cntrl1.L1cache.num_data_array_writes 11 # number of data array writes 2692system.ruby.tcp_cntrl1.L1cache.num_tag_array_reads 1297 # number of tag array reads 2693system.ruby.tcp_cntrl1.L1cache.num_tag_array_writes 11 # number of tag array writes 2694system.ruby.tcp_cntrl1.L1cache.num_tag_array_stalls 5082 # number of stalls caused by tag array 2695system.ruby.tcp_cntrl1.L1cache.num_data_array_stalls 6 # number of stalls caused by data array 2696system.ruby.tcp_cntrl1.coalescer.gpu_tcp_ld_hits 0 # loads that hit in the TCP 2697system.ruby.tcp_cntrl1.coalescer.gpu_tcp_ld_transfers 0 # TCP to TCP load transfers 2698system.ruby.tcp_cntrl1.coalescer.gpu_tcc_ld_hits 0 # loads that hit in the TCC 2699system.ruby.tcp_cntrl1.coalescer.gpu_ld_misses 5 # loads that miss in the GPU 2700system.ruby.tcp_cntrl1.coalescer.gpu_tcp_st_hits 0 # stores that hit in the TCP 2701system.ruby.tcp_cntrl1.coalescer.gpu_tcp_st_transfers 0 # TCP to TCP store transfers 2702system.ruby.tcp_cntrl1.coalescer.gpu_tcc_st_hits 0 # stores that hit in the TCC 2703system.ruby.tcp_cntrl1.coalescer.gpu_st_misses 9 # stores that miss in the GPU 2704system.ruby.tcp_cntrl1.coalescer.cp_tcp_ld_hits 0 # loads that hit in the TCP 2705system.ruby.tcp_cntrl1.coalescer.cp_tcp_ld_transfers 0 # TCP to TCP load transfers 2706system.ruby.tcp_cntrl1.coalescer.cp_tcc_ld_hits 0 # loads that hit in the TCC 2707system.ruby.tcp_cntrl1.coalescer.cp_ld_misses 0 # loads that miss in the GPU 2708system.ruby.tcp_cntrl1.coalescer.cp_tcp_st_hits 0 # stores that hit in the TCP 2709system.ruby.tcp_cntrl1.coalescer.cp_tcp_st_transfers 0 # TCP to TCP store transfers 2710system.ruby.tcp_cntrl1.coalescer.cp_tcc_st_hits 0 # stores that hit in the TCC 2711system.ruby.tcp_cntrl1.coalescer.cp_st_misses 0 # stores that miss in the GPU 2712system.ruby.sqc_cntrl0.L1cache.demand_hits 0 # Number of cache demand hits 2713system.ruby.sqc_cntrl0.L1cache.demand_misses 0 # Number of cache demand misses 2714system.ruby.sqc_cntrl0.L1cache.demand_accesses 0 # Number of cache demand accesses 2715system.ruby.sqc_cntrl0.L1cache.num_data_array_reads 86 # number of data array reads 2716system.ruby.sqc_cntrl0.L1cache.num_tag_array_reads 91 # number of tag array reads 2717system.ruby.sqc_cntrl0.L1cache.num_tag_array_writes 10 # number of tag array writes 2718system.ruby.sqc_cntrl0.sequencer.load_waiting_on_load 97 # Number of times a load aliased with a pending load 2719system.ruby.tcc_cntrl0.L2cache.demand_hits 0 # Number of cache demand hits 2720system.ruby.tcc_cntrl0.L2cache.demand_misses 0 # Number of cache demand misses 2721system.ruby.tcc_cntrl0.L2cache.demand_accesses 0 # Number of cache demand accesses 2722system.ruby.tcc_cntrl0.L2cache.num_data_array_writes 9 # number of data array writes 2723system.ruby.tcc_cntrl0.L2cache.num_tag_array_reads 1569 # number of tag array reads 2724system.ruby.tcc_cntrl0.L2cache.num_tag_array_writes 1545 # number of tag array writes 2725system.ruby.tcc_cntrl0.L2cache.num_tag_array_stalls 1 # number of stalls caused by tag array 2726system.ruby.network.msg_count.Control 3120 2727system.ruby.network.msg_count.Data 54 2728system.ruby.network.msg_count.Request_Control 3093 2729system.ruby.network.msg_count.Response_Data 3103 2730system.ruby.network.msg_count.Response_Control 3116 2731system.ruby.network.msg_count.Writeback_Control 48 2732system.ruby.network.msg_count.Unblock_Control 3082 2733system.ruby.network.msg_byte.Control 24960 2734system.ruby.network.msg_byte.Data 3888 2735system.ruby.network.msg_byte.Request_Control 24744 2736system.ruby.network.msg_byte.Response_Data 223416 2737system.ruby.network.msg_byte.Response_Control 24928 2738system.ruby.network.msg_byte.Writeback_Control 384 2739system.ruby.network.msg_byte.Unblock_Control 24656 2740system.sqc_coalescer.clk_domain.voltage_domain.voltage 1 # Voltage in Volts 2741system.sqc_coalescer.clk_domain.clock 1000 # Clock period in ticks 2742system.sqc_coalescer.uncoalesced_accesses 86 # Number of uncoalesced TLB accesses 2743system.sqc_coalescer.coalesced_accesses 48 # Number of coalesced TLB accesses 2744system.sqc_coalescer.queuing_cycles 211000 # Number of cycles spent in queue 2745system.sqc_coalescer.local_queuing_cycles 211000 # Number of cycles spent in queue for all incoming reqs 2746system.sqc_coalescer.local_latency 2453.488372 # Avg. latency over all incoming pkts 2747system.sqc_tlb.clk_domain.voltage_domain.voltage 1 # Voltage in Volts 2748system.sqc_tlb.clk_domain.clock 1000 # Clock period in ticks 2749system.sqc_tlb.local_TLB_accesses 48 # Number of TLB accesses 2750system.sqc_tlb.local_TLB_hits 47 # Number of TLB hits 2751system.sqc_tlb.local_TLB_misses 1 # Number of TLB misses 2752system.sqc_tlb.local_TLB_miss_rate 2.083333 # TLB miss rate 2753system.sqc_tlb.global_TLB_accesses 86 # Number of TLB accesses 2754system.sqc_tlb.global_TLB_hits 78 # Number of TLB hits 2755system.sqc_tlb.global_TLB_misses 8 # Number of TLB misses 2756system.sqc_tlb.global_TLB_miss_rate 9.302326 # TLB miss rate 2757system.sqc_tlb.access_cycles 86008 # Cycles spent accessing this TLB level 2758system.sqc_tlb.page_table_cycles 0 # Cycles spent accessing the page table 2759system.sqc_tlb.unique_pages 1 # Number of unique pages touched 2760system.sqc_tlb.local_cycles 48001 # Number of cycles spent in queue for all incoming reqs 2761system.sqc_tlb.local_latency 1000.020833 # Avg. latency over incoming coalesced reqs 2762system.sqc_tlb.avg_reuse_distance 0 # avg. reuse distance over all pages (in ticks) 2763system.ruby.network.ext_links0.int_node.throttle0.link_utilization 0.766700 2764system.ruby.network.ext_links0.int_node.throttle0.msg_count.Data::0 18 2765system.ruby.network.ext_links0.int_node.throttle0.msg_count.Request_Control::0 1542 2766system.ruby.network.ext_links0.int_node.throttle0.msg_count.Response_Data::2 2 2767system.ruby.network.ext_links0.int_node.throttle0.msg_count.Response_Control::2 1558 2768system.ruby.network.ext_links0.int_node.throttle0.msg_count.Unblock_Control::4 1541 2769system.ruby.network.ext_links0.int_node.throttle0.msg_bytes.Data::0 1296 2770system.ruby.network.ext_links0.int_node.throttle0.msg_bytes.Request_Control::0 12336 2771system.ruby.network.ext_links0.int_node.throttle0.msg_bytes.Response_Data::2 144 2772system.ruby.network.ext_links0.int_node.throttle0.msg_bytes.Response_Control::2 12464 2773system.ruby.network.ext_links0.int_node.throttle0.msg_bytes.Unblock_Control::4 12328 2774system.ruby.network.ext_links0.int_node.throttle1.link_utilization 2.201021 2775system.ruby.network.ext_links0.int_node.throttle1.msg_count.Control::0 25 2776system.ruby.network.ext_links0.int_node.throttle1.msg_count.Response_Data::2 1535 2777system.ruby.network.ext_links0.int_node.throttle1.msg_bytes.Control::0 200 2778system.ruby.network.ext_links0.int_node.throttle1.msg_bytes.Response_Data::2 110520 2779system.ruby.network.ext_links0.int_node.throttle2.link_utilization 0.259542 2780system.ruby.network.ext_links0.int_node.throttle2.msg_count.Control::0 1535 2781system.ruby.network.ext_links0.int_node.throttle2.msg_count.Response_Data::2 9 2782system.ruby.network.ext_links0.int_node.throttle2.msg_count.Writeback_Control::2 16 2783system.ruby.network.ext_links0.int_node.throttle2.msg_bytes.Control::0 12280 2784system.ruby.network.ext_links0.int_node.throttle2.msg_bytes.Response_Data::2 648 2785system.ruby.network.ext_links0.int_node.throttle2.msg_bytes.Writeback_Control::2 128 2786system.ruby.network.ext_links1.int_node.throttle0.link_utilization 2.201021 2787system.ruby.network.ext_links1.int_node.throttle0.msg_count.Control::0 25 2788system.ruby.network.ext_links1.int_node.throttle0.msg_count.Response_Data::2 1535 2789system.ruby.network.ext_links1.int_node.throttle0.msg_bytes.Control::0 200 2790system.ruby.network.ext_links1.int_node.throttle0.msg_bytes.Response_Data::2 110520 2791system.ruby.network.ext_links1.int_node.throttle1.link_utilization 0.494594 2792system.ruby.network.ext_links1.int_node.throttle1.msg_count.Request_Control::0 1535 2793system.ruby.network.ext_links1.int_node.throttle1.msg_count.Response_Data::2 2 2794system.ruby.network.ext_links1.int_node.throttle1.msg_count.Response_Control::2 23 2795system.ruby.network.ext_links1.int_node.throttle1.msg_count.Unblock_Control::4 1534 2796system.ruby.network.ext_links1.int_node.throttle1.msg_bytes.Request_Control::0 12280 2797system.ruby.network.ext_links1.int_node.throttle1.msg_bytes.Response_Data::2 144 2798system.ruby.network.ext_links1.int_node.throttle1.msg_bytes.Response_Control::2 184 2799system.ruby.network.ext_links1.int_node.throttle1.msg_bytes.Unblock_Control::4 12272 2800system.ruby.network.ext_links2.int_node.throttle0.link_utilization 0.005566 2801system.ruby.network.ext_links2.int_node.throttle0.msg_count.Response_Data::3 3 2802system.ruby.network.ext_links2.int_node.throttle0.msg_count.Writeback_Control::3 8 2803system.ruby.network.ext_links2.int_node.throttle0.msg_bytes.Response_Data::3 216 2804system.ruby.network.ext_links2.int_node.throttle0.msg_bytes.Writeback_Control::3 64 2805system.ruby.network.ext_links2.int_node.throttle1.link_utilization 0.005566 2806system.ruby.network.ext_links2.int_node.throttle1.msg_count.Response_Data::3 3 2807system.ruby.network.ext_links2.int_node.throttle1.msg_count.Writeback_Control::3 8 2808system.ruby.network.ext_links2.int_node.throttle1.msg_bytes.Response_Data::3 216 2809system.ruby.network.ext_links2.int_node.throttle1.msg_bytes.Writeback_Control::3 64 2810system.ruby.network.ext_links2.int_node.throttle2.link_utilization 0.286737 2811system.ruby.network.ext_links2.int_node.throttle2.msg_count.Control::0 1535 2812system.ruby.network.ext_links2.int_node.throttle2.msg_count.Data::1 18 2813system.ruby.network.ext_links2.int_node.throttle2.msg_count.Request_Control::1 9 2814system.ruby.network.ext_links2.int_node.throttle2.msg_count.Response_Data::2 9 2815system.ruby.network.ext_links2.int_node.throttle2.msg_count.Writeback_Control::2 16 2816system.ruby.network.ext_links2.int_node.throttle2.msg_bytes.Control::0 12280 2817system.ruby.network.ext_links2.int_node.throttle2.msg_bytes.Data::1 1296 2818system.ruby.network.ext_links2.int_node.throttle2.msg_bytes.Request_Control::1 72 2819system.ruby.network.ext_links2.int_node.throttle2.msg_bytes.Response_Data::2 648 2820system.ruby.network.ext_links2.int_node.throttle2.msg_bytes.Writeback_Control::2 128 2821system.ruby.network.ext_links2.int_node.throttle3.link_utilization 0.007156 2822system.ruby.network.ext_links2.int_node.throttle3.msg_count.Response_Data::3 5 2823system.ruby.network.ext_links2.int_node.throttle3.msg_bytes.Response_Data::3 360 2824system.ruby.network.ext_links2.int_node.throttle4.link_utilization 0.272106 2825system.ruby.network.ext_links2.int_node.throttle4.msg_count.Data::0 18 2826system.ruby.network.ext_links2.int_node.throttle4.msg_count.Request_Control::0 7 2827system.ruby.network.ext_links2.int_node.throttle4.msg_count.Response_Control::2 1535 2828system.ruby.network.ext_links2.int_node.throttle4.msg_count.Unblock_Control::4 7 2829system.ruby.network.ext_links2.int_node.throttle4.msg_bytes.Data::0 1296 2830system.ruby.network.ext_links2.int_node.throttle4.msg_bytes.Request_Control::0 56 2831system.ruby.network.ext_links2.int_node.throttle4.msg_bytes.Response_Control::2 12280 2832system.ruby.network.ext_links2.int_node.throttle4.msg_bytes.Unblock_Control::4 56 2833system.ruby.LD.latency_hist::bucket_size 128 2834system.ruby.LD.latency_hist::max_bucket 1279 2835system.ruby.LD.latency_hist::samples 16335 2836system.ruby.LD.latency_hist::mean 3.784451 2837system.ruby.LD.latency_hist::gmean 1.062267 2838system.ruby.LD.latency_hist::stdev 27.056562 2839system.ruby.LD.latency_hist \| 16160 98.93% 98.93% \| 90 0.55% 99.48% \| 84 0.51% 99.99% \| 0 0.00% 99.99% \| 0 0.00% 99.99% \| 1 0.01% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% 2840system.ruby.LD.latency_hist::total 16335 2841system.ruby.LD.hit_latency_hist::bucket_size 128 2842system.ruby.LD.hit_latency_hist::max_bucket 1279 2843system.ruby.LD.hit_latency_hist::samples 175 2844system.ruby.LD.hit_latency_hist::mean 260.394286 2845system.ruby.LD.hit_latency_hist::gmean 258.339713 2846system.ruby.LD.hit_latency_hist::stdev 42.039376 2847system.ruby.LD.hit_latency_hist \| 0 0.00% 0.00% \| 90 51.43% 51.43% \| 84 48.00% 99.43% \| 0 0.00% 99.43% \| 0 0.00% 99.43% \| 1 0.57% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% 2848system.ruby.LD.hit_latency_hist::total 175 2849system.ruby.LD.miss_latency_hist::bucket_size 2 2850system.ruby.LD.miss_latency_hist::max_bucket 19 2851system.ruby.LD.miss_latency_hist::samples 16160 2852system.ruby.LD.miss_latency_hist::mean 1.005569 2853system.ruby.LD.miss_latency_hist::gmean 1.000911 2854system.ruby.LD.miss_latency_hist::stdev 0.316580 2855system.ruby.LD.miss_latency_hist \| 16155 99.97% 99.97% \| 0 0.00% 99.97% \| 0 0.00% 99.97% \| 0 0.00% 99.97% \| 0 0.00% 99.97% \| 0 0.00% 99.97% \| 0 0.00% 99.97% \| 0 0.00% 99.97% \| 0 0.00% 99.97% \| 5 0.03% 100.00% 2856system.ruby.LD.miss_latency_hist::total 16160 2857system.ruby.ST.latency_hist::bucket_size 128 2858system.ruby.ST.latency_hist::max_bucket 1279 2859system.ruby.ST.latency_hist::samples 10412 2860system.ruby.ST.latency_hist::mean 8.839992 2861system.ruby.ST.latency_hist::gmean 1.186243 2862system.ruby.ST.latency_hist::stdev 45.390081 2863system.ruby.ST.latency_hist \| 10090 96.91% 96.91% \| 254 2.44% 99.35% \| 62 0.60% 99.94% \| 0 0.00% 99.94% \| 1 0.01% 99.95% \| 4 0.04% 99.99% \| 1 0.01% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% 2864system.ruby.ST.latency_hist::total 10412 2865system.ruby.ST.hit_latency_hist::bucket_size 128 2866system.ruby.ST.hit_latency_hist::max_bucket 1279 2867system.ruby.ST.hit_latency_hist::samples 322 2868system.ruby.ST.hit_latency_hist::mean 254.509317 2869system.ruby.ST.hit_latency_hist::gmean 250.282441 2870system.ruby.ST.hit_latency_hist::stdev 65.931487 2871system.ruby.ST.hit_latency_hist \| 0 0.00% 0.00% \| 254 78.88% 78.88% \| 62 19.25% 98.14% \| 0 0.00% 98.14% \| 1 0.31% 98.45% \| 4 1.24% 99.69% \| 1 0.31% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% 2872system.ruby.ST.hit_latency_hist::total 322 2873system.ruby.ST.miss_latency_hist::bucket_size 1 2874system.ruby.ST.miss_latency_hist::max_bucket 9 2875system.ruby.ST.miss_latency_hist::samples 10090 2876system.ruby.ST.miss_latency_hist::mean 1 2877system.ruby.ST.miss_latency_hist::gmean 1 2878system.ruby.ST.miss_latency_hist \| 0 0.00% 0.00% \| 10090 100.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% 2879system.ruby.ST.miss_latency_hist::total 10090 2880system.ruby.IFETCH.latency_hist::bucket_size 128 2881system.ruby.IFETCH.latency_hist::max_bucket 1279 2882system.ruby.IFETCH.latency_hist::samples 87095 2883system.ruby.IFETCH.latency_hist::mean 4.017395 2884system.ruby.IFETCH.latency_hist::gmean 1.069735 2885system.ruby.IFETCH.latency_hist::stdev 28.134930 2886system.ruby.IFETCH.latency_hist \| 86061 98.81% 98.81% \| 790 0.91% 99.72% \| 224 0.26% 99.98% \| 3 0.00% 99.98% \| 7 0.01% 99.99% \| 9 0.01% 100.00% \| 1 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% 2887system.ruby.IFETCH.latency_hist::total 87095 2888system.ruby.IFETCH.hit_latency_hist::bucket_size 128 2889system.ruby.IFETCH.hit_latency_hist::max_bucket 1279 2890system.ruby.IFETCH.hit_latency_hist::samples 1034 2891system.ruby.IFETCH.hit_latency_hist::mean 254.218569 2892system.ruby.IFETCH.hit_latency_hist::gmean 250.716467 2893system.ruby.IFETCH.hit_latency_hist::stdev 57.514968 2894system.ruby.IFETCH.hit_latency_hist \| 0 0.00% 0.00% \| 790 76.40% 76.40% \| 224 21.66% 98.07% \| 3 0.29% 98.36% \| 7 0.68% 99.03% \| 9 0.87% 99.90% \| 1 0.10% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% 2895system.ruby.IFETCH.hit_latency_hist::total 1034 2896system.ruby.IFETCH.miss_latency_hist::bucket_size 2 2897system.ruby.IFETCH.miss_latency_hist::max_bucket 19 2898system.ruby.IFETCH.miss_latency_hist::samples 86061 2899system.ruby.IFETCH.miss_latency_hist::mean 1.011294 2900system.ruby.IFETCH.miss_latency_hist::gmean 1.001849 2901system.ruby.IFETCH.miss_latency_hist::stdev 0.450747 2902system.ruby.IFETCH.miss_latency_hist \| 86007 99.94% 99.94% \| 0 0.00% 99.94% \| 0 0.00% 99.94% \| 0 0.00% 99.94% \| 0 0.00% 99.94% \| 0 0.00% 99.94% \| 0 0.00% 99.94% \| 0 0.00% 99.94% \| 0 0.00% 99.94% \| 54 0.06% 100.00% 2903system.ruby.IFETCH.miss_latency_hist::total 86061 2904system.ruby.RMW_Read.latency_hist::bucket_size 32 2905system.ruby.RMW_Read.latency_hist::max_bucket 319 2906system.ruby.RMW_Read.latency_hist::samples 341 2907system.ruby.RMW_Read.latency_hist::mean 4.114370 2908system.ruby.RMW_Read.latency_hist::gmean 1.067644 2909system.ruby.RMW_Read.latency_hist::stdev 28.783090 2910system.ruby.RMW_Read.latency_hist \| 337 98.83% 98.83% \| 0 0.00% 98.83% \| 0 0.00% 98.83% \| 0 0.00% 98.83% \| 0 0.00% 98.83% \| 0 0.00% 98.83% \| 0 0.00% 98.83% \| 2 0.59% 99.41% \| 0 0.00% 99.41% \| 2 0.59% 100.00% 2911system.ruby.RMW_Read.latency_hist::total 341 2912system.ruby.RMW_Read.hit_latency_hist::bucket_size 32 2913system.ruby.RMW_Read.hit_latency_hist::max_bucket 319 2914system.ruby.RMW_Read.hit_latency_hist::samples 4 2915system.ruby.RMW_Read.hit_latency_hist::mean 266.500000 2916system.ruby.RMW_Read.hit_latency_hist::gmean 265.077347 2917system.ruby.RMW_Read.hit_latency_hist::stdev 31.754265 2918system.ruby.RMW_Read.hit_latency_hist \| 0 0.00% 0.00% \| 0 0.00% 0.00% \| 0 0.00% 0.00% \| 0 0.00% 0.00% \| 0 0.00% 0.00% \| 0 0.00% 0.00% \| 0 0.00% 0.00% \| 2 50.00% 50.00% \| 0 0.00% 50.00% \| 2 50.00% 100.00% 2919system.ruby.RMW_Read.hit_latency_hist::total 4 2920system.ruby.RMW_Read.miss_latency_hist::bucket_size 1 2921system.ruby.RMW_Read.miss_latency_hist::max_bucket 9 2922system.ruby.RMW_Read.miss_latency_hist::samples 337 2923system.ruby.RMW_Read.miss_latency_hist::mean 1 2924system.ruby.RMW_Read.miss_latency_hist::gmean 1 2925system.ruby.RMW_Read.miss_latency_hist \| 0 0.00% 0.00% \| 337 100.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% 2926system.ruby.RMW_Read.miss_latency_hist::total 337 2927system.ruby.Locked_RMW_Read.latency_hist::bucket_size 1 2928system.ruby.Locked_RMW_Read.latency_hist::max_bucket 9 2929system.ruby.Locked_RMW_Read.latency_hist::samples 10 2930system.ruby.Locked_RMW_Read.latency_hist::mean 1 2931system.ruby.Locked_RMW_Read.latency_hist::gmean 1 2932system.ruby.Locked_RMW_Read.latency_hist \| 0 0.00% 0.00% \| 10 100.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% 2933system.ruby.Locked_RMW_Read.latency_hist::total 10 2934system.ruby.Locked_RMW_Read.miss_latency_hist::bucket_size 1 2935system.ruby.Locked_RMW_Read.miss_latency_hist::max_bucket 9 2936system.ruby.Locked_RMW_Read.miss_latency_hist::samples 10 2937system.ruby.Locked_RMW_Read.miss_latency_hist::mean 1 2938system.ruby.Locked_RMW_Read.miss_latency_hist::gmean 1 2939system.ruby.Locked_RMW_Read.miss_latency_hist \| 0 0.00% 0.00% \| 10 100.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% 2940system.ruby.Locked_RMW_Read.miss_latency_hist::total 10 2941system.ruby.Locked_RMW_Write.latency_hist::bucket_size 1 2942system.ruby.Locked_RMW_Write.latency_hist::max_bucket 9 2943system.ruby.Locked_RMW_Write.latency_hist::samples 10 2944system.ruby.Locked_RMW_Write.latency_hist::mean 1 2945system.ruby.Locked_RMW_Write.latency_hist::gmean 1 2946system.ruby.Locked_RMW_Write.latency_hist \| 0 0.00% 0.00% \| 10 100.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% 2947system.ruby.Locked_RMW_Write.latency_hist::total 10 2948system.ruby.Locked_RMW_Write.miss_latency_hist::bucket_size 1 2949system.ruby.Locked_RMW_Write.miss_latency_hist::max_bucket 9 2950system.ruby.Locked_RMW_Write.miss_latency_hist::samples 10 2951system.ruby.Locked_RMW_Write.miss_latency_hist::mean 1 2952system.ruby.Locked_RMW_Write.miss_latency_hist::gmean 1 2953system.ruby.Locked_RMW_Write.miss_latency_hist \| 0 0.00% 0.00% \| 10 100.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% 2954system.ruby.Locked_RMW_Write.miss_latency_hist::total 10 2955system.ruby.L1Cache.miss_mach_latency_hist::bucket_size 1 2956system.ruby.L1Cache.miss_mach_latency_hist::max_bucket 9 2957system.ruby.L1Cache.miss_mach_latency_hist::samples 112609 2958system.ruby.L1Cache.miss_mach_latency_hist::mean 1 2959system.ruby.L1Cache.miss_mach_latency_hist::gmean 1 2960system.ruby.L1Cache.miss_mach_latency_hist \| 0 0.00% 0.00% \| 112609 100.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% 2961system.ruby.L1Cache.miss_mach_latency_hist::total 112609 2962system.ruby.L2Cache.miss_mach_latency_hist::bucket_size 2 2963system.ruby.L2Cache.miss_mach_latency_hist::max_bucket 19 2964system.ruby.L2Cache.miss_mach_latency_hist::samples 59 2965system.ruby.L2Cache.miss_mach_latency_hist::mean 19 2966system.ruby.L2Cache.miss_mach_latency_hist::gmean 19.000000 2967system.ruby.L2Cache.miss_mach_latency_hist \| 0 0.00% 0.00% \| 0 0.00% 0.00% \| 0 0.00% 0.00% \| 0 0.00% 0.00% \| 0 0.00% 0.00% \| 0 0.00% 0.00% \| 0 0.00% 0.00% \| 0 0.00% 0.00% \| 0 0.00% 0.00% \| 59 100.00% 100.00% 2968system.ruby.L2Cache.miss_mach_latency_hist::total 59 2969system.ruby.Directory.hit_mach_latency_hist::bucket_size 128 2970system.ruby.Directory.hit_mach_latency_hist::max_bucket 1279 2971system.ruby.Directory.hit_mach_latency_hist::samples 1535 2972system.ruby.Directory.hit_mach_latency_hist::mean 255.015635 2973system.ruby.Directory.hit_mach_latency_hist::gmean 251.519163 2974system.ruby.Directory.hit_mach_latency_hist::stdev 57.825523 2975system.ruby.Directory.hit_mach_latency_hist \| 0 0.00% 0.00% \| 1136 74.01% 74.01% \| 372 24.23% 98.24% \| 3 0.20% 98.44% \| 8 0.52% 98.96% \| 14 0.91% 99.87% \| 2 0.13% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% 2976system.ruby.Directory.hit_mach_latency_hist::total 1535 2977system.ruby.LD.L1Cache.miss_type_mach_latency_hist::bucket_size 1 2978system.ruby.LD.L1Cache.miss_type_mach_latency_hist::max_bucket 9 2979system.ruby.LD.L1Cache.miss_type_mach_latency_hist::samples 16155 2980system.ruby.LD.L1Cache.miss_type_mach_latency_hist::mean 1 2981system.ruby.LD.L1Cache.miss_type_mach_latency_hist::gmean 1 2982system.ruby.LD.L1Cache.miss_type_mach_latency_hist \| 0 0.00% 0.00% \| 16155 100.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% 2983system.ruby.LD.L1Cache.miss_type_mach_latency_hist::total 16155 2984system.ruby.LD.L2Cache.miss_type_mach_latency_hist::bucket_size 2 2985system.ruby.LD.L2Cache.miss_type_mach_latency_hist::max_bucket 19 2986system.ruby.LD.L2Cache.miss_type_mach_latency_hist::samples 5 2987system.ruby.LD.L2Cache.miss_type_mach_latency_hist::mean 19 2988system.ruby.LD.L2Cache.miss_type_mach_latency_hist::gmean 19.000000 2989system.ruby.LD.L2Cache.miss_type_mach_latency_hist \| 0 0.00% 0.00% \| 0 0.00% 0.00% \| 0 0.00% 0.00% \| 0 0.00% 0.00% \| 0 0.00% 0.00% \| 0 0.00% 0.00% \| 0 0.00% 0.00% \| 0 0.00% 0.00% \| 0 0.00% 0.00% \| 5 100.00% 100.00% 2990system.ruby.LD.L2Cache.miss_type_mach_latency_hist::total 5 2991system.ruby.LD.Directory.hit_type_mach_latency_hist::bucket_size 128 2992system.ruby.LD.Directory.hit_type_mach_latency_hist::max_bucket 1279 2993system.ruby.LD.Directory.hit_type_mach_latency_hist::samples 175 2994system.ruby.LD.Directory.hit_type_mach_latency_hist::mean 260.394286 2995system.ruby.LD.Directory.hit_type_mach_latency_hist::gmean 258.339713 2996system.ruby.LD.Directory.hit_type_mach_latency_hist::stdev 42.039376 2997system.ruby.LD.Directory.hit_type_mach_latency_hist \| 0 0.00% 0.00% \| 90 51.43% 51.43% \| 84 48.00% 99.43% \| 0 0.00% 99.43% \| 0 0.00% 99.43% \| 1 0.57% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% 2998system.ruby.LD.Directory.hit_type_mach_latency_hist::total 175 2999system.ruby.ST.L1Cache.miss_type_mach_latency_hist::bucket_size 1 3000system.ruby.ST.L1Cache.miss_type_mach_latency_hist::max_bucket 9 3001system.ruby.ST.L1Cache.miss_type_mach_latency_hist::samples 10090 3002system.ruby.ST.L1Cache.miss_type_mach_latency_hist::mean 1 3003system.ruby.ST.L1Cache.miss_type_mach_latency_hist::gmean 1 3004system.ruby.ST.L1Cache.miss_type_mach_latency_hist \| 0 0.00% 0.00% \| 10090 100.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% 3005system.ruby.ST.L1Cache.miss_type_mach_latency_hist::total 10090 3006system.ruby.ST.Directory.hit_type_mach_latency_hist::bucket_size 128 3007system.ruby.ST.Directory.hit_type_mach_latency_hist::max_bucket 1279 3008system.ruby.ST.Directory.hit_type_mach_latency_hist::samples 322 3009system.ruby.ST.Directory.hit_type_mach_latency_hist::mean 254.509317 3010system.ruby.ST.Directory.hit_type_mach_latency_hist::gmean 250.282441 3011system.ruby.ST.Directory.hit_type_mach_latency_hist::stdev 65.931487 3012system.ruby.ST.Directory.hit_type_mach_latency_hist \| 0 0.00% 0.00% \| 254 78.88% 78.88% \| 62 19.25% 98.14% \| 0 0.00% 98.14% \| 1 0.31% 98.45% \| 4 1.24% 99.69% \| 1 0.31% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% 3013system.ruby.ST.Directory.hit_type_mach_latency_hist::total 322 3014system.ruby.IFETCH.L1Cache.miss_type_mach_latency_hist::bucket_size 1 3015system.ruby.IFETCH.L1Cache.miss_type_mach_latency_hist::max_bucket 9 3016system.ruby.IFETCH.L1Cache.miss_type_mach_latency_hist::samples 86007 3017system.ruby.IFETCH.L1Cache.miss_type_mach_latency_hist::mean 1 3018system.ruby.IFETCH.L1Cache.miss_type_mach_latency_hist::gmean 1 3019system.ruby.IFETCH.L1Cache.miss_type_mach_latency_hist \| 0 0.00% 0.00% \| 86007 100.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% 3020system.ruby.IFETCH.L1Cache.miss_type_mach_latency_hist::total 86007 3021system.ruby.IFETCH.L2Cache.miss_type_mach_latency_hist::bucket_size 2 3022system.ruby.IFETCH.L2Cache.miss_type_mach_latency_hist::max_bucket 19 3023system.ruby.IFETCH.L2Cache.miss_type_mach_latency_hist::samples 54 3024system.ruby.IFETCH.L2Cache.miss_type_mach_latency_hist::mean 19 3025system.ruby.IFETCH.L2Cache.miss_type_mach_latency_hist::gmean 19.000000 3026system.ruby.IFETCH.L2Cache.miss_type_mach_latency_hist \| 0 0.00% 0.00% \| 0 0.00% 0.00% \| 0 0.00% 0.00% \| 0 0.00% 0.00% \| 0 0.00% 0.00% \| 0 0.00% 0.00% \| 0 0.00% 0.00% \| 0 0.00% 0.00% \| 0 0.00% 0.00% \| 54 100.00% 100.00% 3027system.ruby.IFETCH.L2Cache.miss_type_mach_latency_hist::total 54 3028system.ruby.IFETCH.Directory.hit_type_mach_latency_hist::bucket_size 128 3029system.ruby.IFETCH.Directory.hit_type_mach_latency_hist::max_bucket 1279 3030system.ruby.IFETCH.Directory.hit_type_mach_latency_hist::samples 1034 3031system.ruby.IFETCH.Directory.hit_type_mach_latency_hist::mean 254.218569 3032system.ruby.IFETCH.Directory.hit_type_mach_latency_hist::gmean 250.716467 3033system.ruby.IFETCH.Directory.hit_type_mach_latency_hist::stdev 57.514968 3034system.ruby.IFETCH.Directory.hit_type_mach_latency_hist \| 0 0.00% 0.00% \| 790 76.40% 76.40% \| 224 21.66% 98.07% \| 3 0.29% 98.36% \| 7 0.68% 99.03% \| 9 0.87% 99.90% \| 1 0.10% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% 3035system.ruby.IFETCH.Directory.hit_type_mach_latency_hist::total 1034 3036system.ruby.RMW_Read.L1Cache.miss_type_mach_latency_hist::bucket_size 1 3037system.ruby.RMW_Read.L1Cache.miss_type_mach_latency_hist::max_bucket 9 3038system.ruby.RMW_Read.L1Cache.miss_type_mach_latency_hist::samples 337 3039system.ruby.RMW_Read.L1Cache.miss_type_mach_latency_hist::mean 1 3040system.ruby.RMW_Read.L1Cache.miss_type_mach_latency_hist::gmean 1 3041system.ruby.RMW_Read.L1Cache.miss_type_mach_latency_hist \| 0 0.00% 0.00% \| 337 100.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% 3042system.ruby.RMW_Read.L1Cache.miss_type_mach_latency_hist::total 337 3043system.ruby.RMW_Read.Directory.hit_type_mach_latency_hist::bucket_size 32 3044system.ruby.RMW_Read.Directory.hit_type_mach_latency_hist::max_bucket 319 3045system.ruby.RMW_Read.Directory.hit_type_mach_latency_hist::samples 4 3046system.ruby.RMW_Read.Directory.hit_type_mach_latency_hist::mean 266.500000 3047system.ruby.RMW_Read.Directory.hit_type_mach_latency_hist::gmean 265.077347 3048system.ruby.RMW_Read.Directory.hit_type_mach_latency_hist::stdev 31.754265 3049system.ruby.RMW_Read.Directory.hit_type_mach_latency_hist \| 0 0.00% 0.00% \| 0 0.00% 0.00% \| 0 0.00% 0.00% \| 0 0.00% 0.00% \| 0 0.00% 0.00% \| 0 0.00% 0.00% \| 0 0.00% 0.00% \| 2 50.00% 50.00% \| 0 0.00% 50.00% \| 2 50.00% 100.00% 3050system.ruby.RMW_Read.Directory.hit_type_mach_latency_hist::total 4 3051system.ruby.Locked_RMW_Read.L1Cache.miss_type_mach_latency_hist::bucket_size 1 3052system.ruby.Locked_RMW_Read.L1Cache.miss_type_mach_latency_hist::max_bucket 9 3053system.ruby.Locked_RMW_Read.L1Cache.miss_type_mach_latency_hist::samples 10 3054system.ruby.Locked_RMW_Read.L1Cache.miss_type_mach_latency_hist::mean 1 3055system.ruby.Locked_RMW_Read.L1Cache.miss_type_mach_latency_hist::gmean 1 3056system.ruby.Locked_RMW_Read.L1Cache.miss_type_mach_latency_hist \| 0 0.00% 0.00% \| 10 100.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% 3057system.ruby.Locked_RMW_Read.L1Cache.miss_type_mach_latency_hist::total 10 3058system.ruby.Locked_RMW_Write.L1Cache.miss_type_mach_latency_hist::bucket_size 1 3059system.ruby.Locked_RMW_Write.L1Cache.miss_type_mach_latency_hist::max_bucket 9 3060system.ruby.Locked_RMW_Write.L1Cache.miss_type_mach_latency_hist::samples 10 3061system.ruby.Locked_RMW_Write.L1Cache.miss_type_mach_latency_hist::mean 1 3062system.ruby.Locked_RMW_Write.L1Cache.miss_type_mach_latency_hist::gmean 1 3063system.ruby.Locked_RMW_Write.L1Cache.miss_type_mach_latency_hist \| 0 0.00% 0.00% \| 10 100.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% \| 0 0.00% 100.00% 3064system.ruby.Locked_RMW_Write.L1Cache.miss_type_mach_latency_hist::total 10 3065system.ruby.CorePair_Controller.C0_Load_L1miss 180 0.00% 0.00% 3066system.ruby.CorePair_Controller.C0_Load_L1hit 16155 0.00% 0.00% 3067system.ruby.CorePair_Controller.Ifetch0_L1hit 86007 0.00% 0.00% 3068system.ruby.CorePair_Controller.Ifetch0_L1miss 1088 0.00% 0.00% 3069system.ruby.CorePair_Controller.C0_Store_L1miss 325 0.00% 0.00% 3070system.ruby.CorePair_Controller.C0_Store_L1hit 10448 0.00% 0.00% 3071system.ruby.CorePair_Controller.NB_AckS 1034 0.00% 0.00% 3072system.ruby.CorePair_Controller.NB_AckM 326 0.00% 0.00% 3073system.ruby.CorePair_Controller.NB_AckE 175 0.00% 0.00% 3074system.ruby.CorePair_Controller.L1I_Repl 589 0.00% 0.00% 3075system.ruby.CorePair_Controller.L1D0_Repl 24 0.00% 0.00% 3076system.ruby.CorePair_Controller.L2_to_L1D0 5 0.00% 0.00% 3077system.ruby.CorePair_Controller.L2_to_L1I 54 0.00% 0.00% 3078system.ruby.CorePair_Controller.PrbInvData 18 0.00% 0.00% 3079system.ruby.CorePair_Controller.PrbShrData 7 0.00% 0.00% 3080system.ruby.CorePair_Controller.I.C0_Load_L1miss 175 0.00% 0.00% 3081system.ruby.CorePair_Controller.I.Ifetch0_L1miss 1034 0.00% 0.00% 3082system.ruby.CorePair_Controller.I.C0_Store_L1miss 325 0.00% 0.00% 3083system.ruby.CorePair_Controller.I.PrbInvData 17 0.00% 0.00% 3084system.ruby.CorePair_Controller.I.PrbShrData 5 0.00% 0.00% 3085system.ruby.CorePair_Controller.S.Ifetch0_L1hit 86007 0.00% 0.00% 3086system.ruby.CorePair_Controller.S.Ifetch0_L1miss 54 0.00% 0.00% 3087system.ruby.CorePair_Controller.S.L1I_Repl 589 0.00% 0.00% 3088system.ruby.CorePair_Controller.E0.C0_Load_L1miss 2 0.00% 0.00% 3089system.ruby.CorePair_Controller.E0.C0_Load_L1hit 3356 0.00% 0.00% 3090system.ruby.CorePair_Controller.E0.C0_Store_L1hit 46 0.00% 0.00% 3091system.ruby.CorePair_Controller.E0.L1D0_Repl 16 0.00% 0.00% 3092system.ruby.CorePair_Controller.E0.PrbShrData 1 0.00% 0.00% 3093system.ruby.CorePair_Controller.O.C0_Load_L1hit 3 0.00% 0.00% 3094system.ruby.CorePair_Controller.O.C0_Store_L1hit 1 0.00% 0.00% 3095system.ruby.CorePair_Controller.M0.C0_Load_L1miss 3 0.00% 0.00% 3096system.ruby.CorePair_Controller.M0.C0_Load_L1hit 12796 0.00% 0.00% 3097system.ruby.CorePair_Controller.M0.C0_Store_L1hit 10401 0.00% 0.00% 3098system.ruby.CorePair_Controller.M0.L1D0_Repl 8 0.00% 0.00% 3099system.ruby.CorePair_Controller.M0.PrbInvData 1 0.00% 0.00% 3100system.ruby.CorePair_Controller.M0.PrbShrData 1 0.00% 0.00% 3101system.ruby.CorePair_Controller.I_M0.NB_AckM 325 0.00% 0.00% 3102system.ruby.CorePair_Controller.I_E0S.NB_AckE 175 0.00% 0.00% 3103system.ruby.CorePair_Controller.Si_F0.L2_to_L1I 54 0.00% 0.00% 3104system.ruby.CorePair_Controller.O_M0.NB_AckM 1 0.00% 0.00% 3105system.ruby.CorePair_Controller.S0.NB_AckS 1034 0.00% 0.00% 3106system.ruby.CorePair_Controller.E0_F.L2_to_L1D0 2 0.00% 0.00% 3107system.ruby.CorePair_Controller.M0_F.L2_to_L1D0 3 0.00% 0.00% 3108system.ruby.Directory_Controller.RdBlkS 1034 0.00% 0.00% 3109system.ruby.Directory_Controller.RdBlkM 326 0.00% 0.00% 3110system.ruby.Directory_Controller.RdBlk 182 0.00% 0.00% 3111system.ruby.Directory_Controller.WriteThrough 16 0.00% 0.00% 3112system.ruby.Directory_Controller.Atomic 3 0.00% 0.00% 3113system.ruby.Directory_Controller.CPUPrbResp 1560 0.00% 0.00% 3114system.ruby.Directory_Controller.ProbeAcksComplete 1560 0.00% 0.00% 3115system.ruby.Directory_Controller.MemData 1560 0.00% 0.00% 3116system.ruby.Directory_Controller.CoreUnblock 1541 0.00% 0.00% 3117system.ruby.Directory_Controller.UnblockWriteThrough 18 0.00% 0.00% 3118system.ruby.Directory_Controller.U.RdBlkS 1034 0.00% 0.00% 3119system.ruby.Directory_Controller.U.RdBlkM 326 0.00% 0.00% 3120system.ruby.Directory_Controller.U.RdBlk 182 0.00% 0.00% 3121system.ruby.Directory_Controller.U.WriteThrough 16 0.00% 0.00% 3122system.ruby.Directory_Controller.U.Atomic 2 0.00% 0.00% 3123system.ruby.Directory_Controller.BS_M.MemData 1034 0.00% 0.00% 3124system.ruby.Directory_Controller.BM_M.MemData 326 0.00% 0.00% 3125system.ruby.Directory_Controller.B_M.MemData 175 0.00% 0.00% 3126system.ruby.Directory_Controller.BS_PM.CPUPrbResp 1034 0.00% 0.00% 3127system.ruby.Directory_Controller.BS_PM.ProbeAcksComplete 1034 0.00% 0.00% 3128system.ruby.Directory_Controller.BM_PM.Atomic 1 0.00% 0.00% 3129system.ruby.Directory_Controller.BM_PM.CPUPrbResp 326 0.00% 0.00% 3130system.ruby.Directory_Controller.BM_PM.ProbeAcksComplete 326 0.00% 0.00% 3131system.ruby.Directory_Controller.BM_PM.MemData 18 0.00% 0.00% 3132system.ruby.Directory_Controller.B_PM.CPUPrbResp 175 0.00% 0.00% 3133system.ruby.Directory_Controller.B_PM.ProbeAcksComplete 175 0.00% 0.00% 3134system.ruby.Directory_Controller.B_PM.MemData 7 0.00% 0.00% 3135system.ruby.Directory_Controller.BM_Pm.CPUPrbResp 18 0.00% 0.00% 3136system.ruby.Directory_Controller.BM_Pm.ProbeAcksComplete 18 0.00% 0.00% 3137system.ruby.Directory_Controller.B_Pm.CPUPrbResp 7 0.00% 0.00% 3138system.ruby.Directory_Controller.B_Pm.ProbeAcksComplete 7 0.00% 0.00% 3139system.ruby.Directory_Controller.B.CoreUnblock 1541 0.00% 0.00% 3140system.ruby.Directory_Controller.B.UnblockWriteThrough 18 0.00% 0.00% 3141system.ruby.SQC_Controller.Fetch 86 0.00% 0.00% 3142system.ruby.SQC_Controller.Data 5 0.00% 0.00% 3143system.ruby.SQC_Controller.I.Fetch 5 0.00% 0.00% 3144system.ruby.SQC_Controller.I.Data 5 0.00% 0.00% 3145system.ruby.SQC_Controller.V.Fetch 81 0.00% 0.00% 3146system.ruby.TCC_Controller.RdBlk 9 0.00% 0.00% 3147system.ruby.TCC_Controller.WrVicBlk 16 0.00% 0.00% 3148system.ruby.TCC_Controller.Atomic 2 0.00% 0.00% 3149system.ruby.TCC_Controller.AtomicDone 1 0.00% 0.00% 3150system.ruby.TCC_Controller.Data 9 0.00% 0.00% 3151system.ruby.TCC_Controller.PrbInv 1535 0.00% 0.00% 3152system.ruby.TCC_Controller.WBAck 16 0.00% 0.00% 3153system.ruby.TCC_Controller.V.PrbInv 1 0.00% 0.00% 3154system.ruby.TCC_Controller.I.RdBlk 7 0.00% 0.00% 3155system.ruby.TCC_Controller.I.WrVicBlk 16 0.00% 0.00% 3156system.ruby.TCC_Controller.I.Atomic 1 0.00% 0.00% 3157system.ruby.TCC_Controller.I.PrbInv 1534 0.00% 0.00% 3158system.ruby.TCC_Controller.I.WBAck 16 0.00% 0.00% 3159system.ruby.TCC_Controller.IV.RdBlk 2 0.00% 0.00% 3160system.ruby.TCC_Controller.IV.Data 7 0.00% 0.00% 3161system.ruby.TCC_Controller.A.Atomic 1 0.00% 0.00% 3162system.ruby.TCC_Controller.A.AtomicDone 1 0.00% 0.00% 3163system.ruby.TCC_Controller.A.Data 2 0.00% 0.00% 3164system.ruby.TCP_Controller.Load \| 5 50.00% 50.00% \| 5 50.00% 100.00% 3165system.ruby.TCP_Controller.Load::total 10 3166system.ruby.TCP_Controller.StoreThrough \| 8 50.00% 50.00% \| 8 50.00% 100.00% 3167system.ruby.TCP_Controller.StoreThrough::total 16 3168system.ruby.TCP_Controller.Atomic \| 1 50.00% 50.00% \| 1 50.00% 100.00% 3169system.ruby.TCP_Controller.Atomic::total 2 3170system.ruby.TCP_Controller.Flush \| 768 50.00% 50.00% \| 768 50.00% 100.00% 3171system.ruby.TCP_Controller.Flush::total 1536 3172system.ruby.TCP_Controller.Evict \| 512 50.00% 50.00% \| 512 50.00% 100.00% 3173system.ruby.TCP_Controller.Evict::total 1024 3174system.ruby.TCP_Controller.TCC_Ack \| 3 50.00% 50.00% \| 3 50.00% 100.00% 3175system.ruby.TCP_Controller.TCC_Ack::total 6 3176system.ruby.TCP_Controller.TCC_AckWB \| 8 50.00% 50.00% \| 8 50.00% 100.00% 3177system.ruby.TCP_Controller.TCC_AckWB::total 16 3178system.ruby.TCP_Controller.I.Load \| 2 50.00% 50.00% \| 2 50.00% 100.00% 3179system.ruby.TCP_Controller.I.Load::total 4 3180system.ruby.TCP_Controller.I.StoreThrough \| 8 50.00% 50.00% \| 8 50.00% 100.00% 3181system.ruby.TCP_Controller.I.StoreThrough::total 16 3182system.ruby.TCP_Controller.I.Atomic \| 1 50.00% 50.00% \| 1 50.00% 100.00% 3183system.ruby.TCP_Controller.I.Atomic::total 2 3184system.ruby.TCP_Controller.I.Flush \| 766 50.00% 50.00% \| 766 50.00% 100.00% 3185system.ruby.TCP_Controller.I.Flush::total 1532 3186system.ruby.TCP_Controller.I.Evict \| 510 50.00% 50.00% \| 510 50.00% 100.00% 3187system.ruby.TCP_Controller.I.Evict::total 1020 3188system.ruby.TCP_Controller.I.TCC_Ack \| 2 50.00% 50.00% \| 2 50.00% 100.00% 3189system.ruby.TCP_Controller.I.TCC_Ack::total 4 3190system.ruby.TCP_Controller.I.TCC_AckWB \| 8 50.00% 50.00% \| 8 50.00% 100.00% 3191system.ruby.TCP_Controller.I.TCC_AckWB::total 16 3192system.ruby.TCP_Controller.V.Load \| 3 50.00% 50.00% \| 3 50.00% 100.00% 3193system.ruby.TCP_Controller.V.Load::total 6 3194system.ruby.TCP_Controller.V.Flush \| 2 50.00% 50.00% \| 2 50.00% 100.00% 3195system.ruby.TCP_Controller.V.Flush::total 4 3196system.ruby.TCP_Controller.V.Evict \| 2 50.00% 50.00% \| 2 50.00% 100.00% 3197system.ruby.TCP_Controller.V.Evict::total 4 3198system.ruby.TCP_Controller.A.TCC_Ack \| 1 50.00% 50.00% \| 1 50.00% 100.00% 3199system.ruby.TCP_Controller.A.TCC_Ack::total 2 3200 3201---------- End Simulation Statistics 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