| config.ini (11440:76b5639162af) | config.ini (11570:4aac82f10951) |
|---|---|
| 1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=false 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=System 13children=clk_domain cpu dvfs_handler mem_ctrl membus 14boot_osflags=a 15cache_line_size=64 16clk_domain=system.clk_domain | 1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=false 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=System 13children=clk_domain cpu dvfs_handler mem_ctrl membus 14boot_osflags=a 15cache_line_size=64 16clk_domain=system.clk_domain |
| 17default_p_state=UNDEFINED |
|
| 17eventq_index=0 18exit_on_work_items=false 19init_param=0 20kernel= 21kernel_addr_check=true 22load_addr_mask=1099511627775 23load_offset=0 24mem_mode=timing 25mem_ranges=0:536870911 26memories=system.mem_ctrl 27mmap_using_noreserve=false 28multi_thread=false 29num_work_ids=16 | 18eventq_index=0 19exit_on_work_items=false 20init_param=0 21kernel= 22kernel_addr_check=true 23load_addr_mask=1099511627775 24load_offset=0 25mem_mode=timing 26mem_ranges=0:536870911 27memories=system.mem_ctrl 28mmap_using_noreserve=false 29multi_thread=false 30num_work_ids=16 |
| 31p_state_clk_gate_bins=20 32p_state_clk_gate_max=1000000000000 33p_state_clk_gate_min=1000 34power_model=Null |
|
| 30readfile= 31symbolfile= 32thermal_components= 33thermal_model=Null 34work_begin_ckpt_count=0 35work_begin_cpu_id_exit=-1 36work_begin_exit_count=0 37work_cpus_ckpt_count=0 --- 18 unchanged lines hidden (view full) --- 56 57[system.cpu] 58type=TimingSimpleCPU 59children=dtb interrupts isa itb tracer workload 60branchPred=Null 61checker=Null 62clk_domain=system.clk_domain 63cpu_id=-1 | 35readfile= 36symbolfile= 37thermal_components= 38thermal_model=Null 39work_begin_ckpt_count=0 40work_begin_cpu_id_exit=-1 41work_begin_exit_count=0 42work_cpus_ckpt_count=0 --- 18 unchanged lines hidden (view full) --- 61 62[system.cpu] 63type=TimingSimpleCPU 64children=dtb interrupts isa itb tracer workload 65branchPred=Null 66checker=Null 67clk_domain=system.clk_domain 68cpu_id=-1 |
| 69default_p_state=UNDEFINED |
|
| 64do_checkpoint_insts=true 65do_quiesce=true 66do_statistics_insts=true 67dtb=system.cpu.dtb 68eventq_index=0 69function_trace=false 70function_trace_start=0 71interrupts=system.cpu.interrupts 72isa=system.cpu.isa 73itb=system.cpu.itb 74max_insts_all_threads=0 75max_insts_any_thread=0 76max_loads_all_threads=0 77max_loads_any_thread=0 78numThreads=1 | 70do_checkpoint_insts=true 71do_quiesce=true 72do_statistics_insts=true 73dtb=system.cpu.dtb 74eventq_index=0 75function_trace=false 76function_trace_start=0 77interrupts=system.cpu.interrupts 78isa=system.cpu.isa 79itb=system.cpu.itb 80max_insts_all_threads=0 81max_insts_any_thread=0 82max_loads_all_threads=0 83max_loads_any_thread=0 84numThreads=1 |
| 85p_state_clk_gate_bins=20 86p_state_clk_gate_max=1000000000000 87p_state_clk_gate_min=1000 88power_model=Null |
|
| 79profile=0 80progress_interval=0 81simpoint_start_insts= 82socket_id=0 83switched_out=false 84system=system 85tracer=system.cpu.tracer 86workload=system.cpu.workload --- 85 unchanged lines hidden (view full) --- 172activation_limit=4 173addr_mapping=RoRaBaCoCh 174bank_groups_per_rank=0 175banks_per_rank=8 176burst_length=8 177channels=1 178clk_domain=system.clk_domain 179conf_table_reported=true | 89profile=0 90progress_interval=0 91simpoint_start_insts= 92socket_id=0 93switched_out=false 94system=system 95tracer=system.cpu.tracer 96workload=system.cpu.workload --- 85 unchanged lines hidden (view full) --- 182activation_limit=4 183addr_mapping=RoRaBaCoCh 184bank_groups_per_rank=0 185banks_per_rank=8 186burst_length=8 187channels=1 188clk_domain=system.clk_domain 189conf_table_reported=true |
| 190default_p_state=UNDEFINED |
|
| 180device_bus_width=8 181device_rowbuffer_size=1024 182device_size=536870912 183devices_per_rank=8 184dll=true 185eventq_index=0 186in_addr_map=true 187max_accesses_per_row=16 188mem_sched_policy=frfcfs 189min_writes_per_switch=16 190null=false | 191device_bus_width=8 192device_rowbuffer_size=1024 193device_size=536870912 194devices_per_rank=8 195dll=true 196eventq_index=0 197in_addr_map=true 198max_accesses_per_row=16 199mem_sched_policy=frfcfs 200min_writes_per_switch=16 201null=false |
| 202p_state_clk_gate_bins=20 203p_state_clk_gate_max=1000000000000 204p_state_clk_gate_min=1000 |
|
| 191page_policy=open_adaptive | 205page_policy=open_adaptive |
| 206power_model=Null |
|
| 192range=0:536870911 193ranks_per_channel=2 194read_buffer_size=32 195static_backend_latency=10000 196static_frontend_latency=10000 197tBURST=5000 198tCCD_L=0 199tCK=1250 --- 18 unchanged lines hidden (view full) --- 218write_buffer_size=64 219write_high_thresh_perc=85 220write_low_thresh_perc=50 221port=system.membus.master[0] 222 223[system.membus] 224type=CoherentXBar 225clk_domain=system.clk_domain | 207range=0:536870911 208ranks_per_channel=2 209read_buffer_size=32 210static_backend_latency=10000 211static_frontend_latency=10000 212tBURST=5000 213tCCD_L=0 214tCK=1250 --- 18 unchanged lines hidden (view full) --- 233write_buffer_size=64 234write_high_thresh_perc=85 235write_low_thresh_perc=50 236port=system.membus.master[0] 237 238[system.membus] 239type=CoherentXBar 240clk_domain=system.clk_domain |
| 241default_p_state=UNDEFINED |
|
| 226eventq_index=0 227forward_latency=4 228frontend_latency=3 | 242eventq_index=0 243forward_latency=4 244frontend_latency=3 |
| 245p_state_clk_gate_bins=20 246p_state_clk_gate_max=1000000000000 247p_state_clk_gate_min=1000 |
|
| 229point_of_coherency=true | 248point_of_coherency=true |
| 249power_model=Null |
|
| 230response_latency=2 231snoop_filter=Null 232snoop_response_latency=4 233system=system 234use_default_range=false 235width=16 236master=system.mem_ctrl.port 237slave=system.cpu.icache_port system.cpu.dcache_port system.system_port 238 | 250response_latency=2 251snoop_filter=Null 252snoop_response_latency=4 253system=system 254use_default_range=false 255width=16 256master=system.mem_ctrl.port 257slave=system.cpu.icache_port system.cpu.dcache_port system.system_port 258 |