| config.ini (11440:76b5639162af) | config.ini (11570:4aac82f10951) |
|---|---|
| 1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=false 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=System 13children=clk_domain cpu dvfs_handler l2bus l2cache mem_ctrl membus 14boot_osflags=a 15cache_line_size=64 16clk_domain=system.clk_domain | 1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=false 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=System 13children=clk_domain cpu dvfs_handler l2bus l2cache mem_ctrl membus 14boot_osflags=a 15cache_line_size=64 16clk_domain=system.clk_domain |
| 17default_p_state=UNDEFINED |
|
| 17eventq_index=0 18exit_on_work_items=false 19init_param=0 20kernel= 21kernel_addr_check=true 22load_addr_mask=1099511627775 23load_offset=0 24mem_mode=timing 25mem_ranges=0:536870911 26memories=system.mem_ctrl 27mmap_using_noreserve=false 28multi_thread=false 29num_work_ids=16 | 18eventq_index=0 19exit_on_work_items=false 20init_param=0 21kernel= 22kernel_addr_check=true 23load_addr_mask=1099511627775 24load_offset=0 25mem_mode=timing 26mem_ranges=0:536870911 27memories=system.mem_ctrl 28mmap_using_noreserve=false 29multi_thread=false 30num_work_ids=16 |
| 31p_state_clk_gate_bins=20 32p_state_clk_gate_max=1000000000000 33p_state_clk_gate_min=1000 34power_model=Null |
|
| 30readfile= 31symbolfile= 32thermal_components= 33thermal_model=Null 34work_begin_ckpt_count=0 35work_begin_cpu_id_exit=-1 36work_begin_exit_count=0 37work_cpus_ckpt_count=0 --- 18 unchanged lines hidden (view full) --- 56 57[system.cpu] 58type=TimingSimpleCPU 59children=dcache dtb icache interrupts isa itb tracer workload 60branchPred=Null 61checker=Null 62clk_domain=system.clk_domain 63cpu_id=-1 | 35readfile= 36symbolfile= 37thermal_components= 38thermal_model=Null 39work_begin_ckpt_count=0 40work_begin_cpu_id_exit=-1 41work_begin_exit_count=0 42work_cpus_ckpt_count=0 --- 18 unchanged lines hidden (view full) --- 61 62[system.cpu] 63type=TimingSimpleCPU 64children=dcache dtb icache interrupts isa itb tracer workload 65branchPred=Null 66checker=Null 67clk_domain=system.clk_domain 68cpu_id=-1 |
| 69default_p_state=UNDEFINED |
|
| 64do_checkpoint_insts=true 65do_quiesce=true 66do_statistics_insts=true 67dtb=system.cpu.dtb 68eventq_index=0 69function_trace=false 70function_trace_start=0 71interrupts=system.cpu.interrupts 72isa=system.cpu.isa 73itb=system.cpu.itb 74max_insts_all_threads=0 75max_insts_any_thread=0 76max_loads_all_threads=0 77max_loads_any_thread=0 78numThreads=1 | 70do_checkpoint_insts=true 71do_quiesce=true 72do_statistics_insts=true 73dtb=system.cpu.dtb 74eventq_index=0 75function_trace=false 76function_trace_start=0 77interrupts=system.cpu.interrupts 78isa=system.cpu.isa 79itb=system.cpu.itb 80max_insts_all_threads=0 81max_insts_any_thread=0 82max_loads_all_threads=0 83max_loads_any_thread=0 84numThreads=1 |
| 85p_state_clk_gate_bins=20 86p_state_clk_gate_max=1000000000000 87p_state_clk_gate_min=1000 88power_model=Null |
|
| 79profile=0 80progress_interval=0 81simpoint_start_insts= 82socket_id=0 83switched_out=false 84system=system 85tracer=system.cpu.tracer 86workload=system.cpu.workload 87dcache_port=system.cpu.dcache.cpu_side 88icache_port=system.cpu.icache.cpu_side 89 90[system.cpu.dcache] 91type=Cache 92children=tags 93addr_ranges=0:18446744073709551615 94assoc=2 95clk_domain=system.clk_domain 96clusivity=mostly_incl | 89profile=0 90progress_interval=0 91simpoint_start_insts= 92socket_id=0 93switched_out=false 94system=system 95tracer=system.cpu.tracer 96workload=system.cpu.workload 97dcache_port=system.cpu.dcache.cpu_side 98icache_port=system.cpu.icache.cpu_side 99 100[system.cpu.dcache] 101type=Cache 102children=tags 103addr_ranges=0:18446744073709551615 104assoc=2 105clk_domain=system.clk_domain 106clusivity=mostly_incl |
| 107default_p_state=UNDEFINED |
|
| 97demand_mshr_reserve=1 98eventq_index=0 99hit_latency=2 100is_read_only=false 101max_miss_count=0 102mshrs=4 | 108demand_mshr_reserve=1 109eventq_index=0 110hit_latency=2 111is_read_only=false 112max_miss_count=0 113mshrs=4 |
| 114p_state_clk_gate_bins=20 115p_state_clk_gate_max=1000000000000 116p_state_clk_gate_min=1000 117power_model=Null |
|
| 103prefetch_on_access=false 104prefetcher=Null 105response_latency=2 106sequential_access=false 107size=65536 108system=system 109tags=system.cpu.dcache.tags 110tgts_per_mshr=20 111write_buffers=8 112writeback_clean=false 113cpu_side=system.cpu.dcache_port 114mem_side=system.l2bus.slave[1] 115 116[system.cpu.dcache.tags] 117type=LRU 118assoc=2 119block_size=64 120clk_domain=system.clk_domain | 118prefetch_on_access=false 119prefetcher=Null 120response_latency=2 121sequential_access=false 122size=65536 123system=system 124tags=system.cpu.dcache.tags 125tgts_per_mshr=20 126write_buffers=8 127writeback_clean=false 128cpu_side=system.cpu.dcache_port 129mem_side=system.l2bus.slave[1] 130 131[system.cpu.dcache.tags] 132type=LRU 133assoc=2 134block_size=64 135clk_domain=system.clk_domain |
| 136default_p_state=UNDEFINED |
|
| 121eventq_index=0 122hit_latency=2 | 137eventq_index=0 138hit_latency=2 |
| 139p_state_clk_gate_bins=20 140p_state_clk_gate_max=1000000000000 141p_state_clk_gate_min=1000 142power_model=Null |
|
| 123sequential_access=false 124size=65536 125 126[system.cpu.dtb] 127type=AlphaTLB 128eventq_index=0 129size=64 130 131[system.cpu.icache] 132type=Cache 133children=tags 134addr_ranges=0:18446744073709551615 135assoc=2 136clk_domain=system.clk_domain 137clusivity=mostly_incl | 143sequential_access=false 144size=65536 145 146[system.cpu.dtb] 147type=AlphaTLB 148eventq_index=0 149size=64 150 151[system.cpu.icache] 152type=Cache 153children=tags 154addr_ranges=0:18446744073709551615 155assoc=2 156clk_domain=system.clk_domain 157clusivity=mostly_incl |
| 158default_p_state=UNDEFINED |
|
| 138demand_mshr_reserve=1 139eventq_index=0 140hit_latency=2 141is_read_only=false 142max_miss_count=0 143mshrs=4 | 159demand_mshr_reserve=1 160eventq_index=0 161hit_latency=2 162is_read_only=false 163max_miss_count=0 164mshrs=4 |
| 165p_state_clk_gate_bins=20 166p_state_clk_gate_max=1000000000000 167p_state_clk_gate_min=1000 168power_model=Null |
|
| 144prefetch_on_access=false 145prefetcher=Null 146response_latency=2 147sequential_access=false 148size=16384 149system=system 150tags=system.cpu.icache.tags 151tgts_per_mshr=20 152write_buffers=8 153writeback_clean=false 154cpu_side=system.cpu.icache_port 155mem_side=system.l2bus.slave[0] 156 157[system.cpu.icache.tags] 158type=LRU 159assoc=2 160block_size=64 161clk_domain=system.clk_domain | 169prefetch_on_access=false 170prefetcher=Null 171response_latency=2 172sequential_access=false 173size=16384 174system=system 175tags=system.cpu.icache.tags 176tgts_per_mshr=20 177write_buffers=8 178writeback_clean=false 179cpu_side=system.cpu.icache_port 180mem_side=system.l2bus.slave[0] 181 182[system.cpu.icache.tags] 183type=LRU 184assoc=2 185block_size=64 186clk_domain=system.clk_domain |
| 187default_p_state=UNDEFINED |
|
| 162eventq_index=0 163hit_latency=2 | 188eventq_index=0 189hit_latency=2 |
| 190p_state_clk_gate_bins=20 191p_state_clk_gate_max=1000000000000 192p_state_clk_gate_min=1000 193power_model=Null |
|
| 164sequential_access=false 165size=16384 166 167[system.cpu.interrupts] 168type=AlphaInterrupts 169eventq_index=0 170 171[system.cpu.isa] --- 40 unchanged lines hidden (view full) --- 212eventq_index=0 213sys_clk_domain=system.clk_domain 214transition_latency=100000000 215 216[system.l2bus] 217type=CoherentXBar 218children=snoop_filter 219clk_domain=system.clk_domain | 194sequential_access=false 195size=16384 196 197[system.cpu.interrupts] 198type=AlphaInterrupts 199eventq_index=0 200 201[system.cpu.isa] --- 40 unchanged lines hidden (view full) --- 242eventq_index=0 243sys_clk_domain=system.clk_domain 244transition_latency=100000000 245 246[system.l2bus] 247type=CoherentXBar 248children=snoop_filter 249clk_domain=system.clk_domain |
| 250default_p_state=UNDEFINED |
|
| 220eventq_index=0 221forward_latency=0 222frontend_latency=1 | 251eventq_index=0 252forward_latency=0 253frontend_latency=1 |
| 254p_state_clk_gate_bins=20 255p_state_clk_gate_max=1000000000000 256p_state_clk_gate_min=1000 |
|
| 223point_of_coherency=false | 257point_of_coherency=false |
| 258power_model=Null |
|
| 224response_latency=1 225snoop_filter=system.l2bus.snoop_filter 226snoop_response_latency=1 227system=system 228use_default_range=false 229width=32 230master=system.l2cache.cpu_side 231slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side --- 7 unchanged lines hidden (view full) --- 239 240[system.l2cache] 241type=Cache 242children=tags 243addr_ranges=0:18446744073709551615 244assoc=8 245clk_domain=system.clk_domain 246clusivity=mostly_incl | 259response_latency=1 260snoop_filter=system.l2bus.snoop_filter 261snoop_response_latency=1 262system=system 263use_default_range=false 264width=32 265master=system.l2cache.cpu_side 266slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side --- 7 unchanged lines hidden (view full) --- 274 275[system.l2cache] 276type=Cache 277children=tags 278addr_ranges=0:18446744073709551615 279assoc=8 280clk_domain=system.clk_domain 281clusivity=mostly_incl |
| 282default_p_state=UNDEFINED |
|
| 247demand_mshr_reserve=1 248eventq_index=0 249hit_latency=20 250is_read_only=false 251max_miss_count=0 252mshrs=20 | 283demand_mshr_reserve=1 284eventq_index=0 285hit_latency=20 286is_read_only=false 287max_miss_count=0 288mshrs=20 |
| 289p_state_clk_gate_bins=20 290p_state_clk_gate_max=1000000000000 291p_state_clk_gate_min=1000 292power_model=Null |
|
| 253prefetch_on_access=false 254prefetcher=Null 255response_latency=20 256sequential_access=false 257size=262144 258system=system 259tags=system.l2cache.tags 260tgts_per_mshr=12 261write_buffers=8 262writeback_clean=false 263cpu_side=system.l2bus.master[0] 264mem_side=system.membus.slave[0] 265 266[system.l2cache.tags] 267type=LRU 268assoc=8 269block_size=64 270clk_domain=system.clk_domain | 293prefetch_on_access=false 294prefetcher=Null 295response_latency=20 296sequential_access=false 297size=262144 298system=system 299tags=system.l2cache.tags 300tgts_per_mshr=12 301write_buffers=8 302writeback_clean=false 303cpu_side=system.l2bus.master[0] 304mem_side=system.membus.slave[0] 305 306[system.l2cache.tags] 307type=LRU 308assoc=8 309block_size=64 310clk_domain=system.clk_domain |
| 311default_p_state=UNDEFINED |
|
| 271eventq_index=0 272hit_latency=20 | 312eventq_index=0 313hit_latency=20 |
| 314p_state_clk_gate_bins=20 315p_state_clk_gate_max=1000000000000 316p_state_clk_gate_min=1000 317power_model=Null |
|
| 273sequential_access=false 274size=262144 275 276[system.mem_ctrl] 277type=DRAMCtrl 278IDD0=0.075000 279IDD02=0.000000 280IDD2N=0.050000 --- 21 unchanged lines hidden (view full) --- 302activation_limit=4 303addr_mapping=RoRaBaCoCh 304bank_groups_per_rank=0 305banks_per_rank=8 306burst_length=8 307channels=1 308clk_domain=system.clk_domain 309conf_table_reported=true | 318sequential_access=false 319size=262144 320 321[system.mem_ctrl] 322type=DRAMCtrl 323IDD0=0.075000 324IDD02=0.000000 325IDD2N=0.050000 --- 21 unchanged lines hidden (view full) --- 347activation_limit=4 348addr_mapping=RoRaBaCoCh 349bank_groups_per_rank=0 350banks_per_rank=8 351burst_length=8 352channels=1 353clk_domain=system.clk_domain 354conf_table_reported=true |
| 355default_p_state=UNDEFINED |
|
| 310device_bus_width=8 311device_rowbuffer_size=1024 312device_size=536870912 313devices_per_rank=8 314dll=true 315eventq_index=0 316in_addr_map=true 317max_accesses_per_row=16 318mem_sched_policy=frfcfs 319min_writes_per_switch=16 320null=false | 356device_bus_width=8 357device_rowbuffer_size=1024 358device_size=536870912 359devices_per_rank=8 360dll=true 361eventq_index=0 362in_addr_map=true 363max_accesses_per_row=16 364mem_sched_policy=frfcfs 365min_writes_per_switch=16 366null=false |
| 367p_state_clk_gate_bins=20 368p_state_clk_gate_max=1000000000000 369p_state_clk_gate_min=1000 |
|
| 321page_policy=open_adaptive | 370page_policy=open_adaptive |
| 371power_model=Null |
|
| 322range=0:536870911 323ranks_per_channel=2 324read_buffer_size=32 325static_backend_latency=10000 326static_frontend_latency=10000 327tBURST=5000 328tCCD_L=0 329tCK=1250 --- 18 unchanged lines hidden (view full) --- 348write_buffer_size=64 349write_high_thresh_perc=85 350write_low_thresh_perc=50 351port=system.membus.master[0] 352 353[system.membus] 354type=CoherentXBar 355clk_domain=system.clk_domain | 372range=0:536870911 373ranks_per_channel=2 374read_buffer_size=32 375static_backend_latency=10000 376static_frontend_latency=10000 377tBURST=5000 378tCCD_L=0 379tCK=1250 --- 18 unchanged lines hidden (view full) --- 398write_buffer_size=64 399write_high_thresh_perc=85 400write_low_thresh_perc=50 401port=system.membus.master[0] 402 403[system.membus] 404type=CoherentXBar 405clk_domain=system.clk_domain |
| 406default_p_state=UNDEFINED |
|
| 356eventq_index=0 357forward_latency=4 358frontend_latency=3 | 407eventq_index=0 408forward_latency=4 409frontend_latency=3 |
| 410p_state_clk_gate_bins=20 411p_state_clk_gate_max=1000000000000 412p_state_clk_gate_min=1000 |
|
| 359point_of_coherency=true | 413point_of_coherency=true |
| 414power_model=Null |
|
| 360response_latency=2 361snoop_filter=Null 362snoop_response_latency=4 363system=system 364use_default_range=false 365width=16 366master=system.mem_ctrl.port 367slave=system.l2cache.mem_side system.system_port 368 | 415response_latency=2 416snoop_filter=Null 417snoop_response_latency=4 418system=system 419use_default_range=false 420width=16 421master=system.mem_ctrl.port 422slave=system.l2cache.mem_side system.system_port 423 |