Deleted Added
sdiff udiff text old ( 9481:b0fa6b872f40 ) new ( 9729:e2fafd224f43 )
full compact
1
2---------- Begin Simulation Statistics ----------
3sim_seconds 0.000041 # Number of seconds simulated
4sim_ticks 41368000 # Number of ticks simulated
5final_tick 41368000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
6sim_freq 1000000000000 # Frequency of simulated ticks
7host_inst_rate 26295 # Simulator instruction rate (inst/s)
8host_op_rate 26295 # Simulator op (including micro ops) rate (op/s)
9host_tick_rate 71739884 # Simulator tick rate (ticks/s)
10host_mem_usage 277420 # Number of bytes of host memory used
11host_seconds 0.58 # Real time elapsed on the host
12sim_insts 15162 # Number of instructions simulated
13sim_ops 15162 # Number of ops (including micro ops) simulated
14system.physmem.bytes_read::cpu.inst 17792 # Number of bytes read from this memory
15system.physmem.bytes_read::cpu.data 8832 # Number of bytes read from this memory
16system.physmem.bytes_read::total 26624 # Number of bytes read from this memory
17system.physmem.bytes_inst_read::cpu.inst 17792 # Number of instructions bytes read from this memory
18system.physmem.bytes_inst_read::total 17792 # Number of instructions bytes read from this memory
19system.physmem.num_reads::cpu.inst 278 # Number of read requests responded to by this memory
20system.physmem.num_reads::cpu.data 138 # Number of read requests responded to by this memory
21system.physmem.num_reads::total 416 # Number of read requests responded to by this memory
22system.physmem.bw_read::cpu.inst 430090892 # Total read bandwidth from this memory (bytes/s)
23system.physmem.bw_read::cpu.data 213498356 # Total read bandwidth from this memory (bytes/s)
24system.physmem.bw_read::total 643589248 # Total read bandwidth from this memory (bytes/s)
25system.physmem.bw_inst_read::cpu.inst 430090892 # Instruction read bandwidth from this memory (bytes/s)
26system.physmem.bw_inst_read::total 430090892 # Instruction read bandwidth from this memory (bytes/s)
27system.physmem.bw_total::cpu.inst 430090892 # Total bandwidth to/from this memory (bytes/s)
28system.physmem.bw_total::cpu.data 213498356 # Total bandwidth to/from this memory (bytes/s)
29system.physmem.bw_total::total 643589248 # Total bandwidth to/from this memory (bytes/s)
30system.cpu.workload.num_syscalls 18 # Number of system calls
31system.cpu.numCycles 82736 # number of cpu cycles simulated
32system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
33system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
34system.cpu.committedInsts 15162 # Number of instructions committed
35system.cpu.committedOps 15162 # Number of ops (including micro ops) committed
36system.cpu.num_int_alu_accesses 12219 # Number of integer alu accesses
37system.cpu.num_fp_alu_accesses 0 # Number of float alu accesses

--- 312 unchanged lines hidden (view full) ---

350system.cpu.dcache.ReadReq_avg_mshr_miss_latency::total 53000 # average ReadReq mshr miss latency
351system.cpu.dcache.WriteReq_avg_mshr_miss_latency::cpu.data 53000 # average WriteReq mshr miss latency
352system.cpu.dcache.WriteReq_avg_mshr_miss_latency::total 53000 # average WriteReq mshr miss latency
353system.cpu.dcache.demand_avg_mshr_miss_latency::cpu.data 53000 # average overall mshr miss latency
354system.cpu.dcache.demand_avg_mshr_miss_latency::total 53000 # average overall mshr miss latency
355system.cpu.dcache.overall_avg_mshr_miss_latency::cpu.data 53000 # average overall mshr miss latency
356system.cpu.dcache.overall_avg_mshr_miss_latency::total 53000 # average overall mshr miss latency
357system.cpu.dcache.no_allocate_misses 0 # Number of misses that were no-allocate
358
359---------- End Simulation Statistics ----------