4,5c4,5
< sim_ticks 26943000 # Number of ticks simulated
< final_tick 26943000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
---
> sim_ticks 26944000 # Number of ticks simulated
> final_tick 26944000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
7,11c7,11
< host_inst_rate 30305 # Simulator instruction rate (inst/s)
< host_op_rate 30304 # Simulator op (including micro ops) rate (op/s)
< host_tick_rate 56555572 # Simulator tick rate (ticks/s)
< host_mem_usage 288252 # Number of bytes of host memory used
< host_seconds 0.48 # Real time elapsed on the host
---
> host_inst_rate 95332 # Simulator instruction rate (inst/s)
> host_op_rate 95323 # Simulator op (including micro ops) rate (op/s)
> host_tick_rate 177899852 # Simulator tick rate (ticks/s)
> host_mem_usage 294468 # Number of bytes of host memory used
> host_seconds 0.15 # Real time elapsed on the host
24,31c24,31
< system.physmem.bw_read::cpu.inst 812381695 # Total read bandwidth from this memory (bytes/s)
< system.physmem.bw_read::cpu.data 349181606 # Total read bandwidth from this memory (bytes/s)
< system.physmem.bw_read::total 1161563300 # Total read bandwidth from this memory (bytes/s)
< system.physmem.bw_inst_read::cpu.inst 812381695 # Instruction read bandwidth from this memory (bytes/s)
< system.physmem.bw_inst_read::total 812381695 # Instruction read bandwidth from this memory (bytes/s)
< system.physmem.bw_total::cpu.inst 812381695 # Total bandwidth to/from this memory (bytes/s)
< system.physmem.bw_total::cpu.data 349181606 # Total bandwidth to/from this memory (bytes/s)
< system.physmem.bw_total::total 1161563300 # Total bandwidth to/from this memory (bytes/s)
---
> system.physmem.bw_read::cpu.inst 812351544 # Total read bandwidth from this memory (bytes/s)
> system.physmem.bw_read::cpu.data 349168646 # Total read bandwidth from this memory (bytes/s)
> system.physmem.bw_read::total 1161520190 # Total read bandwidth from this memory (bytes/s)
> system.physmem.bw_inst_read::cpu.inst 812351544 # Instruction read bandwidth from this memory (bytes/s)
> system.physmem.bw_inst_read::total 812351544 # Instruction read bandwidth from this memory (bytes/s)
> system.physmem.bw_total::cpu.inst 812351544 # Total bandwidth to/from this memory (bytes/s)
> system.physmem.bw_total::cpu.data 349168646 # Total bandwidth to/from this memory (bytes/s)
> system.physmem.bw_total::total 1161520190 # Total bandwidth to/from this memory (bytes/s)
78c78
< system.physmem.totGap 26890000 # Total gap between requests
---
> system.physmem.totGap 26891000 # Total gap between requests
209c209
< system.physmem.avgRdBW 1161.56 # Average DRAM read bandwidth in MiByte/s
---
> system.physmem.avgRdBW 1161.52 # Average DRAM read bandwidth in MiByte/s
211c211
< system.physmem.avgRdBWSys 1161.56 # Average system read bandwidth in MiByte/s
---
> system.physmem.avgRdBWSys 1161.52 # Average system read bandwidth in MiByte/s
223c223
< system.physmem.avgGap 54989.78 # Average gap between requests
---
> system.physmem.avgGap 54991.82 # Average gap between requests
248c248
< system.physmem_1.memoryStateTime::IDLE 2039000 # Time in different power states
---
> system.physmem_1.memoryStateTime::IDLE 2040000 # Time in different power states
264c264
< system.cpu.numCycles 53887 # number of cpu cycles simulated
---
> system.cpu.numCycles 53889 # number of cpu cycles simulated
267c267
< system.cpu.fetch.icacheStallCycles 13793 # Number of cycles fetch is stalled on an Icache miss
---
> system.cpu.fetch.icacheStallCycles 13792 # Number of cycles fetch is stalled on an Icache miss
271c271
< system.cpu.fetch.Cycles 15451 # Number of cycles fetch has run and was not squashing or blocked
---
> system.cpu.fetch.Cycles 15452 # Number of cycles fetch has run and was not squashing or blocked
294,295c294,295
< system.cpu.fetch.branchRate 0.148941 # Number of branch fetches per cycle
< system.cpu.fetch.rate 0.689962 # Number of inst fetches per cycle
---
> system.cpu.fetch.branchRate 0.148936 # Number of branch fetches per cycle
> system.cpu.fetch.rate 0.689937 # Number of inst fetches per cycle
416c416
< system.cpu.iq.rate 0.386642 # Inst issue rate
---
> system.cpu.iq.rate 0.386628 # Inst issue rate
460c460
< system.cpu.iew.exec_rate 0.371370 # Inst execution rate
---
> system.cpu.iew.exec_rate 0.371356 # Inst execution rate
466c466
< system.cpu.iew.wb_rate 0.360161 # insts written-back per cycle
---
> system.cpu.iew.wb_rate 0.360148 # insts written-back per cycle
538c538
< system.cpu.idleCycles 22477 # Total number of cycles that the CPU has spent unscheduled due to idling
---
> system.cpu.idleCycles 22479 # Total number of cycles that the CPU has spent unscheduled due to idling
541,544c541,544
< system.cpu.cpi 3.732821 # CPI: Cycles Per Instruction
< system.cpu.cpi_total 3.732821 # CPI: Total CPI of All Threads
< system.cpu.ipc 0.267894 # IPC: Instructions Per Cycle
< system.cpu.ipc_total 0.267894 # IPC: Total IPC of All Threads
---
> system.cpu.cpi 3.732959 # CPI: Cycles Per Instruction
> system.cpu.cpi_total 3.732959 # CPI: Total CPI of All Threads
> system.cpu.ipc 0.267884 # IPC: Instructions Per Cycle
> system.cpu.ipc_total 0.267884 # IPC: Total IPC of All Threads
550c550
< system.cpu.dcache.tags.tagsinuse 98.068517 # Cycle average of tags in use
---
> system.cpu.dcache.tags.tagsinuse 98.069813 # Cycle average of tags in use
555c555
< system.cpu.dcache.tags.occ_blocks::cpu.data 98.068517 # Average occupied blocks per requestor
---
> system.cpu.dcache.tags.occ_blocks::cpu.data 98.069813 # Average occupied blocks per requestor
666c666
< system.cpu.icache.tags.tagsinuse 190.286110 # Cycle average of tags in use
---
> system.cpu.icache.tags.tagsinuse 190.290590 # Cycle average of tags in use
671,673c671,673
< system.cpu.icache.tags.occ_blocks::cpu.inst 190.286110 # Average occupied blocks per requestor
< system.cpu.icache.tags.occ_percent::cpu.inst 0.092913 # Average percentage of cache occupancy
< system.cpu.icache.tags.occ_percent::total 0.092913 # Average percentage of cache occupancy
---
> system.cpu.icache.tags.occ_blocks::cpu.inst 190.290590 # Average occupied blocks per requestor
> system.cpu.icache.tags.occ_percent::cpu.inst 0.092915 # Average percentage of cache occupancy
> system.cpu.icache.tags.occ_percent::total 0.092915 # Average percentage of cache occupancy
692,697c692,697
< system.cpu.icache.ReadReq_miss_latency::cpu.inst 36198500 # number of ReadReq miss cycles
< system.cpu.icache.ReadReq_miss_latency::total 36198500 # number of ReadReq miss cycles
< system.cpu.icache.demand_miss_latency::cpu.inst 36198500 # number of demand (read+write) miss cycles
< system.cpu.icache.demand_miss_latency::total 36198500 # number of demand (read+write) miss cycles
< system.cpu.icache.overall_miss_latency::cpu.inst 36198500 # number of overall miss cycles
< system.cpu.icache.overall_miss_latency::total 36198500 # number of overall miss cycles
---
> system.cpu.icache.ReadReq_miss_latency::cpu.inst 36200500 # number of ReadReq miss cycles
> system.cpu.icache.ReadReq_miss_latency::total 36200500 # number of ReadReq miss cycles
> system.cpu.icache.demand_miss_latency::cpu.inst 36200500 # number of demand (read+write) miss cycles
> system.cpu.icache.demand_miss_latency::total 36200500 # number of demand (read+write) miss cycles
> system.cpu.icache.overall_miss_latency::cpu.inst 36200500 # number of overall miss cycles
> system.cpu.icache.overall_miss_latency::total 36200500 # number of overall miss cycles
710,715c710,715
< system.cpu.icache.ReadReq_avg_miss_latency::cpu.inst 69746.628131 # average ReadReq miss latency
< system.cpu.icache.ReadReq_avg_miss_latency::total 69746.628131 # average ReadReq miss latency
< system.cpu.icache.demand_avg_miss_latency::cpu.inst 69746.628131 # average overall miss latency
< system.cpu.icache.demand_avg_miss_latency::total 69746.628131 # average overall miss latency
< system.cpu.icache.overall_avg_miss_latency::cpu.inst 69746.628131 # average overall miss latency
< system.cpu.icache.overall_avg_miss_latency::total 69746.628131 # average overall miss latency
---
> system.cpu.icache.ReadReq_avg_miss_latency::cpu.inst 69750.481696 # average ReadReq miss latency
> system.cpu.icache.ReadReq_avg_miss_latency::total 69750.481696 # average ReadReq miss latency
> system.cpu.icache.demand_avg_miss_latency::cpu.inst 69750.481696 # average overall miss latency
> system.cpu.icache.demand_avg_miss_latency::total 69750.481696 # average overall miss latency
> system.cpu.icache.overall_avg_miss_latency::cpu.inst 69750.481696 # average overall miss latency
> system.cpu.icache.overall_avg_miss_latency::total 69750.481696 # average overall miss latency
736,741c736,741
< system.cpu.icache.ReadReq_mshr_miss_latency::cpu.inst 26530000 # number of ReadReq MSHR miss cycles
< system.cpu.icache.ReadReq_mshr_miss_latency::total 26530000 # number of ReadReq MSHR miss cycles
< system.cpu.icache.demand_mshr_miss_latency::cpu.inst 26530000 # number of demand (read+write) MSHR miss cycles
< system.cpu.icache.demand_mshr_miss_latency::total 26530000 # number of demand (read+write) MSHR miss cycles
< system.cpu.icache.overall_mshr_miss_latency::cpu.inst 26530000 # number of overall MSHR miss cycles
< system.cpu.icache.overall_mshr_miss_latency::total 26530000 # number of overall MSHR miss cycles
---
> system.cpu.icache.ReadReq_mshr_miss_latency::cpu.inst 26532000 # number of ReadReq MSHR miss cycles
> system.cpu.icache.ReadReq_mshr_miss_latency::total 26532000 # number of ReadReq MSHR miss cycles
> system.cpu.icache.demand_mshr_miss_latency::cpu.inst 26532000 # number of demand (read+write) MSHR miss cycles
> system.cpu.icache.demand_mshr_miss_latency::total 26532000 # number of demand (read+write) MSHR miss cycles
> system.cpu.icache.overall_mshr_miss_latency::cpu.inst 26532000 # number of overall MSHR miss cycles
> system.cpu.icache.overall_mshr_miss_latency::total 26532000 # number of overall MSHR miss cycles
748,753c748,753
< system.cpu.icache.ReadReq_avg_mshr_miss_latency::cpu.inst 77122.093023 # average ReadReq mshr miss latency
< system.cpu.icache.ReadReq_avg_mshr_miss_latency::total 77122.093023 # average ReadReq mshr miss latency
< system.cpu.icache.demand_avg_mshr_miss_latency::cpu.inst 77122.093023 # average overall mshr miss latency
< system.cpu.icache.demand_avg_mshr_miss_latency::total 77122.093023 # average overall mshr miss latency
< system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 77122.093023 # average overall mshr miss latency
< system.cpu.icache.overall_avg_mshr_miss_latency::total 77122.093023 # average overall mshr miss latency
---
> system.cpu.icache.ReadReq_avg_mshr_miss_latency::cpu.inst 77127.906977 # average ReadReq mshr miss latency
> system.cpu.icache.ReadReq_avg_mshr_miss_latency::total 77127.906977 # average ReadReq mshr miss latency
> system.cpu.icache.demand_avg_mshr_miss_latency::cpu.inst 77127.906977 # average overall mshr miss latency
> system.cpu.icache.demand_avg_mshr_miss_latency::total 77127.906977 # average overall mshr miss latency
> system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 77127.906977 # average overall mshr miss latency
> system.cpu.icache.overall_avg_mshr_miss_latency::total 77127.906977 # average overall mshr miss latency
756c756
< system.cpu.l2cache.tags.tagsinuse 223.995330 # Cycle average of tags in use
---
> system.cpu.l2cache.tags.tagsinuse 224.000415 # Cycle average of tags in use
761,762c761,762
< system.cpu.l2cache.tags.occ_blocks::cpu.inst 189.659398 # Average occupied blocks per requestor
< system.cpu.l2cache.tags.occ_blocks::cpu.data 34.335932 # Average occupied blocks per requestor
---
> system.cpu.l2cache.tags.occ_blocks::cpu.inst 189.663901 # Average occupied blocks per requestor
> system.cpu.l2cache.tags.occ_blocks::cpu.data 34.336514 # Average occupied blocks per requestor
894a895,900
> system.cpu.toL2Bus.snoop_filter.tot_requests 491 # Total number of requests made to the snoop filter.
> system.cpu.toL2Bus.snoop_filter.hit_single_requests 2 # Number of requests hitting in the snoop filter with a single holder of the requested data.
> system.cpu.toL2Bus.snoop_filter.hit_multi_requests 0 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data.
> system.cpu.toL2Bus.snoop_filter.tot_snoops 0 # Total number of snoops made to the snoop filter.
> system.cpu.toL2Bus.snoop_filter.hit_single_snoops 0 # Number of snoops hitting in the snoop filter with a single holder of the requested data.
> system.cpu.toL2Bus.snoop_filter.hit_multi_snoops 0 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data.
908,909c914,915
< system.cpu.toL2Bus.snoop_fanout::mean 1 # Request fanout histogram
< system.cpu.toL2Bus.snoop_fanout::stdev 0 # Request fanout histogram
---
> system.cpu.toL2Bus.snoop_fanout::mean 0.004073 # Request fanout histogram
> system.cpu.toL2Bus.snoop_fanout::stdev 0.063757 # Request fanout histogram
911,912c917,918
< system.cpu.toL2Bus.snoop_fanout::0 0 0.00% 0.00% # Request fanout histogram
< system.cpu.toL2Bus.snoop_fanout::1 491 100.00% 100.00% # Request fanout histogram
---
> system.cpu.toL2Bus.snoop_fanout::0 489 99.59% 99.59% # Request fanout histogram
> system.cpu.toL2Bus.snoop_fanout::1 2 0.41% 100.00% # Request fanout histogram
915c921
< system.cpu.toL2Bus.snoop_fanout::min_value 1 # Request fanout histogram
---
> system.cpu.toL2Bus.snoop_fanout::min_value 0 # Request fanout histogram
< sim_ticks 26943000 # Number of ticks simulated
< final_tick 26943000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
---
> sim_ticks 26944000 # Number of ticks simulated
> final_tick 26944000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
7,11c7,11
< host_inst_rate 30305 # Simulator instruction rate (inst/s)
< host_op_rate 30304 # Simulator op (including micro ops) rate (op/s)
< host_tick_rate 56555572 # Simulator tick rate (ticks/s)
< host_mem_usage 288252 # Number of bytes of host memory used
< host_seconds 0.48 # Real time elapsed on the host
---
> host_inst_rate 95332 # Simulator instruction rate (inst/s)
> host_op_rate 95323 # Simulator op (including micro ops) rate (op/s)
> host_tick_rate 177899852 # Simulator tick rate (ticks/s)
> host_mem_usage 294468 # Number of bytes of host memory used
> host_seconds 0.15 # Real time elapsed on the host
24,31c24,31
< system.physmem.bw_read::cpu.inst 812381695 # Total read bandwidth from this memory (bytes/s)
< system.physmem.bw_read::cpu.data 349181606 # Total read bandwidth from this memory (bytes/s)
< system.physmem.bw_read::total 1161563300 # Total read bandwidth from this memory (bytes/s)
< system.physmem.bw_inst_read::cpu.inst 812381695 # Instruction read bandwidth from this memory (bytes/s)
< system.physmem.bw_inst_read::total 812381695 # Instruction read bandwidth from this memory (bytes/s)
< system.physmem.bw_total::cpu.inst 812381695 # Total bandwidth to/from this memory (bytes/s)
< system.physmem.bw_total::cpu.data 349181606 # Total bandwidth to/from this memory (bytes/s)
< system.physmem.bw_total::total 1161563300 # Total bandwidth to/from this memory (bytes/s)
---
> system.physmem.bw_read::cpu.inst 812351544 # Total read bandwidth from this memory (bytes/s)
> system.physmem.bw_read::cpu.data 349168646 # Total read bandwidth from this memory (bytes/s)
> system.physmem.bw_read::total 1161520190 # Total read bandwidth from this memory (bytes/s)
> system.physmem.bw_inst_read::cpu.inst 812351544 # Instruction read bandwidth from this memory (bytes/s)
> system.physmem.bw_inst_read::total 812351544 # Instruction read bandwidth from this memory (bytes/s)
> system.physmem.bw_total::cpu.inst 812351544 # Total bandwidth to/from this memory (bytes/s)
> system.physmem.bw_total::cpu.data 349168646 # Total bandwidth to/from this memory (bytes/s)
> system.physmem.bw_total::total 1161520190 # Total bandwidth to/from this memory (bytes/s)
78c78
< system.physmem.totGap 26890000 # Total gap between requests
---
> system.physmem.totGap 26891000 # Total gap between requests
209c209
< system.physmem.avgRdBW 1161.56 # Average DRAM read bandwidth in MiByte/s
---
> system.physmem.avgRdBW 1161.52 # Average DRAM read bandwidth in MiByte/s
211c211
< system.physmem.avgRdBWSys 1161.56 # Average system read bandwidth in MiByte/s
---
> system.physmem.avgRdBWSys 1161.52 # Average system read bandwidth in MiByte/s
223c223
< system.physmem.avgGap 54989.78 # Average gap between requests
---
> system.physmem.avgGap 54991.82 # Average gap between requests
248c248
< system.physmem_1.memoryStateTime::IDLE 2039000 # Time in different power states
---
> system.physmem_1.memoryStateTime::IDLE 2040000 # Time in different power states
264c264
< system.cpu.numCycles 53887 # number of cpu cycles simulated
---
> system.cpu.numCycles 53889 # number of cpu cycles simulated
267c267
< system.cpu.fetch.icacheStallCycles 13793 # Number of cycles fetch is stalled on an Icache miss
---
> system.cpu.fetch.icacheStallCycles 13792 # Number of cycles fetch is stalled on an Icache miss
271c271
< system.cpu.fetch.Cycles 15451 # Number of cycles fetch has run and was not squashing or blocked
---
> system.cpu.fetch.Cycles 15452 # Number of cycles fetch has run and was not squashing or blocked
294,295c294,295
< system.cpu.fetch.branchRate 0.148941 # Number of branch fetches per cycle
< system.cpu.fetch.rate 0.689962 # Number of inst fetches per cycle
---
> system.cpu.fetch.branchRate 0.148936 # Number of branch fetches per cycle
> system.cpu.fetch.rate 0.689937 # Number of inst fetches per cycle
416c416
< system.cpu.iq.rate 0.386642 # Inst issue rate
---
> system.cpu.iq.rate 0.386628 # Inst issue rate
460c460
< system.cpu.iew.exec_rate 0.371370 # Inst execution rate
---
> system.cpu.iew.exec_rate 0.371356 # Inst execution rate
466c466
< system.cpu.iew.wb_rate 0.360161 # insts written-back per cycle
---
> system.cpu.iew.wb_rate 0.360148 # insts written-back per cycle
538c538
< system.cpu.idleCycles 22477 # Total number of cycles that the CPU has spent unscheduled due to idling
---
> system.cpu.idleCycles 22479 # Total number of cycles that the CPU has spent unscheduled due to idling
541,544c541,544
< system.cpu.cpi 3.732821 # CPI: Cycles Per Instruction
< system.cpu.cpi_total 3.732821 # CPI: Total CPI of All Threads
< system.cpu.ipc 0.267894 # IPC: Instructions Per Cycle
< system.cpu.ipc_total 0.267894 # IPC: Total IPC of All Threads
---
> system.cpu.cpi 3.732959 # CPI: Cycles Per Instruction
> system.cpu.cpi_total 3.732959 # CPI: Total CPI of All Threads
> system.cpu.ipc 0.267884 # IPC: Instructions Per Cycle
> system.cpu.ipc_total 0.267884 # IPC: Total IPC of All Threads
550c550
< system.cpu.dcache.tags.tagsinuse 98.068517 # Cycle average of tags in use
---
> system.cpu.dcache.tags.tagsinuse 98.069813 # Cycle average of tags in use
555c555
< system.cpu.dcache.tags.occ_blocks::cpu.data 98.068517 # Average occupied blocks per requestor
---
> system.cpu.dcache.tags.occ_blocks::cpu.data 98.069813 # Average occupied blocks per requestor
666c666
< system.cpu.icache.tags.tagsinuse 190.286110 # Cycle average of tags in use
---
> system.cpu.icache.tags.tagsinuse 190.290590 # Cycle average of tags in use
671,673c671,673
< system.cpu.icache.tags.occ_blocks::cpu.inst 190.286110 # Average occupied blocks per requestor
< system.cpu.icache.tags.occ_percent::cpu.inst 0.092913 # Average percentage of cache occupancy
< system.cpu.icache.tags.occ_percent::total 0.092913 # Average percentage of cache occupancy
---
> system.cpu.icache.tags.occ_blocks::cpu.inst 190.290590 # Average occupied blocks per requestor
> system.cpu.icache.tags.occ_percent::cpu.inst 0.092915 # Average percentage of cache occupancy
> system.cpu.icache.tags.occ_percent::total 0.092915 # Average percentage of cache occupancy
692,697c692,697
< system.cpu.icache.ReadReq_miss_latency::cpu.inst 36198500 # number of ReadReq miss cycles
< system.cpu.icache.ReadReq_miss_latency::total 36198500 # number of ReadReq miss cycles
< system.cpu.icache.demand_miss_latency::cpu.inst 36198500 # number of demand (read+write) miss cycles
< system.cpu.icache.demand_miss_latency::total 36198500 # number of demand (read+write) miss cycles
< system.cpu.icache.overall_miss_latency::cpu.inst 36198500 # number of overall miss cycles
< system.cpu.icache.overall_miss_latency::total 36198500 # number of overall miss cycles
---
> system.cpu.icache.ReadReq_miss_latency::cpu.inst 36200500 # number of ReadReq miss cycles
> system.cpu.icache.ReadReq_miss_latency::total 36200500 # number of ReadReq miss cycles
> system.cpu.icache.demand_miss_latency::cpu.inst 36200500 # number of demand (read+write) miss cycles
> system.cpu.icache.demand_miss_latency::total 36200500 # number of demand (read+write) miss cycles
> system.cpu.icache.overall_miss_latency::cpu.inst 36200500 # number of overall miss cycles
> system.cpu.icache.overall_miss_latency::total 36200500 # number of overall miss cycles
710,715c710,715
< system.cpu.icache.ReadReq_avg_miss_latency::cpu.inst 69746.628131 # average ReadReq miss latency
< system.cpu.icache.ReadReq_avg_miss_latency::total 69746.628131 # average ReadReq miss latency
< system.cpu.icache.demand_avg_miss_latency::cpu.inst 69746.628131 # average overall miss latency
< system.cpu.icache.demand_avg_miss_latency::total 69746.628131 # average overall miss latency
< system.cpu.icache.overall_avg_miss_latency::cpu.inst 69746.628131 # average overall miss latency
< system.cpu.icache.overall_avg_miss_latency::total 69746.628131 # average overall miss latency
---
> system.cpu.icache.ReadReq_avg_miss_latency::cpu.inst 69750.481696 # average ReadReq miss latency
> system.cpu.icache.ReadReq_avg_miss_latency::total 69750.481696 # average ReadReq miss latency
> system.cpu.icache.demand_avg_miss_latency::cpu.inst 69750.481696 # average overall miss latency
> system.cpu.icache.demand_avg_miss_latency::total 69750.481696 # average overall miss latency
> system.cpu.icache.overall_avg_miss_latency::cpu.inst 69750.481696 # average overall miss latency
> system.cpu.icache.overall_avg_miss_latency::total 69750.481696 # average overall miss latency
736,741c736,741
< system.cpu.icache.ReadReq_mshr_miss_latency::cpu.inst 26530000 # number of ReadReq MSHR miss cycles
< system.cpu.icache.ReadReq_mshr_miss_latency::total 26530000 # number of ReadReq MSHR miss cycles
< system.cpu.icache.demand_mshr_miss_latency::cpu.inst 26530000 # number of demand (read+write) MSHR miss cycles
< system.cpu.icache.demand_mshr_miss_latency::total 26530000 # number of demand (read+write) MSHR miss cycles
< system.cpu.icache.overall_mshr_miss_latency::cpu.inst 26530000 # number of overall MSHR miss cycles
< system.cpu.icache.overall_mshr_miss_latency::total 26530000 # number of overall MSHR miss cycles
---
> system.cpu.icache.ReadReq_mshr_miss_latency::cpu.inst 26532000 # number of ReadReq MSHR miss cycles
> system.cpu.icache.ReadReq_mshr_miss_latency::total 26532000 # number of ReadReq MSHR miss cycles
> system.cpu.icache.demand_mshr_miss_latency::cpu.inst 26532000 # number of demand (read+write) MSHR miss cycles
> system.cpu.icache.demand_mshr_miss_latency::total 26532000 # number of demand (read+write) MSHR miss cycles
> system.cpu.icache.overall_mshr_miss_latency::cpu.inst 26532000 # number of overall MSHR miss cycles
> system.cpu.icache.overall_mshr_miss_latency::total 26532000 # number of overall MSHR miss cycles
748,753c748,753
< system.cpu.icache.ReadReq_avg_mshr_miss_latency::cpu.inst 77122.093023 # average ReadReq mshr miss latency
< system.cpu.icache.ReadReq_avg_mshr_miss_latency::total 77122.093023 # average ReadReq mshr miss latency
< system.cpu.icache.demand_avg_mshr_miss_latency::cpu.inst 77122.093023 # average overall mshr miss latency
< system.cpu.icache.demand_avg_mshr_miss_latency::total 77122.093023 # average overall mshr miss latency
< system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 77122.093023 # average overall mshr miss latency
< system.cpu.icache.overall_avg_mshr_miss_latency::total 77122.093023 # average overall mshr miss latency
---
> system.cpu.icache.ReadReq_avg_mshr_miss_latency::cpu.inst 77127.906977 # average ReadReq mshr miss latency
> system.cpu.icache.ReadReq_avg_mshr_miss_latency::total 77127.906977 # average ReadReq mshr miss latency
> system.cpu.icache.demand_avg_mshr_miss_latency::cpu.inst 77127.906977 # average overall mshr miss latency
> system.cpu.icache.demand_avg_mshr_miss_latency::total 77127.906977 # average overall mshr miss latency
> system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 77127.906977 # average overall mshr miss latency
> system.cpu.icache.overall_avg_mshr_miss_latency::total 77127.906977 # average overall mshr miss latency
756c756
< system.cpu.l2cache.tags.tagsinuse 223.995330 # Cycle average of tags in use
---
> system.cpu.l2cache.tags.tagsinuse 224.000415 # Cycle average of tags in use
761,762c761,762
< system.cpu.l2cache.tags.occ_blocks::cpu.inst 189.659398 # Average occupied blocks per requestor
< system.cpu.l2cache.tags.occ_blocks::cpu.data 34.335932 # Average occupied blocks per requestor
---
> system.cpu.l2cache.tags.occ_blocks::cpu.inst 189.663901 # Average occupied blocks per requestor
> system.cpu.l2cache.tags.occ_blocks::cpu.data 34.336514 # Average occupied blocks per requestor
894a895,900
> system.cpu.toL2Bus.snoop_filter.tot_requests 491 # Total number of requests made to the snoop filter.
> system.cpu.toL2Bus.snoop_filter.hit_single_requests 2 # Number of requests hitting in the snoop filter with a single holder of the requested data.
> system.cpu.toL2Bus.snoop_filter.hit_multi_requests 0 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data.
> system.cpu.toL2Bus.snoop_filter.tot_snoops 0 # Total number of snoops made to the snoop filter.
> system.cpu.toL2Bus.snoop_filter.hit_single_snoops 0 # Number of snoops hitting in the snoop filter with a single holder of the requested data.
> system.cpu.toL2Bus.snoop_filter.hit_multi_snoops 0 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data.
908,909c914,915
< system.cpu.toL2Bus.snoop_fanout::mean 1 # Request fanout histogram
< system.cpu.toL2Bus.snoop_fanout::stdev 0 # Request fanout histogram
---
> system.cpu.toL2Bus.snoop_fanout::mean 0.004073 # Request fanout histogram
> system.cpu.toL2Bus.snoop_fanout::stdev 0.063757 # Request fanout histogram
911,912c917,918
< system.cpu.toL2Bus.snoop_fanout::0 0 0.00% 0.00% # Request fanout histogram
< system.cpu.toL2Bus.snoop_fanout::1 491 100.00% 100.00% # Request fanout histogram
---
> system.cpu.toL2Bus.snoop_fanout::0 489 99.59% 99.59% # Request fanout histogram
> system.cpu.toL2Bus.snoop_fanout::1 2 0.41% 100.00% # Request fanout histogram
915c921
< system.cpu.toL2Bus.snoop_fanout::min_value 1 # Request fanout histogram
---
> system.cpu.toL2Bus.snoop_fanout::min_value 0 # Request fanout histogram