1Redirecting stdout to build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/o3-timing/simout
2Redirecting stderr to build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/o3-timing/simerr
3gem5 Simulator System. http://gem5.org
4gem5 is copyrighted software; use the --copyright option for details.
5
6gem5 compiled Nov 29 2016 18:44:12
7gem5 started Nov 29 2016 18:44:33
8gem5 executing on zizzer, pid 58827
9command line: /z/powerjg/gem5-upstream/build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/o3-timing -re /z/powerjg/gem5-upstream/tests/testing/../run.py quick/se/02.insttest/sparc/linux/o3-timing
10
11Global frequency set at 1000000000000 ticks per second
12info: Entering event queue @ 0. Starting simulation...
13Begining test of difficult SPARC instructions...
14LDSTUB: Passed
15SWAP: Passed
16CAS FAIL: Passed
17CAS WORK: Passed
18CASX FAIL: Passed
19CASX WORK: Passed
20LDTX: Passed
21LDTW: Passed
22STTW: Passed
23Done
24Exiting @ tick 29908500 because target called exit()