| config.ini (8835:7c68f84d7c4e) | config.ini (8983:8800b05e1cb3) |
|---|---|
| 1[root] 2type=Root 3children=system 4full_system=false 5time_sync_enable=false 6time_sync_period=100000000000 7time_sync_spin_threshold=100000000 8 9[system] 10type=System 11children=cpu membus physmem 12boot_osflags=a 13init_param=0 14kernel= 15load_addr_mask=1099511627775 16mem_mode=atomic 17memories=system.physmem 18num_work_ids=16 | 1[root] 2type=Root 3children=system 4full_system=false 5time_sync_enable=false 6time_sync_period=100000000000 7time_sync_spin_threshold=100000000 8 9[system] 10type=System 11children=cpu membus physmem 12boot_osflags=a 13init_param=0 14kernel= 15load_addr_mask=1099511627775 16mem_mode=atomic 17memories=system.physmem 18num_work_ids=16 |
| 19physmem=system.physmem | |
| 20readfile= 21symbolfile= 22work_begin_ckpt_count=0 23work_begin_cpu_id_exit=-1 24work_begin_exit_count=0 25work_cpus_ckpt_count=0 26work_end_ckpt_count=0 27work_end_exit_count=0 28work_item_id=-1 | 19readfile= 20symbolfile= 21work_begin_ckpt_count=0 22work_begin_cpu_id_exit=-1 23work_begin_exit_count=0 24work_cpus_ckpt_count=0 25work_end_ckpt_count=0 26work_end_exit_count=0 27work_item_id=-1 |
| 29system_port=system.membus.port[0] | 28system_port=system.membus.slave[0] |
| 30 31[system.cpu] 32type=DerivO3CPU 33children=dcache dtb fuPool icache interrupts itb l2cache toL2Bus tracer workload 34BTBEntries=4096 35BTBTagSize=16 36LFSTSize=1024 37LQEntries=32 --- 84 unchanged lines hidden (view full) --- 122wbDepth=1 123wbWidth=8 124workload=system.cpu.workload 125dcache_port=system.cpu.dcache.cpu_side 126icache_port=system.cpu.icache.cpu_side 127 128[system.cpu.dcache] 129type=BaseCache | 29 30[system.cpu] 31type=DerivO3CPU 32children=dcache dtb fuPool icache interrupts itb l2cache toL2Bus tracer workload 33BTBEntries=4096 34BTBTagSize=16 35LFSTSize=1024 36LQEntries=32 --- 84 unchanged lines hidden (view full) --- 121wbDepth=1 122wbWidth=8 123workload=system.cpu.workload 124dcache_port=system.cpu.dcache.cpu_side 125icache_port=system.cpu.icache.cpu_side 126 127[system.cpu.dcache] 128type=BaseCache |
| 130addr_range=0:18446744073709551615 | 129addr_ranges=0:18446744073709551615 |
| 131assoc=2 132block_size=64 133forward_snoops=true 134hash_delay=1 135is_top_level=true 136latency=1000 137max_miss_count=0 138mshrs=10 --- 4 unchanged lines hidden (view full) --- 143size=262144 144subblock_size=0 145system=system 146tgts_per_mshr=20 147trace_addr=0 148two_queue=false 149write_buffers=8 150cpu_side=system.cpu.dcache_port | 130assoc=2 131block_size=64 132forward_snoops=true 133hash_delay=1 134is_top_level=true 135latency=1000 136max_miss_count=0 137mshrs=10 --- 4 unchanged lines hidden (view full) --- 142size=262144 143subblock_size=0 144system=system 145tgts_per_mshr=20 146trace_addr=0 147two_queue=false 148write_buffers=8 149cpu_side=system.cpu.dcache_port |
| 151mem_side=system.cpu.toL2Bus.port[1] | 150mem_side=system.cpu.toL2Bus.slave[1] |
| 152 153[system.cpu.dtb] 154type=SparcTLB 155size=64 156 157[system.cpu.fuPool] 158type=FUPool 159children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8 --- 254 unchanged lines hidden (view full) --- 414[system.cpu.fuPool.FUList8.opList] 415type=OpDesc 416issueLat=3 417opClass=IprAccess 418opLat=3 419 420[system.cpu.icache] 421type=BaseCache | 151 152[system.cpu.dtb] 153type=SparcTLB 154size=64 155 156[system.cpu.fuPool] 157type=FUPool 158children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8 --- 254 unchanged lines hidden (view full) --- 413[system.cpu.fuPool.FUList8.opList] 414type=OpDesc 415issueLat=3 416opClass=IprAccess 417opLat=3 418 419[system.cpu.icache] 420type=BaseCache |
| 422addr_range=0:18446744073709551615 | 421addr_ranges=0:18446744073709551615 |
| 423assoc=2 424block_size=64 425forward_snoops=true 426hash_delay=1 427is_top_level=true 428latency=1000 429max_miss_count=0 430mshrs=10 --- 4 unchanged lines hidden (view full) --- 435size=131072 436subblock_size=0 437system=system 438tgts_per_mshr=20 439trace_addr=0 440two_queue=false 441write_buffers=8 442cpu_side=system.cpu.icache_port | 422assoc=2 423block_size=64 424forward_snoops=true 425hash_delay=1 426is_top_level=true 427latency=1000 428max_miss_count=0 429mshrs=10 --- 4 unchanged lines hidden (view full) --- 434size=131072 435subblock_size=0 436system=system 437tgts_per_mshr=20 438trace_addr=0 439two_queue=false 440write_buffers=8 441cpu_side=system.cpu.icache_port |
| 443mem_side=system.cpu.toL2Bus.port[0] | 442mem_side=system.cpu.toL2Bus.slave[0] |
| 444 445[system.cpu.interrupts] 446type=SparcInterrupts 447 448[system.cpu.itb] 449type=SparcTLB 450size=64 451 452[system.cpu.l2cache] 453type=BaseCache | 443 444[system.cpu.interrupts] 445type=SparcInterrupts 446 447[system.cpu.itb] 448type=SparcTLB 449size=64 450 451[system.cpu.l2cache] 452type=BaseCache |
| 454addr_range=0:18446744073709551615 | 453addr_ranges=0:18446744073709551615 |
| 455assoc=2 456block_size=64 457forward_snoops=true 458hash_delay=1 459is_top_level=false 460latency=1000 461max_miss_count=0 462mshrs=10 463prefetch_on_access=false 464prefetcher=Null 465prioritizeRequests=false 466repl=Null 467size=2097152 468subblock_size=0 469system=system 470tgts_per_mshr=5 471trace_addr=0 472two_queue=false 473write_buffers=8 | 454assoc=2 455block_size=64 456forward_snoops=true 457hash_delay=1 458is_top_level=false 459latency=1000 460max_miss_count=0 461mshrs=10 462prefetch_on_access=false 463prefetcher=Null 464prioritizeRequests=false 465repl=Null 466size=2097152 467subblock_size=0 468system=system 469tgts_per_mshr=5 470trace_addr=0 471two_queue=false 472write_buffers=8 |
| 474cpu_side=system.cpu.toL2Bus.port[2] 475mem_side=system.membus.port[2] | 473cpu_side=system.cpu.toL2Bus.master[0] 474mem_side=system.membus.slave[1] |
| 476 477[system.cpu.toL2Bus] 478type=Bus 479block_size=64 480bus_id=0 481clock=1000 482header_cycles=1 483use_default_range=false 484width=64 | 475 476[system.cpu.toL2Bus] 477type=Bus 478block_size=64 479bus_id=0 480clock=1000 481header_cycles=1 482use_default_range=false 483width=64 |
| 485port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side | 484master=system.cpu.l2cache.cpu_side 485slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side |
| 486 487[system.cpu.tracer] 488type=ExeTracer 489 490[system.cpu.workload] 491type=LiveProcess 492cmd=insttest 493cwd= --- 15 unchanged lines hidden (view full) --- 509[system.membus] 510type=Bus 511block_size=64 512bus_id=0 513clock=1000 514header_cycles=1 515use_default_range=false 516width=64 | 486 487[system.cpu.tracer] 488type=ExeTracer 489 490[system.cpu.workload] 491type=LiveProcess 492cmd=insttest 493cwd= --- 15 unchanged lines hidden (view full) --- 509[system.membus] 510type=Bus 511block_size=64 512bus_id=0 513clock=1000 514header_cycles=1 515use_default_range=false 516width=64 |
| 517port=system.system_port system.physmem.port[0] system.cpu.l2cache.mem_side | 517master=system.physmem.port[0] 518slave=system.system_port system.cpu.l2cache.mem_side |
| 518 519[system.physmem] | 519 520[system.physmem] |
| 520type=PhysicalMemory | 521type=SimpleMemory 522conf_table_reported=false |
| 521file= | 523file= |
| 524in_addr_map=true |
|
| 522latency=30000 523latency_var=0 524null=false 525range=0:134217727 526zero=false | 525latency=30000 526latency_var=0 527null=false 528range=0:134217727 529zero=false |
| 527port=system.membus.port[1] | 530port=system.membus.master[0] |
| 528 | 531 |