| config.ini (11312:3d7a85d71bd1) | config.ini (11384:e3cbd2823210) |
|---|---|
| 1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=false 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 --- 146 unchanged lines hidden (view full) --- 155type=Cache 156children=tags 157addr_ranges=0:18446744073709551615 158assoc=2 159clk_domain=system.cpu_clk_domain 160clusivity=mostly_incl 161demand_mshr_reserve=1 162eventq_index=0 | 1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=false 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 --- 146 unchanged lines hidden (view full) --- 155type=Cache 156children=tags 157addr_ranges=0:18446744073709551615 158assoc=2 159clk_domain=system.cpu_clk_domain 160clusivity=mostly_incl 161demand_mshr_reserve=1 162eventq_index=0 |
| 163forward_snoops=true | |
| 164hit_latency=2 165is_read_only=false 166max_miss_count=0 167mshrs=4 168prefetch_on_access=false 169prefetcher=Null 170response_latency=2 171sequential_access=false --- 332 unchanged lines hidden (view full) --- 504type=Cache 505children=tags 506addr_ranges=0:18446744073709551615 507assoc=2 508clk_domain=system.cpu_clk_domain 509clusivity=mostly_incl 510demand_mshr_reserve=1 511eventq_index=0 | 163hit_latency=2 164is_read_only=false 165max_miss_count=0 166mshrs=4 167prefetch_on_access=false 168prefetcher=Null 169response_latency=2 170sequential_access=false --- 332 unchanged lines hidden (view full) --- 503type=Cache 504children=tags 505addr_ranges=0:18446744073709551615 506assoc=2 507clk_domain=system.cpu_clk_domain 508clusivity=mostly_incl 509demand_mshr_reserve=1 510eventq_index=0 |
| 512forward_snoops=true | |
| 513hit_latency=2 514is_read_only=true 515max_miss_count=0 516mshrs=4 517prefetch_on_access=false 518prefetcher=Null 519response_latency=2 520sequential_access=false --- 33 unchanged lines hidden (view full) --- 554type=Cache 555children=tags 556addr_ranges=0:18446744073709551615 557assoc=8 558clk_domain=system.cpu_clk_domain 559clusivity=mostly_incl 560demand_mshr_reserve=1 561eventq_index=0 | 511hit_latency=2 512is_read_only=true 513max_miss_count=0 514mshrs=4 515prefetch_on_access=false 516prefetcher=Null 517response_latency=2 518sequential_access=false --- 33 unchanged lines hidden (view full) --- 552type=Cache 553children=tags 554addr_ranges=0:18446744073709551615 555assoc=8 556clk_domain=system.cpu_clk_domain 557clusivity=mostly_incl 558demand_mshr_reserve=1 559eventq_index=0 |
| 562forward_snoops=true | |
| 563hit_latency=20 564is_read_only=false 565max_miss_count=0 566mshrs=20 567prefetch_on_access=false 568prefetcher=Null 569response_latency=20 570sequential_access=false --- 18 unchanged lines hidden (view full) --- 589 590[system.cpu.toL2Bus] 591type=CoherentXBar 592children=snoop_filter 593clk_domain=system.cpu_clk_domain 594eventq_index=0 595forward_latency=0 596frontend_latency=1 | 560hit_latency=20 561is_read_only=false 562max_miss_count=0 563mshrs=20 564prefetch_on_access=false 565prefetcher=Null 566response_latency=20 567sequential_access=false --- 18 unchanged lines hidden (view full) --- 586 587[system.cpu.toL2Bus] 588type=CoherentXBar 589children=snoop_filter 590clk_domain=system.cpu_clk_domain 591eventq_index=0 592forward_latency=0 593frontend_latency=1 |
| 594point_of_coherency=false |
|
| 597response_latency=1 598snoop_filter=system.cpu.toL2Bus.snoop_filter 599snoop_response_latency=1 600system=system 601use_default_range=false 602width=32 603master=system.cpu.l2cache.cpu_side 604slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side --- 14 unchanged lines hidden (view full) --- 619cmd=insttest 620cwd= 621drivers= 622egid=100 623env= 624errout=cerr 625euid=100 626eventq_index=0 | 595response_latency=1 596snoop_filter=system.cpu.toL2Bus.snoop_filter 597snoop_response_latency=1 598system=system 599use_default_range=false 600width=32 601master=system.cpu.l2cache.cpu_side 602slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side --- 14 unchanged lines hidden (view full) --- 617cmd=insttest 618cwd= 619drivers= 620egid=100 621env= 622errout=cerr 623euid=100 624eventq_index=0 |
| 627executable=/dist/m5/regression/test-progs/insttest/bin/sparc/linux/insttest | 625executable=/home/stever/hg/m5sim.org/gem5/tests/test-progs/insttest/bin/sparc/linux/insttest |
| 628gid=100 629input=cin 630kvmInSE=false 631max_stack_size=67108864 632output=cout 633pid=100 634ppid=99 635simpoint=0 --- 18 unchanged lines hidden (view full) --- 654transition_latency=100000000 655 656[system.membus] 657type=CoherentXBar 658clk_domain=system.clk_domain 659eventq_index=0 660forward_latency=4 661frontend_latency=3 | 626gid=100 627input=cin 628kvmInSE=false 629max_stack_size=67108864 630output=cout 631pid=100 632ppid=99 633simpoint=0 --- 18 unchanged lines hidden (view full) --- 652transition_latency=100000000 653 654[system.membus] 655type=CoherentXBar 656clk_domain=system.clk_domain 657eventq_index=0 658forward_latency=4 659frontend_latency=3 |
| 660point_of_coherency=true |
|
| 662response_latency=2 663snoop_filter=Null 664snoop_response_latency=4 665system=system 666use_default_range=false 667width=16 668master=system.physmem.port 669slave=system.system_port system.cpu.l2cache.mem_side --- 83 unchanged lines hidden --- | 661response_latency=2 662snoop_filter=Null 663snoop_response_latency=4 664system=system 665use_default_range=false 666width=16 667master=system.physmem.port 668slave=system.system_port system.cpu.l2cache.mem_side --- 83 unchanged lines hidden --- |