config.ini (10451:3a87241adfb8) | config.ini (10736:4433fb00fa7d) |
---|---|
1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=false 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 --- 9 unchanged lines hidden (view full) --- 18init_param=0 19kernel= 20kernel_addr_check=true 21load_addr_mask=1099511627775 22load_offset=0 23mem_mode=timing 24mem_ranges= 25memories=system.physmem | 1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=false 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 --- 9 unchanged lines hidden (view full) --- 18init_param=0 19kernel= 20kernel_addr_check=true 21load_addr_mask=1099511627775 22load_offset=0 23mem_mode=timing 24mem_ranges= 25memories=system.physmem |
26mmap_using_noreserve=false |
|
26num_work_ids=16 27readfile= 28symbolfile= 29work_begin_ckpt_count=0 30work_begin_cpu_id_exit=-1 31work_begin_exit_count=0 32work_cpus_ckpt_count=0 33work_end_ckpt_count=0 --- 116 unchanged lines hidden (view full) --- 150predType=tournament 151 152[system.cpu.dcache] 153type=BaseCache 154children=tags 155addr_ranges=0:18446744073709551615 156assoc=2 157clk_domain=system.cpu_clk_domain | 27num_work_ids=16 28readfile= 29symbolfile= 30work_begin_ckpt_count=0 31work_begin_cpu_id_exit=-1 32work_begin_exit_count=0 33work_cpus_ckpt_count=0 34work_end_ckpt_count=0 --- 116 unchanged lines hidden (view full) --- 151predType=tournament 152 153[system.cpu.dcache] 154type=BaseCache 155children=tags 156addr_ranges=0:18446744073709551615 157assoc=2 158clk_domain=system.cpu_clk_domain |
159demand_mshr_reserve=1 |
|
158eventq_index=0 159forward_snoops=true 160hit_latency=2 161is_top_level=true 162max_miss_count=0 163mshrs=4 164prefetch_on_access=false 165prefetcher=Null --- 331 unchanged lines hidden (view full) --- 497opLat=3 498 499[system.cpu.icache] 500type=BaseCache 501children=tags 502addr_ranges=0:18446744073709551615 503assoc=2 504clk_domain=system.cpu_clk_domain | 160eventq_index=0 161forward_snoops=true 162hit_latency=2 163is_top_level=true 164max_miss_count=0 165mshrs=4 166prefetch_on_access=false 167prefetcher=Null --- 331 unchanged lines hidden (view full) --- 499opLat=3 500 501[system.cpu.icache] 502type=BaseCache 503children=tags 504addr_ranges=0:18446744073709551615 505assoc=2 506clk_domain=system.cpu_clk_domain |
507demand_mshr_reserve=1 |
|
505eventq_index=0 506forward_snoops=true 507hit_latency=2 508is_top_level=true 509max_miss_count=0 510mshrs=4 511prefetch_on_access=false 512prefetcher=Null --- 32 unchanged lines hidden (view full) --- 545size=64 546 547[system.cpu.l2cache] 548type=BaseCache 549children=tags 550addr_ranges=0:18446744073709551615 551assoc=8 552clk_domain=system.cpu_clk_domain | 508eventq_index=0 509forward_snoops=true 510hit_latency=2 511is_top_level=true 512max_miss_count=0 513mshrs=4 514prefetch_on_access=false 515prefetcher=Null --- 32 unchanged lines hidden (view full) --- 548size=64 549 550[system.cpu.l2cache] 551type=BaseCache 552children=tags 553addr_ranges=0:18446744073709551615 554assoc=8 555clk_domain=system.cpu_clk_domain |
556demand_mshr_reserve=1 |
|
553eventq_index=0 554forward_snoops=true 555hit_latency=20 556is_top_level=false 557max_miss_count=0 558mshrs=20 559prefetch_on_access=false 560prefetcher=Null --- 17 unchanged lines hidden (view full) --- 578hit_latency=20 579sequential_access=false 580size=2097152 581 582[system.cpu.toL2Bus] 583type=CoherentXBar 584clk_domain=system.cpu_clk_domain 585eventq_index=0 | 557eventq_index=0 558forward_snoops=true 559hit_latency=20 560is_top_level=false 561max_miss_count=0 562mshrs=20 563prefetch_on_access=false 564prefetcher=Null --- 17 unchanged lines hidden (view full) --- 582hit_latency=20 583sequential_access=false 584size=2097152 585 586[system.cpu.toL2Bus] 587type=CoherentXBar 588clk_domain=system.cpu_clk_domain 589eventq_index=0 |
586header_cycles=1 | 590forward_latency=0 591frontend_latency=1 592response_latency=1 |
587snoop_filter=Null | 593snoop_filter=Null |
594snoop_response_latency=1 |
|
588system=system 589use_default_range=false 590width=32 591master=system.cpu.l2cache.cpu_side 592slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side 593 594[system.cpu.tracer] 595type=ExeTracer 596eventq_index=0 597 598[system.cpu.workload] 599type=LiveProcess 600cmd=insttest 601cwd= | 595system=system 596use_default_range=false 597width=32 598master=system.cpu.l2cache.cpu_side 599slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side 600 601[system.cpu.tracer] 602type=ExeTracer 603eventq_index=0 604 605[system.cpu.workload] 606type=LiveProcess 607cmd=insttest 608cwd= |
609drivers= |
|
602egid=100 603env= 604errout=cerr 605euid=100 606eventq_index=0 607executable=/scratch/nilay/GEM5/gem5/tests/test-progs/insttest/bin/sparc/linux/insttest 608gid=100 609input=cin | 610egid=100 611env= 612errout=cerr 613euid=100 614eventq_index=0 615executable=/scratch/nilay/GEM5/gem5/tests/test-progs/insttest/bin/sparc/linux/insttest 616gid=100 617input=cin |
618kvmInSE=false |
|
610max_stack_size=67108864 611output=cout 612pid=100 613ppid=99 614simpoint=0 615system=system 616uid=100 617useArchPT=false --- 13 unchanged lines hidden (view full) --- 631eventq_index=0 632sys_clk_domain=system.clk_domain 633transition_latency=100000000 634 635[system.membus] 636type=CoherentXBar 637clk_domain=system.clk_domain 638eventq_index=0 | 619max_stack_size=67108864 620output=cout 621pid=100 622ppid=99 623simpoint=0 624system=system 625uid=100 626useArchPT=false --- 13 unchanged lines hidden (view full) --- 640eventq_index=0 641sys_clk_domain=system.clk_domain 642transition_latency=100000000 643 644[system.membus] 645type=CoherentXBar 646clk_domain=system.clk_domain 647eventq_index=0 |
639header_cycles=1 | 648forward_latency=4 649frontend_latency=3 650response_latency=2 |
640snoop_filter=Null | 651snoop_filter=Null |
652snoop_response_latency=4 |
|
641system=system 642use_default_range=false | 653system=system 654use_default_range=false |
643width=8 | 655width=16 |
644master=system.physmem.port 645slave=system.system_port system.cpu.l2cache.mem_side 646 647[system.physmem] 648type=DRAMCtrl 649IDD0=0.075000 650IDD02=0.000000 651IDD2N=0.050000 --- 14 unchanged lines hidden (view full) --- 666IDD4W2=0.000000 667IDD5=0.220000 668IDD52=0.000000 669IDD6=0.000000 670IDD62=0.000000 671VDD=1.500000 672VDD2=0.000000 673activation_limit=4 | 656master=system.physmem.port 657slave=system.system_port system.cpu.l2cache.mem_side 658 659[system.physmem] 660type=DRAMCtrl 661IDD0=0.075000 662IDD02=0.000000 663IDD2N=0.050000 --- 14 unchanged lines hidden (view full) --- 678IDD4W2=0.000000 679IDD5=0.220000 680IDD52=0.000000 681IDD6=0.000000 682IDD62=0.000000 683VDD=1.500000 684VDD2=0.000000 685activation_limit=4 |
674addr_mapping=RoRaBaChCo | 686addr_mapping=RoRaBaCoCh |
675bank_groups_per_rank=0 676banks_per_rank=8 677burst_length=8 678channels=1 679clk_domain=system.clk_domain 680conf_table_reported=true 681device_bus_width=8 682device_rowbuffer_size=1024 | 687bank_groups_per_rank=0 688banks_per_rank=8 689burst_length=8 690channels=1 691clk_domain=system.clk_domain 692conf_table_reported=true 693device_bus_width=8 694device_rowbuffer_size=1024 |
695device_size=536870912 |
|
683devices_per_rank=8 684dll=true 685eventq_index=0 686in_addr_map=true 687max_accesses_per_row=16 688mem_sched_policy=frfcfs 689min_writes_per_switch=16 690null=false --- 37 unchanged lines hidden --- | 696devices_per_rank=8 697dll=true 698eventq_index=0 699in_addr_map=true 700max_accesses_per_row=16 701mem_sched_policy=frfcfs 702min_writes_per_switch=16 703null=false --- 37 unchanged lines hidden --- |