1
2---------- Begin Simulation Statistics ----------
3sim_seconds 0.005246 # Number of seconds simulated
4sim_ticks 5246466 # Number of ticks simulated
5final_tick 5246466 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
6sim_freq 1000000000 # Frequency of simulated ticks
7host_inst_rate 18477 # Simulator instruction rate (inst/s)
8host_op_rate 18477 # Simulator op (including micro ops) rate (op/s)
9host_tick_rate 364337 # Simulator tick rate (ticks/s)
10host_mem_usage 412052 # Number of bytes of host memory used
11host_seconds 14.40 # Real time elapsed on the host
12sim_insts 266066 # Number of instructions simulated
13sim_ops 266066 # Number of ops (including micro ops) simulated
14system.voltage_domain.voltage 1 # Voltage in Volts
15system.clk_domain.clock 1 # Clock period in ticks
16system.mem_ctrls.pwrStateResidencyTicks::UNDEFINED 5246466 # Cumulative time (in ticks) in various power states
17system.mem_ctrls.bytes_read::ruby.dir_cntrl0 5073344 # Number of bytes read from this memory
18system.mem_ctrls.bytes_read::total 5073344 # Number of bytes read from this memory
19system.mem_ctrls.bytes_written::ruby.dir_cntrl0 5073088 # Number of bytes written to this memory
20system.mem_ctrls.bytes_written::total 5073088 # Number of bytes written to this memory
21system.mem_ctrls.num_reads::ruby.dir_cntrl0 79271 # Number of read requests responded to by this memory
22system.mem_ctrls.num_reads::total 79271 # Number of read requests responded to by this memory
23system.mem_ctrls.num_writes::ruby.dir_cntrl0 79267 # Number of write requests responded to by this memory
24system.mem_ctrls.num_writes::total 79267 # Number of write requests responded to by this memory
25system.mem_ctrls.bw_read::ruby.dir_cntrl0 967002169 # Total read bandwidth from this memory (bytes/s)
26system.mem_ctrls.bw_read::total 967002169 # Total read bandwidth from this memory (bytes/s)
27system.mem_ctrls.bw_write::ruby.dir_cntrl0 966953374 # Write bandwidth from this memory (bytes/s)
28system.mem_ctrls.bw_write::total 966953374 # Write bandwidth from this memory (bytes/s)
29system.mem_ctrls.bw_total::ruby.dir_cntrl0 1933955543 # Total bandwidth to/from this memory (bytes/s)
30system.mem_ctrls.bw_total::total 1933955543 # Total bandwidth to/from this memory (bytes/s)
31system.mem_ctrls.readReqs 79271 # Number of read requests accepted
32system.mem_ctrls.writeReqs 79267 # Number of write requests accepted
33system.mem_ctrls.readBursts 79271 # Number of DRAM read bursts, including those serviced by the write queue
34system.mem_ctrls.writeBursts 79267 # Number of DRAM write bursts, including those merged in the write queue
35system.mem_ctrls.bytesReadDRAM 2666176 # Total number of bytes read from DRAM
36system.mem_ctrls.bytesReadWrQ 2407168 # Total number of bytes read from write queue
37system.mem_ctrls.bytesWritten 2784128 # Total number of bytes written to DRAM
38system.mem_ctrls.bytesReadSys 5073344 # Total read bytes from the system interface side
39system.mem_ctrls.bytesWrittenSys 5073088 # Total written bytes from the system interface side
40system.mem_ctrls.servicedByWrQ 37612 # Number of DRAM read bursts serviced by the write queue
41system.mem_ctrls.mergedWrBursts 35741 # Number of DRAM write bursts merged with an existing one
42system.mem_ctrls.neitherReadNorWriteReqs 0 # Number of requests that are neither read nor write
43system.mem_ctrls.perBankRdBursts::0 4161 # Per bank write bursts
44system.mem_ctrls.perBankRdBursts::1 6493 # Per bank write bursts
45system.mem_ctrls.perBankRdBursts::2 322 # Per bank write bursts
46system.mem_ctrls.perBankRdBursts::3 11183 # Per bank write bursts
47system.mem_ctrls.perBankRdBursts::4 1470 # Per bank write bursts
48system.mem_ctrls.perBankRdBursts::5 254 # Per bank write bursts
49system.mem_ctrls.perBankRdBursts::6 44 # Per bank write bursts
50system.mem_ctrls.perBankRdBursts::7 830 # Per bank write bursts
51system.mem_ctrls.perBankRdBursts::8 271 # Per bank write bursts
52system.mem_ctrls.perBankRdBursts::9 850 # Per bank write bursts
53system.mem_ctrls.perBankRdBursts::10 2251 # Per bank write bursts
54system.mem_ctrls.perBankRdBursts::11 11315 # Per bank write bursts
55system.mem_ctrls.perBankRdBursts::12 562 # Per bank write bursts
56system.mem_ctrls.perBankRdBursts::13 405 # Per bank write bursts
57system.mem_ctrls.perBankRdBursts::14 342 # Per bank write bursts
58system.mem_ctrls.perBankRdBursts::15 906 # Per bank write bursts
59system.mem_ctrls.perBankWrBursts::0 4421 # Per bank write bursts
60system.mem_ctrls.perBankWrBursts::1 6791 # Per bank write bursts
61system.mem_ctrls.perBankWrBursts::2 332 # Per bank write bursts
62system.mem_ctrls.perBankWrBursts::3 11984 # Per bank write bursts
63system.mem_ctrls.perBankWrBursts::4 1476 # Per bank write bursts
64system.mem_ctrls.perBankWrBursts::5 255 # Per bank write bursts
65system.mem_ctrls.perBankWrBursts::6 44 # Per bank write bursts
66system.mem_ctrls.perBankWrBursts::7 877 # Per bank write bursts
67system.mem_ctrls.perBankWrBursts::8 282 # Per bank write bursts
68system.mem_ctrls.perBankWrBursts::9 852 # Per bank write bursts
69system.mem_ctrls.perBankWrBursts::10 2350 # Per bank write bursts
70system.mem_ctrls.perBankWrBursts::11 11612 # Per bank write bursts
71system.mem_ctrls.perBankWrBursts::12 563 # Per bank write bursts
72system.mem_ctrls.perBankWrBursts::13 405 # Per bank write bursts
73system.mem_ctrls.perBankWrBursts::14 350 # Per bank write bursts
74system.mem_ctrls.perBankWrBursts::15 908 # Per bank write bursts
75system.mem_ctrls.numRdRetry 0 # Number of times read queue was full causing retry
76system.mem_ctrls.numWrRetry 0 # Number of times write queue was full causing retry
77system.mem_ctrls.totGap 5246394 # Total gap between requests
78system.mem_ctrls.readPktSize::0 0 # Read request sizes (log2)
79system.mem_ctrls.readPktSize::1 0 # Read request sizes (log2)
80system.mem_ctrls.readPktSize::2 0 # Read request sizes (log2)
81system.mem_ctrls.readPktSize::3 0 # Read request sizes (log2)
82system.mem_ctrls.readPktSize::4 0 # Read request sizes (log2)
83system.mem_ctrls.readPktSize::5 0 # Read request sizes (log2)
84system.mem_ctrls.readPktSize::6 79271 # Read request sizes (log2)
85system.mem_ctrls.writePktSize::0 0 # Write request sizes (log2)
86system.mem_ctrls.writePktSize::1 0 # Write request sizes (log2)
87system.mem_ctrls.writePktSize::2 0 # Write request sizes (log2)
88system.mem_ctrls.writePktSize::3 0 # Write request sizes (log2)
89system.mem_ctrls.writePktSize::4 0 # Write request sizes (log2)
90system.mem_ctrls.writePktSize::5 0 # Write request sizes (log2)
91system.mem_ctrls.writePktSize::6 79267 # Write request sizes (log2)
92system.mem_ctrls.rdQLenPdf::0 41659 # What read queue length does an incoming req see
93system.mem_ctrls.rdQLenPdf::1 0 # What read queue length does an incoming req see
94system.mem_ctrls.rdQLenPdf::2 0 # What read queue length does an incoming req see
95system.mem_ctrls.rdQLenPdf::3 0 # What read queue length does an incoming req see
96system.mem_ctrls.rdQLenPdf::4 0 # What read queue length does an incoming req see
97system.mem_ctrls.rdQLenPdf::5 0 # What read queue length does an incoming req see
98system.mem_ctrls.rdQLenPdf::6 0 # What read queue length does an incoming req see
99system.mem_ctrls.rdQLenPdf::7 0 # What read queue length does an incoming req see
100system.mem_ctrls.rdQLenPdf::8 0 # What read queue length does an incoming req see
101system.mem_ctrls.rdQLenPdf::9 0 # What read queue length does an incoming req see
102system.mem_ctrls.rdQLenPdf::10 0 # What read queue length does an incoming req see
103system.mem_ctrls.rdQLenPdf::11 0 # What read queue length does an incoming req see
104system.mem_ctrls.rdQLenPdf::12 0 # What read queue length does an incoming req see
105system.mem_ctrls.rdQLenPdf::13 0 # What read queue length does an incoming req see
106system.mem_ctrls.rdQLenPdf::14 0 # What read queue length does an incoming req see
107system.mem_ctrls.rdQLenPdf::15 0 # What read queue length does an incoming req see
108system.mem_ctrls.rdQLenPdf::16 0 # What read queue length does an incoming req see
109system.mem_ctrls.rdQLenPdf::17 0 # What read queue length does an incoming req see
110system.mem_ctrls.rdQLenPdf::18 0 # What read queue length does an incoming req see
111system.mem_ctrls.rdQLenPdf::19 0 # What read queue length does an incoming req see
112system.mem_ctrls.rdQLenPdf::20 0 # What read queue length does an incoming req see
113system.mem_ctrls.rdQLenPdf::21 0 # What read queue length does an incoming req see
114system.mem_ctrls.rdQLenPdf::22 0 # What read queue length does an incoming req see
115system.mem_ctrls.rdQLenPdf::23 0 # What read queue length does an incoming req see
116system.mem_ctrls.rdQLenPdf::24 0 # What read queue length does an incoming req see
117system.mem_ctrls.rdQLenPdf::25 0 # What read queue length does an incoming req see
118system.mem_ctrls.rdQLenPdf::26 0 # What read queue length does an incoming req see
119system.mem_ctrls.rdQLenPdf::27 0 # What read queue length does an incoming req see
120system.mem_ctrls.rdQLenPdf::28 0 # What read queue length does an incoming req see
121system.mem_ctrls.rdQLenPdf::29 0 # What read queue length does an incoming req see
122system.mem_ctrls.rdQLenPdf::30 0 # What read queue length does an incoming req see
123system.mem_ctrls.rdQLenPdf::31 0 # What read queue length does an incoming req see
124system.mem_ctrls.wrQLenPdf::0 1 # What write queue length does an incoming req see
125system.mem_ctrls.wrQLenPdf::1 1 # What write queue length does an incoming req see
126system.mem_ctrls.wrQLenPdf::2 1 # What write queue length does an incoming req see
127system.mem_ctrls.wrQLenPdf::3 1 # What write queue length does an incoming req see
128system.mem_ctrls.wrQLenPdf::4 1 # What write queue length does an incoming req see
129system.mem_ctrls.wrQLenPdf::5 1 # What write queue length does an incoming req see
130system.mem_ctrls.wrQLenPdf::6 1 # What write queue length does an incoming req see
131system.mem_ctrls.wrQLenPdf::7 1 # What write queue length does an incoming req see
132system.mem_ctrls.wrQLenPdf::8 1 # What write queue length does an incoming req see
133system.mem_ctrls.wrQLenPdf::9 1 # What write queue length does an incoming req see
134system.mem_ctrls.wrQLenPdf::10 1 # What write queue length does an incoming req see
135system.mem_ctrls.wrQLenPdf::11 1 # What write queue length does an incoming req see
136system.mem_ctrls.wrQLenPdf::12 1 # What write queue length does an incoming req see
137system.mem_ctrls.wrQLenPdf::13 1 # What write queue length does an incoming req see
138system.mem_ctrls.wrQLenPdf::14 1 # What write queue length does an incoming req see
139system.mem_ctrls.wrQLenPdf::15 330 # What write queue length does an incoming req see
140system.mem_ctrls.wrQLenPdf::16 402 # What write queue length does an incoming req see
141system.mem_ctrls.wrQLenPdf::17 2224 # What write queue length does an incoming req see
142system.mem_ctrls.wrQLenPdf::18 2668 # What write queue length does an incoming req see
143system.mem_ctrls.wrQLenPdf::19 2708 # What write queue length does an incoming req see
144system.mem_ctrls.wrQLenPdf::20 2791 # What write queue length does an incoming req see
145system.mem_ctrls.wrQLenPdf::21 2963 # What write queue length does an incoming req see
146system.mem_ctrls.wrQLenPdf::22 2810 # What write queue length does an incoming req see
147system.mem_ctrls.wrQLenPdf::23 2680 # What write queue length does an incoming req see
148system.mem_ctrls.wrQLenPdf::24 2663 # What write queue length does an incoming req see
149system.mem_ctrls.wrQLenPdf::25 2661 # What write queue length does an incoming req see
150system.mem_ctrls.wrQLenPdf::26 2661 # What write queue length does an incoming req see
151system.mem_ctrls.wrQLenPdf::27 2658 # What write queue length does an incoming req see
152system.mem_ctrls.wrQLenPdf::28 2660 # What write queue length does an incoming req see
153system.mem_ctrls.wrQLenPdf::29 2658 # What write queue length does an incoming req see
154system.mem_ctrls.wrQLenPdf::30 2658 # What write queue length does an incoming req see
155system.mem_ctrls.wrQLenPdf::31 2658 # What write queue length does an incoming req see
156system.mem_ctrls.wrQLenPdf::32 2658 # What write queue length does an incoming req see
157system.mem_ctrls.wrQLenPdf::33 0 # What write queue length does an incoming req see
158system.mem_ctrls.wrQLenPdf::34 0 # What write queue length does an incoming req see
159system.mem_ctrls.wrQLenPdf::35 0 # What write queue length does an incoming req see
160system.mem_ctrls.wrQLenPdf::36 0 # What write queue length does an incoming req see
161system.mem_ctrls.wrQLenPdf::37 0 # What write queue length does an incoming req see
162system.mem_ctrls.wrQLenPdf::38 0 # What write queue length does an incoming req see
163system.mem_ctrls.wrQLenPdf::39 0 # What write queue length does an incoming req see
164system.mem_ctrls.wrQLenPdf::40 0 # What write queue length does an incoming req see
165system.mem_ctrls.wrQLenPdf::41 0 # What write queue length does an incoming req see
166system.mem_ctrls.wrQLenPdf::42 0 # What write queue length does an incoming req see
167system.mem_ctrls.wrQLenPdf::43 0 # What write queue length does an incoming req see
168system.mem_ctrls.wrQLenPdf::44 0 # What write queue length does an incoming req see
169system.mem_ctrls.wrQLenPdf::45 0 # What write queue length does an incoming req see
170system.mem_ctrls.wrQLenPdf::46 0 # What write queue length does an incoming req see
171system.mem_ctrls.wrQLenPdf::47 0 # What write queue length does an incoming req see
172system.mem_ctrls.wrQLenPdf::48 0 # What write queue length does an incoming req see
173system.mem_ctrls.wrQLenPdf::49 0 # What write queue length does an incoming req see
174system.mem_ctrls.wrQLenPdf::50 0 # What write queue length does an incoming req see
175system.mem_ctrls.wrQLenPdf::51 0 # What write queue length does an incoming req see
176system.mem_ctrls.wrQLenPdf::52 0 # What write queue length does an incoming req see
177system.mem_ctrls.wrQLenPdf::53 0 # What write queue length does an incoming req see
178system.mem_ctrls.wrQLenPdf::54 0 # What write queue length does an incoming req see
179system.mem_ctrls.wrQLenPdf::55 0 # What write queue length does an incoming req see
180system.mem_ctrls.wrQLenPdf::56 0 # What write queue length does an incoming req see
181system.mem_ctrls.wrQLenPdf::57 0 # What write queue length does an incoming req see
182system.mem_ctrls.wrQLenPdf::58 0 # What write queue length does an incoming req see
183system.mem_ctrls.wrQLenPdf::59 0 # What write queue length does an incoming req see
184system.mem_ctrls.wrQLenPdf::60 0 # What write queue length does an incoming req see
185system.mem_ctrls.wrQLenPdf::61 0 # What write queue length does an incoming req see
186system.mem_ctrls.wrQLenPdf::62 0 # What write queue length does an incoming req see
187system.mem_ctrls.wrQLenPdf::63 0 # What write queue length does an incoming req see
188system.mem_ctrls.bytesPerActivate::samples 15795 # Bytes accessed per row activation
189system.mem_ctrls.bytesPerActivate::mean 344.923330 # Bytes accessed per row activation
190system.mem_ctrls.bytesPerActivate::gmean 229.090130 # Bytes accessed per row activation
191system.mem_ctrls.bytesPerActivate::stdev 305.803840 # Bytes accessed per row activation
192system.mem_ctrls.bytesPerActivate::0-127 3621 22.92% 22.92% # Bytes accessed per row activation
193system.mem_ctrls.bytesPerActivate::128-255 4154 26.30% 49.22% # Bytes accessed per row activation
194system.mem_ctrls.bytesPerActivate::256-383 2325 14.72% 63.94% # Bytes accessed per row activation
195system.mem_ctrls.bytesPerActivate::384-511 1784 11.29% 75.24% # Bytes accessed per row activation
196system.mem_ctrls.bytesPerActivate::512-639 865 5.48% 80.72% # Bytes accessed per row activation
197system.mem_ctrls.bytesPerActivate::640-767 706 4.47% 85.19% # Bytes accessed per row activation
198system.mem_ctrls.bytesPerActivate::768-895 510 3.23% 88.41% # Bytes accessed per row activation
199system.mem_ctrls.bytesPerActivate::896-1023 328 2.08% 90.49% # Bytes accessed per row activation
200system.mem_ctrls.bytesPerActivate::1024-1151 1502 9.51% 100.00% # Bytes accessed per row activation
201system.mem_ctrls.bytesPerActivate::total 15795 # Bytes accessed per row activation
202system.mem_ctrls.rdPerTurnAround::samples 2658 # Reads before turning the bus around for writes
203system.mem_ctrls.rdPerTurnAround::mean 15.670429 # Reads before turning the bus around for writes
204system.mem_ctrls.rdPerTurnAround::gmean 15.605623 # Reads before turning the bus around for writes
205system.mem_ctrls.rdPerTurnAround::stdev 1.463558 # Reads before turning the bus around for writes
206system.mem_ctrls.rdPerTurnAround::12-13 110 4.14% 4.14% # Reads before turning the bus around for writes
207system.mem_ctrls.rdPerTurnAround::14-15 1181 44.43% 48.57% # Reads before turning the bus around for writes
208system.mem_ctrls.rdPerTurnAround::16-17 1114 41.91% 90.48% # Reads before turning the bus around for writes
209system.mem_ctrls.rdPerTurnAround::18-19 223 8.39% 98.87% # Reads before turning the bus around for writes
210system.mem_ctrls.rdPerTurnAround::20-21 29 1.09% 99.96% # Reads before turning the bus around for writes
211system.mem_ctrls.rdPerTurnAround::36-37 1 0.04% 100.00% # Reads before turning the bus around for writes
212system.mem_ctrls.rdPerTurnAround::total 2658 # Reads before turning the bus around for writes
213system.mem_ctrls.wrPerTurnAround::samples 2658 # Writes before turning the bus around for reads
214system.mem_ctrls.wrPerTurnAround::mean 16.366441 # Writes before turning the bus around for reads
215system.mem_ctrls.wrPerTurnAround::gmean 16.340186 # Writes before turning the bus around for reads
216system.mem_ctrls.wrPerTurnAround::stdev 0.970216 # Writes before turning the bus around for reads
217system.mem_ctrls.wrPerTurnAround::16 2300 86.53% 86.53% # Writes before turning the bus around for reads
218system.mem_ctrls.wrPerTurnAround::17 19 0.71% 87.25% # Writes before turning the bus around for reads
219system.mem_ctrls.wrPerTurnAround::18 111 4.18% 91.42% # Writes before turning the bus around for reads
220system.mem_ctrls.wrPerTurnAround::19 179 6.73% 98.16% # Writes before turning the bus around for reads
221system.mem_ctrls.wrPerTurnAround::20 49 1.84% 100.00% # Writes before turning the bus around for reads
222system.mem_ctrls.wrPerTurnAround::total 2658 # Writes before turning the bus around for reads
223system.mem_ctrls.totQLat 835288 # Total ticks spent queuing
224system.mem_ctrls.totMemAccLat 1626809 # Total ticks spent from burst creation until serviced by the DRAM
225system.mem_ctrls.totBusLat 208295 # Total ticks spent in databus transfers
226system.mem_ctrls.avgQLat 20.05 # Average queueing delay per DRAM burst
227system.mem_ctrls.avgBusLat 5.00 # Average bus latency per DRAM burst
228system.mem_ctrls.avgMemAccLat 39.05 # Average memory access latency per DRAM burst
229system.mem_ctrls.avgRdBW 508.19 # Average DRAM read bandwidth in MiByte/s
230system.mem_ctrls.avgWrBW 530.67 # Average achieved write bandwidth in MiByte/s
231system.mem_ctrls.avgRdBWSys 967.00 # Average system read bandwidth in MiByte/s
232system.mem_ctrls.avgWrBWSys 966.95 # Average system write bandwidth in MiByte/s
233system.mem_ctrls.peakBW 12800.00 # Theoretical peak bandwidth in MiByte/s
234system.mem_ctrls.busUtil 8.12 # Data bus utilization in percentage
235system.mem_ctrls.busUtilRead 3.97 # Data bus utilization in percentage for reads
236system.mem_ctrls.busUtilWrite 4.15 # Data bus utilization in percentage for writes
237system.mem_ctrls.avgRdQLen 1.00 # Average read queue length when enqueuing
238system.mem_ctrls.avgWrQLen 26.01 # Average write queue length when enqueuing
239system.mem_ctrls.readRowHits 29472 # Number of row buffer hits during reads
240system.mem_ctrls.writeRowHits 39888 # Number of row buffer hits during writes
241system.mem_ctrls.readRowHitRate 70.75 # Row buffer hit rate for reads
242system.mem_ctrls.writeRowHitRate 91.64 # Row buffer hit rate for writes
243system.mem_ctrls.avgGap 33.09 # Average gap between requests
244system.mem_ctrls.pageHitRate 81.42 # Row buffer hit rate, read and write combined
245system.mem_ctrls_0.actEnergy 79710960 # Energy for activate commands per rank (pJ)
246system.mem_ctrls_0.preEnergy 43126104 # Energy for precharge commands per rank (pJ)
247system.mem_ctrls_0.readEnergy 282823968 # Energy for read commands per rank (pJ)
248system.mem_ctrls_0.writeEnergy 218655360 # Energy for write commands per rank (pJ)
249system.mem_ctrls_0.refreshEnergy 414882000.000000 # Energy for refresh commands per rank (pJ)
250system.mem_ctrls_0.actBackEnergy 659598072 # Energy for active background per rank (pJ)
251system.mem_ctrls_0.preBackEnergy 10126848 # Energy for precharge background per rank (pJ)
252system.mem_ctrls_0.actPowerDownEnergy 1616957760 # Energy for active power-down per rank (pJ)
253system.mem_ctrls_0.prePowerDownEnergy 62452224 # Energy for precharge power-down per rank (pJ)
254system.mem_ctrls_0.selfRefreshEnergy 21677280 # Energy for self refresh per rank (pJ)
255system.mem_ctrls_0.totalEnergy 3410010576 # Total energy per rank (pJ)
256system.mem_ctrls_0.averagePower 649.963342 # Core power per rank (mW)
257system.mem_ctrls_0.totalIdleTime 3773570 # Total Idle time Per DRAM Rank
258system.mem_ctrls_0.memoryStateTime::IDLE 6170 # Time in different power states
259system.mem_ctrls_0.memoryStateTime::REF 175566 # Time in different power states
260system.mem_ctrls_0.memoryStateTime::SREF 65011 # Time in different power states
261system.mem_ctrls_0.memoryStateTime::PRE_PDN 162636 # Time in different power states
262system.mem_ctrls_0.memoryStateTime::ACT 1291123 # Time in different power states
263system.mem_ctrls_0.memoryStateTime::ACT_PDN 3545960 # Time in different power states
264system.mem_ctrls_1.actEnergy 33108180 # Energy for activate commands per rank (pJ)
265system.mem_ctrls_1.preEnergy 17905776 # Energy for precharge commands per rank (pJ)
266system.mem_ctrls_1.readEnergy 193088448 # Energy for read commands per rank (pJ)
267system.mem_ctrls_1.writeEnergy 144673344 # Energy for write commands per rank (pJ)
268system.mem_ctrls_1.refreshEnergy 397057440.000000 # Energy for refresh commands per rank (pJ)
269system.mem_ctrls_1.actBackEnergy 650520024 # Energy for active background per rank (pJ)
270system.mem_ctrls_1.preBackEnergy 12185088 # Energy for precharge background per rank (pJ)
271system.mem_ctrls_1.actPowerDownEnergy 1517506896 # Energy for active power-down per rank (pJ)
272system.mem_ctrls_1.prePowerDownEnergy 81936768 # Energy for precharge power-down per rank (pJ)
273system.mem_ctrls_1.selfRefreshEnergy 62020080 # Energy for self refresh per rank (pJ)
274system.mem_ctrls_1.totalEnergy 3110002044 # Total energy per rank (pJ)
275system.mem_ctrls_1.averagePower 592.780368 # Core power per rank (mW)
276system.mem_ctrls_1.totalIdleTime 3787958 # Total Idle time Per DRAM Rank
277system.mem_ctrls_1.memoryStateTime::IDLE 12732 # Time in different power states
278system.mem_ctrls_1.memoryStateTime::REF 167990 # Time in different power states
279system.mem_ctrls_1.memoryStateTime::SREF 246912 # Time in different power states
280system.mem_ctrls_1.memoryStateTime::PRE_PDN 213377 # Time in different power states
281system.mem_ctrls_1.memoryStateTime::ACT 1277589 # Time in different power states
282system.mem_ctrls_1.memoryStateTime::ACT_PDN 3327866 # Time in different power states
283system.pwrStateResidencyTicks::UNDEFINED 5246466 # Cumulative time (in ticks) in various power states
284system.cpu.clk_domain.clock 1 # Clock period in ticks
285system.cpu.dtb.read_hits 0 # DTB read hits
286system.cpu.dtb.read_misses 0 # DTB read misses
287system.cpu.dtb.read_accesses 0 # DTB read accesses
288system.cpu.dtb.write_hits 0 # DTB write hits
289system.cpu.dtb.write_misses 0 # DTB write misses
290system.cpu.dtb.write_accesses 0 # DTB write accesses
291system.cpu.dtb.hits 0 # DTB hits
292system.cpu.dtb.misses 0 # DTB misses
293system.cpu.dtb.accesses 0 # DTB accesses
294system.cpu.itb.read_hits 0 # DTB read hits
295system.cpu.itb.read_misses 0 # DTB read misses
296system.cpu.itb.read_accesses 0 # DTB read accesses
297system.cpu.itb.write_hits 0 # DTB write hits
298system.cpu.itb.write_misses 0 # DTB write misses
299system.cpu.itb.write_accesses 0 # DTB write accesses
300system.cpu.itb.hits 0 # DTB hits
301system.cpu.itb.misses 0 # DTB misses
302system.cpu.itb.accesses 0 # DTB accesses
303system.cpu.workload.num_syscalls 183 # Number of system calls
304system.cpu.pwrStateResidencyTicks::ON 5246466 # Cumulative time (in ticks) in various power states
305system.cpu.numCycles 5246466 # number of cpu cycles simulated
306system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
307system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
308system.cpu.committedInsts 266066 # Number of instructions committed
309system.cpu.committedOps 266066 # Number of ops (including micro ops) committed
310system.cpu.num_int_alu_accesses 266065 # Number of integer alu accesses
311system.cpu.num_fp_alu_accesses 0 # Number of float alu accesses
312system.cpu.num_func_calls 19074 # number of times a function call or return occured
313system.cpu.num_conditional_control_insts 39832 # number of instructions that are conditional controls
314system.cpu.num_int_insts 266065 # number of integer instructions
315system.cpu.num_fp_insts 0 # number of float instructions
316system.cpu.num_int_register_reads 351637 # number of times the integer registers were read
317system.cpu.num_int_register_writes 182516 # number of times the integer registers were written
318system.cpu.num_fp_register_reads 0 # number of times the floating registers were read
319system.cpu.num_fp_register_writes 0 # number of times the floating registers were written
320system.cpu.num_mem_refs 106592 # number of memory refs
321system.cpu.num_load_insts 62875 # Number of load instructions
322system.cpu.num_store_insts 43717 # Number of store instructions
323system.cpu.num_idle_cycles 0 # Number of idle cycles
324system.cpu.num_busy_cycles 5246466 # Number of busy cycles
325system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
326system.cpu.idle_fraction 0 # Percentage of idle cycles
327system.cpu.Branches 58906 # Number of branches fetched
328system.cpu.op_class::No_OpClass 188 0.07% 0.07% # Class of executed instruction
329system.cpu.op_class::IntAlu 158793 59.64% 59.71% # Class of executed instruction
330system.cpu.op_class::IntMult 431 0.16% 59.87% # Class of executed instruction
331system.cpu.op_class::IntDiv 246 0.09% 59.97% # Class of executed instruction
332system.cpu.op_class::FloatAdd 0 0.00% 59.97% # Class of executed instruction
333system.cpu.op_class::FloatCmp 0 0.00% 59.97% # Class of executed instruction
334system.cpu.op_class::FloatCvt 0 0.00% 59.97% # Class of executed instruction
335system.cpu.op_class::FloatMult 0 0.00% 59.97% # Class of executed instruction
336system.cpu.op_class::FloatMultAcc 0 0.00% 59.97% # Class of executed instruction
337system.cpu.op_class::FloatDiv 0 0.00% 59.97% # Class of executed instruction
338system.cpu.op_class::FloatMisc 0 0.00% 59.97% # Class of executed instruction
339system.cpu.op_class::FloatSqrt 0 0.00% 59.97% # Class of executed instruction
340system.cpu.op_class::SimdAdd 0 0.00% 59.97% # Class of executed instruction
341system.cpu.op_class::SimdAddAcc 0 0.00% 59.97% # Class of executed instruction
342system.cpu.op_class::SimdAlu 0 0.00% 59.97% # Class of executed instruction
343system.cpu.op_class::SimdCmp 0 0.00% 59.97% # Class of executed instruction
344system.cpu.op_class::SimdCvt 0 0.00% 59.97% # Class of executed instruction
345system.cpu.op_class::SimdMisc 0 0.00% 59.97% # Class of executed instruction
346system.cpu.op_class::SimdMult 0 0.00% 59.97% # Class of executed instruction
347system.cpu.op_class::SimdMultAcc 0 0.00% 59.97% # Class of executed instruction
348system.cpu.op_class::SimdShift 0 0.00% 59.97% # Class of executed instruction
349system.cpu.op_class::SimdShiftAcc 0 0.00% 59.97% # Class of executed instruction
350system.cpu.op_class::SimdSqrt 0 0.00% 59.97% # Class of executed instruction
351system.cpu.op_class::SimdFloatAdd 0 0.00% 59.97% # Class of executed instruction
352system.cpu.op_class::SimdFloatAlu 0 0.00% 59.97% # Class of executed instruction
353system.cpu.op_class::SimdFloatCmp 0 0.00% 59.97% # Class of executed instruction
354system.cpu.op_class::SimdFloatCvt 0 0.00% 59.97% # Class of executed instruction
355system.cpu.op_class::SimdFloatDiv 0 0.00% 59.97% # Class of executed instruction
356system.cpu.op_class::SimdFloatMisc 0 0.00% 59.97% # Class of executed instruction
357system.cpu.op_class::SimdFloatMult 0 0.00% 59.97% # Class of executed instruction
358system.cpu.op_class::SimdFloatMultAcc 0 0.00% 59.97% # Class of executed instruction
359system.cpu.op_class::SimdFloatSqrt 0 0.00% 59.97% # Class of executed instruction
360system.cpu.op_class::MemRead 62875 23.62% 83.58% # Class of executed instruction
361system.cpu.op_class::MemWrite 43717 16.42% 100.00% # Class of executed instruction
362system.cpu.op_class::FloatMemRead 0 0.00% 100.00% # Class of executed instruction
363system.cpu.op_class::FloatMemWrite 0 0.00% 100.00% # Class of executed instruction
364system.cpu.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction
365system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction
366system.cpu.op_class::total 266250 # Class of executed instruction
367system.ruby.clk_domain.clock 1 # Clock period in ticks
368system.ruby.pwrStateResidencyTicks::UNDEFINED 5246466 # Cumulative time (in ticks) in various power states
369system.ruby.delayHist::bucket_size 1 # delay histogram for all message
370system.ruby.delayHist::max_bucket 9 # delay histogram for all message
371system.ruby.delayHist::samples 158538 # delay histogram for all message
372system.ruby.delayHist | 158538 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for all message
373system.ruby.delayHist::total 158538 # delay histogram for all message
374system.ruby.outstanding_req_hist_seqr::bucket_size 1
375system.ruby.outstanding_req_hist_seqr::max_bucket 9
376system.ruby.outstanding_req_hist_seqr::samples 372842
377system.ruby.outstanding_req_hist_seqr::mean 1
378system.ruby.outstanding_req_hist_seqr::gmean 1
379system.ruby.outstanding_req_hist_seqr | 0 0.00% 0.00% | 372842 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
380system.ruby.outstanding_req_hist_seqr::total 372842
381system.ruby.latency_hist_seqr::bucket_size 64
382system.ruby.latency_hist_seqr::max_bucket 639
383system.ruby.latency_hist_seqr::samples 372841
384system.ruby.latency_hist_seqr::mean 13.071591
385system.ruby.latency_hist_seqr::gmean 2.303358
386system.ruby.latency_hist_seqr::stdev 28.899910
387system.ruby.latency_hist_seqr | 332521 89.19% 89.19% | 37494 10.06% 99.24% | 1855 0.50% 99.74% | 376 0.10% 99.84% | 322 0.09% 99.93% | 238 0.06% 99.99% | 17 0.00% 100.00% | 3 0.00% 100.00% | 2 0.00% 100.00% | 13 0.00% 100.00%
388system.ruby.latency_hist_seqr::total 372841
389system.ruby.hit_latency_hist_seqr::bucket_size 1
390system.ruby.hit_latency_hist_seqr::max_bucket 9
391system.ruby.hit_latency_hist_seqr::samples 293570
392system.ruby.hit_latency_hist_seqr::mean 1
393system.ruby.hit_latency_hist_seqr::gmean 1
394system.ruby.hit_latency_hist_seqr | 0 0.00% 0.00% | 293570 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
395system.ruby.hit_latency_hist_seqr::total 293570
396system.ruby.miss_latency_hist_seqr::bucket_size 64
397system.ruby.miss_latency_hist_seqr::max_bucket 639
398system.ruby.miss_latency_hist_seqr::samples 79271
399system.ruby.miss_latency_hist_seqr::mean 57.777182
400system.ruby.miss_latency_hist_seqr::gmean 50.619805
401system.ruby.miss_latency_hist_seqr::stdev 37.283085
402system.ruby.miss_latency_hist_seqr | 38951 49.14% 49.14% | 37494 47.30% 96.44% | 1855 2.34% 98.78% | 376 0.47% 99.25% | 322 0.41% 99.66% | 238 0.30% 99.96% | 17 0.02% 99.98% | 3 0.00% 99.98% | 2 0.00% 99.98% | 13 0.02% 100.00%
403system.ruby.miss_latency_hist_seqr::total 79271
404system.ruby.Directory.incomplete_times_seqr 79270
405system.ruby.dir_cntrl0.pwrStateResidencyTicks::UNDEFINED 5246466 # Cumulative time (in ticks) in various power states
406system.ruby.l1_cntrl0.cacheMemory.demand_hits 293570 # Number of cache demand hits
407system.ruby.l1_cntrl0.cacheMemory.demand_misses 79271 # Number of cache demand misses
408system.ruby.l1_cntrl0.cacheMemory.demand_accesses 372841 # Number of cache demand accesses
409system.ruby.l1_cntrl0.sequencer.pwrStateResidencyTicks::UNDEFINED 5246466 # Cumulative time (in ticks) in various power states
410system.ruby.l1_cntrl0.pwrStateResidencyTicks::UNDEFINED 5246466 # Cumulative time (in ticks) in various power states
411system.ruby.memctrl_clk_domain.clock 3 # Clock period in ticks
412system.ruby.network.routers0.pwrStateResidencyTicks::UNDEFINED 5246466 # Cumulative time (in ticks) in various power states
413system.ruby.network.routers0.percent_links_utilized 7.554514
414system.ruby.network.routers0.msg_count.Control::2 79271
415system.ruby.network.routers0.msg_count.Data::2 79267
416system.ruby.network.routers0.msg_count.Response_Data::4 79271
417system.ruby.network.routers0.msg_count.Writeback_Control::3 79267
418system.ruby.network.routers0.msg_bytes.Control::2 634168
419system.ruby.network.routers0.msg_bytes.Data::2 5707224
420system.ruby.network.routers0.msg_bytes.Response_Data::4 5707512
421system.ruby.network.routers0.msg_bytes.Writeback_Control::3 634136
422system.ruby.network.routers1.pwrStateResidencyTicks::UNDEFINED 5246466 # Cumulative time (in ticks) in various power states
423system.ruby.network.routers1.percent_links_utilized 7.554514
424system.ruby.network.routers1.msg_count.Control::2 79271
425system.ruby.network.routers1.msg_count.Data::2 79267
426system.ruby.network.routers1.msg_count.Response_Data::4 79271
427system.ruby.network.routers1.msg_count.Writeback_Control::3 79267
428system.ruby.network.routers1.msg_bytes.Control::2 634168
429system.ruby.network.routers1.msg_bytes.Data::2 5707224
430system.ruby.network.routers1.msg_bytes.Response_Data::4 5707512
431system.ruby.network.routers1.msg_bytes.Writeback_Control::3 634136
432system.ruby.network.routers2.pwrStateResidencyTicks::UNDEFINED 5246466 # Cumulative time (in ticks) in various power states
433system.ruby.network.routers2.percent_links_utilized 7.554514
434system.ruby.network.routers2.msg_count.Control::2 79271
435system.ruby.network.routers2.msg_count.Data::2 79267
436system.ruby.network.routers2.msg_count.Response_Data::4 79271
437system.ruby.network.routers2.msg_count.Writeback_Control::3 79267
438system.ruby.network.routers2.msg_bytes.Control::2 634168
439system.ruby.network.routers2.msg_bytes.Data::2 5707224
440system.ruby.network.routers2.msg_bytes.Response_Data::4 5707512
441system.ruby.network.routers2.msg_bytes.Writeback_Control::3 634136
442system.ruby.network.pwrStateResidencyTicks::UNDEFINED 5246466 # Cumulative time (in ticks) in various power states
443system.ruby.network.msg_count.Control 237813
444system.ruby.network.msg_count.Data 237801
445system.ruby.network.msg_count.Response_Data 237813
446system.ruby.network.msg_count.Writeback_Control 237801
447system.ruby.network.msg_byte.Control 1902504
448system.ruby.network.msg_byte.Data 17121672
449system.ruby.network.msg_byte.Response_Data 17122536
450system.ruby.network.msg_byte.Writeback_Control 1902408
451system.sys_port_proxy.pwrStateResidencyTicks::UNDEFINED 5246466 # Cumulative time (in ticks) in various power states
452system.ruby.network.routers0.throttle0.link_utilization 7.554666
453system.ruby.network.routers0.throttle0.msg_count.Response_Data::4 79271
454system.ruby.network.routers0.throttle0.msg_count.Writeback_Control::3 79267
455system.ruby.network.routers0.throttle0.msg_bytes.Response_Data::4 5707512
456system.ruby.network.routers0.throttle0.msg_bytes.Writeback_Control::3 634136
457system.ruby.network.routers0.throttle1.link_utilization 7.554361
458system.ruby.network.routers0.throttle1.msg_count.Control::2 79271
459system.ruby.network.routers0.throttle1.msg_count.Data::2 79267
460system.ruby.network.routers0.throttle1.msg_bytes.Control::2 634168
461system.ruby.network.routers0.throttle1.msg_bytes.Data::2 5707224
462system.ruby.network.routers1.throttle0.link_utilization 7.554361
463system.ruby.network.routers1.throttle0.msg_count.Control::2 79271
464system.ruby.network.routers1.throttle0.msg_count.Data::2 79267
465system.ruby.network.routers1.throttle0.msg_bytes.Control::2 634168
466system.ruby.network.routers1.throttle0.msg_bytes.Data::2 5707224
467system.ruby.network.routers1.throttle1.link_utilization 7.554666
468system.ruby.network.routers1.throttle1.msg_count.Response_Data::4 79271
469system.ruby.network.routers1.throttle1.msg_count.Writeback_Control::3 79267
470system.ruby.network.routers1.throttle1.msg_bytes.Response_Data::4 5707512
471system.ruby.network.routers1.throttle1.msg_bytes.Writeback_Control::3 634136
472system.ruby.network.routers2.throttle0.link_utilization 7.554666
473system.ruby.network.routers2.throttle0.msg_count.Response_Data::4 79271
474system.ruby.network.routers2.throttle0.msg_count.Writeback_Control::3 79267
475system.ruby.network.routers2.throttle0.msg_bytes.Response_Data::4 5707512
476system.ruby.network.routers2.throttle0.msg_bytes.Writeback_Control::3 634136
477system.ruby.network.routers2.throttle1.link_utilization 7.554361
478system.ruby.network.routers2.throttle1.msg_count.Control::2 79271
479system.ruby.network.routers2.throttle1.msg_count.Data::2 79267
480system.ruby.network.routers2.throttle1.msg_bytes.Control::2 634168
481system.ruby.network.routers2.throttle1.msg_bytes.Data::2 5707224
482system.ruby.delayVCHist.vnet_1::bucket_size 1 # delay histogram for vnet_1
483system.ruby.delayVCHist.vnet_1::max_bucket 9 # delay histogram for vnet_1
484system.ruby.delayVCHist.vnet_1::samples 79271 # delay histogram for vnet_1
485system.ruby.delayVCHist.vnet_1 | 79271 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for vnet_1
486system.ruby.delayVCHist.vnet_1::total 79271 # delay histogram for vnet_1
487system.ruby.delayVCHist.vnet_2::bucket_size 1 # delay histogram for vnet_2
488system.ruby.delayVCHist.vnet_2::max_bucket 9 # delay histogram for vnet_2
489system.ruby.delayVCHist.vnet_2::samples 79267 # delay histogram for vnet_2
490system.ruby.delayVCHist.vnet_2 | 79267 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for vnet_2
491system.ruby.delayVCHist.vnet_2::total 79267 # delay histogram for vnet_2
492system.ruby.LD.latency_hist_seqr::bucket_size 64
493system.ruby.LD.latency_hist_seqr::max_bucket 639
494system.ruby.LD.latency_hist_seqr::samples 62875
495system.ruby.LD.latency_hist_seqr::mean 27.680191
496system.ruby.LD.latency_hist_seqr::gmean 7.180276
497system.ruby.LD.latency_hist_seqr::stdev 35.811045
498system.ruby.LD.latency_hist_seqr | 50013 79.54% 79.54% | 11930 18.97% 98.52% | 656 1.04% 99.56% | 86 0.14% 99.70% | 110 0.17% 99.87% | 69 0.11% 99.98% | 11 0.02% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
499system.ruby.LD.latency_hist_seqr::total 62875
500system.ruby.LD.hit_latency_hist_seqr::bucket_size 1
501system.ruby.LD.hit_latency_hist_seqr::max_bucket 9
502system.ruby.LD.hit_latency_hist_seqr::samples 30585
503system.ruby.LD.hit_latency_hist_seqr::mean 1
504system.ruby.LD.hit_latency_hist_seqr::gmean 1
505system.ruby.LD.hit_latency_hist_seqr | 0 0.00% 0.00% | 30585 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
506system.ruby.LD.hit_latency_hist_seqr::total 30585
507system.ruby.LD.miss_latency_hist_seqr::bucket_size 64
508system.ruby.LD.miss_latency_hist_seqr::max_bucket 639
509system.ruby.LD.miss_latency_hist_seqr::samples 32290
510system.ruby.LD.miss_latency_hist_seqr::mean 52.951595
511system.ruby.LD.miss_latency_hist_seqr::gmean 46.459624
512system.ruby.LD.miss_latency_hist_seqr::stdev 34.412980
513system.ruby.LD.miss_latency_hist_seqr | 19428 60.17% 60.17% | 11930 36.95% 97.11% | 656 2.03% 99.15% | 86 0.27% 99.41% | 110 0.34% 99.75% | 69 0.21% 99.97% | 11 0.03% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
514system.ruby.LD.miss_latency_hist_seqr::total 32290
515system.ruby.ST.latency_hist_seqr::bucket_size 64
516system.ruby.ST.latency_hist_seqr::max_bucket 639
517system.ruby.ST.latency_hist_seqr::samples 43716
518system.ruby.ST.latency_hist_seqr::mean 11.968158
519system.ruby.ST.latency_hist_seqr::gmean 2.425644
520system.ruby.ST.latency_hist_seqr::stdev 26.441690
521system.ruby.ST.latency_hist_seqr | 40932 93.63% 93.63% | 2520 5.76% 99.40% | 167 0.38% 99.78% | 45 0.10% 99.88% | 22 0.05% 99.93% | 18 0.04% 99.97% | 0 0.00% 99.97% | 0 0.00% 99.97% | 2 0.00% 99.98% | 10 0.02% 100.00%
522system.ruby.ST.latency_hist_seqr::total 43716
523system.ruby.ST.hit_latency_hist_seqr::bucket_size 1
524system.ruby.ST.hit_latency_hist_seqr::max_bucket 9
525system.ruby.ST.hit_latency_hist_seqr::samples 33299
526system.ruby.ST.hit_latency_hist_seqr::mean 1
527system.ruby.ST.hit_latency_hist_seqr::gmean 1
528system.ruby.ST.hit_latency_hist_seqr | 0 0.00% 0.00% | 33299 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
529system.ruby.ST.hit_latency_hist_seqr::total 33299
530system.ruby.ST.miss_latency_hist_seqr::bucket_size 64
531system.ruby.ST.miss_latency_hist_seqr::max_bucket 639
532system.ruby.ST.miss_latency_hist_seqr::samples 10417
533system.ruby.ST.miss_latency_hist_seqr::mean 47.028991
534system.ruby.ST.miss_latency_hist_seqr::gmean 41.206543
535system.ruby.ST.miss_latency_hist_seqr::stdev 36.336668
536system.ruby.ST.miss_latency_hist_seqr | 7633 73.27% 73.27% | 2520 24.19% 97.47% | 167 1.60% 99.07% | 45 0.43% 99.50% | 22 0.21% 99.71% | 18 0.17% 99.88% | 0 0.00% 99.88% | 0 0.00% 99.88% | 2 0.02% 99.90% | 10 0.10% 100.00%
537system.ruby.ST.miss_latency_hist_seqr::total 10417
538system.ruby.IFETCH.latency_hist_seqr::bucket_size 64
539system.ruby.IFETCH.latency_hist_seqr::max_bucket 639
540system.ruby.IFETCH.latency_hist_seqr::samples 266250
541system.ruby.IFETCH.latency_hist_seqr::mean 9.802941
542system.ruby.IFETCH.latency_hist_seqr::gmean 1.746090
543system.ruby.IFETCH.latency_hist_seqr::stdev 26.280316
544system.ruby.IFETCH.latency_hist_seqr | 241576 90.73% 90.73% | 23044 8.66% 99.39% | 1032 0.39% 99.78% | 245 0.09% 99.87% | 190 0.07% 99.94% | 151 0.06% 100.00% | 6 0.00% 100.00% | 3 0.00% 100.00% | 0 0.00% 100.00% | 3 0.00% 100.00%
545system.ruby.IFETCH.latency_hist_seqr::total 266250
546system.ruby.IFETCH.hit_latency_hist_seqr::bucket_size 1
547system.ruby.IFETCH.hit_latency_hist_seqr::max_bucket 9
548system.ruby.IFETCH.hit_latency_hist_seqr::samples 229686
549system.ruby.IFETCH.hit_latency_hist_seqr::mean 1
550system.ruby.IFETCH.hit_latency_hist_seqr::gmean 1
551system.ruby.IFETCH.hit_latency_hist_seqr | 0 0.00% 0.00% | 229686 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
552system.ruby.IFETCH.hit_latency_hist_seqr::total 229686
553system.ruby.IFETCH.miss_latency_hist_seqr::bucket_size 64
554system.ruby.IFETCH.miss_latency_hist_seqr::max_bucket 639
555system.ruby.IFETCH.miss_latency_hist_seqr::samples 36564
556system.ruby.IFETCH.miss_latency_hist_seqr::mean 65.100837
557system.ruby.IFETCH.miss_latency_hist_seqr::gmean 57.898658
558system.ruby.IFETCH.miss_latency_hist_seqr::stdev 38.529976
559system.ruby.IFETCH.miss_latency_hist_seqr | 11890 32.52% 32.52% | 23044 63.02% 95.54% | 1032 2.82% 98.36% | 245 0.67% 99.03% | 190 0.52% 99.55% | 151 0.41% 99.97% | 6 0.02% 99.98% | 3 0.01% 99.99% | 0 0.00% 99.99% | 3 0.01% 100.00%
560system.ruby.IFETCH.miss_latency_hist_seqr::total 36564
561system.ruby.Directory.miss_mach_latency_hist_seqr::bucket_size 64
562system.ruby.Directory.miss_mach_latency_hist_seqr::max_bucket 639
563system.ruby.Directory.miss_mach_latency_hist_seqr::samples 79271
564system.ruby.Directory.miss_mach_latency_hist_seqr::mean 57.777182
565system.ruby.Directory.miss_mach_latency_hist_seqr::gmean 50.619805
566system.ruby.Directory.miss_mach_latency_hist_seqr::stdev 37.283085
567system.ruby.Directory.miss_mach_latency_hist_seqr | 38951 49.14% 49.14% | 37494 47.30% 96.44% | 1855 2.34% 98.78% | 376 0.47% 99.25% | 322 0.41% 99.66% | 238 0.30% 99.96% | 17 0.02% 99.98% | 3 0.00% 99.98% | 2 0.00% 99.98% | 13 0.02% 100.00%
568system.ruby.Directory.miss_mach_latency_hist_seqr::total 79271
569system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::bucket_size 1
570system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::max_bucket 9
571system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::samples 1
572system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::stdev nan
573system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request | 1 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
574system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::total 1
575system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward::bucket_size 1
576system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward::max_bucket 9
--- 12 unchanged lines hidden (view full) ---
589system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::samples 1
590system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::mean 75
591system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::gmean 75.000000
592system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::stdev nan
593system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1 100.00% 100.00%
594system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::total 1
595system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::bucket_size 64
596system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::max_bucket 639
597system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::samples 32290
598system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::mean 52.951595
599system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::gmean 46.459624
600system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::stdev 34.412980
601system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr | 19428 60.17% 60.17% | 11930 36.95% 97.11% | 656 2.03% 99.15% | 86 0.27% 99.41% | 110 0.34% 99.75% | 69 0.21% 99.97% | 11 0.03% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
602system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::total 32290
603system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::bucket_size 64
604system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::max_bucket 639
605system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::samples 10417
606system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::mean 47.028991
607system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::gmean 41.206543
608system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::stdev 36.336668
609system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr | 7633 73.27% 73.27% | 2520 24.19% 97.47% | 167 1.60% 99.07% | 45 0.43% 99.50% | 22 0.21% 99.71% | 18 0.17% 99.88% | 0 0.00% 99.88% | 0 0.00% 99.88% | 2 0.02% 99.90% | 10 0.10% 100.00%
610system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::total 10417
611system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::bucket_size 64
612system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::max_bucket 639
613system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::samples 36564
614system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::mean 65.100837
615system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::gmean 57.898658
616system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::stdev 38.529976
617system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr | 11890 32.52% 32.52% | 23044 63.02% 95.54% | 1032 2.82% 98.36% | 245 0.67% 99.03% | 190 0.52% 99.55% | 151 0.41% 99.97% | 6 0.02% 99.98% | 3 0.01% 99.99% | 0 0.00% 99.99% | 3 0.01% 100.00%
618system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::total 36564
619system.ruby.Directory_Controller.GETX 79271 0.00% 0.00%
620system.ruby.Directory_Controller.PUTX 79267 0.00% 0.00%
621system.ruby.Directory_Controller.Memory_Data 79271 0.00% 0.00%
622system.ruby.Directory_Controller.Memory_Ack 79267 0.00% 0.00%
623system.ruby.Directory_Controller.I.GETX 79271 0.00% 0.00%
624system.ruby.Directory_Controller.M.PUTX 79267 0.00% 0.00%
625system.ruby.Directory_Controller.IM.Memory_Data 79271 0.00% 0.00%
626system.ruby.Directory_Controller.MI.Memory_Ack 79267 0.00% 0.00%
627system.ruby.L1Cache_Controller.Load 62875 0.00% 0.00%
628system.ruby.L1Cache_Controller.Ifetch 266250 0.00% 0.00%
629system.ruby.L1Cache_Controller.Store 43716 0.00% 0.00%
630system.ruby.L1Cache_Controller.Data 79271 0.00% 0.00%
631system.ruby.L1Cache_Controller.Replacement 79267 0.00% 0.00%
632system.ruby.L1Cache_Controller.Writeback_Ack 79267 0.00% 0.00%
633system.ruby.L1Cache_Controller.I.Load 32290 0.00% 0.00%
634system.ruby.L1Cache_Controller.I.Ifetch 36564 0.00% 0.00%
635system.ruby.L1Cache_Controller.I.Store 10417 0.00% 0.00%
636system.ruby.L1Cache_Controller.M.Load 30585 0.00% 0.00%
637system.ruby.L1Cache_Controller.M.Ifetch 229686 0.00% 0.00%
638system.ruby.L1Cache_Controller.M.Store 33299 0.00% 0.00%
639system.ruby.L1Cache_Controller.M.Replacement 79267 0.00% 0.00%
640system.ruby.L1Cache_Controller.MI.Writeback_Ack 79267 0.00% 0.00%
641system.ruby.L1Cache_Controller.IS.Data 68854 0.00% 0.00%
642system.ruby.L1Cache_Controller.IM.Data 10417 0.00% 0.00%
643
644---------- End Simulation Statistics ----------
2---------- Begin Simulation Statistics ----------
3sim_seconds 0.005246 # Number of seconds simulated
4sim_ticks 5246466 # Number of ticks simulated
5final_tick 5246466 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
6sim_freq 1000000000 # Frequency of simulated ticks
7host_inst_rate 18477 # Simulator instruction rate (inst/s)
8host_op_rate 18477 # Simulator op (including micro ops) rate (op/s)
9host_tick_rate 364337 # Simulator tick rate (ticks/s)
10host_mem_usage 412052 # Number of bytes of host memory used
11host_seconds 14.40 # Real time elapsed on the host
12sim_insts 266066 # Number of instructions simulated
13sim_ops 266066 # Number of ops (including micro ops) simulated
14system.voltage_domain.voltage 1 # Voltage in Volts
15system.clk_domain.clock 1 # Clock period in ticks
16system.mem_ctrls.pwrStateResidencyTicks::UNDEFINED 5246466 # Cumulative time (in ticks) in various power states
17system.mem_ctrls.bytes_read::ruby.dir_cntrl0 5073344 # Number of bytes read from this memory
18system.mem_ctrls.bytes_read::total 5073344 # Number of bytes read from this memory
19system.mem_ctrls.bytes_written::ruby.dir_cntrl0 5073088 # Number of bytes written to this memory
20system.mem_ctrls.bytes_written::total 5073088 # Number of bytes written to this memory
21system.mem_ctrls.num_reads::ruby.dir_cntrl0 79271 # Number of read requests responded to by this memory
22system.mem_ctrls.num_reads::total 79271 # Number of read requests responded to by this memory
23system.mem_ctrls.num_writes::ruby.dir_cntrl0 79267 # Number of write requests responded to by this memory
24system.mem_ctrls.num_writes::total 79267 # Number of write requests responded to by this memory
25system.mem_ctrls.bw_read::ruby.dir_cntrl0 967002169 # Total read bandwidth from this memory (bytes/s)
26system.mem_ctrls.bw_read::total 967002169 # Total read bandwidth from this memory (bytes/s)
27system.mem_ctrls.bw_write::ruby.dir_cntrl0 966953374 # Write bandwidth from this memory (bytes/s)
28system.mem_ctrls.bw_write::total 966953374 # Write bandwidth from this memory (bytes/s)
29system.mem_ctrls.bw_total::ruby.dir_cntrl0 1933955543 # Total bandwidth to/from this memory (bytes/s)
30system.mem_ctrls.bw_total::total 1933955543 # Total bandwidth to/from this memory (bytes/s)
31system.mem_ctrls.readReqs 79271 # Number of read requests accepted
32system.mem_ctrls.writeReqs 79267 # Number of write requests accepted
33system.mem_ctrls.readBursts 79271 # Number of DRAM read bursts, including those serviced by the write queue
34system.mem_ctrls.writeBursts 79267 # Number of DRAM write bursts, including those merged in the write queue
35system.mem_ctrls.bytesReadDRAM 2666176 # Total number of bytes read from DRAM
36system.mem_ctrls.bytesReadWrQ 2407168 # Total number of bytes read from write queue
37system.mem_ctrls.bytesWritten 2784128 # Total number of bytes written to DRAM
38system.mem_ctrls.bytesReadSys 5073344 # Total read bytes from the system interface side
39system.mem_ctrls.bytesWrittenSys 5073088 # Total written bytes from the system interface side
40system.mem_ctrls.servicedByWrQ 37612 # Number of DRAM read bursts serviced by the write queue
41system.mem_ctrls.mergedWrBursts 35741 # Number of DRAM write bursts merged with an existing one
42system.mem_ctrls.neitherReadNorWriteReqs 0 # Number of requests that are neither read nor write
43system.mem_ctrls.perBankRdBursts::0 4161 # Per bank write bursts
44system.mem_ctrls.perBankRdBursts::1 6493 # Per bank write bursts
45system.mem_ctrls.perBankRdBursts::2 322 # Per bank write bursts
46system.mem_ctrls.perBankRdBursts::3 11183 # Per bank write bursts
47system.mem_ctrls.perBankRdBursts::4 1470 # Per bank write bursts
48system.mem_ctrls.perBankRdBursts::5 254 # Per bank write bursts
49system.mem_ctrls.perBankRdBursts::6 44 # Per bank write bursts
50system.mem_ctrls.perBankRdBursts::7 830 # Per bank write bursts
51system.mem_ctrls.perBankRdBursts::8 271 # Per bank write bursts
52system.mem_ctrls.perBankRdBursts::9 850 # Per bank write bursts
53system.mem_ctrls.perBankRdBursts::10 2251 # Per bank write bursts
54system.mem_ctrls.perBankRdBursts::11 11315 # Per bank write bursts
55system.mem_ctrls.perBankRdBursts::12 562 # Per bank write bursts
56system.mem_ctrls.perBankRdBursts::13 405 # Per bank write bursts
57system.mem_ctrls.perBankRdBursts::14 342 # Per bank write bursts
58system.mem_ctrls.perBankRdBursts::15 906 # Per bank write bursts
59system.mem_ctrls.perBankWrBursts::0 4421 # Per bank write bursts
60system.mem_ctrls.perBankWrBursts::1 6791 # Per bank write bursts
61system.mem_ctrls.perBankWrBursts::2 332 # Per bank write bursts
62system.mem_ctrls.perBankWrBursts::3 11984 # Per bank write bursts
63system.mem_ctrls.perBankWrBursts::4 1476 # Per bank write bursts
64system.mem_ctrls.perBankWrBursts::5 255 # Per bank write bursts
65system.mem_ctrls.perBankWrBursts::6 44 # Per bank write bursts
66system.mem_ctrls.perBankWrBursts::7 877 # Per bank write bursts
67system.mem_ctrls.perBankWrBursts::8 282 # Per bank write bursts
68system.mem_ctrls.perBankWrBursts::9 852 # Per bank write bursts
69system.mem_ctrls.perBankWrBursts::10 2350 # Per bank write bursts
70system.mem_ctrls.perBankWrBursts::11 11612 # Per bank write bursts
71system.mem_ctrls.perBankWrBursts::12 563 # Per bank write bursts
72system.mem_ctrls.perBankWrBursts::13 405 # Per bank write bursts
73system.mem_ctrls.perBankWrBursts::14 350 # Per bank write bursts
74system.mem_ctrls.perBankWrBursts::15 908 # Per bank write bursts
75system.mem_ctrls.numRdRetry 0 # Number of times read queue was full causing retry
76system.mem_ctrls.numWrRetry 0 # Number of times write queue was full causing retry
77system.mem_ctrls.totGap 5246394 # Total gap between requests
78system.mem_ctrls.readPktSize::0 0 # Read request sizes (log2)
79system.mem_ctrls.readPktSize::1 0 # Read request sizes (log2)
80system.mem_ctrls.readPktSize::2 0 # Read request sizes (log2)
81system.mem_ctrls.readPktSize::3 0 # Read request sizes (log2)
82system.mem_ctrls.readPktSize::4 0 # Read request sizes (log2)
83system.mem_ctrls.readPktSize::5 0 # Read request sizes (log2)
84system.mem_ctrls.readPktSize::6 79271 # Read request sizes (log2)
85system.mem_ctrls.writePktSize::0 0 # Write request sizes (log2)
86system.mem_ctrls.writePktSize::1 0 # Write request sizes (log2)
87system.mem_ctrls.writePktSize::2 0 # Write request sizes (log2)
88system.mem_ctrls.writePktSize::3 0 # Write request sizes (log2)
89system.mem_ctrls.writePktSize::4 0 # Write request sizes (log2)
90system.mem_ctrls.writePktSize::5 0 # Write request sizes (log2)
91system.mem_ctrls.writePktSize::6 79267 # Write request sizes (log2)
92system.mem_ctrls.rdQLenPdf::0 41659 # What read queue length does an incoming req see
93system.mem_ctrls.rdQLenPdf::1 0 # What read queue length does an incoming req see
94system.mem_ctrls.rdQLenPdf::2 0 # What read queue length does an incoming req see
95system.mem_ctrls.rdQLenPdf::3 0 # What read queue length does an incoming req see
96system.mem_ctrls.rdQLenPdf::4 0 # What read queue length does an incoming req see
97system.mem_ctrls.rdQLenPdf::5 0 # What read queue length does an incoming req see
98system.mem_ctrls.rdQLenPdf::6 0 # What read queue length does an incoming req see
99system.mem_ctrls.rdQLenPdf::7 0 # What read queue length does an incoming req see
100system.mem_ctrls.rdQLenPdf::8 0 # What read queue length does an incoming req see
101system.mem_ctrls.rdQLenPdf::9 0 # What read queue length does an incoming req see
102system.mem_ctrls.rdQLenPdf::10 0 # What read queue length does an incoming req see
103system.mem_ctrls.rdQLenPdf::11 0 # What read queue length does an incoming req see
104system.mem_ctrls.rdQLenPdf::12 0 # What read queue length does an incoming req see
105system.mem_ctrls.rdQLenPdf::13 0 # What read queue length does an incoming req see
106system.mem_ctrls.rdQLenPdf::14 0 # What read queue length does an incoming req see
107system.mem_ctrls.rdQLenPdf::15 0 # What read queue length does an incoming req see
108system.mem_ctrls.rdQLenPdf::16 0 # What read queue length does an incoming req see
109system.mem_ctrls.rdQLenPdf::17 0 # What read queue length does an incoming req see
110system.mem_ctrls.rdQLenPdf::18 0 # What read queue length does an incoming req see
111system.mem_ctrls.rdQLenPdf::19 0 # What read queue length does an incoming req see
112system.mem_ctrls.rdQLenPdf::20 0 # What read queue length does an incoming req see
113system.mem_ctrls.rdQLenPdf::21 0 # What read queue length does an incoming req see
114system.mem_ctrls.rdQLenPdf::22 0 # What read queue length does an incoming req see
115system.mem_ctrls.rdQLenPdf::23 0 # What read queue length does an incoming req see
116system.mem_ctrls.rdQLenPdf::24 0 # What read queue length does an incoming req see
117system.mem_ctrls.rdQLenPdf::25 0 # What read queue length does an incoming req see
118system.mem_ctrls.rdQLenPdf::26 0 # What read queue length does an incoming req see
119system.mem_ctrls.rdQLenPdf::27 0 # What read queue length does an incoming req see
120system.mem_ctrls.rdQLenPdf::28 0 # What read queue length does an incoming req see
121system.mem_ctrls.rdQLenPdf::29 0 # What read queue length does an incoming req see
122system.mem_ctrls.rdQLenPdf::30 0 # What read queue length does an incoming req see
123system.mem_ctrls.rdQLenPdf::31 0 # What read queue length does an incoming req see
124system.mem_ctrls.wrQLenPdf::0 1 # What write queue length does an incoming req see
125system.mem_ctrls.wrQLenPdf::1 1 # What write queue length does an incoming req see
126system.mem_ctrls.wrQLenPdf::2 1 # What write queue length does an incoming req see
127system.mem_ctrls.wrQLenPdf::3 1 # What write queue length does an incoming req see
128system.mem_ctrls.wrQLenPdf::4 1 # What write queue length does an incoming req see
129system.mem_ctrls.wrQLenPdf::5 1 # What write queue length does an incoming req see
130system.mem_ctrls.wrQLenPdf::6 1 # What write queue length does an incoming req see
131system.mem_ctrls.wrQLenPdf::7 1 # What write queue length does an incoming req see
132system.mem_ctrls.wrQLenPdf::8 1 # What write queue length does an incoming req see
133system.mem_ctrls.wrQLenPdf::9 1 # What write queue length does an incoming req see
134system.mem_ctrls.wrQLenPdf::10 1 # What write queue length does an incoming req see
135system.mem_ctrls.wrQLenPdf::11 1 # What write queue length does an incoming req see
136system.mem_ctrls.wrQLenPdf::12 1 # What write queue length does an incoming req see
137system.mem_ctrls.wrQLenPdf::13 1 # What write queue length does an incoming req see
138system.mem_ctrls.wrQLenPdf::14 1 # What write queue length does an incoming req see
139system.mem_ctrls.wrQLenPdf::15 330 # What write queue length does an incoming req see
140system.mem_ctrls.wrQLenPdf::16 402 # What write queue length does an incoming req see
141system.mem_ctrls.wrQLenPdf::17 2224 # What write queue length does an incoming req see
142system.mem_ctrls.wrQLenPdf::18 2668 # What write queue length does an incoming req see
143system.mem_ctrls.wrQLenPdf::19 2708 # What write queue length does an incoming req see
144system.mem_ctrls.wrQLenPdf::20 2791 # What write queue length does an incoming req see
145system.mem_ctrls.wrQLenPdf::21 2963 # What write queue length does an incoming req see
146system.mem_ctrls.wrQLenPdf::22 2810 # What write queue length does an incoming req see
147system.mem_ctrls.wrQLenPdf::23 2680 # What write queue length does an incoming req see
148system.mem_ctrls.wrQLenPdf::24 2663 # What write queue length does an incoming req see
149system.mem_ctrls.wrQLenPdf::25 2661 # What write queue length does an incoming req see
150system.mem_ctrls.wrQLenPdf::26 2661 # What write queue length does an incoming req see
151system.mem_ctrls.wrQLenPdf::27 2658 # What write queue length does an incoming req see
152system.mem_ctrls.wrQLenPdf::28 2660 # What write queue length does an incoming req see
153system.mem_ctrls.wrQLenPdf::29 2658 # What write queue length does an incoming req see
154system.mem_ctrls.wrQLenPdf::30 2658 # What write queue length does an incoming req see
155system.mem_ctrls.wrQLenPdf::31 2658 # What write queue length does an incoming req see
156system.mem_ctrls.wrQLenPdf::32 2658 # What write queue length does an incoming req see
157system.mem_ctrls.wrQLenPdf::33 0 # What write queue length does an incoming req see
158system.mem_ctrls.wrQLenPdf::34 0 # What write queue length does an incoming req see
159system.mem_ctrls.wrQLenPdf::35 0 # What write queue length does an incoming req see
160system.mem_ctrls.wrQLenPdf::36 0 # What write queue length does an incoming req see
161system.mem_ctrls.wrQLenPdf::37 0 # What write queue length does an incoming req see
162system.mem_ctrls.wrQLenPdf::38 0 # What write queue length does an incoming req see
163system.mem_ctrls.wrQLenPdf::39 0 # What write queue length does an incoming req see
164system.mem_ctrls.wrQLenPdf::40 0 # What write queue length does an incoming req see
165system.mem_ctrls.wrQLenPdf::41 0 # What write queue length does an incoming req see
166system.mem_ctrls.wrQLenPdf::42 0 # What write queue length does an incoming req see
167system.mem_ctrls.wrQLenPdf::43 0 # What write queue length does an incoming req see
168system.mem_ctrls.wrQLenPdf::44 0 # What write queue length does an incoming req see
169system.mem_ctrls.wrQLenPdf::45 0 # What write queue length does an incoming req see
170system.mem_ctrls.wrQLenPdf::46 0 # What write queue length does an incoming req see
171system.mem_ctrls.wrQLenPdf::47 0 # What write queue length does an incoming req see
172system.mem_ctrls.wrQLenPdf::48 0 # What write queue length does an incoming req see
173system.mem_ctrls.wrQLenPdf::49 0 # What write queue length does an incoming req see
174system.mem_ctrls.wrQLenPdf::50 0 # What write queue length does an incoming req see
175system.mem_ctrls.wrQLenPdf::51 0 # What write queue length does an incoming req see
176system.mem_ctrls.wrQLenPdf::52 0 # What write queue length does an incoming req see
177system.mem_ctrls.wrQLenPdf::53 0 # What write queue length does an incoming req see
178system.mem_ctrls.wrQLenPdf::54 0 # What write queue length does an incoming req see
179system.mem_ctrls.wrQLenPdf::55 0 # What write queue length does an incoming req see
180system.mem_ctrls.wrQLenPdf::56 0 # What write queue length does an incoming req see
181system.mem_ctrls.wrQLenPdf::57 0 # What write queue length does an incoming req see
182system.mem_ctrls.wrQLenPdf::58 0 # What write queue length does an incoming req see
183system.mem_ctrls.wrQLenPdf::59 0 # What write queue length does an incoming req see
184system.mem_ctrls.wrQLenPdf::60 0 # What write queue length does an incoming req see
185system.mem_ctrls.wrQLenPdf::61 0 # What write queue length does an incoming req see
186system.mem_ctrls.wrQLenPdf::62 0 # What write queue length does an incoming req see
187system.mem_ctrls.wrQLenPdf::63 0 # What write queue length does an incoming req see
188system.mem_ctrls.bytesPerActivate::samples 15795 # Bytes accessed per row activation
189system.mem_ctrls.bytesPerActivate::mean 344.923330 # Bytes accessed per row activation
190system.mem_ctrls.bytesPerActivate::gmean 229.090130 # Bytes accessed per row activation
191system.mem_ctrls.bytesPerActivate::stdev 305.803840 # Bytes accessed per row activation
192system.mem_ctrls.bytesPerActivate::0-127 3621 22.92% 22.92% # Bytes accessed per row activation
193system.mem_ctrls.bytesPerActivate::128-255 4154 26.30% 49.22% # Bytes accessed per row activation
194system.mem_ctrls.bytesPerActivate::256-383 2325 14.72% 63.94% # Bytes accessed per row activation
195system.mem_ctrls.bytesPerActivate::384-511 1784 11.29% 75.24% # Bytes accessed per row activation
196system.mem_ctrls.bytesPerActivate::512-639 865 5.48% 80.72% # Bytes accessed per row activation
197system.mem_ctrls.bytesPerActivate::640-767 706 4.47% 85.19% # Bytes accessed per row activation
198system.mem_ctrls.bytesPerActivate::768-895 510 3.23% 88.41% # Bytes accessed per row activation
199system.mem_ctrls.bytesPerActivate::896-1023 328 2.08% 90.49% # Bytes accessed per row activation
200system.mem_ctrls.bytesPerActivate::1024-1151 1502 9.51% 100.00% # Bytes accessed per row activation
201system.mem_ctrls.bytesPerActivate::total 15795 # Bytes accessed per row activation
202system.mem_ctrls.rdPerTurnAround::samples 2658 # Reads before turning the bus around for writes
203system.mem_ctrls.rdPerTurnAround::mean 15.670429 # Reads before turning the bus around for writes
204system.mem_ctrls.rdPerTurnAround::gmean 15.605623 # Reads before turning the bus around for writes
205system.mem_ctrls.rdPerTurnAround::stdev 1.463558 # Reads before turning the bus around for writes
206system.mem_ctrls.rdPerTurnAround::12-13 110 4.14% 4.14% # Reads before turning the bus around for writes
207system.mem_ctrls.rdPerTurnAround::14-15 1181 44.43% 48.57% # Reads before turning the bus around for writes
208system.mem_ctrls.rdPerTurnAround::16-17 1114 41.91% 90.48% # Reads before turning the bus around for writes
209system.mem_ctrls.rdPerTurnAround::18-19 223 8.39% 98.87% # Reads before turning the bus around for writes
210system.mem_ctrls.rdPerTurnAround::20-21 29 1.09% 99.96% # Reads before turning the bus around for writes
211system.mem_ctrls.rdPerTurnAround::36-37 1 0.04% 100.00% # Reads before turning the bus around for writes
212system.mem_ctrls.rdPerTurnAround::total 2658 # Reads before turning the bus around for writes
213system.mem_ctrls.wrPerTurnAround::samples 2658 # Writes before turning the bus around for reads
214system.mem_ctrls.wrPerTurnAround::mean 16.366441 # Writes before turning the bus around for reads
215system.mem_ctrls.wrPerTurnAround::gmean 16.340186 # Writes before turning the bus around for reads
216system.mem_ctrls.wrPerTurnAround::stdev 0.970216 # Writes before turning the bus around for reads
217system.mem_ctrls.wrPerTurnAround::16 2300 86.53% 86.53% # Writes before turning the bus around for reads
218system.mem_ctrls.wrPerTurnAround::17 19 0.71% 87.25% # Writes before turning the bus around for reads
219system.mem_ctrls.wrPerTurnAround::18 111 4.18% 91.42% # Writes before turning the bus around for reads
220system.mem_ctrls.wrPerTurnAround::19 179 6.73% 98.16% # Writes before turning the bus around for reads
221system.mem_ctrls.wrPerTurnAround::20 49 1.84% 100.00% # Writes before turning the bus around for reads
222system.mem_ctrls.wrPerTurnAround::total 2658 # Writes before turning the bus around for reads
223system.mem_ctrls.totQLat 835288 # Total ticks spent queuing
224system.mem_ctrls.totMemAccLat 1626809 # Total ticks spent from burst creation until serviced by the DRAM
225system.mem_ctrls.totBusLat 208295 # Total ticks spent in databus transfers
226system.mem_ctrls.avgQLat 20.05 # Average queueing delay per DRAM burst
227system.mem_ctrls.avgBusLat 5.00 # Average bus latency per DRAM burst
228system.mem_ctrls.avgMemAccLat 39.05 # Average memory access latency per DRAM burst
229system.mem_ctrls.avgRdBW 508.19 # Average DRAM read bandwidth in MiByte/s
230system.mem_ctrls.avgWrBW 530.67 # Average achieved write bandwidth in MiByte/s
231system.mem_ctrls.avgRdBWSys 967.00 # Average system read bandwidth in MiByte/s
232system.mem_ctrls.avgWrBWSys 966.95 # Average system write bandwidth in MiByte/s
233system.mem_ctrls.peakBW 12800.00 # Theoretical peak bandwidth in MiByte/s
234system.mem_ctrls.busUtil 8.12 # Data bus utilization in percentage
235system.mem_ctrls.busUtilRead 3.97 # Data bus utilization in percentage for reads
236system.mem_ctrls.busUtilWrite 4.15 # Data bus utilization in percentage for writes
237system.mem_ctrls.avgRdQLen 1.00 # Average read queue length when enqueuing
238system.mem_ctrls.avgWrQLen 26.01 # Average write queue length when enqueuing
239system.mem_ctrls.readRowHits 29472 # Number of row buffer hits during reads
240system.mem_ctrls.writeRowHits 39888 # Number of row buffer hits during writes
241system.mem_ctrls.readRowHitRate 70.75 # Row buffer hit rate for reads
242system.mem_ctrls.writeRowHitRate 91.64 # Row buffer hit rate for writes
243system.mem_ctrls.avgGap 33.09 # Average gap between requests
244system.mem_ctrls.pageHitRate 81.42 # Row buffer hit rate, read and write combined
245system.mem_ctrls_0.actEnergy 79710960 # Energy for activate commands per rank (pJ)
246system.mem_ctrls_0.preEnergy 43126104 # Energy for precharge commands per rank (pJ)
247system.mem_ctrls_0.readEnergy 282823968 # Energy for read commands per rank (pJ)
248system.mem_ctrls_0.writeEnergy 218655360 # Energy for write commands per rank (pJ)
249system.mem_ctrls_0.refreshEnergy 414882000.000000 # Energy for refresh commands per rank (pJ)
250system.mem_ctrls_0.actBackEnergy 659598072 # Energy for active background per rank (pJ)
251system.mem_ctrls_0.preBackEnergy 10126848 # Energy for precharge background per rank (pJ)
252system.mem_ctrls_0.actPowerDownEnergy 1616957760 # Energy for active power-down per rank (pJ)
253system.mem_ctrls_0.prePowerDownEnergy 62452224 # Energy for precharge power-down per rank (pJ)
254system.mem_ctrls_0.selfRefreshEnergy 21677280 # Energy for self refresh per rank (pJ)
255system.mem_ctrls_0.totalEnergy 3410010576 # Total energy per rank (pJ)
256system.mem_ctrls_0.averagePower 649.963342 # Core power per rank (mW)
257system.mem_ctrls_0.totalIdleTime 3773570 # Total Idle time Per DRAM Rank
258system.mem_ctrls_0.memoryStateTime::IDLE 6170 # Time in different power states
259system.mem_ctrls_0.memoryStateTime::REF 175566 # Time in different power states
260system.mem_ctrls_0.memoryStateTime::SREF 65011 # Time in different power states
261system.mem_ctrls_0.memoryStateTime::PRE_PDN 162636 # Time in different power states
262system.mem_ctrls_0.memoryStateTime::ACT 1291123 # Time in different power states
263system.mem_ctrls_0.memoryStateTime::ACT_PDN 3545960 # Time in different power states
264system.mem_ctrls_1.actEnergy 33108180 # Energy for activate commands per rank (pJ)
265system.mem_ctrls_1.preEnergy 17905776 # Energy for precharge commands per rank (pJ)
266system.mem_ctrls_1.readEnergy 193088448 # Energy for read commands per rank (pJ)
267system.mem_ctrls_1.writeEnergy 144673344 # Energy for write commands per rank (pJ)
268system.mem_ctrls_1.refreshEnergy 397057440.000000 # Energy for refresh commands per rank (pJ)
269system.mem_ctrls_1.actBackEnergy 650520024 # Energy for active background per rank (pJ)
270system.mem_ctrls_1.preBackEnergy 12185088 # Energy for precharge background per rank (pJ)
271system.mem_ctrls_1.actPowerDownEnergy 1517506896 # Energy for active power-down per rank (pJ)
272system.mem_ctrls_1.prePowerDownEnergy 81936768 # Energy for precharge power-down per rank (pJ)
273system.mem_ctrls_1.selfRefreshEnergy 62020080 # Energy for self refresh per rank (pJ)
274system.mem_ctrls_1.totalEnergy 3110002044 # Total energy per rank (pJ)
275system.mem_ctrls_1.averagePower 592.780368 # Core power per rank (mW)
276system.mem_ctrls_1.totalIdleTime 3787958 # Total Idle time Per DRAM Rank
277system.mem_ctrls_1.memoryStateTime::IDLE 12732 # Time in different power states
278system.mem_ctrls_1.memoryStateTime::REF 167990 # Time in different power states
279system.mem_ctrls_1.memoryStateTime::SREF 246912 # Time in different power states
280system.mem_ctrls_1.memoryStateTime::PRE_PDN 213377 # Time in different power states
281system.mem_ctrls_1.memoryStateTime::ACT 1277589 # Time in different power states
282system.mem_ctrls_1.memoryStateTime::ACT_PDN 3327866 # Time in different power states
283system.pwrStateResidencyTicks::UNDEFINED 5246466 # Cumulative time (in ticks) in various power states
284system.cpu.clk_domain.clock 1 # Clock period in ticks
285system.cpu.dtb.read_hits 0 # DTB read hits
286system.cpu.dtb.read_misses 0 # DTB read misses
287system.cpu.dtb.read_accesses 0 # DTB read accesses
288system.cpu.dtb.write_hits 0 # DTB write hits
289system.cpu.dtb.write_misses 0 # DTB write misses
290system.cpu.dtb.write_accesses 0 # DTB write accesses
291system.cpu.dtb.hits 0 # DTB hits
292system.cpu.dtb.misses 0 # DTB misses
293system.cpu.dtb.accesses 0 # DTB accesses
294system.cpu.itb.read_hits 0 # DTB read hits
295system.cpu.itb.read_misses 0 # DTB read misses
296system.cpu.itb.read_accesses 0 # DTB read accesses
297system.cpu.itb.write_hits 0 # DTB write hits
298system.cpu.itb.write_misses 0 # DTB write misses
299system.cpu.itb.write_accesses 0 # DTB write accesses
300system.cpu.itb.hits 0 # DTB hits
301system.cpu.itb.misses 0 # DTB misses
302system.cpu.itb.accesses 0 # DTB accesses
303system.cpu.workload.num_syscalls 183 # Number of system calls
304system.cpu.pwrStateResidencyTicks::ON 5246466 # Cumulative time (in ticks) in various power states
305system.cpu.numCycles 5246466 # number of cpu cycles simulated
306system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
307system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
308system.cpu.committedInsts 266066 # Number of instructions committed
309system.cpu.committedOps 266066 # Number of ops (including micro ops) committed
310system.cpu.num_int_alu_accesses 266065 # Number of integer alu accesses
311system.cpu.num_fp_alu_accesses 0 # Number of float alu accesses
312system.cpu.num_func_calls 19074 # number of times a function call or return occured
313system.cpu.num_conditional_control_insts 39832 # number of instructions that are conditional controls
314system.cpu.num_int_insts 266065 # number of integer instructions
315system.cpu.num_fp_insts 0 # number of float instructions
316system.cpu.num_int_register_reads 351637 # number of times the integer registers were read
317system.cpu.num_int_register_writes 182516 # number of times the integer registers were written
318system.cpu.num_fp_register_reads 0 # number of times the floating registers were read
319system.cpu.num_fp_register_writes 0 # number of times the floating registers were written
320system.cpu.num_mem_refs 106592 # number of memory refs
321system.cpu.num_load_insts 62875 # Number of load instructions
322system.cpu.num_store_insts 43717 # Number of store instructions
323system.cpu.num_idle_cycles 0 # Number of idle cycles
324system.cpu.num_busy_cycles 5246466 # Number of busy cycles
325system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
326system.cpu.idle_fraction 0 # Percentage of idle cycles
327system.cpu.Branches 58906 # Number of branches fetched
328system.cpu.op_class::No_OpClass 188 0.07% 0.07% # Class of executed instruction
329system.cpu.op_class::IntAlu 158793 59.64% 59.71% # Class of executed instruction
330system.cpu.op_class::IntMult 431 0.16% 59.87% # Class of executed instruction
331system.cpu.op_class::IntDiv 246 0.09% 59.97% # Class of executed instruction
332system.cpu.op_class::FloatAdd 0 0.00% 59.97% # Class of executed instruction
333system.cpu.op_class::FloatCmp 0 0.00% 59.97% # Class of executed instruction
334system.cpu.op_class::FloatCvt 0 0.00% 59.97% # Class of executed instruction
335system.cpu.op_class::FloatMult 0 0.00% 59.97% # Class of executed instruction
336system.cpu.op_class::FloatMultAcc 0 0.00% 59.97% # Class of executed instruction
337system.cpu.op_class::FloatDiv 0 0.00% 59.97% # Class of executed instruction
338system.cpu.op_class::FloatMisc 0 0.00% 59.97% # Class of executed instruction
339system.cpu.op_class::FloatSqrt 0 0.00% 59.97% # Class of executed instruction
340system.cpu.op_class::SimdAdd 0 0.00% 59.97% # Class of executed instruction
341system.cpu.op_class::SimdAddAcc 0 0.00% 59.97% # Class of executed instruction
342system.cpu.op_class::SimdAlu 0 0.00% 59.97% # Class of executed instruction
343system.cpu.op_class::SimdCmp 0 0.00% 59.97% # Class of executed instruction
344system.cpu.op_class::SimdCvt 0 0.00% 59.97% # Class of executed instruction
345system.cpu.op_class::SimdMisc 0 0.00% 59.97% # Class of executed instruction
346system.cpu.op_class::SimdMult 0 0.00% 59.97% # Class of executed instruction
347system.cpu.op_class::SimdMultAcc 0 0.00% 59.97% # Class of executed instruction
348system.cpu.op_class::SimdShift 0 0.00% 59.97% # Class of executed instruction
349system.cpu.op_class::SimdShiftAcc 0 0.00% 59.97% # Class of executed instruction
350system.cpu.op_class::SimdSqrt 0 0.00% 59.97% # Class of executed instruction
351system.cpu.op_class::SimdFloatAdd 0 0.00% 59.97% # Class of executed instruction
352system.cpu.op_class::SimdFloatAlu 0 0.00% 59.97% # Class of executed instruction
353system.cpu.op_class::SimdFloatCmp 0 0.00% 59.97% # Class of executed instruction
354system.cpu.op_class::SimdFloatCvt 0 0.00% 59.97% # Class of executed instruction
355system.cpu.op_class::SimdFloatDiv 0 0.00% 59.97% # Class of executed instruction
356system.cpu.op_class::SimdFloatMisc 0 0.00% 59.97% # Class of executed instruction
357system.cpu.op_class::SimdFloatMult 0 0.00% 59.97% # Class of executed instruction
358system.cpu.op_class::SimdFloatMultAcc 0 0.00% 59.97% # Class of executed instruction
359system.cpu.op_class::SimdFloatSqrt 0 0.00% 59.97% # Class of executed instruction
360system.cpu.op_class::MemRead 62875 23.62% 83.58% # Class of executed instruction
361system.cpu.op_class::MemWrite 43717 16.42% 100.00% # Class of executed instruction
362system.cpu.op_class::FloatMemRead 0 0.00% 100.00% # Class of executed instruction
363system.cpu.op_class::FloatMemWrite 0 0.00% 100.00% # Class of executed instruction
364system.cpu.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction
365system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction
366system.cpu.op_class::total 266250 # Class of executed instruction
367system.ruby.clk_domain.clock 1 # Clock period in ticks
368system.ruby.pwrStateResidencyTicks::UNDEFINED 5246466 # Cumulative time (in ticks) in various power states
369system.ruby.delayHist::bucket_size 1 # delay histogram for all message
370system.ruby.delayHist::max_bucket 9 # delay histogram for all message
371system.ruby.delayHist::samples 158538 # delay histogram for all message
372system.ruby.delayHist | 158538 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for all message
373system.ruby.delayHist::total 158538 # delay histogram for all message
374system.ruby.outstanding_req_hist_seqr::bucket_size 1
375system.ruby.outstanding_req_hist_seqr::max_bucket 9
376system.ruby.outstanding_req_hist_seqr::samples 372842
377system.ruby.outstanding_req_hist_seqr::mean 1
378system.ruby.outstanding_req_hist_seqr::gmean 1
379system.ruby.outstanding_req_hist_seqr | 0 0.00% 0.00% | 372842 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
380system.ruby.outstanding_req_hist_seqr::total 372842
381system.ruby.latency_hist_seqr::bucket_size 64
382system.ruby.latency_hist_seqr::max_bucket 639
383system.ruby.latency_hist_seqr::samples 372841
384system.ruby.latency_hist_seqr::mean 13.071591
385system.ruby.latency_hist_seqr::gmean 2.303358
386system.ruby.latency_hist_seqr::stdev 28.899910
387system.ruby.latency_hist_seqr | 332521 89.19% 89.19% | 37494 10.06% 99.24% | 1855 0.50% 99.74% | 376 0.10% 99.84% | 322 0.09% 99.93% | 238 0.06% 99.99% | 17 0.00% 100.00% | 3 0.00% 100.00% | 2 0.00% 100.00% | 13 0.00% 100.00%
388system.ruby.latency_hist_seqr::total 372841
389system.ruby.hit_latency_hist_seqr::bucket_size 1
390system.ruby.hit_latency_hist_seqr::max_bucket 9
391system.ruby.hit_latency_hist_seqr::samples 293570
392system.ruby.hit_latency_hist_seqr::mean 1
393system.ruby.hit_latency_hist_seqr::gmean 1
394system.ruby.hit_latency_hist_seqr | 0 0.00% 0.00% | 293570 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
395system.ruby.hit_latency_hist_seqr::total 293570
396system.ruby.miss_latency_hist_seqr::bucket_size 64
397system.ruby.miss_latency_hist_seqr::max_bucket 639
398system.ruby.miss_latency_hist_seqr::samples 79271
399system.ruby.miss_latency_hist_seqr::mean 57.777182
400system.ruby.miss_latency_hist_seqr::gmean 50.619805
401system.ruby.miss_latency_hist_seqr::stdev 37.283085
402system.ruby.miss_latency_hist_seqr | 38951 49.14% 49.14% | 37494 47.30% 96.44% | 1855 2.34% 98.78% | 376 0.47% 99.25% | 322 0.41% 99.66% | 238 0.30% 99.96% | 17 0.02% 99.98% | 3 0.00% 99.98% | 2 0.00% 99.98% | 13 0.02% 100.00%
403system.ruby.miss_latency_hist_seqr::total 79271
404system.ruby.Directory.incomplete_times_seqr 79270
405system.ruby.dir_cntrl0.pwrStateResidencyTicks::UNDEFINED 5246466 # Cumulative time (in ticks) in various power states
406system.ruby.l1_cntrl0.cacheMemory.demand_hits 293570 # Number of cache demand hits
407system.ruby.l1_cntrl0.cacheMemory.demand_misses 79271 # Number of cache demand misses
408system.ruby.l1_cntrl0.cacheMemory.demand_accesses 372841 # Number of cache demand accesses
409system.ruby.l1_cntrl0.sequencer.pwrStateResidencyTicks::UNDEFINED 5246466 # Cumulative time (in ticks) in various power states
410system.ruby.l1_cntrl0.pwrStateResidencyTicks::UNDEFINED 5246466 # Cumulative time (in ticks) in various power states
411system.ruby.memctrl_clk_domain.clock 3 # Clock period in ticks
412system.ruby.network.routers0.pwrStateResidencyTicks::UNDEFINED 5246466 # Cumulative time (in ticks) in various power states
413system.ruby.network.routers0.percent_links_utilized 7.554514
414system.ruby.network.routers0.msg_count.Control::2 79271
415system.ruby.network.routers0.msg_count.Data::2 79267
416system.ruby.network.routers0.msg_count.Response_Data::4 79271
417system.ruby.network.routers0.msg_count.Writeback_Control::3 79267
418system.ruby.network.routers0.msg_bytes.Control::2 634168
419system.ruby.network.routers0.msg_bytes.Data::2 5707224
420system.ruby.network.routers0.msg_bytes.Response_Data::4 5707512
421system.ruby.network.routers0.msg_bytes.Writeback_Control::3 634136
422system.ruby.network.routers1.pwrStateResidencyTicks::UNDEFINED 5246466 # Cumulative time (in ticks) in various power states
423system.ruby.network.routers1.percent_links_utilized 7.554514
424system.ruby.network.routers1.msg_count.Control::2 79271
425system.ruby.network.routers1.msg_count.Data::2 79267
426system.ruby.network.routers1.msg_count.Response_Data::4 79271
427system.ruby.network.routers1.msg_count.Writeback_Control::3 79267
428system.ruby.network.routers1.msg_bytes.Control::2 634168
429system.ruby.network.routers1.msg_bytes.Data::2 5707224
430system.ruby.network.routers1.msg_bytes.Response_Data::4 5707512
431system.ruby.network.routers1.msg_bytes.Writeback_Control::3 634136
432system.ruby.network.routers2.pwrStateResidencyTicks::UNDEFINED 5246466 # Cumulative time (in ticks) in various power states
433system.ruby.network.routers2.percent_links_utilized 7.554514
434system.ruby.network.routers2.msg_count.Control::2 79271
435system.ruby.network.routers2.msg_count.Data::2 79267
436system.ruby.network.routers2.msg_count.Response_Data::4 79271
437system.ruby.network.routers2.msg_count.Writeback_Control::3 79267
438system.ruby.network.routers2.msg_bytes.Control::2 634168
439system.ruby.network.routers2.msg_bytes.Data::2 5707224
440system.ruby.network.routers2.msg_bytes.Response_Data::4 5707512
441system.ruby.network.routers2.msg_bytes.Writeback_Control::3 634136
442system.ruby.network.pwrStateResidencyTicks::UNDEFINED 5246466 # Cumulative time (in ticks) in various power states
443system.ruby.network.msg_count.Control 237813
444system.ruby.network.msg_count.Data 237801
445system.ruby.network.msg_count.Response_Data 237813
446system.ruby.network.msg_count.Writeback_Control 237801
447system.ruby.network.msg_byte.Control 1902504
448system.ruby.network.msg_byte.Data 17121672
449system.ruby.network.msg_byte.Response_Data 17122536
450system.ruby.network.msg_byte.Writeback_Control 1902408
451system.sys_port_proxy.pwrStateResidencyTicks::UNDEFINED 5246466 # Cumulative time (in ticks) in various power states
452system.ruby.network.routers0.throttle0.link_utilization 7.554666
453system.ruby.network.routers0.throttle0.msg_count.Response_Data::4 79271
454system.ruby.network.routers0.throttle0.msg_count.Writeback_Control::3 79267
455system.ruby.network.routers0.throttle0.msg_bytes.Response_Data::4 5707512
456system.ruby.network.routers0.throttle0.msg_bytes.Writeback_Control::3 634136
457system.ruby.network.routers0.throttle1.link_utilization 7.554361
458system.ruby.network.routers0.throttle1.msg_count.Control::2 79271
459system.ruby.network.routers0.throttle1.msg_count.Data::2 79267
460system.ruby.network.routers0.throttle1.msg_bytes.Control::2 634168
461system.ruby.network.routers0.throttle1.msg_bytes.Data::2 5707224
462system.ruby.network.routers1.throttle0.link_utilization 7.554361
463system.ruby.network.routers1.throttle0.msg_count.Control::2 79271
464system.ruby.network.routers1.throttle0.msg_count.Data::2 79267
465system.ruby.network.routers1.throttle0.msg_bytes.Control::2 634168
466system.ruby.network.routers1.throttle0.msg_bytes.Data::2 5707224
467system.ruby.network.routers1.throttle1.link_utilization 7.554666
468system.ruby.network.routers1.throttle1.msg_count.Response_Data::4 79271
469system.ruby.network.routers1.throttle1.msg_count.Writeback_Control::3 79267
470system.ruby.network.routers1.throttle1.msg_bytes.Response_Data::4 5707512
471system.ruby.network.routers1.throttle1.msg_bytes.Writeback_Control::3 634136
472system.ruby.network.routers2.throttle0.link_utilization 7.554666
473system.ruby.network.routers2.throttle0.msg_count.Response_Data::4 79271
474system.ruby.network.routers2.throttle0.msg_count.Writeback_Control::3 79267
475system.ruby.network.routers2.throttle0.msg_bytes.Response_Data::4 5707512
476system.ruby.network.routers2.throttle0.msg_bytes.Writeback_Control::3 634136
477system.ruby.network.routers2.throttle1.link_utilization 7.554361
478system.ruby.network.routers2.throttle1.msg_count.Control::2 79271
479system.ruby.network.routers2.throttle1.msg_count.Data::2 79267
480system.ruby.network.routers2.throttle1.msg_bytes.Control::2 634168
481system.ruby.network.routers2.throttle1.msg_bytes.Data::2 5707224
482system.ruby.delayVCHist.vnet_1::bucket_size 1 # delay histogram for vnet_1
483system.ruby.delayVCHist.vnet_1::max_bucket 9 # delay histogram for vnet_1
484system.ruby.delayVCHist.vnet_1::samples 79271 # delay histogram for vnet_1
485system.ruby.delayVCHist.vnet_1 | 79271 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for vnet_1
486system.ruby.delayVCHist.vnet_1::total 79271 # delay histogram for vnet_1
487system.ruby.delayVCHist.vnet_2::bucket_size 1 # delay histogram for vnet_2
488system.ruby.delayVCHist.vnet_2::max_bucket 9 # delay histogram for vnet_2
489system.ruby.delayVCHist.vnet_2::samples 79267 # delay histogram for vnet_2
490system.ruby.delayVCHist.vnet_2 | 79267 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for vnet_2
491system.ruby.delayVCHist.vnet_2::total 79267 # delay histogram for vnet_2
492system.ruby.LD.latency_hist_seqr::bucket_size 64
493system.ruby.LD.latency_hist_seqr::max_bucket 639
494system.ruby.LD.latency_hist_seqr::samples 62875
495system.ruby.LD.latency_hist_seqr::mean 27.680191
496system.ruby.LD.latency_hist_seqr::gmean 7.180276
497system.ruby.LD.latency_hist_seqr::stdev 35.811045
498system.ruby.LD.latency_hist_seqr | 50013 79.54% 79.54% | 11930 18.97% 98.52% | 656 1.04% 99.56% | 86 0.14% 99.70% | 110 0.17% 99.87% | 69 0.11% 99.98% | 11 0.02% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
499system.ruby.LD.latency_hist_seqr::total 62875
500system.ruby.LD.hit_latency_hist_seqr::bucket_size 1
501system.ruby.LD.hit_latency_hist_seqr::max_bucket 9
502system.ruby.LD.hit_latency_hist_seqr::samples 30585
503system.ruby.LD.hit_latency_hist_seqr::mean 1
504system.ruby.LD.hit_latency_hist_seqr::gmean 1
505system.ruby.LD.hit_latency_hist_seqr | 0 0.00% 0.00% | 30585 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
506system.ruby.LD.hit_latency_hist_seqr::total 30585
507system.ruby.LD.miss_latency_hist_seqr::bucket_size 64
508system.ruby.LD.miss_latency_hist_seqr::max_bucket 639
509system.ruby.LD.miss_latency_hist_seqr::samples 32290
510system.ruby.LD.miss_latency_hist_seqr::mean 52.951595
511system.ruby.LD.miss_latency_hist_seqr::gmean 46.459624
512system.ruby.LD.miss_latency_hist_seqr::stdev 34.412980
513system.ruby.LD.miss_latency_hist_seqr | 19428 60.17% 60.17% | 11930 36.95% 97.11% | 656 2.03% 99.15% | 86 0.27% 99.41% | 110 0.34% 99.75% | 69 0.21% 99.97% | 11 0.03% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
514system.ruby.LD.miss_latency_hist_seqr::total 32290
515system.ruby.ST.latency_hist_seqr::bucket_size 64
516system.ruby.ST.latency_hist_seqr::max_bucket 639
517system.ruby.ST.latency_hist_seqr::samples 43716
518system.ruby.ST.latency_hist_seqr::mean 11.968158
519system.ruby.ST.latency_hist_seqr::gmean 2.425644
520system.ruby.ST.latency_hist_seqr::stdev 26.441690
521system.ruby.ST.latency_hist_seqr | 40932 93.63% 93.63% | 2520 5.76% 99.40% | 167 0.38% 99.78% | 45 0.10% 99.88% | 22 0.05% 99.93% | 18 0.04% 99.97% | 0 0.00% 99.97% | 0 0.00% 99.97% | 2 0.00% 99.98% | 10 0.02% 100.00%
522system.ruby.ST.latency_hist_seqr::total 43716
523system.ruby.ST.hit_latency_hist_seqr::bucket_size 1
524system.ruby.ST.hit_latency_hist_seqr::max_bucket 9
525system.ruby.ST.hit_latency_hist_seqr::samples 33299
526system.ruby.ST.hit_latency_hist_seqr::mean 1
527system.ruby.ST.hit_latency_hist_seqr::gmean 1
528system.ruby.ST.hit_latency_hist_seqr | 0 0.00% 0.00% | 33299 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
529system.ruby.ST.hit_latency_hist_seqr::total 33299
530system.ruby.ST.miss_latency_hist_seqr::bucket_size 64
531system.ruby.ST.miss_latency_hist_seqr::max_bucket 639
532system.ruby.ST.miss_latency_hist_seqr::samples 10417
533system.ruby.ST.miss_latency_hist_seqr::mean 47.028991
534system.ruby.ST.miss_latency_hist_seqr::gmean 41.206543
535system.ruby.ST.miss_latency_hist_seqr::stdev 36.336668
536system.ruby.ST.miss_latency_hist_seqr | 7633 73.27% 73.27% | 2520 24.19% 97.47% | 167 1.60% 99.07% | 45 0.43% 99.50% | 22 0.21% 99.71% | 18 0.17% 99.88% | 0 0.00% 99.88% | 0 0.00% 99.88% | 2 0.02% 99.90% | 10 0.10% 100.00%
537system.ruby.ST.miss_latency_hist_seqr::total 10417
538system.ruby.IFETCH.latency_hist_seqr::bucket_size 64
539system.ruby.IFETCH.latency_hist_seqr::max_bucket 639
540system.ruby.IFETCH.latency_hist_seqr::samples 266250
541system.ruby.IFETCH.latency_hist_seqr::mean 9.802941
542system.ruby.IFETCH.latency_hist_seqr::gmean 1.746090
543system.ruby.IFETCH.latency_hist_seqr::stdev 26.280316
544system.ruby.IFETCH.latency_hist_seqr | 241576 90.73% 90.73% | 23044 8.66% 99.39% | 1032 0.39% 99.78% | 245 0.09% 99.87% | 190 0.07% 99.94% | 151 0.06% 100.00% | 6 0.00% 100.00% | 3 0.00% 100.00% | 0 0.00% 100.00% | 3 0.00% 100.00%
545system.ruby.IFETCH.latency_hist_seqr::total 266250
546system.ruby.IFETCH.hit_latency_hist_seqr::bucket_size 1
547system.ruby.IFETCH.hit_latency_hist_seqr::max_bucket 9
548system.ruby.IFETCH.hit_latency_hist_seqr::samples 229686
549system.ruby.IFETCH.hit_latency_hist_seqr::mean 1
550system.ruby.IFETCH.hit_latency_hist_seqr::gmean 1
551system.ruby.IFETCH.hit_latency_hist_seqr | 0 0.00% 0.00% | 229686 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
552system.ruby.IFETCH.hit_latency_hist_seqr::total 229686
553system.ruby.IFETCH.miss_latency_hist_seqr::bucket_size 64
554system.ruby.IFETCH.miss_latency_hist_seqr::max_bucket 639
555system.ruby.IFETCH.miss_latency_hist_seqr::samples 36564
556system.ruby.IFETCH.miss_latency_hist_seqr::mean 65.100837
557system.ruby.IFETCH.miss_latency_hist_seqr::gmean 57.898658
558system.ruby.IFETCH.miss_latency_hist_seqr::stdev 38.529976
559system.ruby.IFETCH.miss_latency_hist_seqr | 11890 32.52% 32.52% | 23044 63.02% 95.54% | 1032 2.82% 98.36% | 245 0.67% 99.03% | 190 0.52% 99.55% | 151 0.41% 99.97% | 6 0.02% 99.98% | 3 0.01% 99.99% | 0 0.00% 99.99% | 3 0.01% 100.00%
560system.ruby.IFETCH.miss_latency_hist_seqr::total 36564
561system.ruby.Directory.miss_mach_latency_hist_seqr::bucket_size 64
562system.ruby.Directory.miss_mach_latency_hist_seqr::max_bucket 639
563system.ruby.Directory.miss_mach_latency_hist_seqr::samples 79271
564system.ruby.Directory.miss_mach_latency_hist_seqr::mean 57.777182
565system.ruby.Directory.miss_mach_latency_hist_seqr::gmean 50.619805
566system.ruby.Directory.miss_mach_latency_hist_seqr::stdev 37.283085
567system.ruby.Directory.miss_mach_latency_hist_seqr | 38951 49.14% 49.14% | 37494 47.30% 96.44% | 1855 2.34% 98.78% | 376 0.47% 99.25% | 322 0.41% 99.66% | 238 0.30% 99.96% | 17 0.02% 99.98% | 3 0.00% 99.98% | 2 0.00% 99.98% | 13 0.02% 100.00%
568system.ruby.Directory.miss_mach_latency_hist_seqr::total 79271
569system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::bucket_size 1
570system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::max_bucket 9
571system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::samples 1
572system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::stdev nan
573system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request | 1 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
574system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::total 1
575system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward::bucket_size 1
576system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward::max_bucket 9
--- 12 unchanged lines hidden (view full) ---
589system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::samples 1
590system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::mean 75
591system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::gmean 75.000000
592system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::stdev nan
593system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1 100.00% 100.00%
594system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::total 1
595system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::bucket_size 64
596system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::max_bucket 639
597system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::samples 32290
598system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::mean 52.951595
599system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::gmean 46.459624
600system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::stdev 34.412980
601system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr | 19428 60.17% 60.17% | 11930 36.95% 97.11% | 656 2.03% 99.15% | 86 0.27% 99.41% | 110 0.34% 99.75% | 69 0.21% 99.97% | 11 0.03% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
602system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::total 32290
603system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::bucket_size 64
604system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::max_bucket 639
605system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::samples 10417
606system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::mean 47.028991
607system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::gmean 41.206543
608system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::stdev 36.336668
609system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr | 7633 73.27% 73.27% | 2520 24.19% 97.47% | 167 1.60% 99.07% | 45 0.43% 99.50% | 22 0.21% 99.71% | 18 0.17% 99.88% | 0 0.00% 99.88% | 0 0.00% 99.88% | 2 0.02% 99.90% | 10 0.10% 100.00%
610system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::total 10417
611system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::bucket_size 64
612system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::max_bucket 639
613system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::samples 36564
614system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::mean 65.100837
615system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::gmean 57.898658
616system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::stdev 38.529976
617system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr | 11890 32.52% 32.52% | 23044 63.02% 95.54% | 1032 2.82% 98.36% | 245 0.67% 99.03% | 190 0.52% 99.55% | 151 0.41% 99.97% | 6 0.02% 99.98% | 3 0.01% 99.99% | 0 0.00% 99.99% | 3 0.01% 100.00%
618system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::total 36564
619system.ruby.Directory_Controller.GETX 79271 0.00% 0.00%
620system.ruby.Directory_Controller.PUTX 79267 0.00% 0.00%
621system.ruby.Directory_Controller.Memory_Data 79271 0.00% 0.00%
622system.ruby.Directory_Controller.Memory_Ack 79267 0.00% 0.00%
623system.ruby.Directory_Controller.I.GETX 79271 0.00% 0.00%
624system.ruby.Directory_Controller.M.PUTX 79267 0.00% 0.00%
625system.ruby.Directory_Controller.IM.Memory_Data 79271 0.00% 0.00%
626system.ruby.Directory_Controller.MI.Memory_Ack 79267 0.00% 0.00%
627system.ruby.L1Cache_Controller.Load 62875 0.00% 0.00%
628system.ruby.L1Cache_Controller.Ifetch 266250 0.00% 0.00%
629system.ruby.L1Cache_Controller.Store 43716 0.00% 0.00%
630system.ruby.L1Cache_Controller.Data 79271 0.00% 0.00%
631system.ruby.L1Cache_Controller.Replacement 79267 0.00% 0.00%
632system.ruby.L1Cache_Controller.Writeback_Ack 79267 0.00% 0.00%
633system.ruby.L1Cache_Controller.I.Load 32290 0.00% 0.00%
634system.ruby.L1Cache_Controller.I.Ifetch 36564 0.00% 0.00%
635system.ruby.L1Cache_Controller.I.Store 10417 0.00% 0.00%
636system.ruby.L1Cache_Controller.M.Load 30585 0.00% 0.00%
637system.ruby.L1Cache_Controller.M.Ifetch 229686 0.00% 0.00%
638system.ruby.L1Cache_Controller.M.Store 33299 0.00% 0.00%
639system.ruby.L1Cache_Controller.M.Replacement 79267 0.00% 0.00%
640system.ruby.L1Cache_Controller.MI.Writeback_Ack 79267 0.00% 0.00%
641system.ruby.L1Cache_Controller.IS.Data 68854 0.00% 0.00%
642system.ruby.L1Cache_Controller.IM.Data 10417 0.00% 0.00%
643
644---------- End Simulation Statistics ----------