1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 0.000339 # Number of seconds simulated 4sim_ticks 339173000 # Number of ticks simulated 5final_tick 339173000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks 7host_inst_rate 215547 # Simulator instruction rate (inst/s) 8host_op_rate 215545 # Simulator op (including micro ops) rate (op/s) --- 280 unchanged lines hidden (view full) --- 289system.cpu.itb.read_misses 0 # DTB read misses 290system.cpu.itb.read_accesses 0 # DTB read accesses 291system.cpu.itb.write_hits 0 # DTB write hits 292system.cpu.itb.write_misses 0 # DTB write misses 293system.cpu.itb.write_accesses 0 # DTB write accesses 294system.cpu.itb.hits 0 # DTB hits 295system.cpu.itb.misses 0 # DTB misses 296system.cpu.itb.accesses 0 # DTB accesses |
297system.cpu.workload.numSyscalls 162 # Number of system calls |
298system.cpu.pwrStateResidencyTicks::ON 339173000 # Cumulative time (in ticks) in various power states 299system.cpu.numCycles 678346 # number of cpu cycles simulated 300system.cpu.numWorkItemsStarted 0 # number of work items this cpu started 301system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed 302system.cpu.committedInsts 299354 # Number of instructions committed 303system.cpu.committedOps 299354 # Number of ops (including micro ops) committed 304system.cpu.discardedOps 13899 # Number of ops (including micro ops) which were discarded before commit 305system.cpu.numFetchSuspends 0 # Number of times Execute suspended instruction fetching --- 458 unchanged lines hidden --- |