3,154c3,158
< sim_seconds 0.000057 # Number of seconds simulated
< sim_ticks 57010500 # Number of ticks simulated
< final_tick 57010500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
< sim_freq 1000000000000 # Frequency of simulated ticks
< host_inst_rate 83371 # Simulator instruction rate (inst/s)
< host_op_rate 83392 # Simulator op (including micro ops) rate (op/s)
< host_tick_rate 41711101 # Simulator tick rate (ticks/s)
< host_mem_usage 233576 # Number of bytes of host memory used
< host_seconds 1.37 # Real time elapsed on the host
< sim_insts 113947 # Number of instructions simulated
< sim_ops 113978 # Number of ops (including micro ops) simulated
< system.voltage_domain.voltage 1 # Voltage in Volts
< system.clk_domain.clock 1000 # Clock period in ticks
< system.physmem.pwrStateResidencyTicks::UNDEFINED 57010500 # Cumulative time (in ticks) in various power states
< system.physmem.bytes_read::cpu.inst 455964 # Number of bytes read from this memory
< system.physmem.bytes_read::cpu.data 156854 # Number of bytes read from this memory
< system.physmem.bytes_read::total 612818 # Number of bytes read from this memory
< system.physmem.bytes_inst_read::cpu.inst 455964 # Number of instructions bytes read from this memory
< system.physmem.bytes_inst_read::total 455964 # Number of instructions bytes read from this memory
< system.physmem.bytes_written::cpu.data 111519 # Number of bytes written to this memory
< system.physmem.bytes_written::total 111519 # Number of bytes written to this memory
< system.physmem.num_reads::cpu.inst 113991 # Number of read requests responded to by this memory
< system.physmem.num_reads::cpu.data 23779 # Number of read requests responded to by this memory
< system.physmem.num_reads::total 137770 # Number of read requests responded to by this memory
< system.physmem.num_writes::cpu.data 19912 # Number of write requests responded to by this memory
< system.physmem.num_writes::total 19912 # Number of write requests responded to by this memory
< system.physmem.bw_read::cpu.inst 7997895125 # Total read bandwidth from this memory (bytes/s)
< system.physmem.bw_read::cpu.data 2751317740 # Total read bandwidth from this memory (bytes/s)
< system.physmem.bw_read::total 10749212864 # Total read bandwidth from this memory (bytes/s)
< system.physmem.bw_inst_read::cpu.inst 7997895125 # Instruction read bandwidth from this memory (bytes/s)
< system.physmem.bw_inst_read::total 7997895125 # Instruction read bandwidth from this memory (bytes/s)
< system.physmem.bw_write::cpu.data 1956113348 # Write bandwidth from this memory (bytes/s)
< system.physmem.bw_write::total 1956113348 # Write bandwidth from this memory (bytes/s)
< system.physmem.bw_total::cpu.inst 7997895125 # Total bandwidth to/from this memory (bytes/s)
< system.physmem.bw_total::cpu.data 4707431087 # Total bandwidth to/from this memory (bytes/s)
< system.physmem.bw_total::total 12705326212 # Total bandwidth to/from this memory (bytes/s)
< system.pwrStateResidencyTicks::UNDEFINED 57010500 # Cumulative time (in ticks) in various power states
< system.cpu_clk_domain.clock 500 # Clock period in ticks
< system.cpu.dtb.read_hits 0 # DTB read hits
< system.cpu.dtb.read_misses 0 # DTB read misses
< system.cpu.dtb.read_accesses 0 # DTB read accesses
< system.cpu.dtb.write_hits 0 # DTB write hits
< system.cpu.dtb.write_misses 0 # DTB write misses
< system.cpu.dtb.write_accesses 0 # DTB write accesses
< system.cpu.dtb.hits 0 # DTB hits
< system.cpu.dtb.misses 0 # DTB misses
< system.cpu.dtb.accesses 0 # DTB accesses
< system.cpu.itb.read_hits 0 # DTB read hits
< system.cpu.itb.read_misses 0 # DTB read misses
< system.cpu.itb.read_accesses 0 # DTB read accesses
< system.cpu.itb.write_hits 0 # DTB write hits
< system.cpu.itb.write_misses 0 # DTB write misses
< system.cpu.itb.write_accesses 0 # DTB write accesses
< system.cpu.itb.hits 0 # DTB hits
< system.cpu.itb.misses 0 # DTB misses
< system.cpu.itb.accesses 0 # DTB accesses
< system.cpu.workload.numSyscalls 43 # Number of system calls
< system.cpu.pwrStateResidencyTicks::ON 57010500 # Cumulative time (in ticks) in various power states
< system.cpu.numCycles 114022 # number of cpu cycles simulated
< system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
< system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
< system.cpu.committedInsts 113947 # Number of instructions committed
< system.cpu.committedOps 113978 # Number of ops (including micro ops) committed
< system.cpu.num_int_alu_accesses 113979 # Number of integer alu accesses
< system.cpu.num_fp_alu_accesses 0 # Number of float alu accesses
< system.cpu.num_func_calls 8601 # number of times a function call or return occured
< system.cpu.num_conditional_control_insts 17313 # number of instructions that are conditional controls
< system.cpu.num_int_insts 113979 # number of integer instructions
< system.cpu.num_fp_insts 0 # number of float instructions
< system.cpu.num_int_register_reads 152039 # number of times the integer registers were read
< system.cpu.num_int_register_writes 76786 # number of times the integer registers were written
< system.cpu.num_fp_register_reads 0 # number of times the floating registers were read
< system.cpu.num_fp_register_writes 0 # number of times the floating registers were written
< system.cpu.num_mem_refs 43694 # number of memory refs
< system.cpu.num_load_insts 23779 # Number of load instructions
< system.cpu.num_store_insts 19915 # Number of store instructions
< system.cpu.num_idle_cycles 0 # Number of idle cycles
< system.cpu.num_busy_cycles 114022 # Number of busy cycles
< system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
< system.cpu.idle_fraction 0 # Percentage of idle cycles
< system.cpu.Branches 25914 # Number of branches fetched
< system.cpu.op_class::No_OpClass 43 0.04% 0.04% # Class of executed instruction
< system.cpu.op_class::IntAlu 70180 61.55% 61.59% # Class of executed instruction
< system.cpu.op_class::IntMult 105 0.09% 61.68% # Class of executed instruction
< system.cpu.op_class::IntDiv 0 0.00% 61.68% # Class of executed instruction
< system.cpu.op_class::FloatAdd 0 0.00% 61.68% # Class of executed instruction
< system.cpu.op_class::FloatCmp 0 0.00% 61.68% # Class of executed instruction
< system.cpu.op_class::FloatCvt 0 0.00% 61.68% # Class of executed instruction
< system.cpu.op_class::FloatMult 0 0.00% 61.68% # Class of executed instruction
< system.cpu.op_class::FloatMultAcc 0 0.00% 61.68% # Class of executed instruction
< system.cpu.op_class::FloatDiv 0 0.00% 61.68% # Class of executed instruction
< system.cpu.op_class::FloatMisc 0 0.00% 61.68% # Class of executed instruction
< system.cpu.op_class::FloatSqrt 0 0.00% 61.68% # Class of executed instruction
< system.cpu.op_class::SimdAdd 0 0.00% 61.68% # Class of executed instruction
< system.cpu.op_class::SimdAddAcc 0 0.00% 61.68% # Class of executed instruction
< system.cpu.op_class::SimdAlu 0 0.00% 61.68% # Class of executed instruction
< system.cpu.op_class::SimdCmp 0 0.00% 61.68% # Class of executed instruction
< system.cpu.op_class::SimdCvt 0 0.00% 61.68% # Class of executed instruction
< system.cpu.op_class::SimdMisc 0 0.00% 61.68% # Class of executed instruction
< system.cpu.op_class::SimdMult 0 0.00% 61.68% # Class of executed instruction
< system.cpu.op_class::SimdMultAcc 0 0.00% 61.68% # Class of executed instruction
< system.cpu.op_class::SimdShift 0 0.00% 61.68% # Class of executed instruction
< system.cpu.op_class::SimdShiftAcc 0 0.00% 61.68% # Class of executed instruction
< system.cpu.op_class::SimdSqrt 0 0.00% 61.68% # Class of executed instruction
< system.cpu.op_class::SimdFloatAdd 0 0.00% 61.68% # Class of executed instruction
< system.cpu.op_class::SimdFloatAlu 0 0.00% 61.68% # Class of executed instruction
< system.cpu.op_class::SimdFloatCmp 0 0.00% 61.68% # Class of executed instruction
< system.cpu.op_class::SimdFloatCvt 0 0.00% 61.68% # Class of executed instruction
< system.cpu.op_class::SimdFloatDiv 0 0.00% 61.68% # Class of executed instruction
< system.cpu.op_class::SimdFloatMisc 0 0.00% 61.68% # Class of executed instruction
< system.cpu.op_class::SimdFloatMult 0 0.00% 61.68% # Class of executed instruction
< system.cpu.op_class::SimdFloatMultAcc 0 0.00% 61.68% # Class of executed instruction
< system.cpu.op_class::SimdFloatSqrt 0 0.00% 61.68% # Class of executed instruction
< system.cpu.op_class::MemRead 23779 20.85% 82.53% # Class of executed instruction
< system.cpu.op_class::MemWrite 19915 17.47% 100.00% # Class of executed instruction
< system.cpu.op_class::FloatMemRead 0 0.00% 100.00% # Class of executed instruction
< system.cpu.op_class::FloatMemWrite 0 0.00% 100.00% # Class of executed instruction
< system.cpu.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction
< system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction
< system.cpu.op_class::total 114022 # Class of executed instruction
< system.membus.snoop_filter.tot_requests 0 # Total number of requests made to the snoop filter.
< system.membus.snoop_filter.hit_single_requests 0 # Number of requests hitting in the snoop filter with a single holder of the requested data.
< system.membus.snoop_filter.hit_multi_requests 0 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data.
< system.membus.snoop_filter.tot_snoops 0 # Total number of snoops made to the snoop filter.
< system.membus.snoop_filter.hit_single_snoops 0 # Number of snoops hitting in the snoop filter with a single holder of the requested data.
< system.membus.snoop_filter.hit_multi_snoops 0 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data.
< system.membus.pwrStateResidencyTicks::UNDEFINED 57010500 # Cumulative time (in ticks) in various power states
< system.membus.trans_dist::ReadReq 137768 # Transaction distribution
< system.membus.trans_dist::ReadResp 137770 # Transaction distribution
< system.membus.trans_dist::WriteReq 19910 # Transaction distribution
< system.membus.trans_dist::WriteResp 19910 # Transaction distribution
< system.membus.trans_dist::LoadLockedReq 2 # Transaction distribution
< system.membus.trans_dist::StoreCondReq 4 # Transaction distribution
< system.membus.trans_dist::StoreCondResp 4 # Transaction distribution
< system.membus.pkt_count_system.cpu.icache_port::system.physmem.port 227982 # Packet count per connected master and slave (bytes)
< system.membus.pkt_count_system.cpu.dcache_port::system.physmem.port 87386 # Packet count per connected master and slave (bytes)
< system.membus.pkt_count::total 315368 # Packet count per connected master and slave (bytes)
< system.membus.pkt_size_system.cpu.icache_port::system.physmem.port 455964 # Cumulative packet size per connected master and slave (bytes)
< system.membus.pkt_size_system.cpu.dcache_port::system.physmem.port 268385 # Cumulative packet size per connected master and slave (bytes)
< system.membus.pkt_size::total 724349 # Cumulative packet size per connected master and slave (bytes)
< system.membus.snoops 0 # Total snoops (count)
< system.membus.snoopTraffic 0 # Total snoop traffic (bytes)
< system.membus.snoop_fanout::samples 157684 # Request fanout histogram
< system.membus.snoop_fanout::mean 0 # Request fanout histogram
< system.membus.snoop_fanout::stdev 0 # Request fanout histogram
< system.membus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram
< system.membus.snoop_fanout::0 157684 100.00% 100.00% # Request fanout histogram
< system.membus.snoop_fanout::1 0 0.00% 100.00% # Request fanout histogram
< system.membus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram
< system.membus.snoop_fanout::min_value 0 # Request fanout histogram
< system.membus.snoop_fanout::max_value 0 # Request fanout histogram
< system.membus.snoop_fanout::total 157684 # Request fanout histogram
---
> sim_seconds 0.000069
> sim_ticks 68573500
> final_tick 68573500
> sim_freq 1000000000000
> host_inst_rate 3619
> host_op_rate 3627
> host_tick_rate 2266534
> host_mem_usage 259192
> host_seconds 30.26
> sim_insts 109485
> sim_ops 109730
> system.voltage_domain.voltage 1
> system.clk_domain.clock 1000
> system.physmem.pwrStateResidencyTicks::UNDEFINED 68573500
> system.physmem.bytes_read::cpu.inst 547612
> system.physmem.bytes_read::cpu.data 174025
> system.physmem.bytes_read::total 721637
> system.physmem.bytes_inst_read::cpu.inst 547612
> system.physmem.bytes_inst_read::total 547612
> system.physmem.bytes_written::cpu.data 113591
> system.physmem.bytes_written::total 113591
> system.physmem.num_reads::cpu.inst 136903
> system.physmem.num_reads::cpu.data 25597
> system.physmem.num_reads::total 162500
> system.physmem.num_writes::cpu.data 16677
> system.physmem.num_writes::total 16677
> system.physmem.bw_read::cpu.inst 7985767097
> system.physmem.bw_read::cpu.data 2537787921
> system.physmem.bw_read::total 10523555018
> system.physmem.bw_inst_read::cpu.inst 7985767097
> system.physmem.bw_inst_read::total 7985767097
> system.physmem.bw_write::cpu.data 1656485377
> system.physmem.bw_write::total 1656485377
> system.physmem.bw_total::cpu.inst 7985767097
> system.physmem.bw_total::cpu.data 4194273298
> system.physmem.bw_total::total 12180040395
> system.pwrStateResidencyTicks::UNDEFINED 68573500
> system.cpu_clk_domain.clock 500
> system.cpu.dtb.read_hits 0
> system.cpu.dtb.read_misses 0
> system.cpu.dtb.read_accesses 0
> system.cpu.dtb.write_hits 0
> system.cpu.dtb.write_misses 0
> system.cpu.dtb.write_accesses 0
> system.cpu.dtb.hits 0
> system.cpu.dtb.misses 0
> system.cpu.dtb.accesses 0
> system.cpu.itb.read_hits 0
> system.cpu.itb.read_misses 0
> system.cpu.itb.read_accesses 0
> system.cpu.itb.write_hits 0
> system.cpu.itb.write_misses 0
> system.cpu.itb.write_accesses 0
> system.cpu.itb.hits 0
> system.cpu.itb.misses 0
> system.cpu.itb.accesses 0
> system.cpu.workload.numSyscalls 43
> system.cpu.pwrStateResidencyTicks::ON 68573500
> system.cpu.numCycles 137148
> system.cpu.numWorkItemsStarted 0
> system.cpu.numWorkItemsCompleted 0
> system.cpu.committedInsts 109485
> system.cpu.committedOps 109730
> system.cpu.num_int_alu_accesses 109164
> system.cpu.num_fp_alu_accesses 12
> system.cpu.num_vec_alu_accesses 0
> system.cpu.num_func_calls 6221
> system.cpu.num_conditional_control_insts 18218
> system.cpu.num_int_insts 109164
> system.cpu.num_fp_insts 12
> system.cpu.num_vec_insts 0
> system.cpu.num_int_register_reads 137211
> system.cpu.num_int_register_writes 72083
> system.cpu.num_fp_register_reads 12
> system.cpu.num_fp_register_writes 0
> system.cpu.num_vec_register_reads 0
> system.cpu.num_vec_register_writes 0
> system.cpu.num_mem_refs 42276
> system.cpu.num_load_insts 25597
> system.cpu.num_store_insts 16679
> system.cpu.num_idle_cycles 0
> system.cpu.num_busy_cycles 137148
> system.cpu.not_idle_fraction 1
> system.cpu.idle_fraction 0
> system.cpu.Branches 24439
> system.cpu.op_class::No_OpClass 47 0.04% 0.04%
> system.cpu.op_class::IntAlu 67339 61.34% 61.39%
> system.cpu.op_class::IntMult 107 0.10% 61.48%
> system.cpu.op_class::IntDiv 4 0.00% 61.49%
> system.cpu.op_class::FloatAdd 0 0.00% 61.49%
> system.cpu.op_class::FloatCmp 0 0.00% 61.49%
> system.cpu.op_class::FloatCvt 0 0.00% 61.49%
> system.cpu.op_class::FloatMult 0 0.00% 61.49%
> system.cpu.op_class::FloatMultAcc 0 0.00% 61.49%
> system.cpu.op_class::FloatDiv 0 0.00% 61.49%
> system.cpu.op_class::FloatMisc 0 0.00% 61.49%
> system.cpu.op_class::FloatSqrt 0 0.00% 61.49%
> system.cpu.op_class::SimdAdd 0 0.00% 61.49%
> system.cpu.op_class::SimdAddAcc 0 0.00% 61.49%
> system.cpu.op_class::SimdAlu 0 0.00% 61.49%
> system.cpu.op_class::SimdCmp 0 0.00% 61.49%
> system.cpu.op_class::SimdCvt 0 0.00% 61.49%
> system.cpu.op_class::SimdMisc 0 0.00% 61.49%
> system.cpu.op_class::SimdMult 0 0.00% 61.49%
> system.cpu.op_class::SimdMultAcc 0 0.00% 61.49%
> system.cpu.op_class::SimdShift 0 0.00% 61.49%
> system.cpu.op_class::SimdShiftAcc 0 0.00% 61.49%
> system.cpu.op_class::SimdSqrt 0 0.00% 61.49%
> system.cpu.op_class::SimdFloatAdd 0 0.00% 61.49%
> system.cpu.op_class::SimdFloatAlu 0 0.00% 61.49%
> system.cpu.op_class::SimdFloatCmp 0 0.00% 61.49%
> system.cpu.op_class::SimdFloatCvt 0 0.00% 61.49%
> system.cpu.op_class::SimdFloatDiv 0 0.00% 61.49%
> system.cpu.op_class::SimdFloatMisc 0 0.00% 61.49%
> system.cpu.op_class::SimdFloatMult 0 0.00% 61.49%
> system.cpu.op_class::SimdFloatMultAcc 0 0.00% 61.49%
> system.cpu.op_class::SimdFloatSqrt 0 0.00% 61.49%
> system.cpu.op_class::MemRead 25597 23.32% 84.81%
> system.cpu.op_class::MemWrite 16667 15.18% 99.99%
> system.cpu.op_class::FloatMemRead 0 0.00% 99.99%
> system.cpu.op_class::FloatMemWrite 12 0.01% 100.00%
> system.cpu.op_class::IprAccess 0 0.00% 100.00%
> system.cpu.op_class::InstPrefetch 0 0.00% 100.00%
> system.cpu.op_class::total 109773
> system.membus.snoop_filter.tot_requests 0
> system.membus.snoop_filter.hit_single_requests 0
> system.membus.snoop_filter.hit_multi_requests 0
> system.membus.snoop_filter.tot_snoops 0
> system.membus.snoop_filter.hit_single_snoops 0
> system.membus.snoop_filter.hit_multi_snoops 0
> system.membus.pwrStateResidencyTicks::UNDEFINED 68573500
> system.membus.trans_dist::ReadReq 162224
> system.membus.trans_dist::ReadResp 162500
> system.membus.trans_dist::WriteReq 16401
> system.membus.trans_dist::WriteResp 16401
> system.membus.trans_dist::LoadLockedReq 276
> system.membus.trans_dist::StoreCondReq 276
> system.membus.trans_dist::StoreCondResp 276
> system.membus.pkt_count_system.cpu.icache_port::system.physmem.port 273806
> system.membus.pkt_count_system.cpu.dcache_port::system.physmem.port 84548
> system.membus.pkt_count::total 358354
> system.membus.pkt_size_system.cpu.icache_port::system.physmem.port 547612
> system.membus.pkt_size_system.cpu.dcache_port::system.physmem.port 287616
> system.membus.pkt_size::total 835228
> system.membus.snoops 0
> system.membus.snoopTraffic 0
> system.membus.snoop_fanout::samples 179177
> system.membus.snoop_fanout::mean 0
> system.membus.snoop_fanout::stdev 0
> system.membus.snoop_fanout::underflows 0 0.00% 0.00%
> system.membus.snoop_fanout::0 179177 100.00% 100.00%
> system.membus.snoop_fanout::1 0 0.00% 100.00%
> system.membus.snoop_fanout::overflows 0 0.00% 100.00%
> system.membus.snoop_fanout::min_value 0
> system.membus.snoop_fanout::max_value 0
> system.membus.snoop_fanout::total 179177
< sim_seconds 0.000057 # Number of seconds simulated
< sim_ticks 57010500 # Number of ticks simulated
< final_tick 57010500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
< sim_freq 1000000000000 # Frequency of simulated ticks
< host_inst_rate 83371 # Simulator instruction rate (inst/s)
< host_op_rate 83392 # Simulator op (including micro ops) rate (op/s)
< host_tick_rate 41711101 # Simulator tick rate (ticks/s)
< host_mem_usage 233576 # Number of bytes of host memory used
< host_seconds 1.37 # Real time elapsed on the host
< sim_insts 113947 # Number of instructions simulated
< sim_ops 113978 # Number of ops (including micro ops) simulated
< system.voltage_domain.voltage 1 # Voltage in Volts
< system.clk_domain.clock 1000 # Clock period in ticks
< system.physmem.pwrStateResidencyTicks::UNDEFINED 57010500 # Cumulative time (in ticks) in various power states
< system.physmem.bytes_read::cpu.inst 455964 # Number of bytes read from this memory
< system.physmem.bytes_read::cpu.data 156854 # Number of bytes read from this memory
< system.physmem.bytes_read::total 612818 # Number of bytes read from this memory
< system.physmem.bytes_inst_read::cpu.inst 455964 # Number of instructions bytes read from this memory
< system.physmem.bytes_inst_read::total 455964 # Number of instructions bytes read from this memory
< system.physmem.bytes_written::cpu.data 111519 # Number of bytes written to this memory
< system.physmem.bytes_written::total 111519 # Number of bytes written to this memory
< system.physmem.num_reads::cpu.inst 113991 # Number of read requests responded to by this memory
< system.physmem.num_reads::cpu.data 23779 # Number of read requests responded to by this memory
< system.physmem.num_reads::total 137770 # Number of read requests responded to by this memory
< system.physmem.num_writes::cpu.data 19912 # Number of write requests responded to by this memory
< system.physmem.num_writes::total 19912 # Number of write requests responded to by this memory
< system.physmem.bw_read::cpu.inst 7997895125 # Total read bandwidth from this memory (bytes/s)
< system.physmem.bw_read::cpu.data 2751317740 # Total read bandwidth from this memory (bytes/s)
< system.physmem.bw_read::total 10749212864 # Total read bandwidth from this memory (bytes/s)
< system.physmem.bw_inst_read::cpu.inst 7997895125 # Instruction read bandwidth from this memory (bytes/s)
< system.physmem.bw_inst_read::total 7997895125 # Instruction read bandwidth from this memory (bytes/s)
< system.physmem.bw_write::cpu.data 1956113348 # Write bandwidth from this memory (bytes/s)
< system.physmem.bw_write::total 1956113348 # Write bandwidth from this memory (bytes/s)
< system.physmem.bw_total::cpu.inst 7997895125 # Total bandwidth to/from this memory (bytes/s)
< system.physmem.bw_total::cpu.data 4707431087 # Total bandwidth to/from this memory (bytes/s)
< system.physmem.bw_total::total 12705326212 # Total bandwidth to/from this memory (bytes/s)
< system.pwrStateResidencyTicks::UNDEFINED 57010500 # Cumulative time (in ticks) in various power states
< system.cpu_clk_domain.clock 500 # Clock period in ticks
< system.cpu.dtb.read_hits 0 # DTB read hits
< system.cpu.dtb.read_misses 0 # DTB read misses
< system.cpu.dtb.read_accesses 0 # DTB read accesses
< system.cpu.dtb.write_hits 0 # DTB write hits
< system.cpu.dtb.write_misses 0 # DTB write misses
< system.cpu.dtb.write_accesses 0 # DTB write accesses
< system.cpu.dtb.hits 0 # DTB hits
< system.cpu.dtb.misses 0 # DTB misses
< system.cpu.dtb.accesses 0 # DTB accesses
< system.cpu.itb.read_hits 0 # DTB read hits
< system.cpu.itb.read_misses 0 # DTB read misses
< system.cpu.itb.read_accesses 0 # DTB read accesses
< system.cpu.itb.write_hits 0 # DTB write hits
< system.cpu.itb.write_misses 0 # DTB write misses
< system.cpu.itb.write_accesses 0 # DTB write accesses
< system.cpu.itb.hits 0 # DTB hits
< system.cpu.itb.misses 0 # DTB misses
< system.cpu.itb.accesses 0 # DTB accesses
< system.cpu.workload.numSyscalls 43 # Number of system calls
< system.cpu.pwrStateResidencyTicks::ON 57010500 # Cumulative time (in ticks) in various power states
< system.cpu.numCycles 114022 # number of cpu cycles simulated
< system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
< system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
< system.cpu.committedInsts 113947 # Number of instructions committed
< system.cpu.committedOps 113978 # Number of ops (including micro ops) committed
< system.cpu.num_int_alu_accesses 113979 # Number of integer alu accesses
< system.cpu.num_fp_alu_accesses 0 # Number of float alu accesses
< system.cpu.num_func_calls 8601 # number of times a function call or return occured
< system.cpu.num_conditional_control_insts 17313 # number of instructions that are conditional controls
< system.cpu.num_int_insts 113979 # number of integer instructions
< system.cpu.num_fp_insts 0 # number of float instructions
< system.cpu.num_int_register_reads 152039 # number of times the integer registers were read
< system.cpu.num_int_register_writes 76786 # number of times the integer registers were written
< system.cpu.num_fp_register_reads 0 # number of times the floating registers were read
< system.cpu.num_fp_register_writes 0 # number of times the floating registers were written
< system.cpu.num_mem_refs 43694 # number of memory refs
< system.cpu.num_load_insts 23779 # Number of load instructions
< system.cpu.num_store_insts 19915 # Number of store instructions
< system.cpu.num_idle_cycles 0 # Number of idle cycles
< system.cpu.num_busy_cycles 114022 # Number of busy cycles
< system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
< system.cpu.idle_fraction 0 # Percentage of idle cycles
< system.cpu.Branches 25914 # Number of branches fetched
< system.cpu.op_class::No_OpClass 43 0.04% 0.04% # Class of executed instruction
< system.cpu.op_class::IntAlu 70180 61.55% 61.59% # Class of executed instruction
< system.cpu.op_class::IntMult 105 0.09% 61.68% # Class of executed instruction
< system.cpu.op_class::IntDiv 0 0.00% 61.68% # Class of executed instruction
< system.cpu.op_class::FloatAdd 0 0.00% 61.68% # Class of executed instruction
< system.cpu.op_class::FloatCmp 0 0.00% 61.68% # Class of executed instruction
< system.cpu.op_class::FloatCvt 0 0.00% 61.68% # Class of executed instruction
< system.cpu.op_class::FloatMult 0 0.00% 61.68% # Class of executed instruction
< system.cpu.op_class::FloatMultAcc 0 0.00% 61.68% # Class of executed instruction
< system.cpu.op_class::FloatDiv 0 0.00% 61.68% # Class of executed instruction
< system.cpu.op_class::FloatMisc 0 0.00% 61.68% # Class of executed instruction
< system.cpu.op_class::FloatSqrt 0 0.00% 61.68% # Class of executed instruction
< system.cpu.op_class::SimdAdd 0 0.00% 61.68% # Class of executed instruction
< system.cpu.op_class::SimdAddAcc 0 0.00% 61.68% # Class of executed instruction
< system.cpu.op_class::SimdAlu 0 0.00% 61.68% # Class of executed instruction
< system.cpu.op_class::SimdCmp 0 0.00% 61.68% # Class of executed instruction
< system.cpu.op_class::SimdCvt 0 0.00% 61.68% # Class of executed instruction
< system.cpu.op_class::SimdMisc 0 0.00% 61.68% # Class of executed instruction
< system.cpu.op_class::SimdMult 0 0.00% 61.68% # Class of executed instruction
< system.cpu.op_class::SimdMultAcc 0 0.00% 61.68% # Class of executed instruction
< system.cpu.op_class::SimdShift 0 0.00% 61.68% # Class of executed instruction
< system.cpu.op_class::SimdShiftAcc 0 0.00% 61.68% # Class of executed instruction
< system.cpu.op_class::SimdSqrt 0 0.00% 61.68% # Class of executed instruction
< system.cpu.op_class::SimdFloatAdd 0 0.00% 61.68% # Class of executed instruction
< system.cpu.op_class::SimdFloatAlu 0 0.00% 61.68% # Class of executed instruction
< system.cpu.op_class::SimdFloatCmp 0 0.00% 61.68% # Class of executed instruction
< system.cpu.op_class::SimdFloatCvt 0 0.00% 61.68% # Class of executed instruction
< system.cpu.op_class::SimdFloatDiv 0 0.00% 61.68% # Class of executed instruction
< system.cpu.op_class::SimdFloatMisc 0 0.00% 61.68% # Class of executed instruction
< system.cpu.op_class::SimdFloatMult 0 0.00% 61.68% # Class of executed instruction
< system.cpu.op_class::SimdFloatMultAcc 0 0.00% 61.68% # Class of executed instruction
< system.cpu.op_class::SimdFloatSqrt 0 0.00% 61.68% # Class of executed instruction
< system.cpu.op_class::MemRead 23779 20.85% 82.53% # Class of executed instruction
< system.cpu.op_class::MemWrite 19915 17.47% 100.00% # Class of executed instruction
< system.cpu.op_class::FloatMemRead 0 0.00% 100.00% # Class of executed instruction
< system.cpu.op_class::FloatMemWrite 0 0.00% 100.00% # Class of executed instruction
< system.cpu.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction
< system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction
< system.cpu.op_class::total 114022 # Class of executed instruction
< system.membus.snoop_filter.tot_requests 0 # Total number of requests made to the snoop filter.
< system.membus.snoop_filter.hit_single_requests 0 # Number of requests hitting in the snoop filter with a single holder of the requested data.
< system.membus.snoop_filter.hit_multi_requests 0 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data.
< system.membus.snoop_filter.tot_snoops 0 # Total number of snoops made to the snoop filter.
< system.membus.snoop_filter.hit_single_snoops 0 # Number of snoops hitting in the snoop filter with a single holder of the requested data.
< system.membus.snoop_filter.hit_multi_snoops 0 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data.
< system.membus.pwrStateResidencyTicks::UNDEFINED 57010500 # Cumulative time (in ticks) in various power states
< system.membus.trans_dist::ReadReq 137768 # Transaction distribution
< system.membus.trans_dist::ReadResp 137770 # Transaction distribution
< system.membus.trans_dist::WriteReq 19910 # Transaction distribution
< system.membus.trans_dist::WriteResp 19910 # Transaction distribution
< system.membus.trans_dist::LoadLockedReq 2 # Transaction distribution
< system.membus.trans_dist::StoreCondReq 4 # Transaction distribution
< system.membus.trans_dist::StoreCondResp 4 # Transaction distribution
< system.membus.pkt_count_system.cpu.icache_port::system.physmem.port 227982 # Packet count per connected master and slave (bytes)
< system.membus.pkt_count_system.cpu.dcache_port::system.physmem.port 87386 # Packet count per connected master and slave (bytes)
< system.membus.pkt_count::total 315368 # Packet count per connected master and slave (bytes)
< system.membus.pkt_size_system.cpu.icache_port::system.physmem.port 455964 # Cumulative packet size per connected master and slave (bytes)
< system.membus.pkt_size_system.cpu.dcache_port::system.physmem.port 268385 # Cumulative packet size per connected master and slave (bytes)
< system.membus.pkt_size::total 724349 # Cumulative packet size per connected master and slave (bytes)
< system.membus.snoops 0 # Total snoops (count)
< system.membus.snoopTraffic 0 # Total snoop traffic (bytes)
< system.membus.snoop_fanout::samples 157684 # Request fanout histogram
< system.membus.snoop_fanout::mean 0 # Request fanout histogram
< system.membus.snoop_fanout::stdev 0 # Request fanout histogram
< system.membus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram
< system.membus.snoop_fanout::0 157684 100.00% 100.00% # Request fanout histogram
< system.membus.snoop_fanout::1 0 0.00% 100.00% # Request fanout histogram
< system.membus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram
< system.membus.snoop_fanout::min_value 0 # Request fanout histogram
< system.membus.snoop_fanout::max_value 0 # Request fanout histogram
< system.membus.snoop_fanout::total 157684 # Request fanout histogram
---
> sim_seconds 0.000069
> sim_ticks 68573500
> final_tick 68573500
> sim_freq 1000000000000
> host_inst_rate 3619
> host_op_rate 3627
> host_tick_rate 2266534
> host_mem_usage 259192
> host_seconds 30.26
> sim_insts 109485
> sim_ops 109730
> system.voltage_domain.voltage 1
> system.clk_domain.clock 1000
> system.physmem.pwrStateResidencyTicks::UNDEFINED 68573500
> system.physmem.bytes_read::cpu.inst 547612
> system.physmem.bytes_read::cpu.data 174025
> system.physmem.bytes_read::total 721637
> system.physmem.bytes_inst_read::cpu.inst 547612
> system.physmem.bytes_inst_read::total 547612
> system.physmem.bytes_written::cpu.data 113591
> system.physmem.bytes_written::total 113591
> system.physmem.num_reads::cpu.inst 136903
> system.physmem.num_reads::cpu.data 25597
> system.physmem.num_reads::total 162500
> system.physmem.num_writes::cpu.data 16677
> system.physmem.num_writes::total 16677
> system.physmem.bw_read::cpu.inst 7985767097
> system.physmem.bw_read::cpu.data 2537787921
> system.physmem.bw_read::total 10523555018
> system.physmem.bw_inst_read::cpu.inst 7985767097
> system.physmem.bw_inst_read::total 7985767097
> system.physmem.bw_write::cpu.data 1656485377
> system.physmem.bw_write::total 1656485377
> system.physmem.bw_total::cpu.inst 7985767097
> system.physmem.bw_total::cpu.data 4194273298
> system.physmem.bw_total::total 12180040395
> system.pwrStateResidencyTicks::UNDEFINED 68573500
> system.cpu_clk_domain.clock 500
> system.cpu.dtb.read_hits 0
> system.cpu.dtb.read_misses 0
> system.cpu.dtb.read_accesses 0
> system.cpu.dtb.write_hits 0
> system.cpu.dtb.write_misses 0
> system.cpu.dtb.write_accesses 0
> system.cpu.dtb.hits 0
> system.cpu.dtb.misses 0
> system.cpu.dtb.accesses 0
> system.cpu.itb.read_hits 0
> system.cpu.itb.read_misses 0
> system.cpu.itb.read_accesses 0
> system.cpu.itb.write_hits 0
> system.cpu.itb.write_misses 0
> system.cpu.itb.write_accesses 0
> system.cpu.itb.hits 0
> system.cpu.itb.misses 0
> system.cpu.itb.accesses 0
> system.cpu.workload.numSyscalls 43
> system.cpu.pwrStateResidencyTicks::ON 68573500
> system.cpu.numCycles 137148
> system.cpu.numWorkItemsStarted 0
> system.cpu.numWorkItemsCompleted 0
> system.cpu.committedInsts 109485
> system.cpu.committedOps 109730
> system.cpu.num_int_alu_accesses 109164
> system.cpu.num_fp_alu_accesses 12
> system.cpu.num_vec_alu_accesses 0
> system.cpu.num_func_calls 6221
> system.cpu.num_conditional_control_insts 18218
> system.cpu.num_int_insts 109164
> system.cpu.num_fp_insts 12
> system.cpu.num_vec_insts 0
> system.cpu.num_int_register_reads 137211
> system.cpu.num_int_register_writes 72083
> system.cpu.num_fp_register_reads 12
> system.cpu.num_fp_register_writes 0
> system.cpu.num_vec_register_reads 0
> system.cpu.num_vec_register_writes 0
> system.cpu.num_mem_refs 42276
> system.cpu.num_load_insts 25597
> system.cpu.num_store_insts 16679
> system.cpu.num_idle_cycles 0
> system.cpu.num_busy_cycles 137148
> system.cpu.not_idle_fraction 1
> system.cpu.idle_fraction 0
> system.cpu.Branches 24439
> system.cpu.op_class::No_OpClass 47 0.04% 0.04%
> system.cpu.op_class::IntAlu 67339 61.34% 61.39%
> system.cpu.op_class::IntMult 107 0.10% 61.48%
> system.cpu.op_class::IntDiv 4 0.00% 61.49%
> system.cpu.op_class::FloatAdd 0 0.00% 61.49%
> system.cpu.op_class::FloatCmp 0 0.00% 61.49%
> system.cpu.op_class::FloatCvt 0 0.00% 61.49%
> system.cpu.op_class::FloatMult 0 0.00% 61.49%
> system.cpu.op_class::FloatMultAcc 0 0.00% 61.49%
> system.cpu.op_class::FloatDiv 0 0.00% 61.49%
> system.cpu.op_class::FloatMisc 0 0.00% 61.49%
> system.cpu.op_class::FloatSqrt 0 0.00% 61.49%
> system.cpu.op_class::SimdAdd 0 0.00% 61.49%
> system.cpu.op_class::SimdAddAcc 0 0.00% 61.49%
> system.cpu.op_class::SimdAlu 0 0.00% 61.49%
> system.cpu.op_class::SimdCmp 0 0.00% 61.49%
> system.cpu.op_class::SimdCvt 0 0.00% 61.49%
> system.cpu.op_class::SimdMisc 0 0.00% 61.49%
> system.cpu.op_class::SimdMult 0 0.00% 61.49%
> system.cpu.op_class::SimdMultAcc 0 0.00% 61.49%
> system.cpu.op_class::SimdShift 0 0.00% 61.49%
> system.cpu.op_class::SimdShiftAcc 0 0.00% 61.49%
> system.cpu.op_class::SimdSqrt 0 0.00% 61.49%
> system.cpu.op_class::SimdFloatAdd 0 0.00% 61.49%
> system.cpu.op_class::SimdFloatAlu 0 0.00% 61.49%
> system.cpu.op_class::SimdFloatCmp 0 0.00% 61.49%
> system.cpu.op_class::SimdFloatCvt 0 0.00% 61.49%
> system.cpu.op_class::SimdFloatDiv 0 0.00% 61.49%
> system.cpu.op_class::SimdFloatMisc 0 0.00% 61.49%
> system.cpu.op_class::SimdFloatMult 0 0.00% 61.49%
> system.cpu.op_class::SimdFloatMultAcc 0 0.00% 61.49%
> system.cpu.op_class::SimdFloatSqrt 0 0.00% 61.49%
> system.cpu.op_class::MemRead 25597 23.32% 84.81%
> system.cpu.op_class::MemWrite 16667 15.18% 99.99%
> system.cpu.op_class::FloatMemRead 0 0.00% 99.99%
> system.cpu.op_class::FloatMemWrite 12 0.01% 100.00%
> system.cpu.op_class::IprAccess 0 0.00% 100.00%
> system.cpu.op_class::InstPrefetch 0 0.00% 100.00%
> system.cpu.op_class::total 109773
> system.membus.snoop_filter.tot_requests 0
> system.membus.snoop_filter.hit_single_requests 0
> system.membus.snoop_filter.hit_multi_requests 0
> system.membus.snoop_filter.tot_snoops 0
> system.membus.snoop_filter.hit_single_snoops 0
> system.membus.snoop_filter.hit_multi_snoops 0
> system.membus.pwrStateResidencyTicks::UNDEFINED 68573500
> system.membus.trans_dist::ReadReq 162224
> system.membus.trans_dist::ReadResp 162500
> system.membus.trans_dist::WriteReq 16401
> system.membus.trans_dist::WriteResp 16401
> system.membus.trans_dist::LoadLockedReq 276
> system.membus.trans_dist::StoreCondReq 276
> system.membus.trans_dist::StoreCondResp 276
> system.membus.pkt_count_system.cpu.icache_port::system.physmem.port 273806
> system.membus.pkt_count_system.cpu.dcache_port::system.physmem.port 84548
> system.membus.pkt_count::total 358354
> system.membus.pkt_size_system.cpu.icache_port::system.physmem.port 547612
> system.membus.pkt_size_system.cpu.dcache_port::system.physmem.port 287616
> system.membus.pkt_size::total 835228
> system.membus.snoops 0
> system.membus.snoopTraffic 0
> system.membus.snoop_fanout::samples 179177
> system.membus.snoop_fanout::mean 0
> system.membus.snoop_fanout::stdev 0
> system.membus.snoop_fanout::underflows 0 0.00% 0.00%
> system.membus.snoop_fanout::0 179177 100.00% 100.00%
> system.membus.snoop_fanout::1 0 0.00% 100.00%
> system.membus.snoop_fanout::overflows 0 0.00% 100.00%
> system.membus.snoop_fanout::min_value 0
> system.membus.snoop_fanout::max_value 0
> system.membus.snoop_fanout::total 179177