1Redirecting stdout to build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64a/simple-atomic/simout 2Redirecting stderr to build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64a/simple-atomic/simerr 3gem5 Simulator System. http://gem5.org 4gem5 is copyrighted software; use the --copyright option for details. 5 |
6gem5 compiled Jul 13 2017 17:09:45 7gem5 started Jul 13 2017 17:10:21 8gem5 executing on boldrock, pid 1519 9command line: /home/ar4jc/gem5/build/RISCV/gem5.opt -d build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64a/simple-atomic --stats-file 'text://stats.txt?desc=False' -re /home/ar4jc/gem5/tests/testing/../run.py quick/se/02.insttest/riscv/linux-rv64a/simple-atomic |
10 11Global frequency set at 1000000000000 ticks per second |
12lr.w/sc.w: PASS 13sc.w, no preceding lr.d: PASS 14amoswap.w: PASS 15amoswap.w, sign extend: PASS 16amoswap.w, truncate: PASS 17amoadd.w: PASS 18amoadd.w, truncate/overflow: PASS 19amoadd.w, sign extend: PASS --- 19 unchanged lines hidden (view full) --- 39amoxor.d (1): PASS 40amoxor.d (0): PASS 41amoand.d: PASS 42amoor.d: PASS 43amomin.d: PASS 44amomax.d: PASS 45amominu.d: PASS 46amomaxu.d: PASS |
47Exiting @ tick 68573500 because exiting with last active thread context |