| config.ini (8802:ef66a9083bc4) | config.ini (8835:7c68f84d7c4e) |
|---|---|
| 1[root] 2type=Root 3children=system | 1[root] 2type=Root 3children=system |
| 4full_system=false |
|
| 4time_sync_enable=false 5time_sync_period=100000000000 6time_sync_spin_threshold=100000000 7 8[system] 9type=System 10children=cpu membus physmem | 5time_sync_enable=false 6time_sync_period=100000000000 7time_sync_spin_threshold=100000000 8 9[system] 10type=System 11children=cpu membus physmem |
| 12boot_osflags=a 13init_param=0 14kernel= 15load_addr_mask=1099511627775 |
|
| 11mem_mode=atomic 12memories=system.physmem 13num_work_ids=16 14physmem=system.physmem | 16mem_mode=atomic 17memories=system.physmem 18num_work_ids=16 19physmem=system.physmem |
| 20readfile= 21symbolfile= |
|
| 15work_begin_ckpt_count=0 16work_begin_cpu_id_exit=-1 17work_begin_exit_count=0 18work_cpus_ckpt_count=0 19work_end_ckpt_count=0 20work_end_exit_count=0 21work_item_id=-1 22system_port=system.membus.port[0] 23 24[system.cpu] 25type=TimingSimpleCPU | 22work_begin_ckpt_count=0 23work_begin_cpu_id_exit=-1 24work_begin_exit_count=0 25work_cpus_ckpt_count=0 26work_end_ckpt_count=0 27work_end_exit_count=0 28work_item_id=-1 29system_port=system.membus.port[0] 30 31[system.cpu] 32type=TimingSimpleCPU |
| 26children=dcache dtb icache itb l2cache toL2Bus tracer workload | 33children=dcache dtb icache interrupts itb l2cache toL2Bus tracer workload |
| 27checker=Null 28clock=500 29cpu_id=0 30defer_registration=false 31do_checkpoint_insts=true | 34checker=Null 35clock=500 36cpu_id=0 37defer_registration=false 38do_checkpoint_insts=true |
| 39do_quiesce=true |
|
| 32do_statistics_insts=true 33dtb=system.cpu.dtb 34function_trace=false 35function_trace_start=0 | 40do_statistics_insts=true 41dtb=system.cpu.dtb 42function_trace=false 43function_trace_start=0 |
| 44interrupts=system.cpu.interrupts |
|
| 36itb=system.cpu.itb 37max_insts_all_threads=0 38max_insts_any_thread=0 39max_loads_all_threads=0 40max_loads_any_thread=0 41numThreads=1 42phase=0 | 45itb=system.cpu.itb 46max_insts_all_threads=0 47max_insts_any_thread=0 48max_loads_all_threads=0 49max_loads_any_thread=0 50numThreads=1 51phase=0 |
| 52profile=0 |
|
| 43progress_interval=0 44system=system 45tracer=system.cpu.tracer 46workload=system.cpu.workload 47dcache_port=system.cpu.dcache.cpu_side 48icache_port=system.cpu.icache.cpu_side 49 50[system.cpu.dcache] 51type=BaseCache 52addr_range=0:18446744073709551615 53assoc=2 54block_size=64 55forward_snoops=true 56hash_delay=1 57is_top_level=true 58latency=1000 59max_miss_count=0 60mshrs=10 | 53progress_interval=0 54system=system 55tracer=system.cpu.tracer 56workload=system.cpu.workload 57dcache_port=system.cpu.dcache.cpu_side 58icache_port=system.cpu.icache.cpu_side 59 60[system.cpu.dcache] 61type=BaseCache 62addr_range=0:18446744073709551615 63assoc=2 64block_size=64 65forward_snoops=true 66hash_delay=1 67is_top_level=true 68latency=1000 69max_miss_count=0 70mshrs=10 |
| 61num_cpus=1 62prefetch_data_accesses_only=false 63prefetch_degree=1 64prefetch_latency=10000 | |
| 65prefetch_on_access=false | 71prefetch_on_access=false |
| 66prefetch_past_page=false 67prefetch_policy=none 68prefetch_serial_squash=false 69prefetch_use_cpu_id=true 70prefetcher_size=100 | 72prefetcher=Null |
| 71prioritizeRequests=false 72repl=Null 73size=262144 74subblock_size=0 | 73prioritizeRequests=false 74repl=Null 75size=262144 76subblock_size=0 |
| 77system=system |
|
| 75tgts_per_mshr=5 76trace_addr=0 77two_queue=false 78write_buffers=8 79cpu_side=system.cpu.dcache_port 80mem_side=system.cpu.toL2Bus.port[1] 81 82[system.cpu.dtb] 83type=X86TLB | 78tgts_per_mshr=5 79trace_addr=0 80two_queue=false 81write_buffers=8 82cpu_side=system.cpu.dcache_port 83mem_side=system.cpu.toL2Bus.port[1] 84 85[system.cpu.dtb] 86type=X86TLB |
| 87children=walker |
|
| 84size=64 | 88size=64 |
| 89walker=system.cpu.dtb.walker |
|
| 85 | 90 |
| 91[system.cpu.dtb.walker] 92type=X86PagetableWalker 93system=system 94port=system.cpu.toL2Bus.port[3] 95 |
|
| 86[system.cpu.icache] 87type=BaseCache 88addr_range=0:18446744073709551615 89assoc=2 90block_size=64 91forward_snoops=true 92hash_delay=1 93is_top_level=true 94latency=1000 95max_miss_count=0 96mshrs=10 | 96[system.cpu.icache] 97type=BaseCache 98addr_range=0:18446744073709551615 99assoc=2 100block_size=64 101forward_snoops=true 102hash_delay=1 103is_top_level=true 104latency=1000 105max_miss_count=0 106mshrs=10 |
| 97num_cpus=1 98prefetch_data_accesses_only=false 99prefetch_degree=1 100prefetch_latency=10000 | |
| 101prefetch_on_access=false | 107prefetch_on_access=false |
| 102prefetch_past_page=false 103prefetch_policy=none 104prefetch_serial_squash=false 105prefetch_use_cpu_id=true 106prefetcher_size=100 | 108prefetcher=Null |
| 107prioritizeRequests=false 108repl=Null 109size=131072 110subblock_size=0 | 109prioritizeRequests=false 110repl=Null 111size=131072 112subblock_size=0 |
| 113system=system |
|
| 111tgts_per_mshr=5 112trace_addr=0 113two_queue=false 114write_buffers=8 115cpu_side=system.cpu.icache_port 116mem_side=system.cpu.toL2Bus.port[0] 117 | 114tgts_per_mshr=5 115trace_addr=0 116two_queue=false 117write_buffers=8 118cpu_side=system.cpu.icache_port 119mem_side=system.cpu.toL2Bus.port[0] 120 |
| 121[system.cpu.interrupts] 122type=X86LocalApic 123int_latency=1000 124pio_addr=2305843009213693952 125pio_latency=1000 126system=system 127int_port=system.membus.port[4] 128pio=system.membus.port[3] 129 |
|
| 118[system.cpu.itb] 119type=X86TLB | 130[system.cpu.itb] 131type=X86TLB |
| 132children=walker |
|
| 120size=64 | 133size=64 |
| 134walker=system.cpu.itb.walker |
|
| 121 | 135 |
| 136[system.cpu.itb.walker] 137type=X86PagetableWalker 138system=system 139port=system.cpu.toL2Bus.port[2] 140 |
|
| 122[system.cpu.l2cache] 123type=BaseCache 124addr_range=0:18446744073709551615 125assoc=2 126block_size=64 127forward_snoops=true 128hash_delay=1 129is_top_level=false 130latency=10000 131max_miss_count=0 132mshrs=10 | 141[system.cpu.l2cache] 142type=BaseCache 143addr_range=0:18446744073709551615 144assoc=2 145block_size=64 146forward_snoops=true 147hash_delay=1 148is_top_level=false 149latency=10000 150max_miss_count=0 151mshrs=10 |
| 133num_cpus=1 134prefetch_data_accesses_only=false 135prefetch_degree=1 136prefetch_latency=100000 | |
| 137prefetch_on_access=false | 152prefetch_on_access=false |
| 138prefetch_past_page=false 139prefetch_policy=none 140prefetch_serial_squash=false 141prefetch_use_cpu_id=true 142prefetcher_size=100 | 153prefetcher=Null |
| 143prioritizeRequests=false 144repl=Null 145size=2097152 146subblock_size=0 | 154prioritizeRequests=false 155repl=Null 156size=2097152 157subblock_size=0 |
| 158system=system |
|
| 147tgts_per_mshr=5 148trace_addr=0 149two_queue=false 150write_buffers=8 | 159tgts_per_mshr=5 160trace_addr=0 161two_queue=false 162write_buffers=8 |
| 151cpu_side=system.cpu.toL2Bus.port[2] | 163cpu_side=system.cpu.toL2Bus.port[4] |
| 152mem_side=system.membus.port[2] 153 154[system.cpu.toL2Bus] 155type=Bus 156block_size=64 157bus_id=0 158clock=1000 159header_cycles=1 160use_default_range=false 161width=64 | 164mem_side=system.membus.port[2] 165 166[system.cpu.toL2Bus] 167type=Bus 168block_size=64 169bus_id=0 170clock=1000 171header_cycles=1 172use_default_range=false 173width=64 |
| 162port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side | 174port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.l2cache.cpu_side |
| 163 164[system.cpu.tracer] 165type=ExeTracer 166 167[system.cpu.workload] 168type=LiveProcess 169cmd=hello 170cwd= --- 15 unchanged lines hidden (view full) --- 186[system.membus] 187type=Bus 188block_size=64 189bus_id=0 190clock=1000 191header_cycles=1 192use_default_range=false 193width=64 | 175 176[system.cpu.tracer] 177type=ExeTracer 178 179[system.cpu.workload] 180type=LiveProcess 181cmd=hello 182cwd= --- 15 unchanged lines hidden (view full) --- 198[system.membus] 199type=Bus 200block_size=64 201bus_id=0 202clock=1000 203header_cycles=1 204use_default_range=false 205width=64 |
| 194port=system.system_port system.physmem.port[0] system.cpu.l2cache.mem_side | 206port=system.system_port system.physmem.port[0] system.cpu.l2cache.mem_side system.cpu.interrupts.pio system.cpu.interrupts.int_port |
| 195 196[system.physmem] 197type=PhysicalMemory 198file= 199latency=30000 200latency_var=0 201null=false 202range=0:134217727 203zero=false 204port=system.membus.port[1] 205 | 207 208[system.physmem] 209type=PhysicalMemory 210file= 211latency=30000 212latency_var=0 213null=false 214range=0:134217727 215zero=false 216port=system.membus.port[1] 217 |