1[root]
2type=Root
3children=system
4eventq_index=0
5full_system=false
6sim_quantum=0
7time_sync_enable=false
8time_sync_period=100000000000
9time_sync_spin_threshold=100000000
10
11[system]
12type=System
13children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain
14boot_osflags=a
15cache_line_size=64
16clk_domain=system.clk_domain
17eventq_index=0
18init_param=0
19kernel=
20load_addr_mask=1099511627775
21load_offset=0
22mem_mode=timing
23mem_ranges=
24memories=system.physmem
25num_work_ids=16
26readfile=
27symbolfile=
28work_begin_ckpt_count=0
29work_begin_cpu_id_exit=-1
30work_begin_exit_count=0
31work_cpus_ckpt_count=0
32work_end_ckpt_count=0
33work_end_exit_count=0
34work_item_id=-1
35system_port=system.membus.slave[0]
36
37[system.clk_domain]
38type=SrcClockDomain
39clock=1000
40eventq_index=0
41voltage_domain=system.voltage_domain
42
43[system.cpu]
44type=TimingSimpleCPU
45children=apic_clk_domain dcache dtb icache interrupts isa itb l2cache toL2Bus tracer workload
46branchPred=Null
47checker=Null
48clk_domain=system.cpu_clk_domain
49cpu_id=0
50do_checkpoint_insts=true
51do_quiesce=true
52do_statistics_insts=true
53dtb=system.cpu.dtb
54eventq_index=0
55function_trace=false
56function_trace_start=0
57interrupts=system.cpu.interrupts
58isa=system.cpu.isa
59itb=system.cpu.itb
60max_insts_all_threads=0
61max_insts_any_thread=0
62max_loads_all_threads=0
63max_loads_any_thread=0
64numThreads=1
65profile=0
66progress_interval=0
67simpoint_start_insts=
68switched_out=false
69system=system
70tracer=system.cpu.tracer
71workload=system.cpu.workload
72dcache_port=system.cpu.dcache.cpu_side
73icache_port=system.cpu.icache.cpu_side
74
75[system.cpu.apic_clk_domain]
76type=DerivedClockDomain
77clk_divider=16
78clk_domain=system.cpu_clk_domain
79eventq_index=0
80
81[system.cpu.dcache]
82type=BaseCache
83children=tags
84addr_ranges=0:18446744073709551615
85assoc=2
86clk_domain=system.cpu_clk_domain
87eventq_index=0
88forward_snoops=true
89hit_latency=2
90is_top_level=true
91max_miss_count=0
92mshrs=4
93prefetch_on_access=false
94prefetcher=Null
95response_latency=2
96sequential_access=false
97size=262144
98system=system
99tags=system.cpu.dcache.tags
100tgts_per_mshr=20
101two_queue=false
102write_buffers=8
103cpu_side=system.cpu.dcache_port
104mem_side=system.cpu.toL2Bus.slave[1]
105
106[system.cpu.dcache.tags]
107type=LRU
108assoc=2
109block_size=64
110clk_domain=system.cpu_clk_domain
111eventq_index=0
112hit_latency=2
113sequential_access=false
114size=262144
115
116[system.cpu.dtb]
117type=X86TLB
118children=walker
119eventq_index=0
120size=64
121walker=system.cpu.dtb.walker
122
123[system.cpu.dtb.walker]
124type=X86PagetableWalker
125clk_domain=system.cpu_clk_domain
126eventq_index=0
127num_squash_per_cycle=4
128system=system
129port=system.cpu.toL2Bus.slave[3]
130
131[system.cpu.icache]
132type=BaseCache
133children=tags
134addr_ranges=0:18446744073709551615
135assoc=2
136clk_domain=system.cpu_clk_domain
137eventq_index=0
138forward_snoops=true
139hit_latency=2
140is_top_level=true
141max_miss_count=0
142mshrs=4
143prefetch_on_access=false
144prefetcher=Null
145response_latency=2
146sequential_access=false
147size=131072
148system=system
149tags=system.cpu.icache.tags
150tgts_per_mshr=20
151two_queue=false
152write_buffers=8
153cpu_side=system.cpu.icache_port
154mem_side=system.cpu.toL2Bus.slave[0]
155
156[system.cpu.icache.tags]
157type=LRU
158assoc=2
159block_size=64
160clk_domain=system.cpu_clk_domain
161eventq_index=0
162hit_latency=2
163sequential_access=false
164size=131072
165
166[system.cpu.interrupts]
167type=X86LocalApic
168clk_domain=system.cpu.apic_clk_domain
169eventq_index=0
170int_latency=1000
171pio_addr=2305843009213693952
172pio_latency=100000
173system=system
174int_master=system.membus.slave[2]
175int_slave=system.membus.master[2]
176pio=system.membus.master[1]
177
178[system.cpu.isa]
179type=X86ISA
180eventq_index=0
181
182[system.cpu.itb]
183type=X86TLB
184children=walker
185eventq_index=0
186size=64
187walker=system.cpu.itb.walker
188
189[system.cpu.itb.walker]
190type=X86PagetableWalker
191clk_domain=system.cpu_clk_domain
192eventq_index=0
193num_squash_per_cycle=4
194system=system
195port=system.cpu.toL2Bus.slave[2]
196
197[system.cpu.l2cache]
198type=BaseCache
199children=tags
200addr_ranges=0:18446744073709551615
201assoc=8
202clk_domain=system.cpu_clk_domain
203eventq_index=0
204forward_snoops=true
205hit_latency=20
206is_top_level=false
207max_miss_count=0
208mshrs=20
209prefetch_on_access=false
210prefetcher=Null
211response_latency=20
212sequential_access=false
213size=2097152
214system=system
215tags=system.cpu.l2cache.tags
216tgts_per_mshr=12
217two_queue=false
218write_buffers=8
219cpu_side=system.cpu.toL2Bus.master[0]
220mem_side=system.membus.slave[1]
221
222[system.cpu.l2cache.tags]
223type=LRU
224assoc=8
225block_size=64
226clk_domain=system.cpu_clk_domain
227eventq_index=0
228hit_latency=20
229sequential_access=false
230size=2097152
231
232[system.cpu.toL2Bus]
233type=CoherentBus
234clk_domain=system.cpu_clk_domain
235eventq_index=0
236header_cycles=1
237system=system
238use_default_range=false
239width=32
240master=system.cpu.l2cache.cpu_side
241slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port
242
243[system.cpu.tracer]
244type=ExeTracer
245eventq_index=0
246
247[system.cpu.workload]
248type=LiveProcess
249cmd=hello
250cwd=
251egid=100
252env=
253errout=cerr
254euid=100
255eventq_index=0
254executable=/dist/test-progs/hello/bin/x86/linux/hello
256executable=tests/test-progs/hello/bin/x86/linux/hello
257gid=100
258input=cin
259max_stack_size=67108864
260output=cout
261pid=100
262ppid=99
263simpoint=0
264system=system
265uid=100
266
267[system.cpu_clk_domain]
268type=SrcClockDomain
269clock=500
270eventq_index=0
271voltage_domain=system.voltage_domain
272
273[system.membus]
274type=CoherentBus
275clk_domain=system.clk_domain
276eventq_index=0
277header_cycles=1
278system=system
279use_default_range=false
280width=8
281master=system.physmem.port system.cpu.interrupts.pio system.cpu.interrupts.int_slave
282slave=system.system_port system.cpu.l2cache.mem_side system.cpu.interrupts.int_master
283
284[system.physmem]
285type=SimpleMemory
286bandwidth=73.000000
287clk_domain=system.clk_domain
288conf_table_reported=true
289eventq_index=0
290in_addr_map=true
291latency=30000
292latency_var=0
293null=false
294range=0:134217727
295port=system.membus.master[0]
296
297[system.voltage_domain]
298type=VoltageDomain
299eventq_index=0
300voltage=1.000000
301