| stats.txt (11530:6e143fd2cabf) | stats.txt (11680:b4d943429dc6) |
|---|---|
| 1 2---------- Begin Simulation Statistics ---------- | 1 2---------- Begin Simulation Statistics ---------- |
| 3sim_seconds 0.000088 # Number of seconds simulated 4sim_ticks 87948 # Number of ticks simulated 5final_tick 87948 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) | 3sim_seconds 0.000092 # Number of seconds simulated 4sim_ticks 91859 # Number of ticks simulated 5final_tick 91859 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) |
| 6sim_freq 1000000000 # Frequency of simulated ticks | 6sim_freq 1000000000 # Frequency of simulated ticks |
| 7host_inst_rate 83700 # Simulator instruction rate (inst/s) 8host_op_rate 151608 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 1367648 # Simulator tick rate (ticks/s) 10host_mem_usage 473696 # Number of bytes of host memory used 11host_seconds 0.06 # Real time elapsed on the host | 7host_inst_rate 42401 # Simulator instruction rate (inst/s) 8host_op_rate 76797 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 723555 # Simulator tick rate (ticks/s) 10host_mem_usage 431840 # Number of bytes of host memory used 11host_seconds 0.13 # Real time elapsed on the host |
| 12sim_insts 5381 # Number of instructions simulated 13sim_ops 9748 # Number of ops (including micro ops) simulated 14system.voltage_domain.voltage 1 # Voltage in Volts 15system.clk_domain.clock 1 # Clock period in ticks | 12sim_insts 5381 # Number of instructions simulated 13sim_ops 9748 # Number of ops (including micro ops) simulated 14system.voltage_domain.voltage 1 # Voltage in Volts 15system.clk_domain.clock 1 # Clock period in ticks |
| 16system.mem_ctrls.pwrStateResidencyTicks::UNDEFINED 87948 # Cumulative time (in ticks) in various power states | 16system.mem_ctrls.pwrStateResidencyTicks::UNDEFINED 91859 # Cumulative time (in ticks) in various power states |
| 17system.mem_ctrls.bytes_read::ruby.dir_cntrl0 88128 # Number of bytes read from this memory 18system.mem_ctrls.bytes_read::total 88128 # Number of bytes read from this memory 19system.mem_ctrls.bytes_written::ruby.dir_cntrl0 87872 # Number of bytes written to this memory 20system.mem_ctrls.bytes_written::total 87872 # Number of bytes written to this memory 21system.mem_ctrls.num_reads::ruby.dir_cntrl0 1377 # Number of read requests responded to by this memory 22system.mem_ctrls.num_reads::total 1377 # Number of read requests responded to by this memory 23system.mem_ctrls.num_writes::ruby.dir_cntrl0 1373 # Number of write requests responded to by this memory 24system.mem_ctrls.num_writes::total 1373 # Number of write requests responded to by this memory | 17system.mem_ctrls.bytes_read::ruby.dir_cntrl0 88128 # Number of bytes read from this memory 18system.mem_ctrls.bytes_read::total 88128 # Number of bytes read from this memory 19system.mem_ctrls.bytes_written::ruby.dir_cntrl0 87872 # Number of bytes written to this memory 20system.mem_ctrls.bytes_written::total 87872 # Number of bytes written to this memory 21system.mem_ctrls.num_reads::ruby.dir_cntrl0 1377 # Number of read requests responded to by this memory 22system.mem_ctrls.num_reads::total 1377 # Number of read requests responded to by this memory 23system.mem_ctrls.num_writes::ruby.dir_cntrl0 1373 # Number of write requests responded to by this memory 24system.mem_ctrls.num_writes::total 1373 # Number of write requests responded to by this memory |
| 25system.mem_ctrls.bw_read::ruby.dir_cntrl0 1002046664 # Total read bandwidth from this memory (bytes/s) 26system.mem_ctrls.bw_read::total 1002046664 # Total read bandwidth from this memory (bytes/s) 27system.mem_ctrls.bw_write::ruby.dir_cntrl0 999135853 # Write bandwidth from this memory (bytes/s) 28system.mem_ctrls.bw_write::total 999135853 # Write bandwidth from this memory (bytes/s) 29system.mem_ctrls.bw_total::ruby.dir_cntrl0 2001182517 # Total bandwidth to/from this memory (bytes/s) 30system.mem_ctrls.bw_total::total 2001182517 # Total bandwidth to/from this memory (bytes/s) | 25system.mem_ctrls.bw_read::ruby.dir_cntrl0 959383403 # Total read bandwidth from this memory (bytes/s) 26system.mem_ctrls.bw_read::total 959383403 # Total read bandwidth from this memory (bytes/s) 27system.mem_ctrls.bw_write::ruby.dir_cntrl0 956596523 # Write bandwidth from this memory (bytes/s) 28system.mem_ctrls.bw_write::total 956596523 # Write bandwidth from this memory (bytes/s) 29system.mem_ctrls.bw_total::ruby.dir_cntrl0 1915979926 # Total bandwidth to/from this memory (bytes/s) 30system.mem_ctrls.bw_total::total 1915979926 # Total bandwidth to/from this memory (bytes/s) |
| 31system.mem_ctrls.readReqs 1377 # Number of read requests accepted 32system.mem_ctrls.writeReqs 1373 # Number of write requests accepted 33system.mem_ctrls.readBursts 1377 # Number of DRAM read bursts, including those serviced by the write queue 34system.mem_ctrls.writeBursts 1373 # Number of DRAM write bursts, including those merged in the write queue | 31system.mem_ctrls.readReqs 1377 # Number of read requests accepted 32system.mem_ctrls.writeReqs 1373 # Number of write requests accepted 33system.mem_ctrls.readBursts 1377 # Number of DRAM read bursts, including those serviced by the write queue 34system.mem_ctrls.writeBursts 1373 # Number of DRAM write bursts, including those merged in the write queue |
| 35system.mem_ctrls.bytesReadDRAM 40320 # Total number of bytes read from DRAM 36system.mem_ctrls.bytesReadWrQ 47808 # Total number of bytes read from write queue 37system.mem_ctrls.bytesWritten 39936 # Total number of bytes written to DRAM | 35system.mem_ctrls.bytesReadDRAM 41408 # Total number of bytes read from DRAM 36system.mem_ctrls.bytesReadWrQ 46720 # Total number of bytes read from write queue 37system.mem_ctrls.bytesWritten 41728 # Total number of bytes written to DRAM |
| 38system.mem_ctrls.bytesReadSys 88128 # Total read bytes from the system interface side 39system.mem_ctrls.bytesWrittenSys 87872 # Total written bytes from the system interface side | 38system.mem_ctrls.bytesReadSys 88128 # Total read bytes from the system interface side 39system.mem_ctrls.bytesWrittenSys 87872 # Total written bytes from the system interface side |
| 40system.mem_ctrls.servicedByWrQ 747 # Number of DRAM read bursts serviced by the write queue 41system.mem_ctrls.mergedWrBursts 722 # Number of DRAM write bursts merged with an existing one | 40system.mem_ctrls.servicedByWrQ 730 # Number of DRAM read bursts serviced by the write queue 41system.mem_ctrls.mergedWrBursts 702 # Number of DRAM write bursts merged with an existing one |
| 42system.mem_ctrls.neitherReadNorWriteReqs 0 # Number of requests that are neither read nor write | 42system.mem_ctrls.neitherReadNorWriteReqs 0 # Number of requests that are neither read nor write |
| 43system.mem_ctrls.perBankRdBursts::0 59 # Per bank write bursts 44system.mem_ctrls.perBankRdBursts::1 1 # Per bank write bursts | 43system.mem_ctrls.perBankRdBursts::0 60 # Per bank write bursts 44system.mem_ctrls.perBankRdBursts::1 2 # Per bank write bursts |
| 45system.mem_ctrls.perBankRdBursts::2 6 # Per bank write bursts | 45system.mem_ctrls.perBankRdBursts::2 6 # Per bank write bursts |
| 46system.mem_ctrls.perBankRdBursts::3 9 # Per bank write bursts 47system.mem_ctrls.perBankRdBursts::4 52 # Per bank write bursts 48system.mem_ctrls.perBankRdBursts::5 55 # Per bank write bursts 49system.mem_ctrls.perBankRdBursts::6 37 # Per bank write bursts 50system.mem_ctrls.perBankRdBursts::7 64 # Per bank write bursts 51system.mem_ctrls.perBankRdBursts::8 25 # Per bank write bursts 52system.mem_ctrls.perBankRdBursts::9 119 # Per bank write bursts 53system.mem_ctrls.perBankRdBursts::10 121 # Per bank write bursts 54system.mem_ctrls.perBankRdBursts::11 21 # Per bank write bursts | 46system.mem_ctrls.perBankRdBursts::3 10 # Per bank write bursts 47system.mem_ctrls.perBankRdBursts::4 51 # Per bank write bursts 48system.mem_ctrls.perBankRdBursts::5 53 # Per bank write bursts 49system.mem_ctrls.perBankRdBursts::6 39 # Per bank write bursts 50system.mem_ctrls.perBankRdBursts::7 57 # Per bank write bursts 51system.mem_ctrls.perBankRdBursts::8 28 # Per bank write bursts 52system.mem_ctrls.perBankRdBursts::9 129 # Per bank write bursts 53system.mem_ctrls.perBankRdBursts::10 115 # Per bank write bursts 54system.mem_ctrls.perBankRdBursts::11 24 # Per bank write bursts |
| 55system.mem_ctrls.perBankRdBursts::12 2 # Per bank write bursts | 55system.mem_ctrls.perBankRdBursts::12 2 # Per bank write bursts |
| 56system.mem_ctrls.perBankRdBursts::13 21 # Per bank write bursts | 56system.mem_ctrls.perBankRdBursts::13 28 # Per bank write bursts |
| 57system.mem_ctrls.perBankRdBursts::14 8 # Per bank write bursts | 57system.mem_ctrls.perBankRdBursts::14 8 # Per bank write bursts |
| 58system.mem_ctrls.perBankRdBursts::15 30 # Per bank write bursts 59system.mem_ctrls.perBankWrBursts::0 51 # Per bank write bursts 60system.mem_ctrls.perBankWrBursts::1 1 # Per bank write bursts | 58system.mem_ctrls.perBankRdBursts::15 35 # Per bank write bursts 59system.mem_ctrls.perBankWrBursts::0 55 # Per bank write bursts 60system.mem_ctrls.perBankWrBursts::1 2 # Per bank write bursts |
| 61system.mem_ctrls.perBankWrBursts::2 6 # Per bank write bursts | 61system.mem_ctrls.perBankWrBursts::2 6 # Per bank write bursts |
| 62system.mem_ctrls.perBankWrBursts::3 7 # Per bank write bursts | 62system.mem_ctrls.perBankWrBursts::3 8 # Per bank write bursts |
| 63system.mem_ctrls.perBankWrBursts::4 52 # Per bank write bursts | 63system.mem_ctrls.perBankWrBursts::4 52 # Per bank write bursts |
| 64system.mem_ctrls.perBankWrBursts::5 50 # Per bank write bursts 65system.mem_ctrls.perBankWrBursts::6 36 # Per bank write bursts 66system.mem_ctrls.perBankWrBursts::7 66 # Per bank write bursts 67system.mem_ctrls.perBankWrBursts::8 25 # Per bank write bursts 68system.mem_ctrls.perBankWrBursts::9 120 # Per bank write bursts 69system.mem_ctrls.perBankWrBursts::10 125 # Per bank write bursts 70system.mem_ctrls.perBankWrBursts::11 23 # Per bank write bursts | 64system.mem_ctrls.perBankWrBursts::5 48 # Per bank write bursts 65system.mem_ctrls.perBankWrBursts::6 38 # Per bank write bursts 66system.mem_ctrls.perBankWrBursts::7 60 # Per bank write bursts 67system.mem_ctrls.perBankWrBursts::8 28 # Per bank write bursts 68system.mem_ctrls.perBankWrBursts::9 130 # Per bank write bursts 69system.mem_ctrls.perBankWrBursts::10 123 # Per bank write bursts 70system.mem_ctrls.perBankWrBursts::11 24 # Per bank write bursts |
| 71system.mem_ctrls.perBankWrBursts::12 2 # Per bank write bursts | 71system.mem_ctrls.perBankWrBursts::12 2 # Per bank write bursts |
| 72system.mem_ctrls.perBankWrBursts::13 21 # Per bank write bursts | 72system.mem_ctrls.perBankWrBursts::13 31 # Per bank write bursts |
| 73system.mem_ctrls.perBankWrBursts::14 8 # Per bank write bursts | 73system.mem_ctrls.perBankWrBursts::14 8 # Per bank write bursts |
| 74system.mem_ctrls.perBankWrBursts::15 31 # Per bank write bursts | 74system.mem_ctrls.perBankWrBursts::15 37 # Per bank write bursts |
| 75system.mem_ctrls.numRdRetry 0 # Number of times read queue was full causing retry 76system.mem_ctrls.numWrRetry 0 # Number of times write queue was full causing retry | 75system.mem_ctrls.numRdRetry 0 # Number of times read queue was full causing retry 76system.mem_ctrls.numWrRetry 0 # Number of times write queue was full causing retry |
| 77system.mem_ctrls.totGap 87868 # Total gap between requests | 77system.mem_ctrls.totGap 91773 # Total gap between requests |
| 78system.mem_ctrls.readPktSize::0 0 # Read request sizes (log2) 79system.mem_ctrls.readPktSize::1 0 # Read request sizes (log2) 80system.mem_ctrls.readPktSize::2 0 # Read request sizes (log2) 81system.mem_ctrls.readPktSize::3 0 # Read request sizes (log2) 82system.mem_ctrls.readPktSize::4 0 # Read request sizes (log2) 83system.mem_ctrls.readPktSize::5 0 # Read request sizes (log2) 84system.mem_ctrls.readPktSize::6 1377 # Read request sizes (log2) 85system.mem_ctrls.writePktSize::0 0 # Write request sizes (log2) 86system.mem_ctrls.writePktSize::1 0 # Write request sizes (log2) 87system.mem_ctrls.writePktSize::2 0 # Write request sizes (log2) 88system.mem_ctrls.writePktSize::3 0 # Write request sizes (log2) 89system.mem_ctrls.writePktSize::4 0 # Write request sizes (log2) 90system.mem_ctrls.writePktSize::5 0 # Write request sizes (log2) 91system.mem_ctrls.writePktSize::6 1373 # Write request sizes (log2) | 78system.mem_ctrls.readPktSize::0 0 # Read request sizes (log2) 79system.mem_ctrls.readPktSize::1 0 # Read request sizes (log2) 80system.mem_ctrls.readPktSize::2 0 # Read request sizes (log2) 81system.mem_ctrls.readPktSize::3 0 # Read request sizes (log2) 82system.mem_ctrls.readPktSize::4 0 # Read request sizes (log2) 83system.mem_ctrls.readPktSize::5 0 # Read request sizes (log2) 84system.mem_ctrls.readPktSize::6 1377 # Read request sizes (log2) 85system.mem_ctrls.writePktSize::0 0 # Write request sizes (log2) 86system.mem_ctrls.writePktSize::1 0 # Write request sizes (log2) 87system.mem_ctrls.writePktSize::2 0 # Write request sizes (log2) 88system.mem_ctrls.writePktSize::3 0 # Write request sizes (log2) 89system.mem_ctrls.writePktSize::4 0 # Write request sizes (log2) 90system.mem_ctrls.writePktSize::5 0 # Write request sizes (log2) 91system.mem_ctrls.writePktSize::6 1373 # Write request sizes (log2) |
| 92system.mem_ctrls.rdQLenPdf::0 630 # What read queue length does an incoming req see | 92system.mem_ctrls.rdQLenPdf::0 647 # What read queue length does an incoming req see |
| 93system.mem_ctrls.rdQLenPdf::1 0 # What read queue length does an incoming req see 94system.mem_ctrls.rdQLenPdf::2 0 # What read queue length does an incoming req see 95system.mem_ctrls.rdQLenPdf::3 0 # What read queue length does an incoming req see 96system.mem_ctrls.rdQLenPdf::4 0 # What read queue length does an incoming req see 97system.mem_ctrls.rdQLenPdf::5 0 # What read queue length does an incoming req see 98system.mem_ctrls.rdQLenPdf::6 0 # What read queue length does an incoming req see 99system.mem_ctrls.rdQLenPdf::7 0 # What read queue length does an incoming req see 100system.mem_ctrls.rdQLenPdf::8 0 # What read queue length does an incoming req see --- 31 unchanged lines hidden (view full) --- 132system.mem_ctrls.wrQLenPdf::8 1 # What write queue length does an incoming req see 133system.mem_ctrls.wrQLenPdf::9 1 # What write queue length does an incoming req see 134system.mem_ctrls.wrQLenPdf::10 1 # What write queue length does an incoming req see 135system.mem_ctrls.wrQLenPdf::11 1 # What write queue length does an incoming req see 136system.mem_ctrls.wrQLenPdf::12 1 # What write queue length does an incoming req see 137system.mem_ctrls.wrQLenPdf::13 1 # What write queue length does an incoming req see 138system.mem_ctrls.wrQLenPdf::14 1 # What write queue length does an incoming req see 139system.mem_ctrls.wrQLenPdf::15 6 # What write queue length does an incoming req see | 93system.mem_ctrls.rdQLenPdf::1 0 # What read queue length does an incoming req see 94system.mem_ctrls.rdQLenPdf::2 0 # What read queue length does an incoming req see 95system.mem_ctrls.rdQLenPdf::3 0 # What read queue length does an incoming req see 96system.mem_ctrls.rdQLenPdf::4 0 # What read queue length does an incoming req see 97system.mem_ctrls.rdQLenPdf::5 0 # What read queue length does an incoming req see 98system.mem_ctrls.rdQLenPdf::6 0 # What read queue length does an incoming req see 99system.mem_ctrls.rdQLenPdf::7 0 # What read queue length does an incoming req see 100system.mem_ctrls.rdQLenPdf::8 0 # What read queue length does an incoming req see --- 31 unchanged lines hidden (view full) --- 132system.mem_ctrls.wrQLenPdf::8 1 # What write queue length does an incoming req see 133system.mem_ctrls.wrQLenPdf::9 1 # What write queue length does an incoming req see 134system.mem_ctrls.wrQLenPdf::10 1 # What write queue length does an incoming req see 135system.mem_ctrls.wrQLenPdf::11 1 # What write queue length does an incoming req see 136system.mem_ctrls.wrQLenPdf::12 1 # What write queue length does an incoming req see 137system.mem_ctrls.wrQLenPdf::13 1 # What write queue length does an incoming req see 138system.mem_ctrls.wrQLenPdf::14 1 # What write queue length does an incoming req see 139system.mem_ctrls.wrQLenPdf::15 6 # What write queue length does an incoming req see |
| 140system.mem_ctrls.wrQLenPdf::16 8 # What write queue length does an incoming req see 141system.mem_ctrls.wrQLenPdf::17 41 # What write queue length does an incoming req see 142system.mem_ctrls.wrQLenPdf::18 40 # What write queue length does an incoming req see 143system.mem_ctrls.wrQLenPdf::19 39 # What write queue length does an incoming req see 144system.mem_ctrls.wrQLenPdf::20 40 # What write queue length does an incoming req see 145system.mem_ctrls.wrQLenPdf::21 39 # What write queue length does an incoming req see 146system.mem_ctrls.wrQLenPdf::22 39 # What write queue length does an incoming req see 147system.mem_ctrls.wrQLenPdf::23 39 # What write queue length does an incoming req see 148system.mem_ctrls.wrQLenPdf::24 39 # What write queue length does an incoming req see 149system.mem_ctrls.wrQLenPdf::25 39 # What write queue length does an incoming req see 150system.mem_ctrls.wrQLenPdf::26 39 # What write queue length does an incoming req see 151system.mem_ctrls.wrQLenPdf::27 38 # What write queue length does an incoming req see 152system.mem_ctrls.wrQLenPdf::28 38 # What write queue length does an incoming req see 153system.mem_ctrls.wrQLenPdf::29 38 # What write queue length does an incoming req see 154system.mem_ctrls.wrQLenPdf::30 38 # What write queue length does an incoming req see 155system.mem_ctrls.wrQLenPdf::31 38 # What write queue length does an incoming req see 156system.mem_ctrls.wrQLenPdf::32 38 # What write queue length does an incoming req see | 140system.mem_ctrls.wrQLenPdf::16 6 # What write queue length does an incoming req see 141system.mem_ctrls.wrQLenPdf::17 33 # What write queue length does an incoming req see 142system.mem_ctrls.wrQLenPdf::18 42 # What write queue length does an incoming req see 143system.mem_ctrls.wrQLenPdf::19 42 # What write queue length does an incoming req see 144system.mem_ctrls.wrQLenPdf::20 43 # What write queue length does an incoming req see 145system.mem_ctrls.wrQLenPdf::21 44 # What write queue length does an incoming req see 146system.mem_ctrls.wrQLenPdf::22 40 # What write queue length does an incoming req see 147system.mem_ctrls.wrQLenPdf::23 40 # What write queue length does an incoming req see 148system.mem_ctrls.wrQLenPdf::24 40 # What write queue length does an incoming req see 149system.mem_ctrls.wrQLenPdf::25 40 # What write queue length does an incoming req see 150system.mem_ctrls.wrQLenPdf::26 40 # What write queue length does an incoming req see 151system.mem_ctrls.wrQLenPdf::27 40 # What write queue length does an incoming req see 152system.mem_ctrls.wrQLenPdf::28 40 # What write queue length does an incoming req see 153system.mem_ctrls.wrQLenPdf::29 40 # What write queue length does an incoming req see 154system.mem_ctrls.wrQLenPdf::30 40 # What write queue length does an incoming req see 155system.mem_ctrls.wrQLenPdf::31 40 # What write queue length does an incoming req see 156system.mem_ctrls.wrQLenPdf::32 40 # What write queue length does an incoming req see |
| 157system.mem_ctrls.wrQLenPdf::33 0 # What write queue length does an incoming req see 158system.mem_ctrls.wrQLenPdf::34 0 # What write queue length does an incoming req see 159system.mem_ctrls.wrQLenPdf::35 0 # What write queue length does an incoming req see 160system.mem_ctrls.wrQLenPdf::36 0 # What write queue length does an incoming req see 161system.mem_ctrls.wrQLenPdf::37 0 # What write queue length does an incoming req see 162system.mem_ctrls.wrQLenPdf::38 0 # What write queue length does an incoming req see 163system.mem_ctrls.wrQLenPdf::39 0 # What write queue length does an incoming req see 164system.mem_ctrls.wrQLenPdf::40 0 # What write queue length does an incoming req see --- 15 unchanged lines hidden (view full) --- 180system.mem_ctrls.wrQLenPdf::56 0 # What write queue length does an incoming req see 181system.mem_ctrls.wrQLenPdf::57 0 # What write queue length does an incoming req see 182system.mem_ctrls.wrQLenPdf::58 0 # What write queue length does an incoming req see 183system.mem_ctrls.wrQLenPdf::59 0 # What write queue length does an incoming req see 184system.mem_ctrls.wrQLenPdf::60 0 # What write queue length does an incoming req see 185system.mem_ctrls.wrQLenPdf::61 0 # What write queue length does an incoming req see 186system.mem_ctrls.wrQLenPdf::62 0 # What write queue length does an incoming req see 187system.mem_ctrls.wrQLenPdf::63 0 # What write queue length does an incoming req see | 157system.mem_ctrls.wrQLenPdf::33 0 # What write queue length does an incoming req see 158system.mem_ctrls.wrQLenPdf::34 0 # What write queue length does an incoming req see 159system.mem_ctrls.wrQLenPdf::35 0 # What write queue length does an incoming req see 160system.mem_ctrls.wrQLenPdf::36 0 # What write queue length does an incoming req see 161system.mem_ctrls.wrQLenPdf::37 0 # What write queue length does an incoming req see 162system.mem_ctrls.wrQLenPdf::38 0 # What write queue length does an incoming req see 163system.mem_ctrls.wrQLenPdf::39 0 # What write queue length does an incoming req see 164system.mem_ctrls.wrQLenPdf::40 0 # What write queue length does an incoming req see --- 15 unchanged lines hidden (view full) --- 180system.mem_ctrls.wrQLenPdf::56 0 # What write queue length does an incoming req see 181system.mem_ctrls.wrQLenPdf::57 0 # What write queue length does an incoming req see 182system.mem_ctrls.wrQLenPdf::58 0 # What write queue length does an incoming req see 183system.mem_ctrls.wrQLenPdf::59 0 # What write queue length does an incoming req see 184system.mem_ctrls.wrQLenPdf::60 0 # What write queue length does an incoming req see 185system.mem_ctrls.wrQLenPdf::61 0 # What write queue length does an incoming req see 186system.mem_ctrls.wrQLenPdf::62 0 # What write queue length does an incoming req see 187system.mem_ctrls.wrQLenPdf::63 0 # What write queue length does an incoming req see |
| 188system.mem_ctrls.bytesPerActivate::samples 271 # Bytes accessed per row activation 189system.mem_ctrls.bytesPerActivate::mean 293.313653 # Bytes accessed per row activation 190system.mem_ctrls.bytesPerActivate::gmean 193.377642 # Bytes accessed per row activation 191system.mem_ctrls.bytesPerActivate::stdev 283.497497 # Bytes accessed per row activation 192system.mem_ctrls.bytesPerActivate::0-127 72 26.57% 26.57% # Bytes accessed per row activation 193system.mem_ctrls.bytesPerActivate::128-255 83 30.63% 57.20% # Bytes accessed per row activation 194system.mem_ctrls.bytesPerActivate::256-383 37 13.65% 70.85% # Bytes accessed per row activation 195system.mem_ctrls.bytesPerActivate::384-511 23 8.49% 79.34% # Bytes accessed per row activation 196system.mem_ctrls.bytesPerActivate::512-639 21 7.75% 87.08% # Bytes accessed per row activation 197system.mem_ctrls.bytesPerActivate::640-767 5 1.85% 88.93% # Bytes accessed per row activation 198system.mem_ctrls.bytesPerActivate::768-895 7 2.58% 91.51% # Bytes accessed per row activation 199system.mem_ctrls.bytesPerActivate::896-1023 3 1.11% 92.62% # Bytes accessed per row activation 200system.mem_ctrls.bytesPerActivate::1024-1151 20 7.38% 100.00% # Bytes accessed per row activation 201system.mem_ctrls.bytesPerActivate::total 271 # Bytes accessed per row activation 202system.mem_ctrls.rdPerTurnAround::samples 38 # Reads before turning the bus around for writes 203system.mem_ctrls.rdPerTurnAround::mean 16.289474 # Reads before turning the bus around for writes 204system.mem_ctrls.rdPerTurnAround::gmean 16.048466 # Reads before turning the bus around for writes 205system.mem_ctrls.rdPerTurnAround::stdev 3.463383 # Reads before turning the bus around for writes 206system.mem_ctrls.rdPerTurnAround::12-13 1 2.63% 2.63% # Reads before turning the bus around for writes 207system.mem_ctrls.rdPerTurnAround::14-15 15 39.47% 42.11% # Reads before turning the bus around for writes 208system.mem_ctrls.rdPerTurnAround::16-17 16 42.11% 84.21% # Reads before turning the bus around for writes 209system.mem_ctrls.rdPerTurnAround::18-19 4 10.53% 94.74% # Reads before turning the bus around for writes 210system.mem_ctrls.rdPerTurnAround::20-21 1 2.63% 97.37% # Reads before turning the bus around for writes 211system.mem_ctrls.rdPerTurnAround::34-35 1 2.63% 100.00% # Reads before turning the bus around for writes 212system.mem_ctrls.rdPerTurnAround::total 38 # Reads before turning the bus around for writes 213system.mem_ctrls.wrPerTurnAround::samples 38 # Writes before turning the bus around for reads 214system.mem_ctrls.wrPerTurnAround::mean 16.421053 # Writes before turning the bus around for reads 215system.mem_ctrls.wrPerTurnAround::gmean 16.397539 # Writes before turning the bus around for reads 216system.mem_ctrls.wrPerTurnAround::stdev 0.919212 # Writes before turning the bus around for reads 217system.mem_ctrls.wrPerTurnAround::16 31 81.58% 81.58% # Writes before turning the bus around for reads 218system.mem_ctrls.wrPerTurnAround::18 5 13.16% 94.74% # Writes before turning the bus around for reads 219system.mem_ctrls.wrPerTurnAround::19 2 5.26% 100.00% # Writes before turning the bus around for reads 220system.mem_ctrls.wrPerTurnAround::total 38 # Writes before turning the bus around for reads 221system.mem_ctrls.totQLat 9303 # Total ticks spent queuing 222system.mem_ctrls.totMemAccLat 21273 # Total ticks spent from burst creation until serviced by the DRAM 223system.mem_ctrls.totBusLat 3150 # Total ticks spent in databus transfers 224system.mem_ctrls.avgQLat 14.77 # Average queueing delay per DRAM burst | 188system.mem_ctrls.bytesPerActivate::samples 263 # Bytes accessed per row activation 189system.mem_ctrls.bytesPerActivate::mean 304.669202 # Bytes accessed per row activation 190system.mem_ctrls.bytesPerActivate::gmean 201.653389 # Bytes accessed per row activation 191system.mem_ctrls.bytesPerActivate::stdev 284.735596 # Bytes accessed per row activation 192system.mem_ctrls.bytesPerActivate::0-127 72 27.38% 27.38% # Bytes accessed per row activation 193system.mem_ctrls.bytesPerActivate::128-255 68 25.86% 53.23% # Bytes accessed per row activation 194system.mem_ctrls.bytesPerActivate::256-383 44 16.73% 69.96% # Bytes accessed per row activation 195system.mem_ctrls.bytesPerActivate::384-511 29 11.03% 80.99% # Bytes accessed per row activation 196system.mem_ctrls.bytesPerActivate::512-639 12 4.56% 85.55% # Bytes accessed per row activation 197system.mem_ctrls.bytesPerActivate::640-767 9 3.42% 88.97% # Bytes accessed per row activation 198system.mem_ctrls.bytesPerActivate::768-895 6 2.28% 91.25% # Bytes accessed per row activation 199system.mem_ctrls.bytesPerActivate::896-1023 3 1.14% 92.40% # Bytes accessed per row activation 200system.mem_ctrls.bytesPerActivate::1024-1151 20 7.60% 100.00% # Bytes accessed per row activation 201system.mem_ctrls.bytesPerActivate::total 263 # Bytes accessed per row activation 202system.mem_ctrls.rdPerTurnAround::samples 40 # Reads before turning the bus around for writes 203system.mem_ctrls.rdPerTurnAround::mean 16.100000 # Reads before turning the bus around for writes 204system.mem_ctrls.rdPerTurnAround::gmean 15.846587 # Reads before turning the bus around for writes 205system.mem_ctrls.rdPerTurnAround::stdev 3.484765 # Reads before turning the bus around for writes 206system.mem_ctrls.rdPerTurnAround::12-13 3 7.50% 7.50% # Reads before turning the bus around for writes 207system.mem_ctrls.rdPerTurnAround::14-15 12 30.00% 37.50% # Reads before turning the bus around for writes 208system.mem_ctrls.rdPerTurnAround::16-17 19 47.50% 85.00% # Reads before turning the bus around for writes 209system.mem_ctrls.rdPerTurnAround::18-19 4 10.00% 95.00% # Reads before turning the bus around for writes 210system.mem_ctrls.rdPerTurnAround::20-21 1 2.50% 97.50% # Reads before turning the bus around for writes 211system.mem_ctrls.rdPerTurnAround::34-35 1 2.50% 100.00% # Reads before turning the bus around for writes 212system.mem_ctrls.rdPerTurnAround::total 40 # Reads before turning the bus around for writes 213system.mem_ctrls.wrPerTurnAround::samples 40 # Writes before turning the bus around for reads 214system.mem_ctrls.wrPerTurnAround::mean 16.300000 # Writes before turning the bus around for reads 215system.mem_ctrls.wrPerTurnAround::gmean 16.281263 # Writes before turning the bus around for reads 216system.mem_ctrls.wrPerTurnAround::stdev 0.822753 # Writes before turning the bus around for reads 217system.mem_ctrls.wrPerTurnAround::16 35 87.50% 87.50% # Writes before turning the bus around for reads 218system.mem_ctrls.wrPerTurnAround::18 3 7.50% 95.00% # Writes before turning the bus around for reads 219system.mem_ctrls.wrPerTurnAround::19 2 5.00% 100.00% # Writes before turning the bus around for reads 220system.mem_ctrls.wrPerTurnAround::total 40 # Writes before turning the bus around for reads 221system.mem_ctrls.totQLat 12721 # Total ticks spent queuing 222system.mem_ctrls.totMemAccLat 25014 # Total ticks spent from burst creation until serviced by the DRAM 223system.mem_ctrls.totBusLat 3235 # Total ticks spent in databus transfers 224system.mem_ctrls.avgQLat 19.66 # Average queueing delay per DRAM burst |
| 225system.mem_ctrls.avgBusLat 5.00 # Average bus latency per DRAM burst | 225system.mem_ctrls.avgBusLat 5.00 # Average bus latency per DRAM burst |
| 226system.mem_ctrls.avgMemAccLat 33.77 # Average memory access latency per DRAM burst 227system.mem_ctrls.avgRdBW 458.45 # Average DRAM read bandwidth in MiByte/s 228system.mem_ctrls.avgWrBW 454.09 # Average achieved write bandwidth in MiByte/s 229system.mem_ctrls.avgRdBWSys 1002.05 # Average system read bandwidth in MiByte/s 230system.mem_ctrls.avgWrBWSys 999.14 # Average system write bandwidth in MiByte/s | 226system.mem_ctrls.avgMemAccLat 38.66 # Average memory access latency per DRAM burst 227system.mem_ctrls.avgRdBW 450.78 # Average DRAM read bandwidth in MiByte/s 228system.mem_ctrls.avgWrBW 454.26 # Average achieved write bandwidth in MiByte/s 229system.mem_ctrls.avgRdBWSys 959.38 # Average system read bandwidth in MiByte/s 230system.mem_ctrls.avgWrBWSys 956.60 # Average system write bandwidth in MiByte/s |
| 231system.mem_ctrls.peakBW 12800.00 # Theoretical peak bandwidth in MiByte/s | 231system.mem_ctrls.peakBW 12800.00 # Theoretical peak bandwidth in MiByte/s |
| 232system.mem_ctrls.busUtil 7.13 # Data bus utilization in percentage 233system.mem_ctrls.busUtilRead 3.58 # Data bus utilization in percentage for reads | 232system.mem_ctrls.busUtil 7.07 # Data bus utilization in percentage 233system.mem_ctrls.busUtilRead 3.52 # Data bus utilization in percentage for reads |
| 234system.mem_ctrls.busUtilWrite 3.55 # Data bus utilization in percentage for writes 235system.mem_ctrls.avgRdQLen 1.00 # Average read queue length when enqueuing | 234system.mem_ctrls.busUtilWrite 3.55 # Data bus utilization in percentage for writes 235system.mem_ctrls.avgRdQLen 1.00 # Average read queue length when enqueuing |
| 236system.mem_ctrls.avgWrQLen 25.04 # Average write queue length when enqueuing 237system.mem_ctrls.readRowHits 420 # Number of row buffer hits during reads 238system.mem_ctrls.writeRowHits 556 # Number of row buffer hits during writes 239system.mem_ctrls.readRowHitRate 66.67 # Row buffer hit rate for reads 240system.mem_ctrls.writeRowHitRate 85.41 # Row buffer hit rate for writes 241system.mem_ctrls.avgGap 31.95 # Average gap between requests 242system.mem_ctrls.pageHitRate 76.19 # Row buffer hit rate, read and write combined 243system.mem_ctrls_0.actEnergy 657720 # Energy for activate commands per rank (pJ) 244system.mem_ctrls_0.preEnergy 365400 # Energy for precharge commands per rank (pJ) 245system.mem_ctrls_0.readEnergy 3407040 # Energy for read commands per rank (pJ) 246system.mem_ctrls_0.writeEnergy 2623104 # Energy for write commands per rank (pJ) 247system.mem_ctrls_0.refreshEnergy 5594160 # Energy for refresh commands per rank (pJ) 248system.mem_ctrls_0.actBackEnergy 51093432 # Energy for active background per rank (pJ) 249system.mem_ctrls_0.preBackEnergy 6724800 # Energy for precharge background per rank (pJ) 250system.mem_ctrls_0.totalEnergy 70465656 # Total energy per rank (pJ) 251system.mem_ctrls_0.averagePower 820.264661 # Core power per rank (mW) 252system.mem_ctrls_0.memoryStateTime::IDLE 10886 # Time in different power states 253system.mem_ctrls_0.memoryStateTime::REF 2860 # Time in different power states 254system.mem_ctrls_0.memoryStateTime::PRE_PDN 0 # Time in different power states 255system.mem_ctrls_0.memoryStateTime::ACT 72174 # Time in different power states 256system.mem_ctrls_0.memoryStateTime::ACT_PDN 0 # Time in different power states 257system.mem_ctrls_1.actEnergy 1368360 # Energy for activate commands per rank (pJ) 258system.mem_ctrls_1.preEnergy 760200 # Energy for precharge commands per rank (pJ) 259system.mem_ctrls_1.readEnergy 4268160 # Energy for read commands per rank (pJ) 260system.mem_ctrls_1.writeEnergy 3680640 # Energy for write commands per rank (pJ) 261system.mem_ctrls_1.refreshEnergy 5594160 # Energy for refresh commands per rank (pJ) 262system.mem_ctrls_1.actBackEnergy 54919728 # Energy for active background per rank (pJ) 263system.mem_ctrls_1.preBackEnergy 3368400 # Energy for precharge background per rank (pJ) 264system.mem_ctrls_1.totalEnergy 73959648 # Total energy per rank (pJ) 265system.mem_ctrls_1.averagePower 860.936931 # Core power per rank (mW) 266system.mem_ctrls_1.memoryStateTime::IDLE 5575 # Time in different power states 267system.mem_ctrls_1.memoryStateTime::REF 2860 # Time in different power states 268system.mem_ctrls_1.memoryStateTime::PRE_PDN 0 # Time in different power states 269system.mem_ctrls_1.memoryStateTime::ACT 77782 # Time in different power states 270system.mem_ctrls_1.memoryStateTime::ACT_PDN 0 # Time in different power states 271system.pwrStateResidencyTicks::UNDEFINED 87948 # Cumulative time (in ticks) in various power states | 236system.mem_ctrls.avgWrQLen 25.84 # Average write queue length when enqueuing 237system.mem_ctrls.readRowHits 435 # Number of row buffer hits during reads 238system.mem_ctrls.writeRowHits 591 # Number of row buffer hits during writes 239system.mem_ctrls.readRowHitRate 67.23 # Row buffer hit rate for reads 240system.mem_ctrls.writeRowHitRate 88.08 # Row buffer hit rate for writes 241system.mem_ctrls.avgGap 33.37 # Average gap between requests 242system.mem_ctrls.pageHitRate 77.85 # Row buffer hit rate, read and write combined 243system.mem_ctrls_0.actEnergy 664020 # Energy for activate commands per rank (pJ) 244system.mem_ctrls_0.preEnergy 340032 # Energy for precharge commands per rank (pJ) 245system.mem_ctrls_0.readEnergy 3175872 # Energy for read commands per rank (pJ) 246system.mem_ctrls_0.writeEnergy 2246688 # Energy for write commands per rank (pJ) 247system.mem_ctrls_0.refreshEnergy 7375680.000000 # Energy for refresh commands per rank (pJ) 248system.mem_ctrls_0.actBackEnergy 10273224 # Energy for active background per rank (pJ) 249system.mem_ctrls_0.preBackEnergy 269568 # Energy for precharge background per rank (pJ) 250system.mem_ctrls_0.actPowerDownEnergy 25208136 # Energy for active power-down per rank (pJ) 251system.mem_ctrls_0.prePowerDownEnergy 4818816 # Energy for precharge power-down per rank (pJ) 252system.mem_ctrls_0.selfRefreshEnergy 743760.000000 # Energy for self refresh per rank (pJ) 253system.mem_ctrls_0.totalEnergy 55115796 # Total energy per rank (pJ) 254system.mem_ctrls_0.averagePower 600.004311 # Core power per rank (mW) 255system.mem_ctrls_0.totalIdleTime 68393 # Total Idle time Per DRAM Rank 256system.mem_ctrls_0.memoryStateTime::IDLE 346 # Time in different power states 257system.mem_ctrls_0.memoryStateTime::REF 3126 # Time in different power states 258system.mem_ctrls_0.memoryStateTime::SREF 798 # Time in different power states 259system.mem_ctrls_0.memoryStateTime::PRE_PDN 12549 # Time in different power states 260system.mem_ctrls_0.memoryStateTime::ACT 19759 # Time in different power states 261system.mem_ctrls_0.memoryStateTime::ACT_PDN 55281 # Time in different power states 262system.mem_ctrls_1.actEnergy 1285200 # Energy for activate commands per rank (pJ) 263system.mem_ctrls_1.preEnergy 676200 # Energy for precharge commands per rank (pJ) 264system.mem_ctrls_1.readEnergy 4215456 # Energy for read commands per rank (pJ) 265system.mem_ctrls_1.writeEnergy 3198816 # Energy for write commands per rank (pJ) 266system.mem_ctrls_1.refreshEnergy 6761040.000000 # Energy for refresh commands per rank (pJ) 267system.mem_ctrls_1.actBackEnergy 9576912 # Energy for active background per rank (pJ) 268system.mem_ctrls_1.preBackEnergy 183552 # Energy for precharge background per rank (pJ) 269system.mem_ctrls_1.actPowerDownEnergy 28147512 # Energy for active power-down per rank (pJ) 270system.mem_ctrls_1.prePowerDownEnergy 3322368 # Energy for precharge power-down per rank (pJ) 271system.mem_ctrls_1.selfRefreshEnergy 0 # Energy for self refresh per rank (pJ) 272system.mem_ctrls_1.totalEnergy 57367056 # Total energy per rank (pJ) 273system.mem_ctrls_1.averagePower 624.512089 # Core power per rank (mW) 274system.mem_ctrls_1.totalIdleTime 70328 # Total Idle time Per DRAM Rank 275system.mem_ctrls_1.memoryStateTime::IDLE 150 # Time in different power states 276system.mem_ctrls_1.memoryStateTime::REF 2866 # Time in different power states 277system.mem_ctrls_1.memoryStateTime::SREF 0 # Time in different power states 278system.mem_ctrls_1.memoryStateTime::PRE_PDN 8652 # Time in different power states 279system.mem_ctrls_1.memoryStateTime::ACT 18464 # Time in different power states 280system.mem_ctrls_1.memoryStateTime::ACT_PDN 61727 # Time in different power states 281system.pwrStateResidencyTicks::UNDEFINED 91859 # Cumulative time (in ticks) in various power states |
| 272system.cpu.clk_domain.clock 1 # Clock period in ticks | 282system.cpu.clk_domain.clock 1 # Clock period in ticks |
| 273system.cpu.dtb.walker.pwrStateResidencyTicks::UNDEFINED 87948 # Cumulative time (in ticks) in various power states | 283system.cpu.dtb.walker.pwrStateResidencyTicks::UNDEFINED 91859 # Cumulative time (in ticks) in various power states |
| 274system.cpu.apic_clk_domain.clock 16 # Clock period in ticks | 284system.cpu.apic_clk_domain.clock 16 # Clock period in ticks |
| 275system.cpu.interrupts.pwrStateResidencyTicks::UNDEFINED 87948 # Cumulative time (in ticks) in various power states 276system.cpu.itb.walker.pwrStateResidencyTicks::UNDEFINED 87948 # Cumulative time (in ticks) in various power states | 285system.cpu.interrupts.pwrStateResidencyTicks::UNDEFINED 91859 # Cumulative time (in ticks) in various power states 286system.cpu.itb.walker.pwrStateResidencyTicks::UNDEFINED 91859 # Cumulative time (in ticks) in various power states |
| 277system.cpu.workload.num_syscalls 11 # Number of system calls | 287system.cpu.workload.num_syscalls 11 # Number of system calls |
| 278system.cpu.pwrStateResidencyTicks::ON 87948 # Cumulative time (in ticks) in various power states 279system.cpu.numCycles 87948 # number of cpu cycles simulated | 288system.cpu.pwrStateResidencyTicks::ON 91859 # Cumulative time (in ticks) in various power states 289system.cpu.numCycles 91859 # number of cpu cycles simulated |
| 280system.cpu.numWorkItemsStarted 0 # number of work items this cpu started 281system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed 282system.cpu.committedInsts 5381 # Number of instructions committed 283system.cpu.committedOps 9748 # Number of ops (including micro ops) committed 284system.cpu.num_int_alu_accesses 9654 # Number of integer alu accesses 285system.cpu.num_fp_alu_accesses 0 # Number of float alu accesses 286system.cpu.num_func_calls 209 # number of times a function call or return occured 287system.cpu.num_conditional_control_insts 899 # number of instructions that are conditional controls --- 4 unchanged lines hidden (view full) --- 292system.cpu.num_fp_register_reads 0 # number of times the floating registers were read 293system.cpu.num_fp_register_writes 0 # number of times the floating registers were written 294system.cpu.num_cc_register_reads 6487 # number of times the CC registers were read 295system.cpu.num_cc_register_writes 3536 # number of times the CC registers were written 296system.cpu.num_mem_refs 1988 # number of memory refs 297system.cpu.num_load_insts 1053 # Number of load instructions 298system.cpu.num_store_insts 935 # Number of store instructions 299system.cpu.num_idle_cycles 0.999989 # Number of idle cycles | 290system.cpu.numWorkItemsStarted 0 # number of work items this cpu started 291system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed 292system.cpu.committedInsts 5381 # Number of instructions committed 293system.cpu.committedOps 9748 # Number of ops (including micro ops) committed 294system.cpu.num_int_alu_accesses 9654 # Number of integer alu accesses 295system.cpu.num_fp_alu_accesses 0 # Number of float alu accesses 296system.cpu.num_func_calls 209 # number of times a function call or return occured 297system.cpu.num_conditional_control_insts 899 # number of instructions that are conditional controls --- 4 unchanged lines hidden (view full) --- 302system.cpu.num_fp_register_reads 0 # number of times the floating registers were read 303system.cpu.num_fp_register_writes 0 # number of times the floating registers were written 304system.cpu.num_cc_register_reads 6487 # number of times the CC registers were read 305system.cpu.num_cc_register_writes 3536 # number of times the CC registers were written 306system.cpu.num_mem_refs 1988 # number of memory refs 307system.cpu.num_load_insts 1053 # Number of load instructions 308system.cpu.num_store_insts 935 # Number of store instructions 309system.cpu.num_idle_cycles 0.999989 # Number of idle cycles |
| 300system.cpu.num_busy_cycles 87947.000011 # Number of busy cycles | 310system.cpu.num_busy_cycles 91858.000011 # Number of busy cycles |
| 301system.cpu.not_idle_fraction 0.999989 # Percentage of non-idle cycles 302system.cpu.idle_fraction 0.000011 # Percentage of idle cycles 303system.cpu.Branches 1208 # Number of branches fetched 304system.cpu.op_class::No_OpClass 1 0.01% 0.01% # Class of executed instruction 305system.cpu.op_class::IntAlu 7749 79.49% 79.50% # Class of executed instruction 306system.cpu.op_class::IntMult 3 0.03% 79.53% # Class of executed instruction 307system.cpu.op_class::IntDiv 7 0.07% 79.61% # Class of executed instruction 308system.cpu.op_class::FloatAdd 0 0.00% 79.61% # Class of executed instruction --- 23 unchanged lines hidden (view full) --- 332system.cpu.op_class::SimdFloatMultAcc 0 0.00% 79.61% # Class of executed instruction 333system.cpu.op_class::SimdFloatSqrt 0 0.00% 79.61% # Class of executed instruction 334system.cpu.op_class::MemRead 1053 10.80% 90.41% # Class of executed instruction 335system.cpu.op_class::MemWrite 935 9.59% 100.00% # Class of executed instruction 336system.cpu.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction 337system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction 338system.cpu.op_class::total 9748 # Class of executed instruction 339system.ruby.clk_domain.clock 1 # Clock period in ticks | 311system.cpu.not_idle_fraction 0.999989 # Percentage of non-idle cycles 312system.cpu.idle_fraction 0.000011 # Percentage of idle cycles 313system.cpu.Branches 1208 # Number of branches fetched 314system.cpu.op_class::No_OpClass 1 0.01% 0.01% # Class of executed instruction 315system.cpu.op_class::IntAlu 7749 79.49% 79.50% # Class of executed instruction 316system.cpu.op_class::IntMult 3 0.03% 79.53% # Class of executed instruction 317system.cpu.op_class::IntDiv 7 0.07% 79.61% # Class of executed instruction 318system.cpu.op_class::FloatAdd 0 0.00% 79.61% # Class of executed instruction --- 23 unchanged lines hidden (view full) --- 342system.cpu.op_class::SimdFloatMultAcc 0 0.00% 79.61% # Class of executed instruction 343system.cpu.op_class::SimdFloatSqrt 0 0.00% 79.61% # Class of executed instruction 344system.cpu.op_class::MemRead 1053 10.80% 90.41% # Class of executed instruction 345system.cpu.op_class::MemWrite 935 9.59% 100.00% # Class of executed instruction 346system.cpu.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction 347system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction 348system.cpu.op_class::total 9748 # Class of executed instruction 349system.ruby.clk_domain.clock 1 # Clock period in ticks |
| 340system.ruby.pwrStateResidencyTicks::UNDEFINED 87948 # Cumulative time (in ticks) in various power states | 350system.ruby.pwrStateResidencyTicks::UNDEFINED 91859 # Cumulative time (in ticks) in various power states |
| 341system.ruby.delayHist::bucket_size 1 # delay histogram for all message 342system.ruby.delayHist::max_bucket 9 # delay histogram for all message 343system.ruby.delayHist::samples 2750 # delay histogram for all message 344system.ruby.delayHist | 2750 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for all message 345system.ruby.delayHist::total 2750 # delay histogram for all message 346system.ruby.outstanding_req_hist_seqr::bucket_size 1 347system.ruby.outstanding_req_hist_seqr::max_bucket 9 348system.ruby.outstanding_req_hist_seqr::samples 8852 349system.ruby.outstanding_req_hist_seqr::mean 1 350system.ruby.outstanding_req_hist_seqr::gmean 1 351system.ruby.outstanding_req_hist_seqr | 0 0.00% 0.00% | 8852 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 352system.ruby.outstanding_req_hist_seqr::total 8852 353system.ruby.latency_hist_seqr::bucket_size 64 354system.ruby.latency_hist_seqr::max_bucket 639 355system.ruby.latency_hist_seqr::samples 8852 | 351system.ruby.delayHist::bucket_size 1 # delay histogram for all message 352system.ruby.delayHist::max_bucket 9 # delay histogram for all message 353system.ruby.delayHist::samples 2750 # delay histogram for all message 354system.ruby.delayHist | 2750 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for all message 355system.ruby.delayHist::total 2750 # delay histogram for all message 356system.ruby.outstanding_req_hist_seqr::bucket_size 1 357system.ruby.outstanding_req_hist_seqr::max_bucket 9 358system.ruby.outstanding_req_hist_seqr::samples 8852 359system.ruby.outstanding_req_hist_seqr::mean 1 360system.ruby.outstanding_req_hist_seqr::gmean 1 361system.ruby.outstanding_req_hist_seqr | 0 0.00% 0.00% | 8852 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 362system.ruby.outstanding_req_hist_seqr::total 8852 363system.ruby.latency_hist_seqr::bucket_size 64 364system.ruby.latency_hist_seqr::max_bucket 639 365system.ruby.latency_hist_seqr::samples 8852 |
| 356system.ruby.latency_hist_seqr::mean 8.935382 357system.ruby.latency_hist_seqr::gmean 1.815175 358system.ruby.latency_hist_seqr::stdev 22.675647 359system.ruby.latency_hist_seqr | 8624 97.42% 97.42% | 191 2.16% 99.58% | 24 0.27% 99.85% | 5 0.06% 99.91% | 2 0.02% 99.93% | 6 0.07% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 366system.ruby.latency_hist_seqr::mean 9.377203 367system.ruby.latency_hist_seqr::gmean 1.827971 368system.ruby.latency_hist_seqr::stdev 23.652747 369system.ruby.latency_hist_seqr | 8226 92.93% 92.93% | 589 6.65% 99.58% | 26 0.29% 99.88% | 4 0.05% 99.92% | 3 0.03% 99.95% | 4 0.05% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% |
| 360system.ruby.latency_hist_seqr::total 8852 361system.ruby.hit_latency_hist_seqr::bucket_size 1 362system.ruby.hit_latency_hist_seqr::max_bucket 9 363system.ruby.hit_latency_hist_seqr::samples 7475 364system.ruby.hit_latency_hist_seqr::mean 1 365system.ruby.hit_latency_hist_seqr::gmean 1 366system.ruby.hit_latency_hist_seqr | 0 0.00% 0.00% | 7475 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 367system.ruby.hit_latency_hist_seqr::total 7475 368system.ruby.miss_latency_hist_seqr::bucket_size 64 369system.ruby.miss_latency_hist_seqr::max_bucket 639 370system.ruby.miss_latency_hist_seqr::samples 1377 | 370system.ruby.latency_hist_seqr::total 8852 371system.ruby.hit_latency_hist_seqr::bucket_size 1 372system.ruby.hit_latency_hist_seqr::max_bucket 9 373system.ruby.hit_latency_hist_seqr::samples 7475 374system.ruby.hit_latency_hist_seqr::mean 1 375system.ruby.hit_latency_hist_seqr::gmean 1 376system.ruby.hit_latency_hist_seqr | 0 0.00% 0.00% | 7475 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 377system.ruby.hit_latency_hist_seqr::total 7475 378system.ruby.miss_latency_hist_seqr::bucket_size 64 379system.ruby.miss_latency_hist_seqr::max_bucket 639 380system.ruby.miss_latency_hist_seqr::samples 1377 |
| 371system.ruby.miss_latency_hist_seqr::mean 52.012346 372system.ruby.miss_latency_hist_seqr::gmean 46.179478 373system.ruby.miss_latency_hist_seqr::stdev 33.292581 374system.ruby.miss_latency_hist_seqr | 1149 83.44% 83.44% | 191 13.87% 97.31% | 24 1.74% 99.06% | 5 0.36% 99.42% | 2 0.15% 99.56% | 6 0.44% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 381system.ruby.miss_latency_hist_seqr::mean 54.852578 382system.ruby.miss_latency_hist_seqr::gmean 48.312712 383system.ruby.miss_latency_hist_seqr::stdev 33.880423 384system.ruby.miss_latency_hist_seqr | 751 54.54% 54.54% | 589 42.77% 97.31% | 26 1.89% 99.20% | 4 0.29% 99.49% | 3 0.22% 99.71% | 4 0.29% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% |
| 375system.ruby.miss_latency_hist_seqr::total 1377 376system.ruby.Directory.incomplete_times_seqr 1376 | 385system.ruby.miss_latency_hist_seqr::total 1377 386system.ruby.Directory.incomplete_times_seqr 1376 |
| 377system.ruby.dir_cntrl0.pwrStateResidencyTicks::UNDEFINED 87948 # Cumulative time (in ticks) in various power states | 387system.ruby.dir_cntrl0.pwrStateResidencyTicks::UNDEFINED 91859 # Cumulative time (in ticks) in various power states |
| 378system.ruby.l1_cntrl0.cacheMemory.demand_hits 7475 # Number of cache demand hits 379system.ruby.l1_cntrl0.cacheMemory.demand_misses 1377 # Number of cache demand misses 380system.ruby.l1_cntrl0.cacheMemory.demand_accesses 8852 # Number of cache demand accesses | 388system.ruby.l1_cntrl0.cacheMemory.demand_hits 7475 # Number of cache demand hits 389system.ruby.l1_cntrl0.cacheMemory.demand_misses 1377 # Number of cache demand misses 390system.ruby.l1_cntrl0.cacheMemory.demand_accesses 8852 # Number of cache demand accesses |
| 381system.ruby.l1_cntrl0.sequencer.pwrStateResidencyTicks::UNDEFINED 87948 # Cumulative time (in ticks) in various power states 382system.ruby.l1_cntrl0.pwrStateResidencyTicks::UNDEFINED 87948 # Cumulative time (in ticks) in various power states | 391system.ruby.l1_cntrl0.sequencer.pwrStateResidencyTicks::UNDEFINED 91859 # Cumulative time (in ticks) in various power states 392system.ruby.l1_cntrl0.pwrStateResidencyTicks::UNDEFINED 91859 # Cumulative time (in ticks) in various power states |
| 383system.ruby.memctrl_clk_domain.clock 3 # Clock period in ticks | 393system.ruby.memctrl_clk_domain.clock 3 # Clock period in ticks |
| 384system.ruby.network.routers0.pwrStateResidencyTicks::UNDEFINED 87948 # Cumulative time (in ticks) in various power states 385system.ruby.network.routers0.percent_links_utilized 7.817119 | 394system.ruby.network.routers0.pwrStateResidencyTicks::UNDEFINED 91859 # Cumulative time (in ticks) in various power states 395system.ruby.network.routers0.percent_links_utilized 7.484297 |
| 386system.ruby.network.routers0.msg_count.Control::2 1377 387system.ruby.network.routers0.msg_count.Data::2 1373 388system.ruby.network.routers0.msg_count.Response_Data::4 1377 389system.ruby.network.routers0.msg_count.Writeback_Control::3 1373 390system.ruby.network.routers0.msg_bytes.Control::2 11016 391system.ruby.network.routers0.msg_bytes.Data::2 98856 392system.ruby.network.routers0.msg_bytes.Response_Data::4 99144 393system.ruby.network.routers0.msg_bytes.Writeback_Control::3 10984 | 396system.ruby.network.routers0.msg_count.Control::2 1377 397system.ruby.network.routers0.msg_count.Data::2 1373 398system.ruby.network.routers0.msg_count.Response_Data::4 1377 399system.ruby.network.routers0.msg_count.Writeback_Control::3 1373 400system.ruby.network.routers0.msg_bytes.Control::2 11016 401system.ruby.network.routers0.msg_bytes.Data::2 98856 402system.ruby.network.routers0.msg_bytes.Response_Data::4 99144 403system.ruby.network.routers0.msg_bytes.Writeback_Control::3 10984 |
| 394system.ruby.network.routers1.pwrStateResidencyTicks::UNDEFINED 87948 # Cumulative time (in ticks) in various power states 395system.ruby.network.routers1.percent_links_utilized 7.817119 | 404system.ruby.network.routers1.pwrStateResidencyTicks::UNDEFINED 91859 # Cumulative time (in ticks) in various power states 405system.ruby.network.routers1.percent_links_utilized 7.484297 |
| 396system.ruby.network.routers1.msg_count.Control::2 1377 397system.ruby.network.routers1.msg_count.Data::2 1373 398system.ruby.network.routers1.msg_count.Response_Data::4 1377 399system.ruby.network.routers1.msg_count.Writeback_Control::3 1373 400system.ruby.network.routers1.msg_bytes.Control::2 11016 401system.ruby.network.routers1.msg_bytes.Data::2 98856 402system.ruby.network.routers1.msg_bytes.Response_Data::4 99144 403system.ruby.network.routers1.msg_bytes.Writeback_Control::3 10984 | 406system.ruby.network.routers1.msg_count.Control::2 1377 407system.ruby.network.routers1.msg_count.Data::2 1373 408system.ruby.network.routers1.msg_count.Response_Data::4 1377 409system.ruby.network.routers1.msg_count.Writeback_Control::3 1373 410system.ruby.network.routers1.msg_bytes.Control::2 11016 411system.ruby.network.routers1.msg_bytes.Data::2 98856 412system.ruby.network.routers1.msg_bytes.Response_Data::4 99144 413system.ruby.network.routers1.msg_bytes.Writeback_Control::3 10984 |
| 404system.ruby.network.routers2.pwrStateResidencyTicks::UNDEFINED 87948 # Cumulative time (in ticks) in various power states 405system.ruby.network.routers2.percent_links_utilized 7.817119 | 414system.ruby.network.routers2.pwrStateResidencyTicks::UNDEFINED 91859 # Cumulative time (in ticks) in various power states 415system.ruby.network.routers2.percent_links_utilized 7.484297 |
| 406system.ruby.network.routers2.msg_count.Control::2 1377 407system.ruby.network.routers2.msg_count.Data::2 1373 408system.ruby.network.routers2.msg_count.Response_Data::4 1377 409system.ruby.network.routers2.msg_count.Writeback_Control::3 1373 410system.ruby.network.routers2.msg_bytes.Control::2 11016 411system.ruby.network.routers2.msg_bytes.Data::2 98856 412system.ruby.network.routers2.msg_bytes.Response_Data::4 99144 413system.ruby.network.routers2.msg_bytes.Writeback_Control::3 10984 | 416system.ruby.network.routers2.msg_count.Control::2 1377 417system.ruby.network.routers2.msg_count.Data::2 1373 418system.ruby.network.routers2.msg_count.Response_Data::4 1377 419system.ruby.network.routers2.msg_count.Writeback_Control::3 1373 420system.ruby.network.routers2.msg_bytes.Control::2 11016 421system.ruby.network.routers2.msg_bytes.Data::2 98856 422system.ruby.network.routers2.msg_bytes.Response_Data::4 99144 423system.ruby.network.routers2.msg_bytes.Writeback_Control::3 10984 |
| 414system.ruby.network.pwrStateResidencyTicks::UNDEFINED 87948 # Cumulative time (in ticks) in various power states | 424system.ruby.network.pwrStateResidencyTicks::UNDEFINED 91859 # Cumulative time (in ticks) in various power states |
| 415system.ruby.network.msg_count.Control 4131 416system.ruby.network.msg_count.Data 4119 417system.ruby.network.msg_count.Response_Data 4131 418system.ruby.network.msg_count.Writeback_Control 4119 419system.ruby.network.msg_byte.Control 33048 420system.ruby.network.msg_byte.Data 296568 421system.ruby.network.msg_byte.Response_Data 297432 422system.ruby.network.msg_byte.Writeback_Control 32952 | 425system.ruby.network.msg_count.Control 4131 426system.ruby.network.msg_count.Data 4119 427system.ruby.network.msg_count.Response_Data 4131 428system.ruby.network.msg_count.Writeback_Control 4119 429system.ruby.network.msg_byte.Control 33048 430system.ruby.network.msg_byte.Data 296568 431system.ruby.network.msg_byte.Response_Data 297432 432system.ruby.network.msg_byte.Writeback_Control 32952 |
| 423system.sys_port_proxy.pwrStateResidencyTicks::UNDEFINED 87948 # Cumulative time (in ticks) in various power states 424system.ruby.network.routers0.throttle0.link_utilization 7.826215 | 433system.sys_port_proxy.pwrStateResidencyTicks::UNDEFINED 91859 # Cumulative time (in ticks) in various power states 434system.ruby.network.routers0.throttle0.link_utilization 7.493006 |
| 425system.ruby.network.routers0.throttle0.msg_count.Response_Data::4 1377 426system.ruby.network.routers0.throttle0.msg_count.Writeback_Control::3 1373 427system.ruby.network.routers0.throttle0.msg_bytes.Response_Data::4 99144 428system.ruby.network.routers0.throttle0.msg_bytes.Writeback_Control::3 10984 | 435system.ruby.network.routers0.throttle0.msg_count.Response_Data::4 1377 436system.ruby.network.routers0.throttle0.msg_count.Writeback_Control::3 1373 437system.ruby.network.routers0.throttle0.msg_bytes.Response_Data::4 99144 438system.ruby.network.routers0.throttle0.msg_bytes.Writeback_Control::3 10984 |
| 429system.ruby.network.routers0.throttle1.link_utilization 7.808023 | 439system.ruby.network.routers0.throttle1.link_utilization 7.475588 |
| 430system.ruby.network.routers0.throttle1.msg_count.Control::2 1377 431system.ruby.network.routers0.throttle1.msg_count.Data::2 1373 432system.ruby.network.routers0.throttle1.msg_bytes.Control::2 11016 433system.ruby.network.routers0.throttle1.msg_bytes.Data::2 98856 | 440system.ruby.network.routers0.throttle1.msg_count.Control::2 1377 441system.ruby.network.routers0.throttle1.msg_count.Data::2 1373 442system.ruby.network.routers0.throttle1.msg_bytes.Control::2 11016 443system.ruby.network.routers0.throttle1.msg_bytes.Data::2 98856 |
| 434system.ruby.network.routers1.throttle0.link_utilization 7.808023 | 444system.ruby.network.routers1.throttle0.link_utilization 7.475588 |
| 435system.ruby.network.routers1.throttle0.msg_count.Control::2 1377 436system.ruby.network.routers1.throttle0.msg_count.Data::2 1373 437system.ruby.network.routers1.throttle0.msg_bytes.Control::2 11016 438system.ruby.network.routers1.throttle0.msg_bytes.Data::2 98856 | 445system.ruby.network.routers1.throttle0.msg_count.Control::2 1377 446system.ruby.network.routers1.throttle0.msg_count.Data::2 1373 447system.ruby.network.routers1.throttle0.msg_bytes.Control::2 11016 448system.ruby.network.routers1.throttle0.msg_bytes.Data::2 98856 |
| 439system.ruby.network.routers1.throttle1.link_utilization 7.826215 | 449system.ruby.network.routers1.throttle1.link_utilization 7.493006 |
| 440system.ruby.network.routers1.throttle1.msg_count.Response_Data::4 1377 441system.ruby.network.routers1.throttle1.msg_count.Writeback_Control::3 1373 442system.ruby.network.routers1.throttle1.msg_bytes.Response_Data::4 99144 443system.ruby.network.routers1.throttle1.msg_bytes.Writeback_Control::3 10984 | 450system.ruby.network.routers1.throttle1.msg_count.Response_Data::4 1377 451system.ruby.network.routers1.throttle1.msg_count.Writeback_Control::3 1373 452system.ruby.network.routers1.throttle1.msg_bytes.Response_Data::4 99144 453system.ruby.network.routers1.throttle1.msg_bytes.Writeback_Control::3 10984 |
| 444system.ruby.network.routers2.throttle0.link_utilization 7.826215 | 454system.ruby.network.routers2.throttle0.link_utilization 7.493006 |
| 445system.ruby.network.routers2.throttle0.msg_count.Response_Data::4 1377 446system.ruby.network.routers2.throttle0.msg_count.Writeback_Control::3 1373 447system.ruby.network.routers2.throttle0.msg_bytes.Response_Data::4 99144 448system.ruby.network.routers2.throttle0.msg_bytes.Writeback_Control::3 10984 | 455system.ruby.network.routers2.throttle0.msg_count.Response_Data::4 1377 456system.ruby.network.routers2.throttle0.msg_count.Writeback_Control::3 1373 457system.ruby.network.routers2.throttle0.msg_bytes.Response_Data::4 99144 458system.ruby.network.routers2.throttle0.msg_bytes.Writeback_Control::3 10984 |
| 449system.ruby.network.routers2.throttle1.link_utilization 7.808023 | 459system.ruby.network.routers2.throttle1.link_utilization 7.475588 |
| 450system.ruby.network.routers2.throttle1.msg_count.Control::2 1377 451system.ruby.network.routers2.throttle1.msg_count.Data::2 1373 452system.ruby.network.routers2.throttle1.msg_bytes.Control::2 11016 453system.ruby.network.routers2.throttle1.msg_bytes.Data::2 98856 454system.ruby.delayVCHist.vnet_1::bucket_size 1 # delay histogram for vnet_1 455system.ruby.delayVCHist.vnet_1::max_bucket 9 # delay histogram for vnet_1 456system.ruby.delayVCHist.vnet_1::samples 1377 # delay histogram for vnet_1 457system.ruby.delayVCHist.vnet_1 | 1377 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for vnet_1 458system.ruby.delayVCHist.vnet_1::total 1377 # delay histogram for vnet_1 459system.ruby.delayVCHist.vnet_2::bucket_size 1 # delay histogram for vnet_2 460system.ruby.delayVCHist.vnet_2::max_bucket 9 # delay histogram for vnet_2 461system.ruby.delayVCHist.vnet_2::samples 1373 # delay histogram for vnet_2 462system.ruby.delayVCHist.vnet_2 | 1373 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for vnet_2 463system.ruby.delayVCHist.vnet_2::total 1373 # delay histogram for vnet_2 464system.ruby.LD.latency_hist_seqr::bucket_size 32 465system.ruby.LD.latency_hist_seqr::max_bucket 319 466system.ruby.LD.latency_hist_seqr::samples 1045 | 460system.ruby.network.routers2.throttle1.msg_count.Control::2 1377 461system.ruby.network.routers2.throttle1.msg_count.Data::2 1373 462system.ruby.network.routers2.throttle1.msg_bytes.Control::2 11016 463system.ruby.network.routers2.throttle1.msg_bytes.Data::2 98856 464system.ruby.delayVCHist.vnet_1::bucket_size 1 # delay histogram for vnet_1 465system.ruby.delayVCHist.vnet_1::max_bucket 9 # delay histogram for vnet_1 466system.ruby.delayVCHist.vnet_1::samples 1377 # delay histogram for vnet_1 467system.ruby.delayVCHist.vnet_1 | 1377 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for vnet_1 468system.ruby.delayVCHist.vnet_1::total 1377 # delay histogram for vnet_1 469system.ruby.delayVCHist.vnet_2::bucket_size 1 # delay histogram for vnet_2 470system.ruby.delayVCHist.vnet_2::max_bucket 9 # delay histogram for vnet_2 471system.ruby.delayVCHist.vnet_2::samples 1373 # delay histogram for vnet_2 472system.ruby.delayVCHist.vnet_2 | 1373 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for vnet_2 473system.ruby.delayVCHist.vnet_2::total 1373 # delay histogram for vnet_2 474system.ruby.LD.latency_hist_seqr::bucket_size 32 475system.ruby.LD.latency_hist_seqr::max_bucket 319 476system.ruby.LD.latency_hist_seqr::samples 1045 |
| 467system.ruby.LD.latency_hist_seqr::mean 22.607656 468system.ruby.LD.latency_hist_seqr::gmean 5.952637 469system.ruby.LD.latency_hist_seqr::stdev 28.358291 470system.ruby.LD.latency_hist_seqr | 546 52.25% 52.25% | 420 40.19% 92.44% | 70 6.70% 99.14% | 2 0.19% 99.33% | 2 0.19% 99.52% | 4 0.38% 99.90% | 0 0.00% 99.90% | 1 0.10% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 477system.ruby.LD.latency_hist_seqr::mean 23.607656 478system.ruby.LD.latency_hist_seqr::gmean 6.057935 479system.ruby.LD.latency_hist_seqr::stdev 29.475705 480system.ruby.LD.latency_hist_seqr | 546 52.25% 52.25% | 330 31.58% 83.83% | 162 15.50% 99.33% | 1 0.10% 99.43% | 4 0.38% 99.81% | 1 0.10% 99.90% | 0 0.00% 99.90% | 1 0.10% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% |
| 471system.ruby.LD.latency_hist_seqr::total 1045 472system.ruby.LD.hit_latency_hist_seqr::bucket_size 1 473system.ruby.LD.hit_latency_hist_seqr::max_bucket 9 474system.ruby.LD.hit_latency_hist_seqr::samples 546 475system.ruby.LD.hit_latency_hist_seqr::mean 1 476system.ruby.LD.hit_latency_hist_seqr::gmean 1 477system.ruby.LD.hit_latency_hist_seqr | 0 0.00% 0.00% | 546 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 478system.ruby.LD.hit_latency_hist_seqr::total 546 479system.ruby.LD.miss_latency_hist_seqr::bucket_size 32 480system.ruby.LD.miss_latency_hist_seqr::max_bucket 319 481system.ruby.LD.miss_latency_hist_seqr::samples 499 | 481system.ruby.LD.latency_hist_seqr::total 1045 482system.ruby.LD.hit_latency_hist_seqr::bucket_size 1 483system.ruby.LD.hit_latency_hist_seqr::max_bucket 9 484system.ruby.LD.hit_latency_hist_seqr::samples 546 485system.ruby.LD.hit_latency_hist_seqr::mean 1 486system.ruby.LD.hit_latency_hist_seqr::gmean 1 487system.ruby.LD.hit_latency_hist_seqr | 0 0.00% 0.00% | 546 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 488system.ruby.LD.hit_latency_hist_seqr::total 546 489system.ruby.LD.miss_latency_hist_seqr::bucket_size 32 490system.ruby.LD.miss_latency_hist_seqr::max_bucket 319 491system.ruby.LD.miss_latency_hist_seqr::samples 499 |
| 482system.ruby.LD.miss_latency_hist_seqr::mean 46.250501 483system.ruby.LD.miss_latency_hist_seqr::gmean 41.916728 484system.ruby.LD.miss_latency_hist_seqr::stdev 24.776985 485system.ruby.LD.miss_latency_hist_seqr | 0 0.00% 0.00% | 420 84.17% 84.17% | 70 14.03% 98.20% | 2 0.40% 98.60% | 2 0.40% 99.00% | 4 0.80% 99.80% | 0 0.00% 99.80% | 1 0.20% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 492system.ruby.LD.miss_latency_hist_seqr::mean 48.344689 493system.ruby.LD.miss_latency_hist_seqr::gmean 43.484561 494system.ruby.LD.miss_latency_hist_seqr::stdev 25.453032 495system.ruby.LD.miss_latency_hist_seqr | 0 0.00% 0.00% | 330 66.13% 66.13% | 162 32.46% 98.60% | 1 0.20% 98.80% | 4 0.80% 99.60% | 1 0.20% 99.80% | 0 0.00% 99.80% | 1 0.20% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% |
| 486system.ruby.LD.miss_latency_hist_seqr::total 499 487system.ruby.ST.latency_hist_seqr::bucket_size 64 488system.ruby.ST.latency_hist_seqr::max_bucket 639 489system.ruby.ST.latency_hist_seqr::samples 935 | 496system.ruby.LD.miss_latency_hist_seqr::total 499 497system.ruby.ST.latency_hist_seqr::bucket_size 64 498system.ruby.ST.latency_hist_seqr::max_bucket 639 499system.ruby.ST.latency_hist_seqr::samples 935 |
| 490system.ruby.ST.latency_hist_seqr::mean 15.124064 491system.ruby.ST.latency_hist_seqr::gmean 2.829099 492system.ruby.ST.latency_hist_seqr::stdev 31.003309 493system.ruby.ST.latency_hist_seqr | 897 95.94% 95.94% | 28 2.99% 98.93% | 5 0.53% 99.47% | 3 0.32% 99.79% | 0 0.00% 99.79% | 2 0.21% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 500system.ruby.ST.latency_hist_seqr::mean 16.455615 501system.ruby.ST.latency_hist_seqr::gmean 2.877223 502system.ruby.ST.latency_hist_seqr::stdev 34.720603 503system.ruby.ST.latency_hist_seqr | 821 87.81% 87.81% | 102 10.91% 98.72% | 6 0.64% 99.36% | 2 0.21% 99.57% | 2 0.21% 99.79% | 2 0.21% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% |
| 494system.ruby.ST.latency_hist_seqr::total 935 495system.ruby.ST.hit_latency_hist_seqr::bucket_size 1 496system.ruby.ST.hit_latency_hist_seqr::max_bucket 9 497system.ruby.ST.hit_latency_hist_seqr::samples 681 498system.ruby.ST.hit_latency_hist_seqr::mean 1 499system.ruby.ST.hit_latency_hist_seqr::gmean 1 500system.ruby.ST.hit_latency_hist_seqr | 0 0.00% 0.00% | 681 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 501system.ruby.ST.hit_latency_hist_seqr::total 681 502system.ruby.ST.miss_latency_hist_seqr::bucket_size 64 503system.ruby.ST.miss_latency_hist_seqr::max_bucket 639 504system.ruby.ST.miss_latency_hist_seqr::samples 254 | 504system.ruby.ST.latency_hist_seqr::total 935 505system.ruby.ST.hit_latency_hist_seqr::bucket_size 1 506system.ruby.ST.hit_latency_hist_seqr::max_bucket 9 507system.ruby.ST.hit_latency_hist_seqr::samples 681 508system.ruby.ST.hit_latency_hist_seqr::mean 1 509system.ruby.ST.hit_latency_hist_seqr::gmean 1 510system.ruby.ST.hit_latency_hist_seqr | 0 0.00% 0.00% | 681 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 511system.ruby.ST.hit_latency_hist_seqr::total 681 512system.ruby.ST.miss_latency_hist_seqr::bucket_size 64 513system.ruby.ST.miss_latency_hist_seqr::max_bucket 639 514system.ruby.ST.miss_latency_hist_seqr::samples 254 |
| 505system.ruby.ST.miss_latency_hist_seqr::mean 52.992126 506system.ruby.ST.miss_latency_hist_seqr::gmean 45.979346 507system.ruby.ST.miss_latency_hist_seqr::stdev 39.646660 508system.ruby.ST.miss_latency_hist_seqr | 216 85.04% 85.04% | 28 11.02% 96.06% | 5 1.97% 98.03% | 3 1.18% 99.21% | 0 0.00% 99.21% | 2 0.79% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 515system.ruby.ST.miss_latency_hist_seqr::mean 57.893701 516system.ruby.ST.miss_latency_hist_seqr::gmean 48.924758 517system.ruby.ST.miss_latency_hist_seqr::stdev 45.645746 518system.ruby.ST.miss_latency_hist_seqr | 140 55.12% 55.12% | 102 40.16% 95.28% | 6 2.36% 97.64% | 2 0.79% 98.43% | 2 0.79% 99.21% | 2 0.79% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% |
| 509system.ruby.ST.miss_latency_hist_seqr::total 254 510system.ruby.IFETCH.latency_hist_seqr::bucket_size 64 511system.ruby.IFETCH.latency_hist_seqr::max_bucket 639 512system.ruby.IFETCH.latency_hist_seqr::samples 6864 | 519system.ruby.ST.miss_latency_hist_seqr::total 254 520system.ruby.IFETCH.latency_hist_seqr::bucket_size 64 521system.ruby.IFETCH.latency_hist_seqr::max_bucket 639 522system.ruby.IFETCH.latency_hist_seqr::samples 6864 |
| 513system.ruby.IFETCH.latency_hist_seqr::mean 6.015589 514system.ruby.IFETCH.latency_hist_seqr::gmean 1.426336 515system.ruby.IFETCH.latency_hist_seqr::stdev 19.173758 516system.ruby.IFETCH.latency_hist_seqr | 6753 98.38% 98.38% | 91 1.33% 99.71% | 13 0.19% 99.90% | 1 0.01% 99.91% | 2 0.03% 99.94% | 4 0.06% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 523system.ruby.IFETCH.latency_hist_seqr::mean 6.251748 524system.ruby.IFETCH.latency_hist_seqr::gmean 1.432185 525system.ruby.IFETCH.latency_hist_seqr::stdev 19.434647 526system.ruby.IFETCH.latency_hist_seqr | 6521 95.00% 95.00% | 324 4.72% 99.72% | 15 0.22% 99.94% | 1 0.01% 99.96% | 1 0.01% 99.97% | 2 0.03% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% |
| 517system.ruby.IFETCH.latency_hist_seqr::total 6864 518system.ruby.IFETCH.hit_latency_hist_seqr::bucket_size 1 519system.ruby.IFETCH.hit_latency_hist_seqr::max_bucket 9 520system.ruby.IFETCH.hit_latency_hist_seqr::samples 6241 521system.ruby.IFETCH.hit_latency_hist_seqr::mean 1 522system.ruby.IFETCH.hit_latency_hist_seqr::gmean 1 523system.ruby.IFETCH.hit_latency_hist_seqr | 0 0.00% 0.00% | 6241 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 524system.ruby.IFETCH.hit_latency_hist_seqr::total 6241 525system.ruby.IFETCH.miss_latency_hist_seqr::bucket_size 64 526system.ruby.IFETCH.miss_latency_hist_seqr::max_bucket 639 527system.ruby.IFETCH.miss_latency_hist_seqr::samples 623 | 527system.ruby.IFETCH.latency_hist_seqr::total 6864 528system.ruby.IFETCH.hit_latency_hist_seqr::bucket_size 1 529system.ruby.IFETCH.hit_latency_hist_seqr::max_bucket 9 530system.ruby.IFETCH.hit_latency_hist_seqr::samples 6241 531system.ruby.IFETCH.hit_latency_hist_seqr::mean 1 532system.ruby.IFETCH.hit_latency_hist_seqr::gmean 1 533system.ruby.IFETCH.hit_latency_hist_seqr | 0 0.00% 0.00% | 6241 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 534system.ruby.IFETCH.hit_latency_hist_seqr::total 6241 535system.ruby.IFETCH.miss_latency_hist_seqr::bucket_size 64 536system.ruby.IFETCH.miss_latency_hist_seqr::max_bucket 639 537system.ruby.IFETCH.miss_latency_hist_seqr::samples 623 |
| 528system.ruby.IFETCH.miss_latency_hist_seqr::mean 56.260032 529system.ruby.IFETCH.miss_latency_hist_seqr::gmean 50.022291 530system.ruby.IFETCH.miss_latency_hist_seqr::stdev 35.712767 531system.ruby.IFETCH.miss_latency_hist_seqr | 512 82.18% 82.18% | 91 14.61% 96.79% | 13 2.09% 98.88% | 1 0.16% 99.04% | 2 0.32% 99.36% | 4 0.64% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 538system.ruby.IFETCH.miss_latency_hist_seqr::mean 58.861958 539system.ruby.IFETCH.miss_latency_hist_seqr::gmean 52.329270 540system.ruby.IFETCH.miss_latency_hist_seqr::stdev 33.443818 541system.ruby.IFETCH.miss_latency_hist_seqr | 280 44.94% 44.94% | 324 52.01% 96.95% | 15 2.41% 99.36% | 1 0.16% 99.52% | 1 0.16% 99.68% | 2 0.32% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% |
| 532system.ruby.IFETCH.miss_latency_hist_seqr::total 623 533system.ruby.RMW_Read.latency_hist_seqr::bucket_size 4 534system.ruby.RMW_Read.latency_hist_seqr::max_bucket 39 535system.ruby.RMW_Read.latency_hist_seqr::samples 8 536system.ruby.RMW_Read.latency_hist_seqr::mean 4.875000 537system.ruby.RMW_Read.latency_hist_seqr::gmean 1.542211 538system.ruby.RMW_Read.latency_hist_seqr::stdev 10.960155 539system.ruby.RMW_Read.latency_hist_seqr | 7 87.50% 87.50% | 0 0.00% 87.50% | 0 0.00% 87.50% | 0 0.00% 87.50% | 0 0.00% 87.50% | 0 0.00% 87.50% | 0 0.00% 87.50% | 0 0.00% 87.50% | 1 12.50% 100.00% | 0 0.00% 100.00% --- 11 unchanged lines hidden (view full) --- 551system.ruby.RMW_Read.miss_latency_hist_seqr::mean 32 552system.ruby.RMW_Read.miss_latency_hist_seqr::gmean 32 553system.ruby.RMW_Read.miss_latency_hist_seqr::stdev nan 554system.ruby.RMW_Read.miss_latency_hist_seqr | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1 100.00% 100.00% | 0 0.00% 100.00% 555system.ruby.RMW_Read.miss_latency_hist_seqr::total 1 556system.ruby.Directory.miss_mach_latency_hist_seqr::bucket_size 64 557system.ruby.Directory.miss_mach_latency_hist_seqr::max_bucket 639 558system.ruby.Directory.miss_mach_latency_hist_seqr::samples 1377 | 542system.ruby.IFETCH.miss_latency_hist_seqr::total 623 543system.ruby.RMW_Read.latency_hist_seqr::bucket_size 4 544system.ruby.RMW_Read.latency_hist_seqr::max_bucket 39 545system.ruby.RMW_Read.latency_hist_seqr::samples 8 546system.ruby.RMW_Read.latency_hist_seqr::mean 4.875000 547system.ruby.RMW_Read.latency_hist_seqr::gmean 1.542211 548system.ruby.RMW_Read.latency_hist_seqr::stdev 10.960155 549system.ruby.RMW_Read.latency_hist_seqr | 7 87.50% 87.50% | 0 0.00% 87.50% | 0 0.00% 87.50% | 0 0.00% 87.50% | 0 0.00% 87.50% | 0 0.00% 87.50% | 0 0.00% 87.50% | 0 0.00% 87.50% | 1 12.50% 100.00% | 0 0.00% 100.00% --- 11 unchanged lines hidden (view full) --- 561system.ruby.RMW_Read.miss_latency_hist_seqr::mean 32 562system.ruby.RMW_Read.miss_latency_hist_seqr::gmean 32 563system.ruby.RMW_Read.miss_latency_hist_seqr::stdev nan 564system.ruby.RMW_Read.miss_latency_hist_seqr | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1 100.00% 100.00% | 0 0.00% 100.00% 565system.ruby.RMW_Read.miss_latency_hist_seqr::total 1 566system.ruby.Directory.miss_mach_latency_hist_seqr::bucket_size 64 567system.ruby.Directory.miss_mach_latency_hist_seqr::max_bucket 639 568system.ruby.Directory.miss_mach_latency_hist_seqr::samples 1377 |
| 559system.ruby.Directory.miss_mach_latency_hist_seqr::mean 52.012346 560system.ruby.Directory.miss_mach_latency_hist_seqr::gmean 46.179478 561system.ruby.Directory.miss_mach_latency_hist_seqr::stdev 33.292581 562system.ruby.Directory.miss_mach_latency_hist_seqr | 1149 83.44% 83.44% | 191 13.87% 97.31% | 24 1.74% 99.06% | 5 0.36% 99.42% | 2 0.15% 99.56% | 6 0.44% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 569system.ruby.Directory.miss_mach_latency_hist_seqr::mean 54.852578 570system.ruby.Directory.miss_mach_latency_hist_seqr::gmean 48.312712 571system.ruby.Directory.miss_mach_latency_hist_seqr::stdev 33.880423 572system.ruby.Directory.miss_mach_latency_hist_seqr | 751 54.54% 54.54% | 589 42.77% 97.31% | 26 1.89% 99.20% | 4 0.29% 99.49% | 3 0.22% 99.71% | 4 0.29% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% |
| 563system.ruby.Directory.miss_mach_latency_hist_seqr::total 1377 564system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::bucket_size 1 565system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::max_bucket 9 566system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::samples 1 567system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::stdev nan 568system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request | 1 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 569system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::total 1 570system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward::bucket_size 1 --- 14 unchanged lines hidden (view full) --- 585system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::mean 75 586system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::gmean 75.000000 587system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::stdev nan 588system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1 100.00% 100.00% 589system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::total 1 590system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::bucket_size 32 591system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::max_bucket 319 592system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::samples 499 | 573system.ruby.Directory.miss_mach_latency_hist_seqr::total 1377 574system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::bucket_size 1 575system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::max_bucket 9 576system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::samples 1 577system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::stdev nan 578system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request | 1 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 579system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::total 1 580system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward::bucket_size 1 --- 14 unchanged lines hidden (view full) --- 595system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::mean 75 596system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::gmean 75.000000 597system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::stdev nan 598system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1 100.00% 100.00% 599system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::total 1 600system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::bucket_size 32 601system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::max_bucket 319 602system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::samples 499 |
| 593system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::mean 46.250501 594system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::gmean 41.916728 595system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::stdev 24.776985 596system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr | 0 0.00% 0.00% | 420 84.17% 84.17% | 70 14.03% 98.20% | 2 0.40% 98.60% | 2 0.40% 99.00% | 4 0.80% 99.80% | 0 0.00% 99.80% | 1 0.20% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 603system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::mean 48.344689 604system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::gmean 43.484561 605system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::stdev 25.453032 606system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr | 0 0.00% 0.00% | 330 66.13% 66.13% | 162 32.46% 98.60% | 1 0.20% 98.80% | 4 0.80% 99.60% | 1 0.20% 99.80% | 0 0.00% 99.80% | 1 0.20% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% |
| 597system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::total 499 598system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::bucket_size 64 599system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::max_bucket 639 600system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::samples 254 | 607system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::total 499 608system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::bucket_size 64 609system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::max_bucket 639 610system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::samples 254 |
| 601system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::mean 52.992126 602system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::gmean 45.979346 603system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::stdev 39.646660 604system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr | 216 85.04% 85.04% | 28 11.02% 96.06% | 5 1.97% 98.03% | 3 1.18% 99.21% | 0 0.00% 99.21% | 2 0.79% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 611system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::mean 57.893701 612system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::gmean 48.924758 613system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::stdev 45.645746 614system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr | 140 55.12% 55.12% | 102 40.16% 95.28% | 6 2.36% 97.64% | 2 0.79% 98.43% | 2 0.79% 99.21% | 2 0.79% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% |
| 605system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::total 254 606system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::bucket_size 64 607system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::max_bucket 639 608system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::samples 623 | 615system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::total 254 616system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::bucket_size 64 617system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::max_bucket 639 618system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::samples 623 |
| 609system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::mean 56.260032 610system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::gmean 50.022291 611system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::stdev 35.712767 612system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr | 512 82.18% 82.18% | 91 14.61% 96.79% | 13 2.09% 98.88% | 1 0.16% 99.04% | 2 0.32% 99.36% | 4 0.64% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 619system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::mean 58.861958 620system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::gmean 52.329270 621system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::stdev 33.443818 622system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr | 280 44.94% 44.94% | 324 52.01% 96.95% | 15 2.41% 99.36% | 1 0.16% 99.52% | 1 0.16% 99.68% | 2 0.32% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% |
| 613system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::total 623 614system.ruby.RMW_Read.Directory.miss_type_mach_latency_hist_seqr::bucket_size 4 615system.ruby.RMW_Read.Directory.miss_type_mach_latency_hist_seqr::max_bucket 39 616system.ruby.RMW_Read.Directory.miss_type_mach_latency_hist_seqr::samples 1 617system.ruby.RMW_Read.Directory.miss_type_mach_latency_hist_seqr::mean 32 618system.ruby.RMW_Read.Directory.miss_type_mach_latency_hist_seqr::gmean 32 619system.ruby.RMW_Read.Directory.miss_type_mach_latency_hist_seqr::stdev nan 620system.ruby.RMW_Read.Directory.miss_type_mach_latency_hist_seqr | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1 100.00% 100.00% | 0 0.00% 100.00% --- 27 unchanged lines hidden --- | 623system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::total 623 624system.ruby.RMW_Read.Directory.miss_type_mach_latency_hist_seqr::bucket_size 4 625system.ruby.RMW_Read.Directory.miss_type_mach_latency_hist_seqr::max_bucket 39 626system.ruby.RMW_Read.Directory.miss_type_mach_latency_hist_seqr::samples 1 627system.ruby.RMW_Read.Directory.miss_type_mach_latency_hist_seqr::mean 32 628system.ruby.RMW_Read.Directory.miss_type_mach_latency_hist_seqr::gmean 32 629system.ruby.RMW_Read.Directory.miss_type_mach_latency_hist_seqr::stdev nan 630system.ruby.RMW_Read.Directory.miss_type_mach_latency_hist_seqr | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1 100.00% 100.00% | 0 0.00% 100.00% --- 27 unchanged lines hidden --- |