stats.txt (10526:0068ad93a67e) stats.txt (10628:c9b7e0c69f88)
1
2---------- Begin Simulation Statistics ----------
3sim_seconds 0.000107 # Number of seconds simulated
4sim_ticks 107237 # Number of ticks simulated
5final_tick 107237 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
6sim_freq 1000000000 # Frequency of simulated ticks
1
2---------- Begin Simulation Statistics ----------
3sim_seconds 0.000107 # Number of seconds simulated
4sim_ticks 107237 # Number of ticks simulated
5final_tick 107237 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
6sim_freq 1000000000 # Frequency of simulated ticks
7host_inst_rate 14917 # Simulator instruction rate (inst/s)
8host_op_rate 27022 # Simulator op (including micro ops) rate (op/s)
9host_tick_rate 297251 # Simulator tick rate (ticks/s)
10host_mem_usage 452416 # Number of bytes of host memory used
11host_seconds 0.36 # Real time elapsed on the host
7host_inst_rate 59170 # Simulator instruction rate (inst/s)
8host_op_rate 107175 # Simulator op (including micro ops) rate (op/s)
9host_tick_rate 1178869 # Simulator tick rate (ticks/s)
10host_mem_usage 466480 # Number of bytes of host memory used
11host_seconds 0.09 # Real time elapsed on the host
12sim_insts 5381 # Number of instructions simulated
13sim_ops 9748 # Number of ops (including micro ops) simulated
14system.voltage_domain.voltage 1 # Voltage in Volts
15system.clk_domain.clock 1 # Clock period in ticks
16system.mem_ctrls.bytes_read::ruby.dir_cntrl0 88128 # Number of bytes read from this memory
17system.mem_ctrls.bytes_read::total 88128 # Number of bytes read from this memory
18system.mem_ctrls.bytes_written::ruby.dir_cntrl0 87872 # Number of bytes written to this memory
19system.mem_ctrls.bytes_written::total 87872 # Number of bytes written to this memory

--- 213 unchanged lines hidden (view full) ---

233system.mem_ctrls.avgRdQLen 1.00 # Average read queue length when enqueuing
234system.mem_ctrls.avgWrQLen 26.04 # Average write queue length when enqueuing
235system.mem_ctrls.readRowHits 427 # Number of row buffer hits during reads
236system.mem_ctrls.writeRowHits 625 # Number of row buffer hits during writes
237system.mem_ctrls.readRowHitRate 64.11 # Row buffer hit rate for reads
238system.mem_ctrls.writeRowHitRate 90.98 # Row buffer hit rate for writes
239system.mem_ctrls.avgGap 38.96 # Average gap between requests
240system.mem_ctrls.pageHitRate 77.75 # Row buffer hit rate, read and write combined
12sim_insts 5381 # Number of instructions simulated
13sim_ops 9748 # Number of ops (including micro ops) simulated
14system.voltage_domain.voltage 1 # Voltage in Volts
15system.clk_domain.clock 1 # Clock period in ticks
16system.mem_ctrls.bytes_read::ruby.dir_cntrl0 88128 # Number of bytes read from this memory
17system.mem_ctrls.bytes_read::total 88128 # Number of bytes read from this memory
18system.mem_ctrls.bytes_written::ruby.dir_cntrl0 87872 # Number of bytes written to this memory
19system.mem_ctrls.bytes_written::total 87872 # Number of bytes written to this memory

--- 213 unchanged lines hidden (view full) ---

233system.mem_ctrls.avgRdQLen 1.00 # Average read queue length when enqueuing
234system.mem_ctrls.avgWrQLen 26.04 # Average write queue length when enqueuing
235system.mem_ctrls.readRowHits 427 # Number of row buffer hits during reads
236system.mem_ctrls.writeRowHits 625 # Number of row buffer hits during writes
237system.mem_ctrls.readRowHitRate 64.11 # Row buffer hit rate for reads
238system.mem_ctrls.writeRowHitRate 90.98 # Row buffer hit rate for writes
239system.mem_ctrls.avgGap 38.96 # Average gap between requests
240system.mem_ctrls.pageHitRate 77.75 # Row buffer hit rate, read and write combined
241system.mem_ctrls.memoryStateTime::IDLE 6647 # Time in different power states
242system.mem_ctrls.memoryStateTime::REF 3380 # Time in different power states
243system.mem_ctrls.memoryStateTime::PRE_PDN 0 # Time in different power states
244system.mem_ctrls.memoryStateTime::ACT 91465 # Time in different power states
245system.mem_ctrls.memoryStateTime::ACT_PDN 0 # Time in different power states
246system.mem_ctrls.actEnergy::0 695520 # Energy for activate commands per rank (pJ)
247system.mem_ctrls.actEnergy::1 1270080 # Energy for activate commands per rank (pJ)
248system.mem_ctrls.preEnergy::0 386400 # Energy for precharge commands per rank (pJ)
249system.mem_ctrls.preEnergy::1 705600 # Energy for precharge commands per rank (pJ)
250system.mem_ctrls.readEnergy::0 3219840 # Energy for read commands per rank (pJ)
251system.mem_ctrls.readEnergy::1 4605120 # Energy for read commands per rank (pJ)
252system.mem_ctrls.writeEnergy::0 2623104 # Energy for write commands per rank (pJ)
253system.mem_ctrls.writeEnergy::1 3784320 # Energy for write commands per rank (pJ)
254system.mem_ctrls.refreshEnergy::0 6611280 # Energy for refresh commands per rank (pJ)
255system.mem_ctrls.refreshEnergy::1 6611280 # Energy for refresh commands per rank (pJ)
256system.mem_ctrls.actBackEnergy::0 57894444 # Energy for active background per rank (pJ)
257system.mem_ctrls.actBackEnergy::1 62913636 # Energy for active background per rank (pJ)
258system.mem_ctrls.preBackEnergy::0 10102200 # Energy for precharge background per rank (pJ)
259system.mem_ctrls.preBackEnergy::1 5699400 # Energy for precharge background per rank (pJ)
260system.mem_ctrls.totalEnergy::0 81532788 # Total energy per rank (pJ)
261system.mem_ctrls.totalEnergy::1 85589436 # Total energy per rank (pJ)
262system.mem_ctrls.averagePower::0 803.452847 # Core power per rank (mW)
263system.mem_ctrls.averagePower::1 843.428487 # Core power per rank (mW)
241system.mem_ctrls_0.actEnergy 695520 # Energy for activate commands per rank (pJ)
242system.mem_ctrls_0.preEnergy 386400 # Energy for precharge commands per rank (pJ)
243system.mem_ctrls_0.readEnergy 3219840 # Energy for read commands per rank (pJ)
244system.mem_ctrls_0.writeEnergy 2623104 # Energy for write commands per rank (pJ)
245system.mem_ctrls_0.refreshEnergy 6611280 # Energy for refresh commands per rank (pJ)
246system.mem_ctrls_0.actBackEnergy 57895812 # Energy for active background per rank (pJ)
247system.mem_ctrls_0.preBackEnergy 10101000 # Energy for precharge background per rank (pJ)
248system.mem_ctrls_0.totalEnergy 81532956 # Total energy per rank (pJ)
249system.mem_ctrls_0.averagePower 803.454502 # Core power per rank (mW)
250system.mem_ctrls_0.memoryStateTime::IDLE 16443 # Time in different power states
251system.mem_ctrls_0.memoryStateTime::REF 3380 # Time in different power states
252system.mem_ctrls_0.memoryStateTime::PRE_PDN 0 # Time in different power states
253system.mem_ctrls_0.memoryStateTime::ACT 81669 # Time in different power states
254system.mem_ctrls_0.memoryStateTime::ACT_PDN 0 # Time in different power states
255system.mem_ctrls_1.actEnergy 1270080 # Energy for activate commands per rank (pJ)
256system.mem_ctrls_1.preEnergy 705600 # Energy for precharge commands per rank (pJ)
257system.mem_ctrls_1.readEnergy 4605120 # Energy for read commands per rank (pJ)
258system.mem_ctrls_1.writeEnergy 3784320 # Energy for write commands per rank (pJ)
259system.mem_ctrls_1.refreshEnergy 6611280 # Energy for refresh commands per rank (pJ)
260system.mem_ctrls_1.actBackEnergy 62916372 # Energy for active background per rank (pJ)
261system.mem_ctrls_1.preBackEnergy 5697000 # Energy for precharge background per rank (pJ)
262system.mem_ctrls_1.totalEnergy 85589772 # Total energy per rank (pJ)
263system.mem_ctrls_1.averagePower 843.431798 # Core power per rank (mW)
264system.mem_ctrls_1.memoryStateTime::IDLE 9164 # Time in different power states
265system.mem_ctrls_1.memoryStateTime::REF 3380 # Time in different power states
266system.mem_ctrls_1.memoryStateTime::PRE_PDN 0 # Time in different power states
267system.mem_ctrls_1.memoryStateTime::ACT 89065 # Time in different power states
268system.mem_ctrls_1.memoryStateTime::ACT_PDN 0 # Time in different power states
269system.cpu.clk_domain.clock 1 # Clock period in ticks
270system.cpu.apic_clk_domain.clock 16 # Clock period in ticks
271system.cpu.workload.num_syscalls 11 # Number of system calls
272system.cpu.numCycles 107237 # number of cpu cycles simulated
273system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
274system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
275system.cpu.committedInsts 5381 # Number of instructions committed
276system.cpu.committedOps 9748 # Number of ops (including micro ops) committed
277system.cpu.num_int_alu_accesses 9654 # Number of integer alu accesses
278system.cpu.num_fp_alu_accesses 0 # Number of float alu accesses
279system.cpu.num_func_calls 209 # number of times a function call or return occured
280system.cpu.num_conditional_control_insts 899 # number of instructions that are conditional controls
281system.cpu.num_int_insts 9654 # number of integer instructions
282system.cpu.num_fp_insts 0 # number of float instructions
283system.cpu.num_int_register_reads 18335 # number of times the integer registers were read
284system.cpu.num_int_register_writes 7527 # number of times the integer registers were written
285system.cpu.num_fp_register_reads 0 # number of times the floating registers were read
286system.cpu.num_fp_register_writes 0 # number of times the floating registers were written
287system.cpu.num_cc_register_reads 6487 # number of times the CC registers were read
288system.cpu.num_cc_register_writes 3536 # number of times the CC registers were written
289system.cpu.num_mem_refs 1988 # number of memory refs
290system.cpu.num_load_insts 1053 # Number of load instructions
291system.cpu.num_store_insts 935 # Number of store instructions
292system.cpu.num_idle_cycles 0.999991 # Number of idle cycles
293system.cpu.num_busy_cycles 107236.000009 # Number of busy cycles
294system.cpu.not_idle_fraction 0.999991 # Percentage of non-idle cycles
295system.cpu.idle_fraction 0.000009 # Percentage of idle cycles
296system.cpu.Branches 1208 # Number of branches fetched
297system.cpu.op_class::No_OpClass 1 0.01% 0.01% # Class of executed instruction
298system.cpu.op_class::IntAlu 7749 79.49% 79.50% # Class of executed instruction
299system.cpu.op_class::IntMult 3 0.03% 79.53% # Class of executed instruction
300system.cpu.op_class::IntDiv 7 0.07% 79.61% # Class of executed instruction
301system.cpu.op_class::FloatAdd 0 0.00% 79.61% # Class of executed instruction
302system.cpu.op_class::FloatCmp 0 0.00% 79.61% # Class of executed instruction
303system.cpu.op_class::FloatCvt 0 0.00% 79.61% # Class of executed instruction
304system.cpu.op_class::FloatMult 0 0.00% 79.61% # Class of executed instruction
305system.cpu.op_class::FloatDiv 0 0.00% 79.61% # Class of executed instruction
306system.cpu.op_class::FloatSqrt 0 0.00% 79.61% # Class of executed instruction
307system.cpu.op_class::SimdAdd 0 0.00% 79.61% # Class of executed instruction
308system.cpu.op_class::SimdAddAcc 0 0.00% 79.61% # Class of executed instruction
309system.cpu.op_class::SimdAlu 0 0.00% 79.61% # Class of executed instruction
310system.cpu.op_class::SimdCmp 0 0.00% 79.61% # Class of executed instruction
311system.cpu.op_class::SimdCvt 0 0.00% 79.61% # Class of executed instruction
312system.cpu.op_class::SimdMisc 0 0.00% 79.61% # Class of executed instruction
313system.cpu.op_class::SimdMult 0 0.00% 79.61% # Class of executed instruction
314system.cpu.op_class::SimdMultAcc 0 0.00% 79.61% # Class of executed instruction
315system.cpu.op_class::SimdShift 0 0.00% 79.61% # Class of executed instruction
316system.cpu.op_class::SimdShiftAcc 0 0.00% 79.61% # Class of executed instruction
317system.cpu.op_class::SimdSqrt 0 0.00% 79.61% # Class of executed instruction
318system.cpu.op_class::SimdFloatAdd 0 0.00% 79.61% # Class of executed instruction
319system.cpu.op_class::SimdFloatAlu 0 0.00% 79.61% # Class of executed instruction
320system.cpu.op_class::SimdFloatCmp 0 0.00% 79.61% # Class of executed instruction
321system.cpu.op_class::SimdFloatCvt 0 0.00% 79.61% # Class of executed instruction
322system.cpu.op_class::SimdFloatDiv 0 0.00% 79.61% # Class of executed instruction
323system.cpu.op_class::SimdFloatMisc 0 0.00% 79.61% # Class of executed instruction
324system.cpu.op_class::SimdFloatMult 0 0.00% 79.61% # Class of executed instruction
325system.cpu.op_class::SimdFloatMultAcc 0 0.00% 79.61% # Class of executed instruction
326system.cpu.op_class::SimdFloatSqrt 0 0.00% 79.61% # Class of executed instruction
327system.cpu.op_class::MemRead 1053 10.80% 90.41% # Class of executed instruction
328system.cpu.op_class::MemWrite 935 9.59% 100.00% # Class of executed instruction
329system.cpu.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction
330system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction
331system.cpu.op_class::total 9748 # Class of executed instruction
264system.ruby.clk_domain.clock 1 # Clock period in ticks
265system.ruby.delayHist::bucket_size 1 # delay histogram for all message
266system.ruby.delayHist::max_bucket 9 # delay histogram for all message
267system.ruby.delayHist::samples 2750 # delay histogram for all message
268system.ruby.delayHist | 2750 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for all message
269system.ruby.delayHist::total 2750 # delay histogram for all message
270system.ruby.outstanding_req_hist::bucket_size 1
271system.ruby.outstanding_req_hist::max_bucket 9
272system.ruby.outstanding_req_hist::samples 8852
273system.ruby.outstanding_req_hist::mean 1
274system.ruby.outstanding_req_hist::gmean 1
275system.ruby.outstanding_req_hist | 0 0.00% 0.00% | 8852 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
276system.ruby.outstanding_req_hist::total 8852
277system.ruby.latency_hist::bucket_size 64
278system.ruby.latency_hist::max_bucket 639
279system.ruby.latency_hist::samples 8852
280system.ruby.latency_hist::mean 11.114437
332system.ruby.clk_domain.clock 1 # Clock period in ticks
333system.ruby.delayHist::bucket_size 1 # delay histogram for all message
334system.ruby.delayHist::max_bucket 9 # delay histogram for all message
335system.ruby.delayHist::samples 2750 # delay histogram for all message
336system.ruby.delayHist | 2750 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for all message
337system.ruby.delayHist::total 2750 # delay histogram for all message
338system.ruby.outstanding_req_hist::bucket_size 1
339system.ruby.outstanding_req_hist::max_bucket 9
340system.ruby.outstanding_req_hist::samples 8852
341system.ruby.outstanding_req_hist::mean 1
342system.ruby.outstanding_req_hist::gmean 1
343system.ruby.outstanding_req_hist | 0 0.00% 0.00% | 8852 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
344system.ruby.outstanding_req_hist::total 8852
345system.ruby.latency_hist::bucket_size 64
346system.ruby.latency_hist::max_bucket 639
347system.ruby.latency_hist::samples 8852
348system.ruby.latency_hist::mean 11.114437
281system.ruby.latency_hist::gmean 4.638311
282system.ruby.latency_hist::stdev 22.978637
349system.ruby.latency_hist::gmean 4.638310
350system.ruby.latency_hist::stdev 22.979355
283system.ruby.latency_hist | 8594 97.09% 97.09% | 215 2.43% 99.51% | 29 0.33% 99.84% | 6 0.07% 99.91% | 6 0.07% 99.98% | 2 0.02% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
284system.ruby.latency_hist::total 8852
285system.ruby.hit_latency_hist::bucket_size 1
286system.ruby.hit_latency_hist::max_bucket 9
287system.ruby.hit_latency_hist::samples 7475
288system.ruby.hit_latency_hist::mean 3
289system.ruby.hit_latency_hist::gmean 3.000000
290system.ruby.hit_latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 7475 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
291system.ruby.hit_latency_hist::total 7475
292system.ruby.miss_latency_hist::bucket_size 64
293system.ruby.miss_latency_hist::max_bucket 639
294system.ruby.miss_latency_hist::samples 1377
295system.ruby.miss_latency_hist::mean 55.163399
351system.ruby.latency_hist | 8594 97.09% 97.09% | 215 2.43% 99.51% | 29 0.33% 99.84% | 6 0.07% 99.91% | 6 0.07% 99.98% | 2 0.02% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
352system.ruby.latency_hist::total 8852
353system.ruby.hit_latency_hist::bucket_size 1
354system.ruby.hit_latency_hist::max_bucket 9
355system.ruby.hit_latency_hist::samples 7475
356system.ruby.hit_latency_hist::mean 3
357system.ruby.hit_latency_hist::gmean 3.000000
358system.ruby.hit_latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 7475 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
359system.ruby.hit_latency_hist::total 7475
360system.ruby.miss_latency_hist::bucket_size 64
361system.ruby.miss_latency_hist::max_bucket 639
362system.ruby.miss_latency_hist::samples 1377
363system.ruby.miss_latency_hist::mean 55.163399
296system.ruby.miss_latency_hist::gmean 49.389613
297system.ruby.miss_latency_hist::stdev 33.121212
364system.ruby.miss_latency_hist::gmean 49.389540
365system.ruby.miss_latency_hist::stdev 33.124416
298system.ruby.miss_latency_hist | 1119 81.26% 81.26% | 215 15.61% 96.88% | 29 2.11% 98.98% | 6 0.44% 99.42% | 6 0.44% 99.85% | 2 0.15% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
299system.ruby.miss_latency_hist::total 1377
300system.ruby.Directory.incomplete_times 1376
366system.ruby.miss_latency_hist | 1119 81.26% 81.26% | 215 15.61% 96.88% | 29 2.11% 98.98% | 6 0.44% 99.42% | 6 0.44% 99.85% | 2 0.15% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
367system.ruby.miss_latency_hist::total 1377
368system.ruby.Directory.incomplete_times 1376
301system.ruby.memctrl_clk_domain.clock 3 # Clock period in ticks
302system.ruby.l1_cntrl0.cacheMemory.demand_hits 7475 # Number of cache demand hits
303system.ruby.l1_cntrl0.cacheMemory.demand_misses 1377 # Number of cache demand misses
304system.ruby.l1_cntrl0.cacheMemory.demand_accesses 8852 # Number of cache demand accesses
369system.ruby.l1_cntrl0.cacheMemory.demand_hits 7475 # Number of cache demand hits
370system.ruby.l1_cntrl0.cacheMemory.demand_misses 1377 # Number of cache demand misses
371system.ruby.l1_cntrl0.cacheMemory.demand_accesses 8852 # Number of cache demand accesses
305system.cpu.clk_domain.clock 1 # Clock period in ticks
372system.ruby.memctrl_clk_domain.clock 3 # Clock period in ticks
306system.ruby.network.routers0.percent_links_utilized 6.411034
307system.ruby.network.routers0.msg_count.Control::2 1377
308system.ruby.network.routers0.msg_count.Data::2 1373
309system.ruby.network.routers0.msg_count.Response_Data::4 1377
310system.ruby.network.routers0.msg_count.Writeback_Control::3 1373
311system.ruby.network.routers0.msg_bytes.Control::2 11016
312system.ruby.network.routers0.msg_bytes.Data::2 98856
313system.ruby.network.routers0.msg_bytes.Response_Data::4 99144

--- 19 unchanged lines hidden (view full) ---

333system.ruby.network.msg_count.Control 4131
334system.ruby.network.msg_count.Data 4119
335system.ruby.network.msg_count.Response_Data 4131
336system.ruby.network.msg_count.Writeback_Control 4119
337system.ruby.network.msg_byte.Control 33048
338system.ruby.network.msg_byte.Data 296568
339system.ruby.network.msg_byte.Response_Data 297432
340system.ruby.network.msg_byte.Writeback_Control 32952
373system.ruby.network.routers0.percent_links_utilized 6.411034
374system.ruby.network.routers0.msg_count.Control::2 1377
375system.ruby.network.routers0.msg_count.Data::2 1373
376system.ruby.network.routers0.msg_count.Response_Data::4 1377
377system.ruby.network.routers0.msg_count.Writeback_Control::3 1373
378system.ruby.network.routers0.msg_bytes.Control::2 11016
379system.ruby.network.routers0.msg_bytes.Data::2 98856
380system.ruby.network.routers0.msg_bytes.Response_Data::4 99144

--- 19 unchanged lines hidden (view full) ---

400system.ruby.network.msg_count.Control 4131
401system.ruby.network.msg_count.Data 4119
402system.ruby.network.msg_count.Response_Data 4131
403system.ruby.network.msg_count.Writeback_Control 4119
404system.ruby.network.msg_byte.Control 33048
405system.ruby.network.msg_byte.Data 296568
406system.ruby.network.msg_byte.Response_Data 297432
407system.ruby.network.msg_byte.Writeback_Control 32952
341system.cpu.apic_clk_domain.clock 16 # Clock period in ticks
342system.cpu.workload.num_syscalls 11 # Number of system calls
343system.cpu.numCycles 107237 # number of cpu cycles simulated
344system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
345system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
346system.cpu.committedInsts 5381 # Number of instructions committed
347system.cpu.committedOps 9748 # Number of ops (including micro ops) committed
348system.cpu.num_int_alu_accesses 9654 # Number of integer alu accesses
349system.cpu.num_fp_alu_accesses 0 # Number of float alu accesses
350system.cpu.num_func_calls 209 # number of times a function call or return occured
351system.cpu.num_conditional_control_insts 899 # number of instructions that are conditional controls
352system.cpu.num_int_insts 9654 # number of integer instructions
353system.cpu.num_fp_insts 0 # number of float instructions
354system.cpu.num_int_register_reads 18335 # number of times the integer registers were read
355system.cpu.num_int_register_writes 7527 # number of times the integer registers were written
356system.cpu.num_fp_register_reads 0 # number of times the floating registers were read
357system.cpu.num_fp_register_writes 0 # number of times the floating registers were written
358system.cpu.num_cc_register_reads 6487 # number of times the CC registers were read
359system.cpu.num_cc_register_writes 3536 # number of times the CC registers were written
360system.cpu.num_mem_refs 1988 # number of memory refs
361system.cpu.num_load_insts 1053 # Number of load instructions
362system.cpu.num_store_insts 935 # Number of store instructions
363system.cpu.num_idle_cycles 0.999991 # Number of idle cycles
364system.cpu.num_busy_cycles 107236.000009 # Number of busy cycles
365system.cpu.not_idle_fraction 0.999991 # Percentage of non-idle cycles
366system.cpu.idle_fraction 0.000009 # Percentage of idle cycles
367system.cpu.Branches 1208 # Number of branches fetched
368system.cpu.op_class::No_OpClass 1 0.01% 0.01% # Class of executed instruction
369system.cpu.op_class::IntAlu 7749 79.49% 79.50% # Class of executed instruction
370system.cpu.op_class::IntMult 3 0.03% 79.53% # Class of executed instruction
371system.cpu.op_class::IntDiv 7 0.07% 79.61% # Class of executed instruction
372system.cpu.op_class::FloatAdd 0 0.00% 79.61% # Class of executed instruction
373system.cpu.op_class::FloatCmp 0 0.00% 79.61% # Class of executed instruction
374system.cpu.op_class::FloatCvt 0 0.00% 79.61% # Class of executed instruction
375system.cpu.op_class::FloatMult 0 0.00% 79.61% # Class of executed instruction
376system.cpu.op_class::FloatDiv 0 0.00% 79.61% # Class of executed instruction
377system.cpu.op_class::FloatSqrt 0 0.00% 79.61% # Class of executed instruction
378system.cpu.op_class::SimdAdd 0 0.00% 79.61% # Class of executed instruction
379system.cpu.op_class::SimdAddAcc 0 0.00% 79.61% # Class of executed instruction
380system.cpu.op_class::SimdAlu 0 0.00% 79.61% # Class of executed instruction
381system.cpu.op_class::SimdCmp 0 0.00% 79.61% # Class of executed instruction
382system.cpu.op_class::SimdCvt 0 0.00% 79.61% # Class of executed instruction
383system.cpu.op_class::SimdMisc 0 0.00% 79.61% # Class of executed instruction
384system.cpu.op_class::SimdMult 0 0.00% 79.61% # Class of executed instruction
385system.cpu.op_class::SimdMultAcc 0 0.00% 79.61% # Class of executed instruction
386system.cpu.op_class::SimdShift 0 0.00% 79.61% # Class of executed instruction
387system.cpu.op_class::SimdShiftAcc 0 0.00% 79.61% # Class of executed instruction
388system.cpu.op_class::SimdSqrt 0 0.00% 79.61% # Class of executed instruction
389system.cpu.op_class::SimdFloatAdd 0 0.00% 79.61% # Class of executed instruction
390system.cpu.op_class::SimdFloatAlu 0 0.00% 79.61% # Class of executed instruction
391system.cpu.op_class::SimdFloatCmp 0 0.00% 79.61% # Class of executed instruction
392system.cpu.op_class::SimdFloatCvt 0 0.00% 79.61% # Class of executed instruction
393system.cpu.op_class::SimdFloatDiv 0 0.00% 79.61% # Class of executed instruction
394system.cpu.op_class::SimdFloatMisc 0 0.00% 79.61% # Class of executed instruction
395system.cpu.op_class::SimdFloatMult 0 0.00% 79.61% # Class of executed instruction
396system.cpu.op_class::SimdFloatMultAcc 0 0.00% 79.61% # Class of executed instruction
397system.cpu.op_class::SimdFloatSqrt 0 0.00% 79.61% # Class of executed instruction
398system.cpu.op_class::MemRead 1053 10.80% 90.41% # Class of executed instruction
399system.cpu.op_class::MemWrite 935 9.59% 100.00% # Class of executed instruction
400system.cpu.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction
401system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction
402system.cpu.op_class::total 9748 # Class of executed instruction
403system.ruby.network.routers0.throttle0.link_utilization 6.418494
404system.ruby.network.routers0.throttle0.msg_count.Response_Data::4 1377
405system.ruby.network.routers0.throttle0.msg_count.Writeback_Control::3 1373
406system.ruby.network.routers0.throttle0.msg_bytes.Response_Data::4 99144
407system.ruby.network.routers0.throttle0.msg_bytes.Writeback_Control::3 10984
408system.ruby.network.routers0.throttle1.link_utilization 6.403573
409system.ruby.network.routers0.throttle1.msg_count.Control::2 1377
410system.ruby.network.routers0.throttle1.msg_count.Data::2 1373

--- 74 unchanged lines hidden (view full) ---

485system.ruby.ST.miss_latency_hist::gmean 48.282634
486system.ruby.ST.miss_latency_hist::stdev 33.823763
487system.ruby.ST.miss_latency_hist | 214 84.25% 84.25% | 35 13.78% 98.03% | 1 0.39% 98.43% | 2 0.79% 99.21% | 1 0.39% 99.61% | 1 0.39% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
488system.ruby.ST.miss_latency_hist::total 254
489system.ruby.IFETCH.latency_hist::bucket_size 64
490system.ruby.IFETCH.latency_hist::max_bucket 639
491system.ruby.IFETCH.latency_hist::samples 6864
492system.ruby.IFETCH.latency_hist::mean 8.263112
408system.ruby.network.routers0.throttle0.link_utilization 6.418494
409system.ruby.network.routers0.throttle0.msg_count.Response_Data::4 1377
410system.ruby.network.routers0.throttle0.msg_count.Writeback_Control::3 1373
411system.ruby.network.routers0.throttle0.msg_bytes.Response_Data::4 99144
412system.ruby.network.routers0.throttle0.msg_bytes.Writeback_Control::3 10984
413system.ruby.network.routers0.throttle1.link_utilization 6.403573
414system.ruby.network.routers0.throttle1.msg_count.Control::2 1377
415system.ruby.network.routers0.throttle1.msg_count.Data::2 1373

--- 74 unchanged lines hidden (view full) ---

490system.ruby.ST.miss_latency_hist::gmean 48.282634
491system.ruby.ST.miss_latency_hist::stdev 33.823763
492system.ruby.ST.miss_latency_hist | 214 84.25% 84.25% | 35 13.78% 98.03% | 1 0.39% 98.43% | 2 0.79% 99.21% | 1 0.39% 99.61% | 1 0.39% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
493system.ruby.ST.miss_latency_hist::total 254
494system.ruby.IFETCH.latency_hist::bucket_size 64
495system.ruby.IFETCH.latency_hist::max_bucket 639
496system.ruby.IFETCH.latency_hist::samples 6864
497system.ruby.IFETCH.latency_hist::mean 8.263112
493system.ruby.IFETCH.latency_hist::gmean 3.900454
494system.ruby.IFETCH.latency_hist::stdev 20.208626
498system.ruby.IFETCH.latency_hist::gmean 3.900453
499system.ruby.IFETCH.latency_hist::stdev 20.209679
495system.ruby.IFETCH.latency_hist | 6731 98.06% 98.06% | 102 1.49% 99.55% | 22 0.32% 99.87% | 3 0.04% 99.91% | 5 0.07% 99.99% | 1 0.01% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
496system.ruby.IFETCH.latency_hist::total 6864
497system.ruby.IFETCH.hit_latency_hist::bucket_size 1
498system.ruby.IFETCH.hit_latency_hist::max_bucket 9
499system.ruby.IFETCH.hit_latency_hist::samples 6241
500system.ruby.IFETCH.hit_latency_hist::mean 3
501system.ruby.IFETCH.hit_latency_hist::gmean 3.000000
502system.ruby.IFETCH.hit_latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 6241 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
503system.ruby.IFETCH.hit_latency_hist::total 6241
504system.ruby.IFETCH.miss_latency_hist::bucket_size 64
505system.ruby.IFETCH.miss_latency_hist::max_bucket 639
506system.ruby.IFETCH.miss_latency_hist::samples 623
507system.ruby.IFETCH.miss_latency_hist::mean 60.987159
500system.ruby.IFETCH.latency_hist | 6731 98.06% 98.06% | 102 1.49% 99.55% | 22 0.32% 99.87% | 3 0.04% 99.91% | 5 0.07% 99.99% | 1 0.01% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
501system.ruby.IFETCH.latency_hist::total 6864
502system.ruby.IFETCH.hit_latency_hist::bucket_size 1
503system.ruby.IFETCH.hit_latency_hist::max_bucket 9
504system.ruby.IFETCH.hit_latency_hist::samples 6241
505system.ruby.IFETCH.hit_latency_hist::mean 3
506system.ruby.IFETCH.hit_latency_hist::gmean 3.000000
507system.ruby.IFETCH.hit_latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 6241 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
508system.ruby.IFETCH.hit_latency_hist::total 6241
509system.ruby.IFETCH.miss_latency_hist::bucket_size 64
510system.ruby.IFETCH.miss_latency_hist::max_bucket 639
511system.ruby.IFETCH.miss_latency_hist::samples 623
512system.ruby.IFETCH.miss_latency_hist::mean 60.987159
508system.ruby.IFETCH.miss_latency_hist::gmean 54.083768
509system.ruby.IFETCH.miss_latency_hist::stdev 37.997755
513system.ruby.IFETCH.miss_latency_hist::gmean 54.083593
514system.ruby.IFETCH.miss_latency_hist::stdev 38.003932
510system.ruby.IFETCH.miss_latency_hist | 490 78.65% 78.65% | 102 16.37% 95.02% | 22 3.53% 98.56% | 3 0.48% 99.04% | 5 0.80% 99.84% | 1 0.16% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
511system.ruby.IFETCH.miss_latency_hist::total 623
512system.ruby.RMW_Read.latency_hist::bucket_size 4
513system.ruby.RMW_Read.latency_hist::max_bucket 39
514system.ruby.RMW_Read.latency_hist::samples 8
515system.ruby.RMW_Read.latency_hist::mean 6.875000
516system.ruby.RMW_Read.latency_hist::gmean 4.063647
517system.ruby.RMW_Read.latency_hist::stdev 10.960155

--- 13 unchanged lines hidden (view full) ---

531system.ruby.RMW_Read.miss_latency_hist::gmean 34.000000
532system.ruby.RMW_Read.miss_latency_hist::stdev nan
533system.ruby.RMW_Read.miss_latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1 100.00% 100.00% | 0 0.00% 100.00%
534system.ruby.RMW_Read.miss_latency_hist::total 1
535system.ruby.Directory.miss_mach_latency_hist::bucket_size 64
536system.ruby.Directory.miss_mach_latency_hist::max_bucket 639
537system.ruby.Directory.miss_mach_latency_hist::samples 1377
538system.ruby.Directory.miss_mach_latency_hist::mean 55.163399
515system.ruby.IFETCH.miss_latency_hist | 490 78.65% 78.65% | 102 16.37% 95.02% | 22 3.53% 98.56% | 3 0.48% 99.04% | 5 0.80% 99.84% | 1 0.16% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
516system.ruby.IFETCH.miss_latency_hist::total 623
517system.ruby.RMW_Read.latency_hist::bucket_size 4
518system.ruby.RMW_Read.latency_hist::max_bucket 39
519system.ruby.RMW_Read.latency_hist::samples 8
520system.ruby.RMW_Read.latency_hist::mean 6.875000
521system.ruby.RMW_Read.latency_hist::gmean 4.063647
522system.ruby.RMW_Read.latency_hist::stdev 10.960155

--- 13 unchanged lines hidden (view full) ---

536system.ruby.RMW_Read.miss_latency_hist::gmean 34.000000
537system.ruby.RMW_Read.miss_latency_hist::stdev nan
538system.ruby.RMW_Read.miss_latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1 100.00% 100.00% | 0 0.00% 100.00%
539system.ruby.RMW_Read.miss_latency_hist::total 1
540system.ruby.Directory.miss_mach_latency_hist::bucket_size 64
541system.ruby.Directory.miss_mach_latency_hist::max_bucket 639
542system.ruby.Directory.miss_mach_latency_hist::samples 1377
543system.ruby.Directory.miss_mach_latency_hist::mean 55.163399
539system.ruby.Directory.miss_mach_latency_hist::gmean 49.389613
540system.ruby.Directory.miss_mach_latency_hist::stdev 33.121212
544system.ruby.Directory.miss_mach_latency_hist::gmean 49.389540
545system.ruby.Directory.miss_mach_latency_hist::stdev 33.124416
541system.ruby.Directory.miss_mach_latency_hist | 1119 81.26% 81.26% | 215 15.61% 96.88% | 29 2.11% 98.98% | 6 0.44% 99.42% | 6 0.44% 99.85% | 2 0.15% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
542system.ruby.Directory.miss_mach_latency_hist::total 1377
543system.ruby.Directory.miss_latency_hist.issue_to_initial_request::bucket_size 1
544system.ruby.Directory.miss_latency_hist.issue_to_initial_request::max_bucket 9
545system.ruby.Directory.miss_latency_hist.issue_to_initial_request::samples 1
546system.ruby.Directory.miss_latency_hist.issue_to_initial_request::stdev nan
547system.ruby.Directory.miss_latency_hist.issue_to_initial_request | 1 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
548system.ruby.Directory.miss_latency_hist.issue_to_initial_request::total 1

--- 32 unchanged lines hidden (view full) ---

581system.ruby.ST.Directory.miss_type_mach_latency_hist::gmean 48.282634
582system.ruby.ST.Directory.miss_type_mach_latency_hist::stdev 33.823763
583system.ruby.ST.Directory.miss_type_mach_latency_hist | 214 84.25% 84.25% | 35 13.78% 98.03% | 1 0.39% 98.43% | 2 0.79% 99.21% | 1 0.39% 99.61% | 1 0.39% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
584system.ruby.ST.Directory.miss_type_mach_latency_hist::total 254
585system.ruby.IFETCH.Directory.miss_type_mach_latency_hist::bucket_size 64
586system.ruby.IFETCH.Directory.miss_type_mach_latency_hist::max_bucket 639
587system.ruby.IFETCH.Directory.miss_type_mach_latency_hist::samples 623
588system.ruby.IFETCH.Directory.miss_type_mach_latency_hist::mean 60.987159
546system.ruby.Directory.miss_mach_latency_hist | 1119 81.26% 81.26% | 215 15.61% 96.88% | 29 2.11% 98.98% | 6 0.44% 99.42% | 6 0.44% 99.85% | 2 0.15% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
547system.ruby.Directory.miss_mach_latency_hist::total 1377
548system.ruby.Directory.miss_latency_hist.issue_to_initial_request::bucket_size 1
549system.ruby.Directory.miss_latency_hist.issue_to_initial_request::max_bucket 9
550system.ruby.Directory.miss_latency_hist.issue_to_initial_request::samples 1
551system.ruby.Directory.miss_latency_hist.issue_to_initial_request::stdev nan
552system.ruby.Directory.miss_latency_hist.issue_to_initial_request | 1 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
553system.ruby.Directory.miss_latency_hist.issue_to_initial_request::total 1

--- 32 unchanged lines hidden (view full) ---

586system.ruby.ST.Directory.miss_type_mach_latency_hist::gmean 48.282634
587system.ruby.ST.Directory.miss_type_mach_latency_hist::stdev 33.823763
588system.ruby.ST.Directory.miss_type_mach_latency_hist | 214 84.25% 84.25% | 35 13.78% 98.03% | 1 0.39% 98.43% | 2 0.79% 99.21% | 1 0.39% 99.61% | 1 0.39% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
589system.ruby.ST.Directory.miss_type_mach_latency_hist::total 254
590system.ruby.IFETCH.Directory.miss_type_mach_latency_hist::bucket_size 64
591system.ruby.IFETCH.Directory.miss_type_mach_latency_hist::max_bucket 639
592system.ruby.IFETCH.Directory.miss_type_mach_latency_hist::samples 623
593system.ruby.IFETCH.Directory.miss_type_mach_latency_hist::mean 60.987159
589system.ruby.IFETCH.Directory.miss_type_mach_latency_hist::gmean 54.083768
590system.ruby.IFETCH.Directory.miss_type_mach_latency_hist::stdev 37.997755
594system.ruby.IFETCH.Directory.miss_type_mach_latency_hist::gmean 54.083593
595system.ruby.IFETCH.Directory.miss_type_mach_latency_hist::stdev 38.003932
591system.ruby.IFETCH.Directory.miss_type_mach_latency_hist | 490 78.65% 78.65% | 102 16.37% 95.02% | 22 3.53% 98.56% | 3 0.48% 99.04% | 5 0.80% 99.84% | 1 0.16% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
592system.ruby.IFETCH.Directory.miss_type_mach_latency_hist::total 623
593system.ruby.RMW_Read.Directory.miss_type_mach_latency_hist::bucket_size 4
594system.ruby.RMW_Read.Directory.miss_type_mach_latency_hist::max_bucket 39
595system.ruby.RMW_Read.Directory.miss_type_mach_latency_hist::samples 1
596system.ruby.RMW_Read.Directory.miss_type_mach_latency_hist::mean 34
597system.ruby.RMW_Read.Directory.miss_type_mach_latency_hist::gmean 34.000000
598system.ruby.RMW_Read.Directory.miss_type_mach_latency_hist::stdev nan
599system.ruby.RMW_Read.Directory.miss_type_mach_latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1 100.00% 100.00% | 0 0.00% 100.00%
600system.ruby.RMW_Read.Directory.miss_type_mach_latency_hist::total 1
596system.ruby.IFETCH.Directory.miss_type_mach_latency_hist | 490 78.65% 78.65% | 102 16.37% 95.02% | 22 3.53% 98.56% | 3 0.48% 99.04% | 5 0.80% 99.84% | 1 0.16% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
597system.ruby.IFETCH.Directory.miss_type_mach_latency_hist::total 623
598system.ruby.RMW_Read.Directory.miss_type_mach_latency_hist::bucket_size 4
599system.ruby.RMW_Read.Directory.miss_type_mach_latency_hist::max_bucket 39
600system.ruby.RMW_Read.Directory.miss_type_mach_latency_hist::samples 1
601system.ruby.RMW_Read.Directory.miss_type_mach_latency_hist::mean 34
602system.ruby.RMW_Read.Directory.miss_type_mach_latency_hist::gmean 34.000000
603system.ruby.RMW_Read.Directory.miss_type_mach_latency_hist::stdev nan
604system.ruby.RMW_Read.Directory.miss_type_mach_latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1 100.00% 100.00% | 0 0.00% 100.00%
605system.ruby.RMW_Read.Directory.miss_type_mach_latency_hist::total 1
606system.ruby.Directory_Controller.GETX 1377 0.00% 0.00%
607system.ruby.Directory_Controller.PUTX 1373 0.00% 0.00%
608system.ruby.Directory_Controller.Memory_Data 1377 0.00% 0.00%
609system.ruby.Directory_Controller.Memory_Ack 1373 0.00% 0.00%
610system.ruby.Directory_Controller.I.GETX 1377 0.00% 0.00%
611system.ruby.Directory_Controller.M.PUTX 1373 0.00% 0.00%
612system.ruby.Directory_Controller.IM.Memory_Data 1377 0.00% 0.00%
613system.ruby.Directory_Controller.MI.Memory_Ack 1373 0.00% 0.00%
601system.ruby.L1Cache_Controller.Load 1045 0.00% 0.00%
602system.ruby.L1Cache_Controller.Ifetch 6864 0.00% 0.00%
603system.ruby.L1Cache_Controller.Store 943 0.00% 0.00%
604system.ruby.L1Cache_Controller.Data 1377 0.00% 0.00%
605system.ruby.L1Cache_Controller.Replacement 1373 0.00% 0.00%
606system.ruby.L1Cache_Controller.Writeback_Ack 1373 0.00% 0.00%
607system.ruby.L1Cache_Controller.I.Load 499 0.00% 0.00%
608system.ruby.L1Cache_Controller.I.Ifetch 623 0.00% 0.00%
609system.ruby.L1Cache_Controller.I.Store 255 0.00% 0.00%
610system.ruby.L1Cache_Controller.M.Load 546 0.00% 0.00%
611system.ruby.L1Cache_Controller.M.Ifetch 6241 0.00% 0.00%
612system.ruby.L1Cache_Controller.M.Store 688 0.00% 0.00%
613system.ruby.L1Cache_Controller.M.Replacement 1373 0.00% 0.00%
614system.ruby.L1Cache_Controller.MI.Writeback_Ack 1373 0.00% 0.00%
615system.ruby.L1Cache_Controller.IS.Data 1122 0.00% 0.00%
616system.ruby.L1Cache_Controller.IM.Data 255 0.00% 0.00%
614system.ruby.L1Cache_Controller.Load 1045 0.00% 0.00%
615system.ruby.L1Cache_Controller.Ifetch 6864 0.00% 0.00%
616system.ruby.L1Cache_Controller.Store 943 0.00% 0.00%
617system.ruby.L1Cache_Controller.Data 1377 0.00% 0.00%
618system.ruby.L1Cache_Controller.Replacement 1373 0.00% 0.00%
619system.ruby.L1Cache_Controller.Writeback_Ack 1373 0.00% 0.00%
620system.ruby.L1Cache_Controller.I.Load 499 0.00% 0.00%
621system.ruby.L1Cache_Controller.I.Ifetch 623 0.00% 0.00%
622system.ruby.L1Cache_Controller.I.Store 255 0.00% 0.00%
623system.ruby.L1Cache_Controller.M.Load 546 0.00% 0.00%
624system.ruby.L1Cache_Controller.M.Ifetch 6241 0.00% 0.00%
625system.ruby.L1Cache_Controller.M.Store 688 0.00% 0.00%
626system.ruby.L1Cache_Controller.M.Replacement 1373 0.00% 0.00%
627system.ruby.L1Cache_Controller.MI.Writeback_Ack 1373 0.00% 0.00%
628system.ruby.L1Cache_Controller.IS.Data 1122 0.00% 0.00%
629system.ruby.L1Cache_Controller.IM.Data 255 0.00% 0.00%
617system.ruby.Directory_Controller.GETX 1377 0.00% 0.00%
618system.ruby.Directory_Controller.PUTX 1373 0.00% 0.00%
619system.ruby.Directory_Controller.Memory_Data 1377 0.00% 0.00%
620system.ruby.Directory_Controller.Memory_Ack 1373 0.00% 0.00%
621system.ruby.Directory_Controller.I.GETX 1377 0.00% 0.00%
622system.ruby.Directory_Controller.M.PUTX 1373 0.00% 0.00%
623system.ruby.Directory_Controller.IM.Memory_Data 1377 0.00% 0.00%
624system.ruby.Directory_Controller.MI.Memory_Ack 1373 0.00% 0.00%
625
626---------- End Simulation Statistics ----------
630
631---------- End Simulation Statistics ----------