1[root]
2type=Root
3children=system
4eventq_index=0
5full_system=false
6sim_quantum=0
7time_sync_enable=false
8time_sync_period=100000000
9time_sync_spin_threshold=100000
10
11[system]
12type=System
13children=clk_domain cpu physmem ruby sys_port_proxy voltage_domain
14boot_osflags=a
15cache_line_size=64
16clk_domain=system.clk_domain
17eventq_index=0
18init_param=0
19kernel=
20load_addr_mask=1099511627775
21load_offset=0

--- 139 unchanged lines hidden (view full) ---

161conf_table_reported=true
162eventq_index=0
163in_addr_map=true
164latency=30
165latency_var=0
166null=true
167range=0:134217727
168
169[system.ruby]
170type=RubySystem
171children=clk_domain dir_cntrl0 l1_cntrl0 memctrl_clk_domain network
172all_instructions=false
173block_size_bytes=64
174clk_domain=system.ruby.clk_domain
175eventq_index=0
176hot_lines=false

--- 104 unchanged lines hidden (view full) ---

281ruby_system=system.ruby
282support_data_reqs=true
283support_inst_reqs=true
284system=system
285using_network_tester=false
286using_ruby_tester=false
287version=0
288master=system.cpu.interrupts.pio system.cpu.interrupts.int_slave
289slave=system.cpu.icache_port system.cpu.dcache_port system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.interrupts.int_master
290
291[system.ruby.memctrl_clk_domain]
292type=DerivedClockDomain
293clk_divider=3
294clk_domain=system.ruby.clk_domain
295eventq_index=0
296

--- 78 unchanged lines hidden (view full) ---

375type=RubyPortProxy
376access_phys_mem=true
377clk_domain=system.clk_domain
378eventq_index=0
379ruby_system=system.ruby
380support_data_reqs=true
381support_inst_reqs=true
382system=system
383using_network_tester=false
384using_ruby_tester=false
385version=0
386slave=system.system_port
387
388[system.voltage_domain]
389type=VoltageDomain
390eventq_index=0
391voltage=1.000000
392