config.ini (9578:49b40999f4a2) config.ini (9885:afd9ea6101d9)
1[root]
2type=Root
3children=system
4full_system=false
5time_sync_enable=false
6time_sync_period=100000000000
7time_sync_spin_threshold=100000000
8
9[system]
10type=System
1[root]
2type=Root
3children=system
4full_system=false
5time_sync_enable=false
6time_sync_period=100000000000
7time_sync_spin_threshold=100000000
8
9[system]
10type=System
11children=cpu membus physmem
11children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain
12boot_osflags=a
12boot_osflags=a
13clock=1000
13cache_line_size=64
14clk_domain=system.clk_domain
14init_param=0
15kernel=
16load_addr_mask=1099511627775
17mem_mode=timing
18mem_ranges=
19memories=system.physmem
20num_work_ids=16
21readfile=
22symbolfile=
23work_begin_ckpt_count=0
24work_begin_cpu_id_exit=-1
25work_begin_exit_count=0
26work_cpus_ckpt_count=0
27work_end_ckpt_count=0
28work_end_exit_count=0
29work_item_id=-1
30system_port=system.membus.slave[0]
31
15init_param=0
16kernel=
17load_addr_mask=1099511627775
18mem_mode=timing
19mem_ranges=
20memories=system.physmem
21num_work_ids=16
22readfile=
23symbolfile=
24work_begin_ckpt_count=0
25work_begin_cpu_id_exit=-1
26work_begin_exit_count=0
27work_cpus_ckpt_count=0
28work_end_ckpt_count=0
29work_end_exit_count=0
30work_item_id=-1
31system_port=system.membus.slave[0]
32
33[system.clk_domain]
34type=SrcClockDomain
35clock=1000
36voltage_domain=system.voltage_domain
37
32[system.cpu]
33type=DerivO3CPU
38[system.cpu]
39type=DerivO3CPU
34children=branchPred dcache dtb fuPool icache interrupts isa itb l2cache toL2Bus tracer workload
40children=apic_clk_domain branchPred dcache dtb fuPool icache interrupts isa itb l2cache toL2Bus tracer workload
35LFSTSize=1024
36LQEntries=32
37LSQCheckLoads=true
38LSQDepCheckShift=4
39SQEntries=32
40SSITSize=1024
41activity=0
42backComSize=5
43branchPred=system.cpu.branchPred
44cachePorts=200
45checker=Null
41LFSTSize=1024
42LQEntries=32
43LSQCheckLoads=true
44LSQDepCheckShift=4
45SQEntries=32
46SSITSize=1024
47activity=0
48backComSize=5
49branchPred=system.cpu.branchPred
50cachePorts=200
51checker=Null
46clock=500
52clk_domain=system.cpu_clk_domain
47commitToDecodeDelay=1
48commitToFetchDelay=1
49commitToIEWDelay=1
50commitToRenameDelay=1
51commitWidth=8
52cpu_id=0
53decodeToFetchDelay=1
54decodeToRenameDelay=1

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87numThreads=1
88profile=0
89progress_interval=0
90renameToDecodeDelay=1
91renameToFetchDelay=1
92renameToIEWDelay=2
93renameToROBDelay=1
94renameWidth=8
53commitToDecodeDelay=1
54commitToFetchDelay=1
55commitToIEWDelay=1
56commitToRenameDelay=1
57commitWidth=8
58cpu_id=0
59decodeToFetchDelay=1
60decodeToRenameDelay=1

--- 32 unchanged lines hidden (view full) ---

93numThreads=1
94profile=0
95progress_interval=0
96renameToDecodeDelay=1
97renameToFetchDelay=1
98renameToIEWDelay=2
99renameToROBDelay=1
100renameWidth=8
101simpoint_start_insts=
95smtCommitPolicy=RoundRobin
96smtFetchPolicy=SingleThread
97smtIQPolicy=Partitioned
98smtIQThreshold=100
99smtLSQPolicy=Partitioned
100smtLSQThreshold=100
101smtNumFetchingThreads=1
102smtROBPolicy=Partitioned

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108tracer=system.cpu.tracer
109trapLatency=13
110wbDepth=1
111wbWidth=8
112workload=system.cpu.workload
113dcache_port=system.cpu.dcache.cpu_side
114icache_port=system.cpu.icache.cpu_side
115
102smtCommitPolicy=RoundRobin
103smtFetchPolicy=SingleThread
104smtIQPolicy=Partitioned
105smtIQThreshold=100
106smtLSQPolicy=Partitioned
107smtLSQThreshold=100
108smtNumFetchingThreads=1
109smtROBPolicy=Partitioned

--- 5 unchanged lines hidden (view full) ---

115tracer=system.cpu.tracer
116trapLatency=13
117wbDepth=1
118wbWidth=8
119workload=system.cpu.workload
120dcache_port=system.cpu.dcache.cpu_side
121icache_port=system.cpu.icache.cpu_side
122
123[system.cpu.apic_clk_domain]
124type=DerivedClockDomain
125clk_divider=16
126clk_domain=system.cpu_clk_domain
127
116[system.cpu.branchPred]
117type=BranchPredictor
118BTBEntries=4096
119BTBTagSize=16
120RASSize=16
121choiceCtrBits=2
122choicePredictorSize=8192
123globalCtrBits=2
128[system.cpu.branchPred]
129type=BranchPredictor
130BTBEntries=4096
131BTBTagSize=16
132RASSize=16
133choiceCtrBits=2
134choicePredictorSize=8192
135globalCtrBits=2
124globalHistoryBits=13
125globalPredictorSize=8192
126instShiftAmt=2
127localCtrBits=2
136globalPredictorSize=8192
137instShiftAmt=2
138localCtrBits=2
128localHistoryBits=11
129localHistoryTableSize=2048
130localPredictorSize=2048
131numThreads=1
132predType=tournament
133
134[system.cpu.dcache]
135type=BaseCache
139localHistoryTableSize=2048
140localPredictorSize=2048
141numThreads=1
142predType=tournament
143
144[system.cpu.dcache]
145type=BaseCache
146children=tags
136addr_ranges=0:18446744073709551615
137assoc=2
147addr_ranges=0:18446744073709551615
148assoc=2
138block_size=64
139clock=500
149clk_domain=system.cpu_clk_domain
140forward_snoops=true
141hit_latency=2
142is_top_level=true
143max_miss_count=0
144mshrs=4
145prefetch_on_access=false
146prefetcher=Null
147response_latency=2
148size=262144
149system=system
150forward_snoops=true
151hit_latency=2
152is_top_level=true
153max_miss_count=0
154mshrs=4
155prefetch_on_access=false
156prefetcher=Null
157response_latency=2
158size=262144
159system=system
160tags=system.cpu.dcache.tags
150tgts_per_mshr=20
151two_queue=false
152write_buffers=8
153cpu_side=system.cpu.dcache_port
154mem_side=system.cpu.toL2Bus.slave[1]
155
161tgts_per_mshr=20
162two_queue=false
163write_buffers=8
164cpu_side=system.cpu.dcache_port
165mem_side=system.cpu.toL2Bus.slave[1]
166
167[system.cpu.dcache.tags]
168type=LRU
169assoc=2
170block_size=64
171clk_domain=system.cpu_clk_domain
172hit_latency=2
173size=262144
174
156[system.cpu.dtb]
157type=X86TLB
158children=walker
159size=64
160walker=system.cpu.dtb.walker
161
162[system.cpu.dtb.walker]
163type=X86PagetableWalker
175[system.cpu.dtb]
176type=X86TLB
177children=walker
178size=64
179walker=system.cpu.dtb.walker
180
181[system.cpu.dtb.walker]
182type=X86PagetableWalker
164clock=500
183clk_domain=system.cpu_clk_domain
184num_squash_per_cycle=4
165system=system
166port=system.cpu.toL2Bus.slave[3]
167
168[system.cpu.fuPool]
169type=FUPool
170children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8
171FUList=system.cpu.fuPool.FUList0 system.cpu.fuPool.FUList1 system.cpu.fuPool.FUList2 system.cpu.fuPool.FUList3 system.cpu.fuPool.FUList4 system.cpu.fuPool.FUList5 system.cpu.fuPool.FUList6 system.cpu.fuPool.FUList7 system.cpu.fuPool.FUList8
172

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425[system.cpu.fuPool.FUList8.opList]
426type=OpDesc
427issueLat=3
428opClass=IprAccess
429opLat=3
430
431[system.cpu.icache]
432type=BaseCache
185system=system
186port=system.cpu.toL2Bus.slave[3]
187
188[system.cpu.fuPool]
189type=FUPool
190children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8
191FUList=system.cpu.fuPool.FUList0 system.cpu.fuPool.FUList1 system.cpu.fuPool.FUList2 system.cpu.fuPool.FUList3 system.cpu.fuPool.FUList4 system.cpu.fuPool.FUList5 system.cpu.fuPool.FUList6 system.cpu.fuPool.FUList7 system.cpu.fuPool.FUList8
192

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445[system.cpu.fuPool.FUList8.opList]
446type=OpDesc
447issueLat=3
448opClass=IprAccess
449opLat=3
450
451[system.cpu.icache]
452type=BaseCache
453children=tags
433addr_ranges=0:18446744073709551615
434assoc=2
454addr_ranges=0:18446744073709551615
455assoc=2
435block_size=64
436clock=500
456clk_domain=system.cpu_clk_domain
437forward_snoops=true
438hit_latency=2
439is_top_level=true
440max_miss_count=0
441mshrs=4
442prefetch_on_access=false
443prefetcher=Null
444response_latency=2
445size=131072
446system=system
457forward_snoops=true
458hit_latency=2
459is_top_level=true
460max_miss_count=0
461mshrs=4
462prefetch_on_access=false
463prefetcher=Null
464response_latency=2
465size=131072
466system=system
467tags=system.cpu.icache.tags
447tgts_per_mshr=20
448two_queue=false
449write_buffers=8
450cpu_side=system.cpu.icache_port
451mem_side=system.cpu.toL2Bus.slave[0]
452
468tgts_per_mshr=20
469two_queue=false
470write_buffers=8
471cpu_side=system.cpu.icache_port
472mem_side=system.cpu.toL2Bus.slave[0]
473
474[system.cpu.icache.tags]
475type=LRU
476assoc=2
477block_size=64
478clk_domain=system.cpu_clk_domain
479hit_latency=2
480size=131072
481
453[system.cpu.interrupts]
454type=X86LocalApic
482[system.cpu.interrupts]
483type=X86LocalApic
455clock=8000
484clk_domain=system.cpu.apic_clk_domain
456int_latency=1000
457pio_addr=2305843009213693952
458pio_latency=100000
459system=system
460int_master=system.membus.slave[2]
461int_slave=system.membus.master[2]
462pio=system.membus.master[1]
463
464[system.cpu.isa]
465type=X86ISA
466
467[system.cpu.itb]
468type=X86TLB
469children=walker
470size=64
471walker=system.cpu.itb.walker
472
473[system.cpu.itb.walker]
474type=X86PagetableWalker
485int_latency=1000
486pio_addr=2305843009213693952
487pio_latency=100000
488system=system
489int_master=system.membus.slave[2]
490int_slave=system.membus.master[2]
491pio=system.membus.master[1]
492
493[system.cpu.isa]
494type=X86ISA
495
496[system.cpu.itb]
497type=X86TLB
498children=walker
499size=64
500walker=system.cpu.itb.walker
501
502[system.cpu.itb.walker]
503type=X86PagetableWalker
475clock=500
504clk_domain=system.cpu_clk_domain
505num_squash_per_cycle=4
476system=system
477port=system.cpu.toL2Bus.slave[2]
478
479[system.cpu.l2cache]
480type=BaseCache
506system=system
507port=system.cpu.toL2Bus.slave[2]
508
509[system.cpu.l2cache]
510type=BaseCache
511children=tags
481addr_ranges=0:18446744073709551615
482assoc=8
512addr_ranges=0:18446744073709551615
513assoc=8
483block_size=64
484clock=500
514clk_domain=system.cpu_clk_domain
485forward_snoops=true
486hit_latency=20
487is_top_level=false
488max_miss_count=0
489mshrs=20
490prefetch_on_access=false
491prefetcher=Null
492response_latency=20
493size=2097152
494system=system
515forward_snoops=true
516hit_latency=20
517is_top_level=false
518max_miss_count=0
519mshrs=20
520prefetch_on_access=false
521prefetcher=Null
522response_latency=20
523size=2097152
524system=system
525tags=system.cpu.l2cache.tags
495tgts_per_mshr=12
496two_queue=false
497write_buffers=8
498cpu_side=system.cpu.toL2Bus.master[0]
499mem_side=system.membus.slave[1]
500
526tgts_per_mshr=12
527two_queue=false
528write_buffers=8
529cpu_side=system.cpu.toL2Bus.master[0]
530mem_side=system.membus.slave[1]
531
532[system.cpu.l2cache.tags]
533type=LRU
534assoc=8
535block_size=64
536clk_domain=system.cpu_clk_domain
537hit_latency=20
538size=2097152
539
501[system.cpu.toL2Bus]
502type=CoherentBus
540[system.cpu.toL2Bus]
541type=CoherentBus
503block_size=64
504clock=500
542clk_domain=system.cpu_clk_domain
505header_cycles=1
506system=system
507use_default_range=false
508width=32
509master=system.cpu.l2cache.cpu_side
510slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port
511
512[system.cpu.tracer]
513type=ExeTracer
514
515[system.cpu.workload]
516type=LiveProcess
517cmd=hello
518cwd=
519egid=100
520env=
521errout=cerr
522euid=100
543header_cycles=1
544system=system
545use_default_range=false
546width=32
547master=system.cpu.l2cache.cpu_side
548slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port
549
550[system.cpu.tracer]
551type=ExeTracer
552
553[system.cpu.workload]
554type=LiveProcess
555cmd=hello
556cwd=
557egid=100
558env=
559errout=cerr
560euid=100
523executable=tests/test-progs/hello/bin/x86/linux/hello
561executable=/dist/m5/regression/test-progs/hello/bin/x86/linux/hello
524gid=100
525input=cin
526max_stack_size=67108864
527output=cout
528pid=100
529ppid=99
530simpoint=0
531system=system
532uid=100
533
562gid=100
563input=cin
564max_stack_size=67108864
565output=cout
566pid=100
567ppid=99
568simpoint=0
569system=system
570uid=100
571
572[system.cpu_clk_domain]
573type=SrcClockDomain
574clock=500
575voltage_domain=system.voltage_domain
576
534[system.membus]
535type=CoherentBus
577[system.membus]
578type=CoherentBus
536block_size=64
537clock=1000
579clk_domain=system.clk_domain
538header_cycles=1
539system=system
540use_default_range=false
541width=8
542master=system.physmem.port system.cpu.interrupts.pio system.cpu.interrupts.int_slave
543slave=system.system_port system.cpu.l2cache.mem_side system.cpu.interrupts.int_master
544
545[system.physmem]
546type=SimpleDRAM
547activation_limit=4
580header_cycles=1
581system=system
582use_default_range=false
583width=8
584master=system.physmem.port system.cpu.interrupts.pio system.cpu.interrupts.int_slave
585slave=system.system_port system.cpu.l2cache.mem_side system.cpu.interrupts.int_master
586
587[system.physmem]
588type=SimpleDRAM
589activation_limit=4
548addr_mapping=openmap
590addr_mapping=RaBaChCo
549banks_per_rank=8
591banks_per_rank=8
592burst_length=8
550channels=1
593channels=1
551clock=1000
552conf_table_reported=false
594clk_domain=system.clk_domain
595conf_table_reported=true
596device_bus_width=8
597device_rowbuffer_size=1024
598devices_per_rank=8
553in_addr_map=true
599in_addr_map=true
554lines_per_rowbuffer=32
555mem_sched_policy=frfcfs
556null=false
557page_policy=open
558range=0:134217727
559ranks_per_channel=2
560read_buffer_size=32
600mem_sched_policy=frfcfs
601null=false
602page_policy=open
603range=0:134217727
604ranks_per_channel=2
605read_buffer_size=32
606static_backend_latency=10000
607static_frontend_latency=10000
561tBURST=5000
562tCL=13750
563tRCD=13750
564tREFI=7800000
565tRFC=300000
566tRP=13750
567tWTR=7500
568tXAW=40000
569write_buffer_size=32
570write_thresh_perc=70
608tBURST=5000
609tCL=13750
610tRCD=13750
611tREFI=7800000
612tRFC=300000
613tRP=13750
614tWTR=7500
615tXAW=40000
616write_buffer_size=32
617write_thresh_perc=70
571zero=false
572port=system.membus.master[0]
573
618port=system.membus.master[0]
619
620[system.voltage_domain]
621type=VoltageDomain
622voltage=1.000000
623