config.ini (11312:3d7a85d71bd1) config.ini (11384:e3cbd2823210)
1[root]
2type=Root
3children=system
4eventq_index=0
5full_system=false
6sim_quantum=0
7time_sync_enable=false
8time_sync_period=100000000000

--- 152 unchanged lines hidden (view full) ---

161type=Cache
162children=tags
163addr_ranges=0:18446744073709551615
164assoc=2
165clk_domain=system.cpu_clk_domain
166clusivity=mostly_incl
167demand_mshr_reserve=1
168eventq_index=0
1[root]
2type=Root
3children=system
4eventq_index=0
5full_system=false
6sim_quantum=0
7time_sync_enable=false
8time_sync_period=100000000000

--- 152 unchanged lines hidden (view full) ---

161type=Cache
162children=tags
163addr_ranges=0:18446744073709551615
164assoc=2
165clk_domain=system.cpu_clk_domain
166clusivity=mostly_incl
167demand_mshr_reserve=1
168eventq_index=0
169forward_snoops=true
170hit_latency=2
171is_read_only=false
172max_miss_count=0
173mshrs=4
174prefetch_on_access=false
175prefetcher=Null
176response_latency=2
177sequential_access=false

--- 342 unchanged lines hidden (view full) ---

520type=Cache
521children=tags
522addr_ranges=0:18446744073709551615
523assoc=2
524clk_domain=system.cpu_clk_domain
525clusivity=mostly_incl
526demand_mshr_reserve=1
527eventq_index=0
169hit_latency=2
170is_read_only=false
171max_miss_count=0
172mshrs=4
173prefetch_on_access=false
174prefetcher=Null
175response_latency=2
176sequential_access=false

--- 342 unchanged lines hidden (view full) ---

519type=Cache
520children=tags
521addr_ranges=0:18446744073709551615
522assoc=2
523clk_domain=system.cpu_clk_domain
524clusivity=mostly_incl
525demand_mshr_reserve=1
526eventq_index=0
528forward_snoops=true
529hit_latency=2
530is_read_only=true
531max_miss_count=0
532mshrs=4
533prefetch_on_access=false
534prefetcher=Null
535response_latency=2
536sequential_access=false

--- 51 unchanged lines hidden (view full) ---

588type=Cache
589children=tags
590addr_ranges=0:18446744073709551615
591assoc=8
592clk_domain=system.cpu_clk_domain
593clusivity=mostly_incl
594demand_mshr_reserve=1
595eventq_index=0
527hit_latency=2
528is_read_only=true
529max_miss_count=0
530mshrs=4
531prefetch_on_access=false
532prefetcher=Null
533response_latency=2
534sequential_access=false

--- 51 unchanged lines hidden (view full) ---

586type=Cache
587children=tags
588addr_ranges=0:18446744073709551615
589assoc=8
590clk_domain=system.cpu_clk_domain
591clusivity=mostly_incl
592demand_mshr_reserve=1
593eventq_index=0
596forward_snoops=true
597hit_latency=20
598is_read_only=false
599max_miss_count=0
600mshrs=20
601prefetch_on_access=false
602prefetcher=Null
603response_latency=20
604sequential_access=false

--- 18 unchanged lines hidden (view full) ---

623
624[system.cpu.toL2Bus]
625type=CoherentXBar
626children=snoop_filter
627clk_domain=system.cpu_clk_domain
628eventq_index=0
629forward_latency=0
630frontend_latency=1
594hit_latency=20
595is_read_only=false
596max_miss_count=0
597mshrs=20
598prefetch_on_access=false
599prefetcher=Null
600response_latency=20
601sequential_access=false

--- 18 unchanged lines hidden (view full) ---

620
621[system.cpu.toL2Bus]
622type=CoherentXBar
623children=snoop_filter
624clk_domain=system.cpu_clk_domain
625eventq_index=0
626forward_latency=0
627frontend_latency=1
628point_of_coherency=false
631response_latency=1
632snoop_filter=system.cpu.toL2Bus.snoop_filter
633snoop_response_latency=1
634system=system
635use_default_range=false
636width=32
637master=system.cpu.l2cache.cpu_side
638slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port

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653cmd=hello
654cwd=
655drivers=
656egid=100
657env=
658errout=cerr
659euid=100
660eventq_index=0
629response_latency=1
630snoop_filter=system.cpu.toL2Bus.snoop_filter
631snoop_response_latency=1
632system=system
633use_default_range=false
634width=32
635master=system.cpu.l2cache.cpu_side
636slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port

--- 14 unchanged lines hidden (view full) ---

651cmd=hello
652cwd=
653drivers=
654egid=100
655env=
656errout=cerr
657euid=100
658eventq_index=0
661executable=/dist/m5/regression/test-progs/hello/bin/x86/linux/hello
659executable=/home/stever/hg/m5sim.org/gem5/tests/test-progs/hello/bin/x86/linux/hello
662gid=100
663input=cin
664kvmInSE=false
665max_stack_size=67108864
666output=cout
667pid=100
668ppid=99
669simpoint=0

--- 18 unchanged lines hidden (view full) ---

688transition_latency=100000000
689
690[system.membus]
691type=CoherentXBar
692clk_domain=system.clk_domain
693eventq_index=0
694forward_latency=4
695frontend_latency=3
660gid=100
661input=cin
662kvmInSE=false
663max_stack_size=67108864
664output=cout
665pid=100
666ppid=99
667simpoint=0

--- 18 unchanged lines hidden (view full) ---

686transition_latency=100000000
687
688[system.membus]
689type=CoherentXBar
690clk_domain=system.clk_domain
691eventq_index=0
692forward_latency=4
693frontend_latency=3
694point_of_coherency=true
696response_latency=2
697snoop_filter=Null
698snoop_response_latency=4
699system=system
700use_default_range=false
701width=16
702master=system.physmem.port system.cpu.interrupts.pio system.cpu.interrupts.int_slave
703slave=system.system_port system.cpu.l2cache.mem_side system.cpu.interrupts.int_master

--- 83 unchanged lines hidden ---
695response_latency=2
696snoop_filter=Null
697snoop_response_latency=4
698system=system
699use_default_range=false
700width=16
701master=system.physmem.port system.cpu.interrupts.pio system.cpu.interrupts.int_slave
702slave=system.system_port system.cpu.l2cache.mem_side system.cpu.interrupts.int_master

--- 83 unchanged lines hidden ---