| config.ini (10636:9ac724889705) | config.ini (10736:4433fb00fa7d) |
|---|---|
| 1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=false 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 --- 9 unchanged lines hidden (view full) --- 18init_param=0 19kernel= 20kernel_addr_check=true 21load_addr_mask=1099511627775 22load_offset=0 23mem_mode=timing 24mem_ranges= 25memories=system.physmem | 1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=false 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 --- 9 unchanged lines hidden (view full) --- 18init_param=0 19kernel= 20kernel_addr_check=true 21load_addr_mask=1099511627775 22load_offset=0 23mem_mode=timing 24mem_ranges= 25memories=system.physmem |
| 26mmap_using_noreserve=false |
|
| 26num_work_ids=16 27readfile= 28symbolfile= 29work_begin_ckpt_count=0 30work_begin_cpu_id_exit=-1 31work_begin_exit_count=0 32work_cpus_ckpt_count=0 33work_end_ckpt_count=0 --- 581 unchanged lines hidden (view full) --- 615hit_latency=20 616sequential_access=false 617size=2097152 618 619[system.cpu.toL2Bus] 620type=CoherentXBar 621clk_domain=system.cpu_clk_domain 622eventq_index=0 | 27num_work_ids=16 28readfile= 29symbolfile= 30work_begin_ckpt_count=0 31work_begin_cpu_id_exit=-1 32work_begin_exit_count=0 33work_cpus_ckpt_count=0 34work_end_ckpt_count=0 --- 581 unchanged lines hidden (view full) --- 616hit_latency=20 617sequential_access=false 618size=2097152 619 620[system.cpu.toL2Bus] 621type=CoherentXBar 622clk_domain=system.cpu_clk_domain 623eventq_index=0 |
| 623header_cycles=1 | 624forward_latency=0 625frontend_latency=1 626response_latency=1 |
| 624snoop_filter=Null | 627snoop_filter=Null |
| 628snoop_response_latency=1 |
|
| 625system=system 626use_default_range=false 627width=32 628master=system.cpu.l2cache.cpu_side 629slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port 630 631[system.cpu.tracer] 632type=ExeTracer --- 37 unchanged lines hidden (view full) --- 670eventq_index=0 671sys_clk_domain=system.clk_domain 672transition_latency=100000000 673 674[system.membus] 675type=CoherentXBar 676clk_domain=system.clk_domain 677eventq_index=0 | 629system=system 630use_default_range=false 631width=32 632master=system.cpu.l2cache.cpu_side 633slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port 634 635[system.cpu.tracer] 636type=ExeTracer --- 37 unchanged lines hidden (view full) --- 674eventq_index=0 675sys_clk_domain=system.clk_domain 676transition_latency=100000000 677 678[system.membus] 679type=CoherentXBar 680clk_domain=system.clk_domain 681eventq_index=0 |
| 678header_cycles=1 | 682forward_latency=4 683frontend_latency=3 684response_latency=2 |
| 679snoop_filter=Null | 685snoop_filter=Null |
| 686snoop_response_latency=4 |
|
| 680system=system 681use_default_range=false | 687system=system 688use_default_range=false |
| 682width=8 | 689width=16 |
| 683master=system.physmem.port system.cpu.interrupts.pio system.cpu.interrupts.int_slave 684slave=system.system_port system.cpu.l2cache.mem_side system.cpu.interrupts.int_master 685 686[system.physmem] 687type=DRAMCtrl 688IDD0=0.075000 689IDD02=0.000000 690IDD2N=0.050000 --- 14 unchanged lines hidden (view full) --- 705IDD4W2=0.000000 706IDD5=0.220000 707IDD52=0.000000 708IDD6=0.000000 709IDD62=0.000000 710VDD=1.500000 711VDD2=0.000000 712activation_limit=4 | 690master=system.physmem.port system.cpu.interrupts.pio system.cpu.interrupts.int_slave 691slave=system.system_port system.cpu.l2cache.mem_side system.cpu.interrupts.int_master 692 693[system.physmem] 694type=DRAMCtrl 695IDD0=0.075000 696IDD02=0.000000 697IDD2N=0.050000 --- 14 unchanged lines hidden (view full) --- 712IDD4W2=0.000000 713IDD5=0.220000 714IDD52=0.000000 715IDD6=0.000000 716IDD62=0.000000 717VDD=1.500000 718VDD2=0.000000 719activation_limit=4 |
| 713addr_mapping=RoRaBaChCo | 720addr_mapping=RoRaBaCoCh |
| 714bank_groups_per_rank=0 715banks_per_rank=8 716burst_length=8 717channels=1 718clk_domain=system.clk_domain 719conf_table_reported=true 720device_bus_width=8 721device_rowbuffer_size=1024 --- 46 unchanged lines hidden --- | 721bank_groups_per_rank=0 722banks_per_rank=8 723burst_length=8 724channels=1 725clk_domain=system.clk_domain 726conf_table_reported=true 727device_bus_width=8 728device_rowbuffer_size=1024 --- 46 unchanged lines hidden --- |