7,11c7,11
< host_inst_rate 240215 # Simulator instruction rate (inst/s)
< host_op_rate 240049 # Simulator op (including micro ops) rate (op/s)
< host_tick_rate 1267195715 # Simulator tick rate (ticks/s)
< host_mem_usage 220748 # Number of bytes of host memory used
< host_seconds 0.02 # Real time elapsed on the host
---
> host_inst_rate 427855 # Simulator instruction rate (inst/s)
> host_op_rate 427237 # Simulator op (including micro ops) rate (op/s)
> host_tick_rate 2253599179 # Simulator tick rate (ticks/s)
> host_mem_usage 221156 # Number of bytes of host memory used
> host_seconds 0.01 # Real time elapsed on the host
14,22c14,29
< system.physmem.bytes_read 24896 # Number of bytes read from this memory
< system.physmem.bytes_inst_read 16320 # Number of instructions bytes read from this memory
< system.physmem.bytes_written 0 # Number of bytes written to this memory
< system.physmem.num_reads 389 # Number of read requests responded to by this memory
< system.physmem.num_writes 0 # Number of write requests responded to by this memory
< system.physmem.num_other 0 # Number of other requests responded to by this memory
< system.physmem.bw_read 882649082 # Total read bandwidth from this memory (bytes/s)
< system.physmem.bw_inst_read 578600298 # Instruction read bandwidth from this memory (bytes/s)
< system.physmem.bw_total 882649082 # Total bandwidth to/from this memory (bytes/s)
---
> system.physmem.bytes_read::cpu.inst 16320 # Number of bytes read from this memory
> system.physmem.bytes_read::cpu.data 8576 # Number of bytes read from this memory
> system.physmem.bytes_read::total 24896 # Number of bytes read from this memory
> system.physmem.bytes_inst_read::cpu.inst 16320 # Number of instructions bytes read from this memory
> system.physmem.bytes_inst_read::total 16320 # Number of instructions bytes read from this memory
> system.physmem.num_reads::cpu.inst 255 # Number of read requests responded to by this memory
> system.physmem.num_reads::cpu.data 134 # Number of read requests responded to by this memory
> system.physmem.num_reads::total 389 # Number of read requests responded to by this memory
> system.physmem.bw_read::cpu.inst 578600298 # Total read bandwidth from this memory (bytes/s)
> system.physmem.bw_read::cpu.data 304048784 # Total read bandwidth from this memory (bytes/s)
> system.physmem.bw_read::total 882649082 # Total read bandwidth from this memory (bytes/s)
> system.physmem.bw_inst_read::cpu.inst 578600298 # Instruction read bandwidth from this memory (bytes/s)
> system.physmem.bw_inst_read::total 578600298 # Instruction read bandwidth from this memory (bytes/s)
> system.physmem.bw_total::cpu.inst 578600298 # Total bandwidth to/from this memory (bytes/s)
> system.physmem.bw_total::cpu.data 304048784 # Total bandwidth to/from this memory (bytes/s)
> system.physmem.bw_total::total 882649082 # Total bandwidth to/from this memory (bytes/s)
79a87
> system.cpu.icache.ReadReq_miss_rate::total 0.047734 # miss rate for ReadReq accesses
80a89
> system.cpu.icache.demand_miss_rate::total 0.047734 # miss rate for demand accesses
81a91
> system.cpu.icache.overall_miss_rate::total 0.047734 # miss rate for overall accesses
82a93
> system.cpu.icache.ReadReq_avg_miss_latency::total 55673.151751 # average ReadReq miss latency
83a95
> system.cpu.icache.demand_avg_miss_latency::total 55673.151751 # average overall miss latency
84a97
> system.cpu.icache.overall_avg_miss_latency::total 55673.151751 # average overall miss latency
105a119
> system.cpu.icache.ReadReq_mshr_miss_rate::total 0.047734 # mshr miss rate for ReadReq accesses
106a121
> system.cpu.icache.demand_mshr_miss_rate::total 0.047734 # mshr miss rate for demand accesses
107a123
> system.cpu.icache.overall_mshr_miss_rate::total 0.047734 # mshr miss rate for overall accesses
108a125
> system.cpu.icache.ReadReq_avg_mshr_miss_latency::total 52673.151751 # average ReadReq mshr miss latency
109a127
> system.cpu.icache.demand_avg_mshr_miss_latency::total 52673.151751 # average overall mshr miss latency
110a129
> system.cpu.icache.overall_avg_mshr_miss_latency::total 52673.151751 # average overall mshr miss latency
153a173
> system.cpu.dcache.ReadReq_miss_rate::total 0.075419 # miss rate for ReadReq accesses
154a175
> system.cpu.dcache.WriteReq_miss_rate::total 0.120357 # miss rate for WriteReq accesses
155a177
> system.cpu.dcache.demand_miss_rate::total 0.097192 # miss rate for demand accesses
156a179
> system.cpu.dcache.overall_miss_rate::total 0.097192 # miss rate for overall accesses
157a181
> system.cpu.dcache.ReadReq_avg_miss_latency::total 55222.222222 # average ReadReq miss latency
158a183
> system.cpu.dcache.WriteReq_avg_miss_latency::total 56000 # average WriteReq miss latency
159a185
> system.cpu.dcache.demand_avg_miss_latency::total 55688.888889 # average overall miss latency
160a187
> system.cpu.dcache.overall_avg_miss_latency::total 55688.888889 # average overall miss latency
185a213
> system.cpu.dcache.ReadReq_mshr_miss_rate::total 0.075419 # mshr miss rate for ReadReq accesses
186a215
> system.cpu.dcache.WriteReq_mshr_miss_rate::total 0.120357 # mshr miss rate for WriteReq accesses
187a217
> system.cpu.dcache.demand_mshr_miss_rate::total 0.097192 # mshr miss rate for demand accesses
188a219
> system.cpu.dcache.overall_mshr_miss_rate::total 0.097192 # mshr miss rate for overall accesses
189a221
> system.cpu.dcache.ReadReq_avg_mshr_miss_latency::total 52222.222222 # average ReadReq mshr miss latency
190a223
> system.cpu.dcache.WriteReq_avg_mshr_miss_latency::total 53000 # average WriteReq mshr miss latency
191a225
> system.cpu.dcache.demand_avg_mshr_miss_latency::total 52688.888889 # average overall mshr miss latency
192a227
> system.cpu.dcache.overall_avg_mshr_miss_latency::total 52688.888889 # average overall mshr miss latency
248a284
> system.cpu.l2cache.ReadReq_miss_rate::total 0.990354 # miss rate for ReadReq accesses
249a286
> system.cpu.l2cache.ReadExReq_miss_rate::total 1 # miss rate for ReadExReq accesses
251a289
> system.cpu.l2cache.demand_miss_rate::total 0.992347 # miss rate for demand accesses
253a292
> system.cpu.l2cache.overall_miss_rate::total 0.992347 # miss rate for overall accesses
255a295
> system.cpu.l2cache.ReadReq_avg_miss_latency::total 52000 # average ReadReq miss latency
256a297
> system.cpu.l2cache.ReadExReq_avg_miss_latency::total 52000 # average ReadExReq miss latency
258a300
> system.cpu.l2cache.demand_avg_miss_latency::total 52000 # average overall miss latency
260a303
> system.cpu.l2cache.overall_avg_miss_latency::total 52000 # average overall miss latency
292a336
> system.cpu.l2cache.ReadReq_mshr_miss_rate::total 0.990354 # mshr miss rate for ReadReq accesses
293a338
> system.cpu.l2cache.ReadExReq_mshr_miss_rate::total 1 # mshr miss rate for ReadExReq accesses
295a341
> system.cpu.l2cache.demand_mshr_miss_rate::total 0.992347 # mshr miss rate for demand accesses
297a344
> system.cpu.l2cache.overall_mshr_miss_rate::total 0.992347 # mshr miss rate for overall accesses
299a347
> system.cpu.l2cache.ReadReq_avg_mshr_miss_latency::total 40000 # average ReadReq mshr miss latency
300a349
> system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::total 40000 # average ReadExReq mshr miss latency
302a352
> system.cpu.l2cache.demand_avg_mshr_miss_latency::total 40000 # average overall mshr miss latency
304a355
> system.cpu.l2cache.overall_avg_mshr_miss_latency::total 40000 # average overall mshr miss latency
< host_inst_rate 240215 # Simulator instruction rate (inst/s)
< host_op_rate 240049 # Simulator op (including micro ops) rate (op/s)
< host_tick_rate 1267195715 # Simulator tick rate (ticks/s)
< host_mem_usage 220748 # Number of bytes of host memory used
< host_seconds 0.02 # Real time elapsed on the host
---
> host_inst_rate 427855 # Simulator instruction rate (inst/s)
> host_op_rate 427237 # Simulator op (including micro ops) rate (op/s)
> host_tick_rate 2253599179 # Simulator tick rate (ticks/s)
> host_mem_usage 221156 # Number of bytes of host memory used
> host_seconds 0.01 # Real time elapsed on the host
14,22c14,29
< system.physmem.bytes_read 24896 # Number of bytes read from this memory
< system.physmem.bytes_inst_read 16320 # Number of instructions bytes read from this memory
< system.physmem.bytes_written 0 # Number of bytes written to this memory
< system.physmem.num_reads 389 # Number of read requests responded to by this memory
< system.physmem.num_writes 0 # Number of write requests responded to by this memory
< system.physmem.num_other 0 # Number of other requests responded to by this memory
< system.physmem.bw_read 882649082 # Total read bandwidth from this memory (bytes/s)
< system.physmem.bw_inst_read 578600298 # Instruction read bandwidth from this memory (bytes/s)
< system.physmem.bw_total 882649082 # Total bandwidth to/from this memory (bytes/s)
---
> system.physmem.bytes_read::cpu.inst 16320 # Number of bytes read from this memory
> system.physmem.bytes_read::cpu.data 8576 # Number of bytes read from this memory
> system.physmem.bytes_read::total 24896 # Number of bytes read from this memory
> system.physmem.bytes_inst_read::cpu.inst 16320 # Number of instructions bytes read from this memory
> system.physmem.bytes_inst_read::total 16320 # Number of instructions bytes read from this memory
> system.physmem.num_reads::cpu.inst 255 # Number of read requests responded to by this memory
> system.physmem.num_reads::cpu.data 134 # Number of read requests responded to by this memory
> system.physmem.num_reads::total 389 # Number of read requests responded to by this memory
> system.physmem.bw_read::cpu.inst 578600298 # Total read bandwidth from this memory (bytes/s)
> system.physmem.bw_read::cpu.data 304048784 # Total read bandwidth from this memory (bytes/s)
> system.physmem.bw_read::total 882649082 # Total read bandwidth from this memory (bytes/s)
> system.physmem.bw_inst_read::cpu.inst 578600298 # Instruction read bandwidth from this memory (bytes/s)
> system.physmem.bw_inst_read::total 578600298 # Instruction read bandwidth from this memory (bytes/s)
> system.physmem.bw_total::cpu.inst 578600298 # Total bandwidth to/from this memory (bytes/s)
> system.physmem.bw_total::cpu.data 304048784 # Total bandwidth to/from this memory (bytes/s)
> system.physmem.bw_total::total 882649082 # Total bandwidth to/from this memory (bytes/s)
79a87
> system.cpu.icache.ReadReq_miss_rate::total 0.047734 # miss rate for ReadReq accesses
80a89
> system.cpu.icache.demand_miss_rate::total 0.047734 # miss rate for demand accesses
81a91
> system.cpu.icache.overall_miss_rate::total 0.047734 # miss rate for overall accesses
82a93
> system.cpu.icache.ReadReq_avg_miss_latency::total 55673.151751 # average ReadReq miss latency
83a95
> system.cpu.icache.demand_avg_miss_latency::total 55673.151751 # average overall miss latency
84a97
> system.cpu.icache.overall_avg_miss_latency::total 55673.151751 # average overall miss latency
105a119
> system.cpu.icache.ReadReq_mshr_miss_rate::total 0.047734 # mshr miss rate for ReadReq accesses
106a121
> system.cpu.icache.demand_mshr_miss_rate::total 0.047734 # mshr miss rate for demand accesses
107a123
> system.cpu.icache.overall_mshr_miss_rate::total 0.047734 # mshr miss rate for overall accesses
108a125
> system.cpu.icache.ReadReq_avg_mshr_miss_latency::total 52673.151751 # average ReadReq mshr miss latency
109a127
> system.cpu.icache.demand_avg_mshr_miss_latency::total 52673.151751 # average overall mshr miss latency
110a129
> system.cpu.icache.overall_avg_mshr_miss_latency::total 52673.151751 # average overall mshr miss latency
153a173
> system.cpu.dcache.ReadReq_miss_rate::total 0.075419 # miss rate for ReadReq accesses
154a175
> system.cpu.dcache.WriteReq_miss_rate::total 0.120357 # miss rate for WriteReq accesses
155a177
> system.cpu.dcache.demand_miss_rate::total 0.097192 # miss rate for demand accesses
156a179
> system.cpu.dcache.overall_miss_rate::total 0.097192 # miss rate for overall accesses
157a181
> system.cpu.dcache.ReadReq_avg_miss_latency::total 55222.222222 # average ReadReq miss latency
158a183
> system.cpu.dcache.WriteReq_avg_miss_latency::total 56000 # average WriteReq miss latency
159a185
> system.cpu.dcache.demand_avg_miss_latency::total 55688.888889 # average overall miss latency
160a187
> system.cpu.dcache.overall_avg_miss_latency::total 55688.888889 # average overall miss latency
185a213
> system.cpu.dcache.ReadReq_mshr_miss_rate::total 0.075419 # mshr miss rate for ReadReq accesses
186a215
> system.cpu.dcache.WriteReq_mshr_miss_rate::total 0.120357 # mshr miss rate for WriteReq accesses
187a217
> system.cpu.dcache.demand_mshr_miss_rate::total 0.097192 # mshr miss rate for demand accesses
188a219
> system.cpu.dcache.overall_mshr_miss_rate::total 0.097192 # mshr miss rate for overall accesses
189a221
> system.cpu.dcache.ReadReq_avg_mshr_miss_latency::total 52222.222222 # average ReadReq mshr miss latency
190a223
> system.cpu.dcache.WriteReq_avg_mshr_miss_latency::total 53000 # average WriteReq mshr miss latency
191a225
> system.cpu.dcache.demand_avg_mshr_miss_latency::total 52688.888889 # average overall mshr miss latency
192a227
> system.cpu.dcache.overall_avg_mshr_miss_latency::total 52688.888889 # average overall mshr miss latency
248a284
> system.cpu.l2cache.ReadReq_miss_rate::total 0.990354 # miss rate for ReadReq accesses
249a286
> system.cpu.l2cache.ReadExReq_miss_rate::total 1 # miss rate for ReadExReq accesses
251a289
> system.cpu.l2cache.demand_miss_rate::total 0.992347 # miss rate for demand accesses
253a292
> system.cpu.l2cache.overall_miss_rate::total 0.992347 # miss rate for overall accesses
255a295
> system.cpu.l2cache.ReadReq_avg_miss_latency::total 52000 # average ReadReq miss latency
256a297
> system.cpu.l2cache.ReadExReq_avg_miss_latency::total 52000 # average ReadExReq miss latency
258a300
> system.cpu.l2cache.demand_avg_miss_latency::total 52000 # average overall miss latency
260a303
> system.cpu.l2cache.overall_avg_miss_latency::total 52000 # average overall miss latency
292a336
> system.cpu.l2cache.ReadReq_mshr_miss_rate::total 0.990354 # mshr miss rate for ReadReq accesses
293a338
> system.cpu.l2cache.ReadExReq_mshr_miss_rate::total 1 # mshr miss rate for ReadExReq accesses
295a341
> system.cpu.l2cache.demand_mshr_miss_rate::total 0.992347 # mshr miss rate for demand accesses
297a344
> system.cpu.l2cache.overall_mshr_miss_rate::total 0.992347 # mshr miss rate for overall accesses
299a347
> system.cpu.l2cache.ReadReq_avg_mshr_miss_latency::total 40000 # average ReadReq mshr miss latency
300a349
> system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::total 40000 # average ReadExReq mshr miss latency
302a352
> system.cpu.l2cache.demand_avg_mshr_miss_latency::total 40000 # average overall mshr miss latency
304a355
> system.cpu.l2cache.overall_avg_mshr_miss_latency::total 40000 # average overall mshr miss latency