| config.ini (10451:3a87241adfb8) | config.ini (10736:4433fb00fa7d) |
|---|---|
| 1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=false 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 --- 9 unchanged lines hidden (view full) --- 18init_param=0 19kernel= 20kernel_addr_check=true 21load_addr_mask=1099511627775 22load_offset=0 23mem_mode=timing 24mem_ranges= 25memories=system.physmem | 1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=false 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 --- 9 unchanged lines hidden (view full) --- 18init_param=0 19kernel= 20kernel_addr_check=true 21load_addr_mask=1099511627775 22load_offset=0 23mem_mode=timing 24mem_ranges= 25memories=system.physmem |
| 26mmap_using_noreserve=false |
|
| 26num_work_ids=16 27readfile= 28symbolfile= 29work_begin_ckpt_count=0 30work_begin_cpu_id_exit=-1 31work_begin_exit_count=0 32work_cpus_ckpt_count=0 33work_end_ckpt_count=0 --- 43 unchanged lines hidden (view full) --- 77icache_port=system.cpu.icache.cpu_side 78 79[system.cpu.dcache] 80type=BaseCache 81children=tags 82addr_ranges=0:18446744073709551615 83assoc=2 84clk_domain=system.cpu_clk_domain | 27num_work_ids=16 28readfile= 29symbolfile= 30work_begin_ckpt_count=0 31work_begin_cpu_id_exit=-1 32work_begin_exit_count=0 33work_cpus_ckpt_count=0 34work_end_ckpt_count=0 --- 43 unchanged lines hidden (view full) --- 78icache_port=system.cpu.icache.cpu_side 79 80[system.cpu.dcache] 81type=BaseCache 82children=tags 83addr_ranges=0:18446744073709551615 84assoc=2 85clk_domain=system.cpu_clk_domain |
| 86demand_mshr_reserve=1 |
|
| 85eventq_index=0 86forward_snoops=true 87hit_latency=2 88is_top_level=true 89max_miss_count=0 90mshrs=4 91prefetch_on_access=false 92prefetcher=Null --- 24 unchanged lines hidden (view full) --- 117size=64 118 119[system.cpu.icache] 120type=BaseCache 121children=tags 122addr_ranges=0:18446744073709551615 123assoc=2 124clk_domain=system.cpu_clk_domain | 87eventq_index=0 88forward_snoops=true 89hit_latency=2 90is_top_level=true 91max_miss_count=0 92mshrs=4 93prefetch_on_access=false 94prefetcher=Null --- 24 unchanged lines hidden (view full) --- 119size=64 120 121[system.cpu.icache] 122type=BaseCache 123children=tags 124addr_ranges=0:18446744073709551615 125assoc=2 126clk_domain=system.cpu_clk_domain |
| 127demand_mshr_reserve=1 |
|
| 125eventq_index=0 126forward_snoops=true 127hit_latency=2 128is_top_level=true 129max_miss_count=0 130mshrs=4 131prefetch_on_access=false 132prefetcher=Null --- 32 unchanged lines hidden (view full) --- 165size=64 166 167[system.cpu.l2cache] 168type=BaseCache 169children=tags 170addr_ranges=0:18446744073709551615 171assoc=8 172clk_domain=system.cpu_clk_domain | 128eventq_index=0 129forward_snoops=true 130hit_latency=2 131is_top_level=true 132max_miss_count=0 133mshrs=4 134prefetch_on_access=false 135prefetcher=Null --- 32 unchanged lines hidden (view full) --- 168size=64 169 170[system.cpu.l2cache] 171type=BaseCache 172children=tags 173addr_ranges=0:18446744073709551615 174assoc=8 175clk_domain=system.cpu_clk_domain |
| 176demand_mshr_reserve=1 |
|
| 173eventq_index=0 174forward_snoops=true 175hit_latency=20 176is_top_level=false 177max_miss_count=0 178mshrs=20 179prefetch_on_access=false 180prefetcher=Null --- 17 unchanged lines hidden (view full) --- 198hit_latency=20 199sequential_access=false 200size=2097152 201 202[system.cpu.toL2Bus] 203type=CoherentXBar 204clk_domain=system.cpu_clk_domain 205eventq_index=0 | 177eventq_index=0 178forward_snoops=true 179hit_latency=20 180is_top_level=false 181max_miss_count=0 182mshrs=20 183prefetch_on_access=false 184prefetcher=Null --- 17 unchanged lines hidden (view full) --- 202hit_latency=20 203sequential_access=false 204size=2097152 205 206[system.cpu.toL2Bus] 207type=CoherentXBar 208clk_domain=system.cpu_clk_domain 209eventq_index=0 |
| 206header_cycles=1 | 210forward_latency=0 211frontend_latency=1 212response_latency=1 |
| 207snoop_filter=Null | 213snoop_filter=Null |
| 214snoop_response_latency=1 |
|
| 208system=system 209use_default_range=false 210width=32 211master=system.cpu.l2cache.cpu_side 212slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side 213 214[system.cpu.tracer] 215type=ExeTracer 216eventq_index=0 217 218[system.cpu.workload] 219type=LiveProcess 220cmd=hello 221cwd= | 215system=system 216use_default_range=false 217width=32 218master=system.cpu.l2cache.cpu_side 219slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side 220 221[system.cpu.tracer] 222type=ExeTracer 223eventq_index=0 224 225[system.cpu.workload] 226type=LiveProcess 227cmd=hello 228cwd= |
| 229drivers= |
|
| 222egid=100 223env= 224errout=cerr 225euid=100 226eventq_index=0 227executable=/scratch/nilay/GEM5/gem5/tests/test-progs/hello/bin/sparc/linux/hello 228gid=100 229input=cin | 230egid=100 231env= 232errout=cerr 233euid=100 234eventq_index=0 235executable=/scratch/nilay/GEM5/gem5/tests/test-progs/hello/bin/sparc/linux/hello 236gid=100 237input=cin |
| 238kvmInSE=false |
|
| 230max_stack_size=67108864 231output=cout 232pid=100 233ppid=99 234simpoint=0 235system=system 236uid=100 237useArchPT=false --- 13 unchanged lines hidden (view full) --- 251eventq_index=0 252sys_clk_domain=system.clk_domain 253transition_latency=100000000 254 255[system.membus] 256type=CoherentXBar 257clk_domain=system.clk_domain 258eventq_index=0 | 239max_stack_size=67108864 240output=cout 241pid=100 242ppid=99 243simpoint=0 244system=system 245uid=100 246useArchPT=false --- 13 unchanged lines hidden (view full) --- 260eventq_index=0 261sys_clk_domain=system.clk_domain 262transition_latency=100000000 263 264[system.membus] 265type=CoherentXBar 266clk_domain=system.clk_domain 267eventq_index=0 |
| 259header_cycles=1 | 268forward_latency=4 269frontend_latency=3 270response_latency=2 |
| 260snoop_filter=Null | 271snoop_filter=Null |
| 272snoop_response_latency=4 |
|
| 261system=system 262use_default_range=false | 273system=system 274use_default_range=false |
| 263width=8 | 275width=16 |
| 264master=system.physmem.port 265slave=system.system_port system.cpu.l2cache.mem_side 266 267[system.physmem] 268type=SimpleMemory 269bandwidth=73.000000 270clk_domain=system.clk_domain 271conf_table_reported=true --- 13 unchanged lines hidden --- | 276master=system.physmem.port 277slave=system.system_port system.cpu.l2cache.mem_side 278 279[system.physmem] 280type=SimpleMemory 281bandwidth=73.000000 282clk_domain=system.clk_domain 283conf_table_reported=true --- 13 unchanged lines hidden --- |