| stats.txt (11530:6e143fd2cabf) | stats.txt (11680:b4d943429dc6) |
|---|---|
| 1 2---------- Begin Simulation Statistics ---------- | 1 2---------- Begin Simulation Statistics ---------- |
| 3sim_seconds 0.000082 # Number of seconds simulated 4sim_ticks 81703 # Number of ticks simulated 5final_tick 81703 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) | 3sim_seconds 0.000087 # Number of seconds simulated 4sim_ticks 86746 # Number of ticks simulated 5final_tick 86746 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) |
| 6sim_freq 1000000000 # Frequency of simulated ticks | 6sim_freq 1000000000 # Frequency of simulated ticks |
| 7host_inst_rate 107011 # Simulator instruction rate (inst/s) 8host_op_rate 106993 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 1640735 # Simulator tick rate (ticks/s) 10host_mem_usage 456212 # Number of bytes of host memory used 11host_seconds 0.05 # Real time elapsed on the host | 7host_inst_rate 61570 # Simulator instruction rate (inst/s) 8host_op_rate 61552 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 1002076 # Simulator tick rate (ticks/s) 10host_mem_usage 413704 # Number of bytes of host memory used 11host_seconds 0.09 # Real time elapsed on the host |
| 12sim_insts 5327 # Number of instructions simulated 13sim_ops 5327 # Number of ops (including micro ops) simulated 14system.voltage_domain.voltage 1 # Voltage in Volts 15system.clk_domain.clock 1 # Clock period in ticks | 12sim_insts 5327 # Number of instructions simulated 13sim_ops 5327 # Number of ops (including micro ops) simulated 14system.voltage_domain.voltage 1 # Voltage in Volts 15system.clk_domain.clock 1 # Clock period in ticks |
| 16system.mem_ctrls.pwrStateResidencyTicks::UNDEFINED 81703 # Cumulative time (in ticks) in various power states | 16system.mem_ctrls.pwrStateResidencyTicks::UNDEFINED 86746 # Cumulative time (in ticks) in various power states |
| 17system.mem_ctrls.bytes_read::ruby.dir_cntrl0 82496 # Number of bytes read from this memory 18system.mem_ctrls.bytes_read::total 82496 # Number of bytes read from this memory 19system.mem_ctrls.bytes_written::ruby.dir_cntrl0 82240 # Number of bytes written to this memory 20system.mem_ctrls.bytes_written::total 82240 # Number of bytes written to this memory 21system.mem_ctrls.num_reads::ruby.dir_cntrl0 1289 # Number of read requests responded to by this memory 22system.mem_ctrls.num_reads::total 1289 # Number of read requests responded to by this memory 23system.mem_ctrls.num_writes::ruby.dir_cntrl0 1285 # Number of write requests responded to by this memory 24system.mem_ctrls.num_writes::total 1285 # Number of write requests responded to by this memory | 17system.mem_ctrls.bytes_read::ruby.dir_cntrl0 82496 # Number of bytes read from this memory 18system.mem_ctrls.bytes_read::total 82496 # Number of bytes read from this memory 19system.mem_ctrls.bytes_written::ruby.dir_cntrl0 82240 # Number of bytes written to this memory 20system.mem_ctrls.bytes_written::total 82240 # Number of bytes written to this memory 21system.mem_ctrls.num_reads::ruby.dir_cntrl0 1289 # Number of read requests responded to by this memory 22system.mem_ctrls.num_reads::total 1289 # Number of read requests responded to by this memory 23system.mem_ctrls.num_writes::ruby.dir_cntrl0 1285 # Number of write requests responded to by this memory 24system.mem_ctrls.num_writes::total 1285 # Number of write requests responded to by this memory |
| 25system.mem_ctrls.bw_read::ruby.dir_cntrl0 1009705886 # Total read bandwidth from this memory (bytes/s) 26system.mem_ctrls.bw_read::total 1009705886 # Total read bandwidth from this memory (bytes/s) 27system.mem_ctrls.bw_write::ruby.dir_cntrl0 1006572586 # Write bandwidth from this memory (bytes/s) 28system.mem_ctrls.bw_write::total 1006572586 # Write bandwidth from this memory (bytes/s) 29system.mem_ctrls.bw_total::ruby.dir_cntrl0 2016278472 # Total bandwidth to/from this memory (bytes/s) 30system.mem_ctrls.bw_total::total 2016278472 # Total bandwidth to/from this memory (bytes/s) | 25system.mem_ctrls.bw_read::ruby.dir_cntrl0 951006386 # Total read bandwidth from this memory (bytes/s) 26system.mem_ctrls.bw_read::total 951006386 # Total read bandwidth from this memory (bytes/s) 27system.mem_ctrls.bw_write::ruby.dir_cntrl0 948055242 # Write bandwidth from this memory (bytes/s) 28system.mem_ctrls.bw_write::total 948055242 # Write bandwidth from this memory (bytes/s) 29system.mem_ctrls.bw_total::ruby.dir_cntrl0 1899061628 # Total bandwidth to/from this memory (bytes/s) 30system.mem_ctrls.bw_total::total 1899061628 # Total bandwidth to/from this memory (bytes/s) |
| 31system.mem_ctrls.readReqs 1289 # Number of read requests accepted 32system.mem_ctrls.writeReqs 1285 # Number of write requests accepted 33system.mem_ctrls.readBursts 1289 # Number of DRAM read bursts, including those serviced by the write queue 34system.mem_ctrls.writeBursts 1285 # Number of DRAM write bursts, including those merged in the write queue | 31system.mem_ctrls.readReqs 1289 # Number of read requests accepted 32system.mem_ctrls.writeReqs 1285 # Number of write requests accepted 33system.mem_ctrls.readBursts 1289 # Number of DRAM read bursts, including those serviced by the write queue 34system.mem_ctrls.writeBursts 1285 # Number of DRAM write bursts, including those merged in the write queue |
| 35system.mem_ctrls.bytesReadDRAM 43904 # Total number of bytes read from DRAM 36system.mem_ctrls.bytesReadWrQ 38592 # Total number of bytes read from write queue 37system.mem_ctrls.bytesWritten 43776 # Total number of bytes written to DRAM | 35system.mem_ctrls.bytesReadDRAM 44800 # Total number of bytes read from DRAM 36system.mem_ctrls.bytesReadWrQ 37696 # Total number of bytes read from write queue 37system.mem_ctrls.bytesWritten 45504 # Total number of bytes written to DRAM |
| 38system.mem_ctrls.bytesReadSys 82496 # Total read bytes from the system interface side 39system.mem_ctrls.bytesWrittenSys 82240 # Total written bytes from the system interface side | 38system.mem_ctrls.bytesReadSys 82496 # Total read bytes from the system interface side 39system.mem_ctrls.bytesWrittenSys 82240 # Total written bytes from the system interface side |
| 40system.mem_ctrls.servicedByWrQ 603 # Number of DRAM read bursts serviced by the write queue 41system.mem_ctrls.mergedWrBursts 579 # Number of DRAM write bursts merged with an existing one | 40system.mem_ctrls.servicedByWrQ 589 # Number of DRAM read bursts serviced by the write queue 41system.mem_ctrls.mergedWrBursts 555 # Number of DRAM write bursts merged with an existing one |
| 42system.mem_ctrls.neitherReadNorWriteReqs 0 # Number of requests that are neither read nor write 43system.mem_ctrls.perBankRdBursts::0 28 # Per bank write bursts | 42system.mem_ctrls.neitherReadNorWriteReqs 0 # Number of requests that are neither read nor write 43system.mem_ctrls.perBankRdBursts::0 28 # Per bank write bursts |
| 44system.mem_ctrls.perBankRdBursts::1 18 # Per bank write bursts | 44system.mem_ctrls.perBankRdBursts::1 17 # Per bank write bursts |
| 45system.mem_ctrls.perBankRdBursts::2 1 # Per bank write bursts 46system.mem_ctrls.perBankRdBursts::3 8 # Per bank write bursts 47system.mem_ctrls.perBankRdBursts::4 0 # Per bank write bursts 48system.mem_ctrls.perBankRdBursts::5 119 # Per bank write bursts | 45system.mem_ctrls.perBankRdBursts::2 1 # Per bank write bursts 46system.mem_ctrls.perBankRdBursts::3 8 # Per bank write bursts 47system.mem_ctrls.perBankRdBursts::4 0 # Per bank write bursts 48system.mem_ctrls.perBankRdBursts::5 119 # Per bank write bursts |
| 49system.mem_ctrls.perBankRdBursts::6 115 # Per bank write bursts 50system.mem_ctrls.perBankRdBursts::7 134 # Per bank write bursts 51system.mem_ctrls.perBankRdBursts::8 61 # Per bank write bursts 52system.mem_ctrls.perBankRdBursts::9 34 # Per bank write bursts 53system.mem_ctrls.perBankRdBursts::10 12 # Per bank write bursts 54system.mem_ctrls.perBankRdBursts::11 59 # Per bank write bursts | 49system.mem_ctrls.perBankRdBursts::6 121 # Per bank write bursts 50system.mem_ctrls.perBankRdBursts::7 141 # Per bank write bursts 51system.mem_ctrls.perBankRdBursts::8 55 # Per bank write bursts 52system.mem_ctrls.perBankRdBursts::9 31 # Per bank write bursts 53system.mem_ctrls.perBankRdBursts::10 13 # Per bank write bursts 54system.mem_ctrls.perBankRdBursts::11 62 # Per bank write bursts |
| 55system.mem_ctrls.perBankRdBursts::12 21 # Per bank write bursts | 55system.mem_ctrls.perBankRdBursts::12 21 # Per bank write bursts |
| 56system.mem_ctrls.perBankRdBursts::13 59 # Per bank write bursts 57system.mem_ctrls.perBankRdBursts::14 9 # Per bank write bursts | 56system.mem_ctrls.perBankRdBursts::13 61 # Per bank write bursts 57system.mem_ctrls.perBankRdBursts::14 14 # Per bank write bursts |
| 58system.mem_ctrls.perBankRdBursts::15 8 # Per bank write bursts | 58system.mem_ctrls.perBankRdBursts::15 8 # Per bank write bursts |
| 59system.mem_ctrls.perBankWrBursts::0 29 # Per bank write bursts | 59system.mem_ctrls.perBankWrBursts::0 28 # Per bank write bursts |
| 60system.mem_ctrls.perBankWrBursts::1 18 # Per bank write bursts | 60system.mem_ctrls.perBankWrBursts::1 18 # Per bank write bursts |
| 61system.mem_ctrls.perBankWrBursts::2 2 # Per bank write bursts | 61system.mem_ctrls.perBankWrBursts::2 1 # Per bank write bursts |
| 62system.mem_ctrls.perBankWrBursts::3 8 # Per bank write bursts 63system.mem_ctrls.perBankWrBursts::4 0 # Per bank write bursts | 62system.mem_ctrls.perBankWrBursts::3 8 # Per bank write bursts 63system.mem_ctrls.perBankWrBursts::4 0 # Per bank write bursts |
| 64system.mem_ctrls.perBankWrBursts::5 117 # Per bank write bursts 65system.mem_ctrls.perBankWrBursts::6 112 # Per bank write bursts 66system.mem_ctrls.perBankWrBursts::7 138 # Per bank write bursts 67system.mem_ctrls.perBankWrBursts::8 63 # Per bank write bursts | 64system.mem_ctrls.perBankWrBursts::5 118 # Per bank write bursts 65system.mem_ctrls.perBankWrBursts::6 114 # Per bank write bursts 66system.mem_ctrls.perBankWrBursts::7 141 # Per bank write bursts 67system.mem_ctrls.perBankWrBursts::8 61 # Per bank write bursts |
| 68system.mem_ctrls.perBankWrBursts::9 35 # Per bank write bursts | 68system.mem_ctrls.perBankWrBursts::9 35 # Per bank write bursts |
| 69system.mem_ctrls.perBankWrBursts::10 13 # Per bank write bursts 70system.mem_ctrls.perBankWrBursts::11 59 # Per bank write bursts 71system.mem_ctrls.perBankWrBursts::12 21 # Per bank write bursts 72system.mem_ctrls.perBankWrBursts::13 51 # Per bank write bursts 73system.mem_ctrls.perBankWrBursts::14 10 # Per bank write bursts | 69system.mem_ctrls.perBankWrBursts::10 14 # Per bank write bursts 70system.mem_ctrls.perBankWrBursts::11 62 # Per bank write bursts 71system.mem_ctrls.perBankWrBursts::12 23 # Per bank write bursts 72system.mem_ctrls.perBankWrBursts::13 64 # Per bank write bursts 73system.mem_ctrls.perBankWrBursts::14 16 # Per bank write bursts |
| 74system.mem_ctrls.perBankWrBursts::15 8 # Per bank write bursts 75system.mem_ctrls.numRdRetry 0 # Number of times read queue was full causing retry 76system.mem_ctrls.numWrRetry 0 # Number of times write queue was full causing retry | 74system.mem_ctrls.perBankWrBursts::15 8 # Per bank write bursts 75system.mem_ctrls.numRdRetry 0 # Number of times read queue was full causing retry 76system.mem_ctrls.numWrRetry 0 # Number of times write queue was full causing retry |
| 77system.mem_ctrls.totGap 81643 # Total gap between requests | 77system.mem_ctrls.totGap 86680 # Total gap between requests |
| 78system.mem_ctrls.readPktSize::0 0 # Read request sizes (log2) 79system.mem_ctrls.readPktSize::1 0 # Read request sizes (log2) 80system.mem_ctrls.readPktSize::2 0 # Read request sizes (log2) 81system.mem_ctrls.readPktSize::3 0 # Read request sizes (log2) 82system.mem_ctrls.readPktSize::4 0 # Read request sizes (log2) 83system.mem_ctrls.readPktSize::5 0 # Read request sizes (log2) 84system.mem_ctrls.readPktSize::6 1289 # Read request sizes (log2) 85system.mem_ctrls.writePktSize::0 0 # Write request sizes (log2) 86system.mem_ctrls.writePktSize::1 0 # Write request sizes (log2) 87system.mem_ctrls.writePktSize::2 0 # Write request sizes (log2) 88system.mem_ctrls.writePktSize::3 0 # Write request sizes (log2) 89system.mem_ctrls.writePktSize::4 0 # Write request sizes (log2) 90system.mem_ctrls.writePktSize::5 0 # Write request sizes (log2) 91system.mem_ctrls.writePktSize::6 1285 # Write request sizes (log2) | 78system.mem_ctrls.readPktSize::0 0 # Read request sizes (log2) 79system.mem_ctrls.readPktSize::1 0 # Read request sizes (log2) 80system.mem_ctrls.readPktSize::2 0 # Read request sizes (log2) 81system.mem_ctrls.readPktSize::3 0 # Read request sizes (log2) 82system.mem_ctrls.readPktSize::4 0 # Read request sizes (log2) 83system.mem_ctrls.readPktSize::5 0 # Read request sizes (log2) 84system.mem_ctrls.readPktSize::6 1289 # Read request sizes (log2) 85system.mem_ctrls.writePktSize::0 0 # Write request sizes (log2) 86system.mem_ctrls.writePktSize::1 0 # Write request sizes (log2) 87system.mem_ctrls.writePktSize::2 0 # Write request sizes (log2) 88system.mem_ctrls.writePktSize::3 0 # Write request sizes (log2) 89system.mem_ctrls.writePktSize::4 0 # Write request sizes (log2) 90system.mem_ctrls.writePktSize::5 0 # Write request sizes (log2) 91system.mem_ctrls.writePktSize::6 1285 # Write request sizes (log2) |
| 92system.mem_ctrls.rdQLenPdf::0 686 # What read queue length does an incoming req see | 92system.mem_ctrls.rdQLenPdf::0 700 # What read queue length does an incoming req see |
| 93system.mem_ctrls.rdQLenPdf::1 0 # What read queue length does an incoming req see 94system.mem_ctrls.rdQLenPdf::2 0 # What read queue length does an incoming req see 95system.mem_ctrls.rdQLenPdf::3 0 # What read queue length does an incoming req see 96system.mem_ctrls.rdQLenPdf::4 0 # What read queue length does an incoming req see 97system.mem_ctrls.rdQLenPdf::5 0 # What read queue length does an incoming req see 98system.mem_ctrls.rdQLenPdf::6 0 # What read queue length does an incoming req see 99system.mem_ctrls.rdQLenPdf::7 0 # What read queue length does an incoming req see 100system.mem_ctrls.rdQLenPdf::8 0 # What read queue length does an incoming req see --- 30 unchanged lines hidden (view full) --- 131system.mem_ctrls.wrQLenPdf::7 1 # What write queue length does an incoming req see 132system.mem_ctrls.wrQLenPdf::8 1 # What write queue length does an incoming req see 133system.mem_ctrls.wrQLenPdf::9 1 # What write queue length does an incoming req see 134system.mem_ctrls.wrQLenPdf::10 1 # What write queue length does an incoming req see 135system.mem_ctrls.wrQLenPdf::11 1 # What write queue length does an incoming req see 136system.mem_ctrls.wrQLenPdf::12 1 # What write queue length does an incoming req see 137system.mem_ctrls.wrQLenPdf::13 1 # What write queue length does an incoming req see 138system.mem_ctrls.wrQLenPdf::14 1 # What write queue length does an incoming req see | 93system.mem_ctrls.rdQLenPdf::1 0 # What read queue length does an incoming req see 94system.mem_ctrls.rdQLenPdf::2 0 # What read queue length does an incoming req see 95system.mem_ctrls.rdQLenPdf::3 0 # What read queue length does an incoming req see 96system.mem_ctrls.rdQLenPdf::4 0 # What read queue length does an incoming req see 97system.mem_ctrls.rdQLenPdf::5 0 # What read queue length does an incoming req see 98system.mem_ctrls.rdQLenPdf::6 0 # What read queue length does an incoming req see 99system.mem_ctrls.rdQLenPdf::7 0 # What read queue length does an incoming req see 100system.mem_ctrls.rdQLenPdf::8 0 # What read queue length does an incoming req see --- 30 unchanged lines hidden (view full) --- 131system.mem_ctrls.wrQLenPdf::7 1 # What write queue length does an incoming req see 132system.mem_ctrls.wrQLenPdf::8 1 # What write queue length does an incoming req see 133system.mem_ctrls.wrQLenPdf::9 1 # What write queue length does an incoming req see 134system.mem_ctrls.wrQLenPdf::10 1 # What write queue length does an incoming req see 135system.mem_ctrls.wrQLenPdf::11 1 # What write queue length does an incoming req see 136system.mem_ctrls.wrQLenPdf::12 1 # What write queue length does an incoming req see 137system.mem_ctrls.wrQLenPdf::13 1 # What write queue length does an incoming req see 138system.mem_ctrls.wrQLenPdf::14 1 # What write queue length does an incoming req see |
| 139system.mem_ctrls.wrQLenPdf::15 5 # What write queue length does an incoming req see 140system.mem_ctrls.wrQLenPdf::16 5 # What write queue length does an incoming req see 141system.mem_ctrls.wrQLenPdf::17 34 # What write queue length does an incoming req see | 139system.mem_ctrls.wrQLenPdf::15 3 # What write queue length does an incoming req see 140system.mem_ctrls.wrQLenPdf::16 3 # What write queue length does an incoming req see 141system.mem_ctrls.wrQLenPdf::17 35 # What write queue length does an incoming req see |
| 142system.mem_ctrls.wrQLenPdf::18 45 # What write queue length does an incoming req see 143system.mem_ctrls.wrQLenPdf::19 45 # What write queue length does an incoming req see | 142system.mem_ctrls.wrQLenPdf::18 45 # What write queue length does an incoming req see 143system.mem_ctrls.wrQLenPdf::19 45 # What write queue length does an incoming req see |
| 144system.mem_ctrls.wrQLenPdf::20 48 # What write queue length does an incoming req see 145system.mem_ctrls.wrQLenPdf::21 46 # What write queue length does an incoming req see 146system.mem_ctrls.wrQLenPdf::22 42 # What write queue length does an incoming req see 147system.mem_ctrls.wrQLenPdf::23 42 # What write queue length does an incoming req see 148system.mem_ctrls.wrQLenPdf::24 42 # What write queue length does an incoming req see 149system.mem_ctrls.wrQLenPdf::25 42 # What write queue length does an incoming req see 150system.mem_ctrls.wrQLenPdf::26 42 # What write queue length does an incoming req see 151system.mem_ctrls.wrQLenPdf::27 42 # What write queue length does an incoming req see 152system.mem_ctrls.wrQLenPdf::28 42 # What write queue length does an incoming req see 153system.mem_ctrls.wrQLenPdf::29 42 # What write queue length does an incoming req see 154system.mem_ctrls.wrQLenPdf::30 42 # What write queue length does an incoming req see 155system.mem_ctrls.wrQLenPdf::31 42 # What write queue length does an incoming req see 156system.mem_ctrls.wrQLenPdf::32 42 # What write queue length does an incoming req see 157system.mem_ctrls.wrQLenPdf::33 1 # What write queue length does an incoming req see | 144system.mem_ctrls.wrQLenPdf::20 49 # What write queue length does an incoming req see 145system.mem_ctrls.wrQLenPdf::21 49 # What write queue length does an incoming req see 146system.mem_ctrls.wrQLenPdf::22 46 # What write queue length does an incoming req see 147system.mem_ctrls.wrQLenPdf::23 44 # What write queue length does an incoming req see 148system.mem_ctrls.wrQLenPdf::24 44 # What write queue length does an incoming req see 149system.mem_ctrls.wrQLenPdf::25 44 # What write queue length does an incoming req see 150system.mem_ctrls.wrQLenPdf::26 44 # What write queue length does an incoming req see 151system.mem_ctrls.wrQLenPdf::27 44 # What write queue length does an incoming req see 152system.mem_ctrls.wrQLenPdf::28 44 # What write queue length does an incoming req see 153system.mem_ctrls.wrQLenPdf::29 44 # What write queue length does an incoming req see 154system.mem_ctrls.wrQLenPdf::30 44 # What write queue length does an incoming req see 155system.mem_ctrls.wrQLenPdf::31 44 # What write queue length does an incoming req see 156system.mem_ctrls.wrQLenPdf::32 44 # What write queue length does an incoming req see 157system.mem_ctrls.wrQLenPdf::33 0 # What write queue length does an incoming req see |
| 158system.mem_ctrls.wrQLenPdf::34 0 # What write queue length does an incoming req see 159system.mem_ctrls.wrQLenPdf::35 0 # What write queue length does an incoming req see 160system.mem_ctrls.wrQLenPdf::36 0 # What write queue length does an incoming req see 161system.mem_ctrls.wrQLenPdf::37 0 # What write queue length does an incoming req see 162system.mem_ctrls.wrQLenPdf::38 0 # What write queue length does an incoming req see 163system.mem_ctrls.wrQLenPdf::39 0 # What write queue length does an incoming req see 164system.mem_ctrls.wrQLenPdf::40 0 # What write queue length does an incoming req see 165system.mem_ctrls.wrQLenPdf::41 0 # What write queue length does an incoming req see --- 14 unchanged lines hidden (view full) --- 180system.mem_ctrls.wrQLenPdf::56 0 # What write queue length does an incoming req see 181system.mem_ctrls.wrQLenPdf::57 0 # What write queue length does an incoming req see 182system.mem_ctrls.wrQLenPdf::58 0 # What write queue length does an incoming req see 183system.mem_ctrls.wrQLenPdf::59 0 # What write queue length does an incoming req see 184system.mem_ctrls.wrQLenPdf::60 0 # What write queue length does an incoming req see 185system.mem_ctrls.wrQLenPdf::61 0 # What write queue length does an incoming req see 186system.mem_ctrls.wrQLenPdf::62 0 # What write queue length does an incoming req see 187system.mem_ctrls.wrQLenPdf::63 0 # What write queue length does an incoming req see | 158system.mem_ctrls.wrQLenPdf::34 0 # What write queue length does an incoming req see 159system.mem_ctrls.wrQLenPdf::35 0 # What write queue length does an incoming req see 160system.mem_ctrls.wrQLenPdf::36 0 # What write queue length does an incoming req see 161system.mem_ctrls.wrQLenPdf::37 0 # What write queue length does an incoming req see 162system.mem_ctrls.wrQLenPdf::38 0 # What write queue length does an incoming req see 163system.mem_ctrls.wrQLenPdf::39 0 # What write queue length does an incoming req see 164system.mem_ctrls.wrQLenPdf::40 0 # What write queue length does an incoming req see 165system.mem_ctrls.wrQLenPdf::41 0 # What write queue length does an incoming req see --- 14 unchanged lines hidden (view full) --- 180system.mem_ctrls.wrQLenPdf::56 0 # What write queue length does an incoming req see 181system.mem_ctrls.wrQLenPdf::57 0 # What write queue length does an incoming req see 182system.mem_ctrls.wrQLenPdf::58 0 # What write queue length does an incoming req see 183system.mem_ctrls.wrQLenPdf::59 0 # What write queue length does an incoming req see 184system.mem_ctrls.wrQLenPdf::60 0 # What write queue length does an incoming req see 185system.mem_ctrls.wrQLenPdf::61 0 # What write queue length does an incoming req see 186system.mem_ctrls.wrQLenPdf::62 0 # What write queue length does an incoming req see 187system.mem_ctrls.wrQLenPdf::63 0 # What write queue length does an incoming req see |
| 188system.mem_ctrls.bytesPerActivate::samples 227 # Bytes accessed per row activation 189system.mem_ctrls.bytesPerActivate::mean 379.207048 # Bytes accessed per row activation 190system.mem_ctrls.bytesPerActivate::gmean 252.014148 # Bytes accessed per row activation 191system.mem_ctrls.bytesPerActivate::stdev 323.708826 # Bytes accessed per row activation 192system.mem_ctrls.bytesPerActivate::0-127 44 19.38% 19.38% # Bytes accessed per row activation 193system.mem_ctrls.bytesPerActivate::128-255 63 27.75% 47.14% # Bytes accessed per row activation 194system.mem_ctrls.bytesPerActivate::256-383 29 12.78% 59.91% # Bytes accessed per row activation 195system.mem_ctrls.bytesPerActivate::384-511 17 7.49% 67.40% # Bytes accessed per row activation 196system.mem_ctrls.bytesPerActivate::512-639 17 7.49% 74.89% # Bytes accessed per row activation 197system.mem_ctrls.bytesPerActivate::640-767 17 7.49% 82.38% # Bytes accessed per row activation 198system.mem_ctrls.bytesPerActivate::768-895 9 3.96% 86.34% # Bytes accessed per row activation 199system.mem_ctrls.bytesPerActivate::896-1023 6 2.64% 88.99% # Bytes accessed per row activation 200system.mem_ctrls.bytesPerActivate::1024-1151 25 11.01% 100.00% # Bytes accessed per row activation 201system.mem_ctrls.bytesPerActivate::total 227 # Bytes accessed per row activation 202system.mem_ctrls.rdPerTurnAround::samples 42 # Reads before turning the bus around for writes 203system.mem_ctrls.rdPerTurnAround::mean 16.190476 # Reads before turning the bus around for writes 204system.mem_ctrls.rdPerTurnAround::gmean 15.978361 # Reads before turning the bus around for writes 205system.mem_ctrls.rdPerTurnAround::stdev 3.255300 # Reads before turning the bus around for writes 206system.mem_ctrls.rdPerTurnAround::12-13 3 7.14% 7.14% # Reads before turning the bus around for writes 207system.mem_ctrls.rdPerTurnAround::14-15 10 23.81% 30.95% # Reads before turning the bus around for writes 208system.mem_ctrls.rdPerTurnAround::16-17 26 61.90% 92.86% # Reads before turning the bus around for writes 209system.mem_ctrls.rdPerTurnAround::18-19 1 2.38% 95.24% # Reads before turning the bus around for writes 210system.mem_ctrls.rdPerTurnAround::20-21 1 2.38% 97.62% # Reads before turning the bus around for writes 211system.mem_ctrls.rdPerTurnAround::34-35 1 2.38% 100.00% # Reads before turning the bus around for writes 212system.mem_ctrls.rdPerTurnAround::total 42 # Reads before turning the bus around for writes 213system.mem_ctrls.wrPerTurnAround::samples 42 # Writes before turning the bus around for reads 214system.mem_ctrls.wrPerTurnAround::mean 16.285714 # Writes before turning the bus around for reads 215system.mem_ctrls.wrPerTurnAround::gmean 16.270299 # Writes before turning the bus around for reads 216system.mem_ctrls.wrPerTurnAround::stdev 0.741972 # Writes before turning the bus around for reads 217system.mem_ctrls.wrPerTurnAround::16 36 85.71% 85.71% # Writes before turning the bus around for reads 218system.mem_ctrls.wrPerTurnAround::17 1 2.38% 88.10% # Writes before turning the bus around for reads 219system.mem_ctrls.wrPerTurnAround::18 4 9.52% 97.62% # Writes before turning the bus around for reads 220system.mem_ctrls.wrPerTurnAround::19 1 2.38% 100.00% # Writes before turning the bus around for reads 221system.mem_ctrls.wrPerTurnAround::total 42 # Writes before turning the bus around for reads 222system.mem_ctrls.totQLat 8350 # Total ticks spent queuing 223system.mem_ctrls.totMemAccLat 21384 # Total ticks spent from burst creation until serviced by the DRAM 224system.mem_ctrls.totBusLat 3430 # Total ticks spent in databus transfers 225system.mem_ctrls.avgQLat 12.17 # Average queueing delay per DRAM burst | 188system.mem_ctrls.bytesPerActivate::samples 247 # Bytes accessed per row activation 189system.mem_ctrls.bytesPerActivate::mean 359.384615 # Bytes accessed per row activation 190system.mem_ctrls.bytesPerActivate::gmean 236.451062 # Bytes accessed per row activation 191system.mem_ctrls.bytesPerActivate::stdev 319.751749 # Bytes accessed per row activation 192system.mem_ctrls.bytesPerActivate::0-127 54 21.86% 21.86% # Bytes accessed per row activation 193system.mem_ctrls.bytesPerActivate::128-255 65 26.32% 48.18% # Bytes accessed per row activation 194system.mem_ctrls.bytesPerActivate::256-383 38 15.38% 63.56% # Bytes accessed per row activation 195system.mem_ctrls.bytesPerActivate::384-511 27 10.93% 74.49% # Bytes accessed per row activation 196system.mem_ctrls.bytesPerActivate::512-639 8 3.24% 77.73% # Bytes accessed per row activation 197system.mem_ctrls.bytesPerActivate::640-767 10 4.05% 81.78% # Bytes accessed per row activation 198system.mem_ctrls.bytesPerActivate::768-895 11 4.45% 86.23% # Bytes accessed per row activation 199system.mem_ctrls.bytesPerActivate::896-1023 9 3.64% 89.88% # Bytes accessed per row activation 200system.mem_ctrls.bytesPerActivate::1024-1151 25 10.12% 100.00% # Bytes accessed per row activation 201system.mem_ctrls.bytesPerActivate::total 247 # Bytes accessed per row activation 202system.mem_ctrls.rdPerTurnAround::samples 44 # Reads before turning the bus around for writes 203system.mem_ctrls.rdPerTurnAround::mean 15.840909 # Reads before turning the bus around for writes 204system.mem_ctrls.rdPerTurnAround::gmean 15.640724 # Reads before turning the bus around for writes 205system.mem_ctrls.rdPerTurnAround::stdev 3.183849 # Reads before turning the bus around for writes 206system.mem_ctrls.rdPerTurnAround::12-13 2 4.55% 4.55% # Reads before turning the bus around for writes 207system.mem_ctrls.rdPerTurnAround::14-15 21 47.73% 52.27% # Reads before turning the bus around for writes 208system.mem_ctrls.rdPerTurnAround::16-17 18 40.91% 93.18% # Reads before turning the bus around for writes 209system.mem_ctrls.rdPerTurnAround::18-19 2 4.55% 97.73% # Reads before turning the bus around for writes 210system.mem_ctrls.rdPerTurnAround::34-35 1 2.27% 100.00% # Reads before turning the bus around for writes 211system.mem_ctrls.rdPerTurnAround::total 44 # Reads before turning the bus around for writes 212system.mem_ctrls.wrPerTurnAround::samples 44 # Writes before turning the bus around for reads 213system.mem_ctrls.wrPerTurnAround::mean 16.159091 # Writes before turning the bus around for reads 214system.mem_ctrls.wrPerTurnAround::gmean 16.147705 # Writes before turning the bus around for reads 215system.mem_ctrls.wrPerTurnAround::stdev 0.644951 # Writes before turning the bus around for reads 216system.mem_ctrls.wrPerTurnAround::16 41 93.18% 93.18% # Writes before turning the bus around for reads 217system.mem_ctrls.wrPerTurnAround::17 1 2.27% 95.45% # Writes before turning the bus around for reads 218system.mem_ctrls.wrPerTurnAround::19 2 4.55% 100.00% # Writes before turning the bus around for reads 219system.mem_ctrls.wrPerTurnAround::total 44 # Writes before turning the bus around for reads 220system.mem_ctrls.totQLat 12987 # Total ticks spent queuing 221system.mem_ctrls.totMemAccLat 26287 # Total ticks spent from burst creation until serviced by the DRAM 222system.mem_ctrls.totBusLat 3500 # Total ticks spent in databus transfers 223system.mem_ctrls.avgQLat 18.55 # Average queueing delay per DRAM burst |
| 226system.mem_ctrls.avgBusLat 5.00 # Average bus latency per DRAM burst | 224system.mem_ctrls.avgBusLat 5.00 # Average bus latency per DRAM burst |
| 227system.mem_ctrls.avgMemAccLat 31.17 # Average memory access latency per DRAM burst 228system.mem_ctrls.avgRdBW 537.36 # Average DRAM read bandwidth in MiByte/s 229system.mem_ctrls.avgWrBW 535.79 # Average achieved write bandwidth in MiByte/s 230system.mem_ctrls.avgRdBWSys 1009.71 # Average system read bandwidth in MiByte/s 231system.mem_ctrls.avgWrBWSys 1006.57 # Average system write bandwidth in MiByte/s | 225system.mem_ctrls.avgMemAccLat 37.55 # Average memory access latency per DRAM burst 226system.mem_ctrls.avgRdBW 516.45 # Average DRAM read bandwidth in MiByte/s 227system.mem_ctrls.avgWrBW 524.57 # Average achieved write bandwidth in MiByte/s 228system.mem_ctrls.avgRdBWSys 951.01 # Average system read bandwidth in MiByte/s 229system.mem_ctrls.avgWrBWSys 948.06 # Average system write bandwidth in MiByte/s |
| 232system.mem_ctrls.peakBW 12800.00 # Theoretical peak bandwidth in MiByte/s | 230system.mem_ctrls.peakBW 12800.00 # Theoretical peak bandwidth in MiByte/s |
| 233system.mem_ctrls.busUtil 8.38 # Data bus utilization in percentage 234system.mem_ctrls.busUtilRead 4.20 # Data bus utilization in percentage for reads 235system.mem_ctrls.busUtilWrite 4.19 # Data bus utilization in percentage for writes | 231system.mem_ctrls.busUtil 8.13 # Data bus utilization in percentage 232system.mem_ctrls.busUtilRead 4.03 # Data bus utilization in percentage for reads 233system.mem_ctrls.busUtilWrite 4.10 # Data bus utilization in percentage for writes |
| 236system.mem_ctrls.avgRdQLen 1.00 # Average read queue length when enqueuing | 234system.mem_ctrls.avgRdQLen 1.00 # Average read queue length when enqueuing |
| 237system.mem_ctrls.avgWrQLen 25.98 # Average write queue length when enqueuing 238system.mem_ctrls.readRowHits 503 # Number of row buffer hits during reads 239system.mem_ctrls.writeRowHits 635 # Number of row buffer hits during writes 240system.mem_ctrls.readRowHitRate 73.32 # Row buffer hit rate for reads 241system.mem_ctrls.writeRowHitRate 89.94 # Row buffer hit rate for writes 242system.mem_ctrls.avgGap 31.72 # Average gap between requests 243system.mem_ctrls.pageHitRate 81.75 # Row buffer hit rate, read and write combined 244system.mem_ctrls_0.actEnergy 960120 # Energy for activate commands per rank (pJ) 245system.mem_ctrls_0.preEnergy 533400 # Energy for precharge commands per rank (pJ) 246system.mem_ctrls_0.readEnergy 4992000 # Energy for read commands per rank (pJ) 247system.mem_ctrls_0.writeEnergy 3981312 # Energy for write commands per rank (pJ) 248system.mem_ctrls_0.refreshEnergy 5085600 # Energy for refresh commands per rank (pJ) 249system.mem_ctrls_0.actBackEnergy 48305448 # Energy for active background per rank (pJ) 250system.mem_ctrls_0.preBackEnergy 4498800 # Energy for precharge background per rank (pJ) 251system.mem_ctrls_0.totalEnergy 68356680 # Total energy per rank (pJ) 252system.mem_ctrls_0.averagePower 875.021505 # Core power per rank (mW) 253system.mem_ctrls_0.memoryStateTime::IDLE 7218 # Time in different power states 254system.mem_ctrls_0.memoryStateTime::REF 2600 # Time in different power states 255system.mem_ctrls_0.memoryStateTime::PRE_PDN 0 # Time in different power states 256system.mem_ctrls_0.memoryStateTime::ACT 68316 # Time in different power states 257system.mem_ctrls_0.memoryStateTime::ACT_PDN 0 # Time in different power states 258system.mem_ctrls_1.actEnergy 703080 # Energy for activate commands per rank (pJ) 259system.mem_ctrls_1.preEnergy 390600 # Energy for precharge commands per rank (pJ) 260system.mem_ctrls_1.readEnergy 3107520 # Energy for read commands per rank (pJ) 261system.mem_ctrls_1.writeEnergy 2602368 # Energy for write commands per rank (pJ) 262system.mem_ctrls_1.refreshEnergy 5085600 # Energy for refresh commands per rank (pJ) 263system.mem_ctrls_1.actBackEnergy 45961380 # Energy for active background per rank (pJ) 264system.mem_ctrls_1.preBackEnergy 6555000 # Energy for precharge background per rank (pJ) 265system.mem_ctrls_1.totalEnergy 64405548 # Total energy per rank (pJ) 266system.mem_ctrls_1.averagePower 824.443779 # Core power per rank (mW) 267system.mem_ctrls_1.memoryStateTime::IDLE 10688 # Time in different power states 268system.mem_ctrls_1.memoryStateTime::REF 2600 # Time in different power states 269system.mem_ctrls_1.memoryStateTime::PRE_PDN 0 # Time in different power states 270system.mem_ctrls_1.memoryStateTime::ACT 64875 # Time in different power states 271system.mem_ctrls_1.memoryStateTime::ACT_PDN 0 # Time in different power states 272system.pwrStateResidencyTicks::UNDEFINED 81703 # Cumulative time (in ticks) in various power states | 235system.mem_ctrls.avgWrQLen 25.18 # Average write queue length when enqueuing 236system.mem_ctrls.readRowHits 508 # Number of row buffer hits during reads 237system.mem_ctrls.writeRowHits 652 # Number of row buffer hits during writes 238system.mem_ctrls.readRowHitRate 72.57 # Row buffer hit rate for reads 239system.mem_ctrls.writeRowHitRate 89.32 # Row buffer hit rate for writes 240system.mem_ctrls.avgGap 33.68 # Average gap between requests 241system.mem_ctrls.pageHitRate 81.12 # Row buffer hit rate, read and write combined 242system.mem_ctrls_0.actEnergy 1099560 # Energy for activate commands per rank (pJ) 243system.mem_ctrls_0.preEnergy 587328 # Energy for precharge commands per rank (pJ) 244system.mem_ctrls_0.readEnergy 4969440 # Energy for read commands per rank (pJ) 245system.mem_ctrls_0.writeEnergy 3574656 # Energy for write commands per rank (pJ) 246system.mem_ctrls_0.refreshEnergy 6761040.000000 # Energy for refresh commands per rank (pJ) 247system.mem_ctrls_0.actBackEnergy 10338432 # Energy for active background per rank (pJ) 248system.mem_ctrls_0.preBackEnergy 148224 # Energy for precharge background per rank (pJ) 249system.mem_ctrls_0.actPowerDownEnergy 27605784 # Energy for active power-down per rank (pJ) 250system.mem_ctrls_0.prePowerDownEnergy 1209216 # Energy for precharge power-down per rank (pJ) 251system.mem_ctrls_0.selfRefreshEnergy 0 # Energy for self refresh per rank (pJ) 252system.mem_ctrls_0.totalEnergy 56293680 # Total energy per rank (pJ) 253system.mem_ctrls_0.averagePower 648.948424 # Core power per rank (mW) 254system.mem_ctrls_0.totalIdleTime 63519 # Total Idle time Per DRAM Rank 255system.mem_ctrls_0.memoryStateTime::IDLE 64 # Time in different power states 256system.mem_ctrls_0.memoryStateTime::REF 2860 # Time in different power states 257system.mem_ctrls_0.memoryStateTime::SREF 0 # Time in different power states 258system.mem_ctrls_0.memoryStateTime::PRE_PDN 3149 # Time in different power states 259system.mem_ctrls_0.memoryStateTime::ACT 20134 # Time in different power states 260system.mem_ctrls_0.memoryStateTime::ACT_PDN 60539 # Time in different power states 261system.mem_ctrls_1.actEnergy 692580 # Energy for activate commands per rank (pJ) 262system.mem_ctrls_1.preEnergy 367080 # Energy for precharge commands per rank (pJ) 263system.mem_ctrls_1.readEnergy 3027360 # Energy for read commands per rank (pJ) 264system.mem_ctrls_1.writeEnergy 2363616 # Energy for write commands per rank (pJ) 265system.mem_ctrls_1.refreshEnergy 6761040.000000 # Energy for refresh commands per rank (pJ) 266system.mem_ctrls_1.actBackEnergy 9621600 # Energy for active background per rank (pJ) 267system.mem_ctrls_1.preBackEnergy 296448 # Energy for precharge background per rank (pJ) 268system.mem_ctrls_1.actPowerDownEnergy 26302992 # Energy for active power-down per rank (pJ) 269system.mem_ctrls_1.prePowerDownEnergy 2761728 # Energy for precharge power-down per rank (pJ) 270system.mem_ctrls_1.selfRefreshEnergy 0 # Energy for self refresh per rank (pJ) 271system.mem_ctrls_1.totalEnergy 52194444 # Total energy per rank (pJ) 272system.mem_ctrls_1.averagePower 601.692804 # Core power per rank (mW) 273system.mem_ctrls_1.totalIdleTime 64843 # Total Idle time Per DRAM Rank 274system.mem_ctrls_1.memoryStateTime::IDLE 422 # Time in different power states 275system.mem_ctrls_1.memoryStateTime::REF 2860 # Time in different power states 276system.mem_ctrls_1.memoryStateTime::SREF 0 # Time in different power states 277system.mem_ctrls_1.memoryStateTime::PRE_PDN 7192 # Time in different power states 278system.mem_ctrls_1.memoryStateTime::ACT 18590 # Time in different power states 279system.mem_ctrls_1.memoryStateTime::ACT_PDN 57682 # Time in different power states 280system.pwrStateResidencyTicks::UNDEFINED 86746 # Cumulative time (in ticks) in various power states |
| 273system.cpu.clk_domain.clock 1 # Clock period in ticks 274system.cpu.workload.num_syscalls 11 # Number of system calls | 281system.cpu.clk_domain.clock 1 # Clock period in ticks 282system.cpu.workload.num_syscalls 11 # Number of system calls |
| 275system.cpu.pwrStateResidencyTicks::ON 81703 # Cumulative time (in ticks) in various power states 276system.cpu.numCycles 81703 # number of cpu cycles simulated | 283system.cpu.pwrStateResidencyTicks::ON 86746 # Cumulative time (in ticks) in various power states 284system.cpu.numCycles 86746 # number of cpu cycles simulated |
| 277system.cpu.numWorkItemsStarted 0 # number of work items this cpu started 278system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed 279system.cpu.committedInsts 5327 # Number of instructions committed 280system.cpu.committedOps 5327 # Number of ops (including micro ops) committed 281system.cpu.num_int_alu_accesses 4505 # Number of integer alu accesses 282system.cpu.num_fp_alu_accesses 0 # Number of float alu accesses 283system.cpu.num_func_calls 146 # number of times a function call or return occured 284system.cpu.num_conditional_control_insts 773 # number of instructions that are conditional controls 285system.cpu.num_int_insts 4505 # number of integer instructions 286system.cpu.num_fp_insts 0 # number of float instructions 287system.cpu.num_int_register_reads 10598 # number of times the integer registers were read 288system.cpu.num_int_register_writes 4845 # number of times the integer registers were written 289system.cpu.num_fp_register_reads 0 # number of times the floating registers were read 290system.cpu.num_fp_register_writes 0 # number of times the floating registers were written 291system.cpu.num_mem_refs 1401 # number of memory refs 292system.cpu.num_load_insts 723 # Number of load instructions 293system.cpu.num_store_insts 678 # Number of store instructions 294system.cpu.num_idle_cycles 0.999988 # Number of idle cycles | 285system.cpu.numWorkItemsStarted 0 # number of work items this cpu started 286system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed 287system.cpu.committedInsts 5327 # Number of instructions committed 288system.cpu.committedOps 5327 # Number of ops (including micro ops) committed 289system.cpu.num_int_alu_accesses 4505 # Number of integer alu accesses 290system.cpu.num_fp_alu_accesses 0 # Number of float alu accesses 291system.cpu.num_func_calls 146 # number of times a function call or return occured 292system.cpu.num_conditional_control_insts 773 # number of instructions that are conditional controls 293system.cpu.num_int_insts 4505 # number of integer instructions 294system.cpu.num_fp_insts 0 # number of float instructions 295system.cpu.num_int_register_reads 10598 # number of times the integer registers were read 296system.cpu.num_int_register_writes 4845 # number of times the integer registers were written 297system.cpu.num_fp_register_reads 0 # number of times the floating registers were read 298system.cpu.num_fp_register_writes 0 # number of times the floating registers were written 299system.cpu.num_mem_refs 1401 # number of memory refs 300system.cpu.num_load_insts 723 # Number of load instructions 301system.cpu.num_store_insts 678 # Number of store instructions 302system.cpu.num_idle_cycles 0.999988 # Number of idle cycles |
| 295system.cpu.num_busy_cycles 81702.000012 # Number of busy cycles | 303system.cpu.num_busy_cycles 86745.000012 # Number of busy cycles |
| 296system.cpu.not_idle_fraction 0.999988 # Percentage of non-idle cycles 297system.cpu.idle_fraction 0.000012 # Percentage of idle cycles 298system.cpu.Branches 1121 # Number of branches fetched 299system.cpu.op_class::No_OpClass 173 3.22% 3.22% # Class of executed instruction 300system.cpu.op_class::IntAlu 3796 70.69% 73.91% # Class of executed instruction 301system.cpu.op_class::IntMult 0 0.00% 73.91% # Class of executed instruction 302system.cpu.op_class::IntDiv 0 0.00% 73.91% # Class of executed instruction 303system.cpu.op_class::FloatAdd 0 0.00% 73.91% # Class of executed instruction --- 23 unchanged lines hidden (view full) --- 327system.cpu.op_class::SimdFloatMultAcc 0 0.00% 73.91% # Class of executed instruction 328system.cpu.op_class::SimdFloatSqrt 0 0.00% 73.91% # Class of executed instruction 329system.cpu.op_class::MemRead 723 13.46% 87.37% # Class of executed instruction 330system.cpu.op_class::MemWrite 678 12.63% 100.00% # Class of executed instruction 331system.cpu.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction 332system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction 333system.cpu.op_class::total 5370 # Class of executed instruction 334system.ruby.clk_domain.clock 1 # Clock period in ticks | 304system.cpu.not_idle_fraction 0.999988 # Percentage of non-idle cycles 305system.cpu.idle_fraction 0.000012 # Percentage of idle cycles 306system.cpu.Branches 1121 # Number of branches fetched 307system.cpu.op_class::No_OpClass 173 3.22% 3.22% # Class of executed instruction 308system.cpu.op_class::IntAlu 3796 70.69% 73.91% # Class of executed instruction 309system.cpu.op_class::IntMult 0 0.00% 73.91% # Class of executed instruction 310system.cpu.op_class::IntDiv 0 0.00% 73.91% # Class of executed instruction 311system.cpu.op_class::FloatAdd 0 0.00% 73.91% # Class of executed instruction --- 23 unchanged lines hidden (view full) --- 335system.cpu.op_class::SimdFloatMultAcc 0 0.00% 73.91% # Class of executed instruction 336system.cpu.op_class::SimdFloatSqrt 0 0.00% 73.91% # Class of executed instruction 337system.cpu.op_class::MemRead 723 13.46% 87.37% # Class of executed instruction 338system.cpu.op_class::MemWrite 678 12.63% 100.00% # Class of executed instruction 339system.cpu.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction 340system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction 341system.cpu.op_class::total 5370 # Class of executed instruction 342system.ruby.clk_domain.clock 1 # Clock period in ticks |
| 335system.ruby.pwrStateResidencyTicks::UNDEFINED 81703 # Cumulative time (in ticks) in various power states | 343system.ruby.pwrStateResidencyTicks::UNDEFINED 86746 # Cumulative time (in ticks) in various power states |
| 336system.ruby.delayHist::bucket_size 1 # delay histogram for all message 337system.ruby.delayHist::max_bucket 9 # delay histogram for all message 338system.ruby.delayHist::samples 2574 # delay histogram for all message 339system.ruby.delayHist | 2574 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for all message 340system.ruby.delayHist::total 2574 # delay histogram for all message 341system.ruby.outstanding_req_hist_seqr::bucket_size 1 342system.ruby.outstanding_req_hist_seqr::max_bucket 9 343system.ruby.outstanding_req_hist_seqr::samples 6759 344system.ruby.outstanding_req_hist_seqr::mean 1 345system.ruby.outstanding_req_hist_seqr::gmean 1 346system.ruby.outstanding_req_hist_seqr | 0 0.00% 0.00% | 6759 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 347system.ruby.outstanding_req_hist_seqr::total 6759 348system.ruby.latency_hist_seqr::bucket_size 64 349system.ruby.latency_hist_seqr::max_bucket 639 350system.ruby.latency_hist_seqr::samples 6758 | 344system.ruby.delayHist::bucket_size 1 # delay histogram for all message 345system.ruby.delayHist::max_bucket 9 # delay histogram for all message 346system.ruby.delayHist::samples 2574 # delay histogram for all message 347system.ruby.delayHist | 2574 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for all message 348system.ruby.delayHist::total 2574 # delay histogram for all message 349system.ruby.outstanding_req_hist_seqr::bucket_size 1 350system.ruby.outstanding_req_hist_seqr::max_bucket 9 351system.ruby.outstanding_req_hist_seqr::samples 6759 352system.ruby.outstanding_req_hist_seqr::mean 1 353system.ruby.outstanding_req_hist_seqr::gmean 1 354system.ruby.outstanding_req_hist_seqr | 0 0.00% 0.00% | 6759 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 355system.ruby.outstanding_req_hist_seqr::total 6759 356system.ruby.latency_hist_seqr::bucket_size 64 357system.ruby.latency_hist_seqr::max_bucket 639 358system.ruby.latency_hist_seqr::samples 6758 |
| 351system.ruby.latency_hist_seqr::mean 11.089819 352system.ruby.latency_hist_seqr::gmean 2.095228 353system.ruby.latency_hist_seqr::stdev 25.111209 354system.ruby.latency_hist_seqr | 6551 96.94% 96.94% | 169 2.50% 99.44% | 28 0.41% 99.85% | 2 0.03% 99.88% | 5 0.07% 99.96% | 2 0.03% 99.99% | 1 0.01% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 359system.ruby.latency_hist_seqr::mean 11.836046 360system.ruby.latency_hist_seqr::gmean 2.117342 361system.ruby.latency_hist_seqr::stdev 27.149732 362system.ruby.latency_hist_seqr | 6079 89.95% 89.95% | 633 9.37% 99.32% | 36 0.53% 99.85% | 1 0.01% 99.87% | 6 0.09% 99.96% | 2 0.03% 99.99% | 0 0.00% 99.99% | 1 0.01% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% |
| 355system.ruby.latency_hist_seqr::total 6758 356system.ruby.hit_latency_hist_seqr::bucket_size 1 357system.ruby.hit_latency_hist_seqr::max_bucket 9 358system.ruby.hit_latency_hist_seqr::samples 5469 359system.ruby.hit_latency_hist_seqr::mean 1 360system.ruby.hit_latency_hist_seqr::gmean 1 361system.ruby.hit_latency_hist_seqr | 0 0.00% 0.00% | 5469 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 362system.ruby.hit_latency_hist_seqr::total 5469 363system.ruby.miss_latency_hist_seqr::bucket_size 64 364system.ruby.miss_latency_hist_seqr::max_bucket 639 365system.ruby.miss_latency_hist_seqr::samples 1289 | 363system.ruby.latency_hist_seqr::total 6758 364system.ruby.hit_latency_hist_seqr::bucket_size 1 365system.ruby.hit_latency_hist_seqr::max_bucket 9 366system.ruby.hit_latency_hist_seqr::samples 5469 367system.ruby.hit_latency_hist_seqr::mean 1 368system.ruby.hit_latency_hist_seqr::gmean 1 369system.ruby.hit_latency_hist_seqr | 0 0.00% 0.00% | 5469 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 370system.ruby.hit_latency_hist_seqr::total 5469 371system.ruby.miss_latency_hist_seqr::bucket_size 64 372system.ruby.miss_latency_hist_seqr::max_bucket 639 373system.ruby.miss_latency_hist_seqr::samples 1289 |
| 366system.ruby.miss_latency_hist_seqr::mean 53.899147 367system.ruby.miss_latency_hist_seqr::gmean 48.323546 368system.ruby.miss_latency_hist_seqr::stdev 32.275754 369system.ruby.miss_latency_hist_seqr | 1082 83.94% 83.94% | 169 13.11% 97.05% | 28 2.17% 99.22% | 2 0.16% 99.38% | 5 0.39% 99.77% | 2 0.16% 99.92% | 1 0.08% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 374system.ruby.miss_latency_hist_seqr::mean 57.811482 375system.ruby.miss_latency_hist_seqr::gmean 51.058094 376system.ruby.miss_latency_hist_seqr::stdev 35.397665 377system.ruby.miss_latency_hist_seqr | 610 47.32% 47.32% | 633 49.11% 96.43% | 36 2.79% 99.22% | 1 0.08% 99.30% | 6 0.47% 99.77% | 2 0.16% 99.92% | 0 0.00% 99.92% | 1 0.08% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% |
| 370system.ruby.miss_latency_hist_seqr::total 1289 371system.ruby.Directory.incomplete_times_seqr 1288 | 378system.ruby.miss_latency_hist_seqr::total 1289 379system.ruby.Directory.incomplete_times_seqr 1288 |
| 372system.ruby.dir_cntrl0.pwrStateResidencyTicks::UNDEFINED 81703 # Cumulative time (in ticks) in various power states | 380system.ruby.dir_cntrl0.pwrStateResidencyTicks::UNDEFINED 86746 # Cumulative time (in ticks) in various power states |
| 373system.ruby.l1_cntrl0.cacheMemory.demand_hits 5469 # Number of cache demand hits 374system.ruby.l1_cntrl0.cacheMemory.demand_misses 1289 # Number of cache demand misses 375system.ruby.l1_cntrl0.cacheMemory.demand_accesses 6758 # Number of cache demand accesses | 381system.ruby.l1_cntrl0.cacheMemory.demand_hits 5469 # Number of cache demand hits 382system.ruby.l1_cntrl0.cacheMemory.demand_misses 1289 # Number of cache demand misses 383system.ruby.l1_cntrl0.cacheMemory.demand_accesses 6758 # Number of cache demand accesses |
| 376system.ruby.l1_cntrl0.sequencer.pwrStateResidencyTicks::UNDEFINED 81703 # Cumulative time (in ticks) in various power states 377system.ruby.l1_cntrl0.pwrStateResidencyTicks::UNDEFINED 81703 # Cumulative time (in ticks) in various power states | 384system.ruby.l1_cntrl0.sequencer.pwrStateResidencyTicks::UNDEFINED 86746 # Cumulative time (in ticks) in various power states 385system.ruby.l1_cntrl0.pwrStateResidencyTicks::UNDEFINED 86746 # Cumulative time (in ticks) in various power states |
| 378system.ruby.memctrl_clk_domain.clock 3 # Clock period in ticks | 386system.ruby.memctrl_clk_domain.clock 3 # Clock period in ticks |
| 379system.ruby.network.routers0.pwrStateResidencyTicks::UNDEFINED 81703 # Cumulative time (in ticks) in various power states 380system.ruby.network.routers0.percent_links_utilized 7.876088 | 387system.ruby.network.routers0.pwrStateResidencyTicks::UNDEFINED 86746 # Cumulative time (in ticks) in various power states 388system.ruby.network.routers0.percent_links_utilized 7.418209 |
| 381system.ruby.network.routers0.msg_count.Control::2 1289 382system.ruby.network.routers0.msg_count.Data::2 1285 383system.ruby.network.routers0.msg_count.Response_Data::4 1289 384system.ruby.network.routers0.msg_count.Writeback_Control::3 1285 385system.ruby.network.routers0.msg_bytes.Control::2 10312 386system.ruby.network.routers0.msg_bytes.Data::2 92520 387system.ruby.network.routers0.msg_bytes.Response_Data::4 92808 388system.ruby.network.routers0.msg_bytes.Writeback_Control::3 10280 | 389system.ruby.network.routers0.msg_count.Control::2 1289 390system.ruby.network.routers0.msg_count.Data::2 1285 391system.ruby.network.routers0.msg_count.Response_Data::4 1289 392system.ruby.network.routers0.msg_count.Writeback_Control::3 1285 393system.ruby.network.routers0.msg_bytes.Control::2 10312 394system.ruby.network.routers0.msg_bytes.Data::2 92520 395system.ruby.network.routers0.msg_bytes.Response_Data::4 92808 396system.ruby.network.routers0.msg_bytes.Writeback_Control::3 10280 |
| 389system.ruby.network.routers1.pwrStateResidencyTicks::UNDEFINED 81703 # Cumulative time (in ticks) in various power states 390system.ruby.network.routers1.percent_links_utilized 7.876088 | 397system.ruby.network.routers1.pwrStateResidencyTicks::UNDEFINED 86746 # Cumulative time (in ticks) in various power states 398system.ruby.network.routers1.percent_links_utilized 7.418209 |
| 391system.ruby.network.routers1.msg_count.Control::2 1289 392system.ruby.network.routers1.msg_count.Data::2 1285 393system.ruby.network.routers1.msg_count.Response_Data::4 1289 394system.ruby.network.routers1.msg_count.Writeback_Control::3 1285 395system.ruby.network.routers1.msg_bytes.Control::2 10312 396system.ruby.network.routers1.msg_bytes.Data::2 92520 397system.ruby.network.routers1.msg_bytes.Response_Data::4 92808 398system.ruby.network.routers1.msg_bytes.Writeback_Control::3 10280 | 399system.ruby.network.routers1.msg_count.Control::2 1289 400system.ruby.network.routers1.msg_count.Data::2 1285 401system.ruby.network.routers1.msg_count.Response_Data::4 1289 402system.ruby.network.routers1.msg_count.Writeback_Control::3 1285 403system.ruby.network.routers1.msg_bytes.Control::2 10312 404system.ruby.network.routers1.msg_bytes.Data::2 92520 405system.ruby.network.routers1.msg_bytes.Response_Data::4 92808 406system.ruby.network.routers1.msg_bytes.Writeback_Control::3 10280 |
| 399system.ruby.network.routers2.pwrStateResidencyTicks::UNDEFINED 81703 # Cumulative time (in ticks) in various power states 400system.ruby.network.routers2.percent_links_utilized 7.876088 | 407system.ruby.network.routers2.pwrStateResidencyTicks::UNDEFINED 86746 # Cumulative time (in ticks) in various power states 408system.ruby.network.routers2.percent_links_utilized 7.418209 |
| 401system.ruby.network.routers2.msg_count.Control::2 1289 402system.ruby.network.routers2.msg_count.Data::2 1285 403system.ruby.network.routers2.msg_count.Response_Data::4 1289 404system.ruby.network.routers2.msg_count.Writeback_Control::3 1285 405system.ruby.network.routers2.msg_bytes.Control::2 10312 406system.ruby.network.routers2.msg_bytes.Data::2 92520 407system.ruby.network.routers2.msg_bytes.Response_Data::4 92808 408system.ruby.network.routers2.msg_bytes.Writeback_Control::3 10280 | 409system.ruby.network.routers2.msg_count.Control::2 1289 410system.ruby.network.routers2.msg_count.Data::2 1285 411system.ruby.network.routers2.msg_count.Response_Data::4 1289 412system.ruby.network.routers2.msg_count.Writeback_Control::3 1285 413system.ruby.network.routers2.msg_bytes.Control::2 10312 414system.ruby.network.routers2.msg_bytes.Data::2 92520 415system.ruby.network.routers2.msg_bytes.Response_Data::4 92808 416system.ruby.network.routers2.msg_bytes.Writeback_Control::3 10280 |
| 409system.ruby.network.pwrStateResidencyTicks::UNDEFINED 81703 # Cumulative time (in ticks) in various power states | 417system.ruby.network.pwrStateResidencyTicks::UNDEFINED 86746 # Cumulative time (in ticks) in various power states |
| 410system.ruby.network.msg_count.Control 3867 411system.ruby.network.msg_count.Data 3855 412system.ruby.network.msg_count.Response_Data 3867 413system.ruby.network.msg_count.Writeback_Control 3855 414system.ruby.network.msg_byte.Control 30936 415system.ruby.network.msg_byte.Data 277560 416system.ruby.network.msg_byte.Response_Data 278424 417system.ruby.network.msg_byte.Writeback_Control 30840 | 418system.ruby.network.msg_count.Control 3867 419system.ruby.network.msg_count.Data 3855 420system.ruby.network.msg_count.Response_Data 3867 421system.ruby.network.msg_count.Writeback_Control 3855 422system.ruby.network.msg_byte.Control 30936 423system.ruby.network.msg_byte.Data 277560 424system.ruby.network.msg_byte.Response_Data 278424 425system.ruby.network.msg_byte.Writeback_Control 30840 |
| 418system.sys_port_proxy.pwrStateResidencyTicks::UNDEFINED 81703 # Cumulative time (in ticks) in various power states 419system.ruby.network.routers0.throttle0.link_utilization 7.885879 | 426system.sys_port_proxy.pwrStateResidencyTicks::UNDEFINED 86746 # Cumulative time (in ticks) in various power states 427system.ruby.network.routers0.throttle0.link_utilization 7.427432 |
| 420system.ruby.network.routers0.throttle0.msg_count.Response_Data::4 1289 421system.ruby.network.routers0.throttle0.msg_count.Writeback_Control::3 1285 422system.ruby.network.routers0.throttle0.msg_bytes.Response_Data::4 92808 423system.ruby.network.routers0.throttle0.msg_bytes.Writeback_Control::3 10280 | 428system.ruby.network.routers0.throttle0.msg_count.Response_Data::4 1289 429system.ruby.network.routers0.throttle0.msg_count.Writeback_Control::3 1285 430system.ruby.network.routers0.throttle0.msg_bytes.Response_Data::4 92808 431system.ruby.network.routers0.throttle0.msg_bytes.Writeback_Control::3 10280 |
| 424system.ruby.network.routers0.throttle1.link_utilization 7.866296 | 432system.ruby.network.routers0.throttle1.link_utilization 7.408987 |
| 425system.ruby.network.routers0.throttle1.msg_count.Control::2 1289 426system.ruby.network.routers0.throttle1.msg_count.Data::2 1285 427system.ruby.network.routers0.throttle1.msg_bytes.Control::2 10312 428system.ruby.network.routers0.throttle1.msg_bytes.Data::2 92520 | 433system.ruby.network.routers0.throttle1.msg_count.Control::2 1289 434system.ruby.network.routers0.throttle1.msg_count.Data::2 1285 435system.ruby.network.routers0.throttle1.msg_bytes.Control::2 10312 436system.ruby.network.routers0.throttle1.msg_bytes.Data::2 92520 |
| 429system.ruby.network.routers1.throttle0.link_utilization 7.866296 | 437system.ruby.network.routers1.throttle0.link_utilization 7.408987 |
| 430system.ruby.network.routers1.throttle0.msg_count.Control::2 1289 431system.ruby.network.routers1.throttle0.msg_count.Data::2 1285 432system.ruby.network.routers1.throttle0.msg_bytes.Control::2 10312 433system.ruby.network.routers1.throttle0.msg_bytes.Data::2 92520 | 438system.ruby.network.routers1.throttle0.msg_count.Control::2 1289 439system.ruby.network.routers1.throttle0.msg_count.Data::2 1285 440system.ruby.network.routers1.throttle0.msg_bytes.Control::2 10312 441system.ruby.network.routers1.throttle0.msg_bytes.Data::2 92520 |
| 434system.ruby.network.routers1.throttle1.link_utilization 7.885879 | 442system.ruby.network.routers1.throttle1.link_utilization 7.427432 |
| 435system.ruby.network.routers1.throttle1.msg_count.Response_Data::4 1289 436system.ruby.network.routers1.throttle1.msg_count.Writeback_Control::3 1285 437system.ruby.network.routers1.throttle1.msg_bytes.Response_Data::4 92808 438system.ruby.network.routers1.throttle1.msg_bytes.Writeback_Control::3 10280 | 443system.ruby.network.routers1.throttle1.msg_count.Response_Data::4 1289 444system.ruby.network.routers1.throttle1.msg_count.Writeback_Control::3 1285 445system.ruby.network.routers1.throttle1.msg_bytes.Response_Data::4 92808 446system.ruby.network.routers1.throttle1.msg_bytes.Writeback_Control::3 10280 |
| 439system.ruby.network.routers2.throttle0.link_utilization 7.885879 | 447system.ruby.network.routers2.throttle0.link_utilization 7.427432 |
| 440system.ruby.network.routers2.throttle0.msg_count.Response_Data::4 1289 441system.ruby.network.routers2.throttle0.msg_count.Writeback_Control::3 1285 442system.ruby.network.routers2.throttle0.msg_bytes.Response_Data::4 92808 443system.ruby.network.routers2.throttle0.msg_bytes.Writeback_Control::3 10280 | 448system.ruby.network.routers2.throttle0.msg_count.Response_Data::4 1289 449system.ruby.network.routers2.throttle0.msg_count.Writeback_Control::3 1285 450system.ruby.network.routers2.throttle0.msg_bytes.Response_Data::4 92808 451system.ruby.network.routers2.throttle0.msg_bytes.Writeback_Control::3 10280 |
| 444system.ruby.network.routers2.throttle1.link_utilization 7.866296 | 452system.ruby.network.routers2.throttle1.link_utilization 7.408987 |
| 445system.ruby.network.routers2.throttle1.msg_count.Control::2 1289 446system.ruby.network.routers2.throttle1.msg_count.Data::2 1285 447system.ruby.network.routers2.throttle1.msg_bytes.Control::2 10312 448system.ruby.network.routers2.throttle1.msg_bytes.Data::2 92520 449system.ruby.delayVCHist.vnet_1::bucket_size 1 # delay histogram for vnet_1 450system.ruby.delayVCHist.vnet_1::max_bucket 9 # delay histogram for vnet_1 451system.ruby.delayVCHist.vnet_1::samples 1289 # delay histogram for vnet_1 452system.ruby.delayVCHist.vnet_1 | 1289 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for vnet_1 453system.ruby.delayVCHist.vnet_1::total 1289 # delay histogram for vnet_1 454system.ruby.delayVCHist.vnet_2::bucket_size 1 # delay histogram for vnet_2 455system.ruby.delayVCHist.vnet_2::max_bucket 9 # delay histogram for vnet_2 456system.ruby.delayVCHist.vnet_2::samples 1285 # delay histogram for vnet_2 457system.ruby.delayVCHist.vnet_2 | 1285 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for vnet_2 458system.ruby.delayVCHist.vnet_2::total 1285 # delay histogram for vnet_2 459system.ruby.LD.latency_hist_seqr::bucket_size 64 460system.ruby.LD.latency_hist_seqr::max_bucket 639 461system.ruby.LD.latency_hist_seqr::samples 715 | 453system.ruby.network.routers2.throttle1.msg_count.Control::2 1289 454system.ruby.network.routers2.throttle1.msg_count.Data::2 1285 455system.ruby.network.routers2.throttle1.msg_bytes.Control::2 10312 456system.ruby.network.routers2.throttle1.msg_bytes.Data::2 92520 457system.ruby.delayVCHist.vnet_1::bucket_size 1 # delay histogram for vnet_1 458system.ruby.delayVCHist.vnet_1::max_bucket 9 # delay histogram for vnet_1 459system.ruby.delayVCHist.vnet_1::samples 1289 # delay histogram for vnet_1 460system.ruby.delayVCHist.vnet_1 | 1289 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for vnet_1 461system.ruby.delayVCHist.vnet_1::total 1289 # delay histogram for vnet_1 462system.ruby.delayVCHist.vnet_2::bucket_size 1 # delay histogram for vnet_2 463system.ruby.delayVCHist.vnet_2::max_bucket 9 # delay histogram for vnet_2 464system.ruby.delayVCHist.vnet_2::samples 1285 # delay histogram for vnet_2 465system.ruby.delayVCHist.vnet_2 | 1285 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for vnet_2 466system.ruby.delayVCHist.vnet_2::total 1285 # delay histogram for vnet_2 467system.ruby.LD.latency_hist_seqr::bucket_size 64 468system.ruby.LD.latency_hist_seqr::max_bucket 639 469system.ruby.LD.latency_hist_seqr::samples 715 |
| 462system.ruby.LD.latency_hist_seqr::mean 28.394406 463system.ruby.LD.latency_hist_seqr::gmean 8.251059 464system.ruby.LD.latency_hist_seqr::stdev 33.266069 465system.ruby.LD.latency_hist_seqr | 656 91.75% 91.75% | 50 6.99% 98.74% | 8 1.12% 99.86% | 0 0.00% 99.86% | 0 0.00% 99.86% | 0 0.00% 99.86% | 1 0.14% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 470system.ruby.LD.latency_hist_seqr::mean 30.464336 471system.ruby.LD.latency_hist_seqr::gmean 8.484057 472system.ruby.LD.latency_hist_seqr::stdev 36.464169 473system.ruby.LD.latency_hist_seqr | 540 75.52% 75.52% | 163 22.80% 98.32% | 10 1.40% 99.72% | 0 0.00% 99.72% | 1 0.14% 99.86% | 1 0.14% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% |
| 466system.ruby.LD.latency_hist_seqr::total 715 467system.ruby.LD.hit_latency_hist_seqr::bucket_size 1 468system.ruby.LD.hit_latency_hist_seqr::max_bucket 9 469system.ruby.LD.hit_latency_hist_seqr::samples 320 470system.ruby.LD.hit_latency_hist_seqr::mean 1 471system.ruby.LD.hit_latency_hist_seqr::gmean 1 472system.ruby.LD.hit_latency_hist_seqr | 0 0.00% 0.00% | 320 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 473system.ruby.LD.hit_latency_hist_seqr::total 320 474system.ruby.LD.miss_latency_hist_seqr::bucket_size 64 475system.ruby.LD.miss_latency_hist_seqr::max_bucket 639 476system.ruby.LD.miss_latency_hist_seqr::samples 395 | 474system.ruby.LD.latency_hist_seqr::total 715 475system.ruby.LD.hit_latency_hist_seqr::bucket_size 1 476system.ruby.LD.hit_latency_hist_seqr::max_bucket 9 477system.ruby.LD.hit_latency_hist_seqr::samples 320 478system.ruby.LD.hit_latency_hist_seqr::mean 1 479system.ruby.LD.hit_latency_hist_seqr::gmean 1 480system.ruby.LD.hit_latency_hist_seqr | 0 0.00% 0.00% | 320 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 481system.ruby.LD.hit_latency_hist_seqr::total 320 482system.ruby.LD.miss_latency_hist_seqr::bucket_size 64 483system.ruby.LD.miss_latency_hist_seqr::max_bucket 639 484system.ruby.LD.miss_latency_hist_seqr::samples 395 |
| 477system.ruby.LD.miss_latency_hist_seqr::mean 50.587342 478system.ruby.LD.miss_latency_hist_seqr::gmean 45.603541 479system.ruby.LD.miss_latency_hist_seqr::stdev 30.035585 480system.ruby.LD.miss_latency_hist_seqr | 336 85.06% 85.06% | 50 12.66% 97.72% | 8 2.03% 99.75% | 0 0.00% 99.75% | 0 0.00% 99.75% | 0 0.00% 99.75% | 1 0.25% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 485system.ruby.LD.miss_latency_hist_seqr::mean 54.334177 486system.ruby.LD.miss_latency_hist_seqr::gmean 47.961199 487system.ruby.LD.miss_latency_hist_seqr::stdev 33.663530 488system.ruby.LD.miss_latency_hist_seqr | 220 55.70% 55.70% | 163 41.27% 96.96% | 10 2.53% 99.49% | 0 0.00% 99.49% | 1 0.25% 99.75% | 1 0.25% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% |
| 481system.ruby.LD.miss_latency_hist_seqr::total 395 | 489system.ruby.LD.miss_latency_hist_seqr::total 395 |
| 482system.ruby.ST.latency_hist_seqr::bucket_size 32 483system.ruby.ST.latency_hist_seqr::max_bucket 319 | 490system.ruby.ST.latency_hist_seqr::bucket_size 64 491system.ruby.ST.latency_hist_seqr::max_bucket 639 |
| 484system.ruby.ST.latency_hist_seqr::samples 673 | 492system.ruby.ST.latency_hist_seqr::samples 673 |
| 485system.ruby.ST.latency_hist_seqr::mean 16.656761 486system.ruby.ST.latency_hist_seqr::gmean 2.888882 487system.ruby.ST.latency_hist_seqr::stdev 31.530024 488system.ruby.ST.latency_hist_seqr | 494 73.40% 73.40% | 146 21.69% 95.10% | 26 3.86% 98.96% | 0 0.00% 98.96% | 4 0.59% 99.55% | 0 0.00% 99.55% | 1 0.15% 99.70% | 0 0.00% 99.70% | 1 0.15% 99.85% | 1 0.15% 100.00% | 493system.ruby.ST.latency_hist_seqr::mean 17.630015 494system.ruby.ST.latency_hist_seqr::gmean 2.926423 495system.ruby.ST.latency_hist_seqr::stdev 33.570929 496system.ruby.ST.latency_hist_seqr | 555 82.47% 82.47% | 110 16.34% 98.81% | 6 0.89% 99.70% | 0 0.00% 99.70% | 1 0.15% 99.85% | 1 0.15% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% |
| 489system.ruby.ST.latency_hist_seqr::total 673 490system.ruby.ST.hit_latency_hist_seqr::bucket_size 1 491system.ruby.ST.hit_latency_hist_seqr::max_bucket 9 492system.ruby.ST.hit_latency_hist_seqr::samples 494 493system.ruby.ST.hit_latency_hist_seqr::mean 1 494system.ruby.ST.hit_latency_hist_seqr::gmean 1 495system.ruby.ST.hit_latency_hist_seqr | 0 0.00% 0.00% | 494 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 496system.ruby.ST.hit_latency_hist_seqr::total 494 | 497system.ruby.ST.latency_hist_seqr::total 673 498system.ruby.ST.hit_latency_hist_seqr::bucket_size 1 499system.ruby.ST.hit_latency_hist_seqr::max_bucket 9 500system.ruby.ST.hit_latency_hist_seqr::samples 494 501system.ruby.ST.hit_latency_hist_seqr::mean 1 502system.ruby.ST.hit_latency_hist_seqr::gmean 1 503system.ruby.ST.hit_latency_hist_seqr | 0 0.00% 0.00% | 494 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 504system.ruby.ST.hit_latency_hist_seqr::total 494 |
| 497system.ruby.ST.miss_latency_hist_seqr::bucket_size 32 498system.ruby.ST.miss_latency_hist_seqr::max_bucket 319 | 505system.ruby.ST.miss_latency_hist_seqr::bucket_size 64 506system.ruby.ST.miss_latency_hist_seqr::max_bucket 639 |
| 499system.ruby.ST.miss_latency_hist_seqr::samples 179 | 507system.ruby.ST.miss_latency_hist_seqr::samples 179 |
| 500system.ruby.ST.miss_latency_hist_seqr::mean 59.865922 501system.ruby.ST.miss_latency_hist_seqr::gmean 53.981018 502system.ruby.ST.miss_latency_hist_seqr::stdev 34.573548 503system.ruby.ST.miss_latency_hist_seqr | 0 0.00% 0.00% | 146 81.56% 81.56% | 26 14.53% 96.09% | 0 0.00% 96.09% | 4 2.23% 98.32% | 0 0.00% 98.32% | 1 0.56% 98.88% | 0 0.00% 98.88% | 1 0.56% 99.44% | 1 0.56% 100.00% | 508system.ruby.ST.miss_latency_hist_seqr::mean 63.525140 509system.ruby.ST.miss_latency_hist_seqr::gmean 56.666113 510system.ruby.ST.miss_latency_hist_seqr::stdev 37.000656 511system.ruby.ST.miss_latency_hist_seqr | 61 34.08% 34.08% | 110 61.45% 95.53% | 6 3.35% 98.88% | 0 0.00% 98.88% | 1 0.56% 99.44% | 1 0.56% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% |
| 504system.ruby.ST.miss_latency_hist_seqr::total 179 505system.ruby.IFETCH.latency_hist_seqr::bucket_size 64 506system.ruby.IFETCH.latency_hist_seqr::max_bucket 639 507system.ruby.IFETCH.latency_hist_seqr::samples 5370 | 512system.ruby.ST.miss_latency_hist_seqr::total 179 513system.ruby.IFETCH.latency_hist_seqr::bucket_size 64 514system.ruby.IFETCH.latency_hist_seqr::max_bucket 639 515system.ruby.IFETCH.latency_hist_seqr::samples 5370 |
| 508system.ruby.IFETCH.latency_hist_seqr::mean 8.088082 509system.ruby.IFETCH.latency_hist_seqr::gmean 1.676829 510system.ruby.IFETCH.latency_hist_seqr::stdev 21.661449 511system.ruby.IFETCH.latency_hist_seqr | 5255 97.86% 97.86% | 93 1.73% 99.59% | 16 0.30% 99.89% | 1 0.02% 99.91% | 3 0.06% 99.96% | 2 0.04% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 516system.ruby.IFETCH.latency_hist_seqr::mean 8.629609 517system.ruby.IFETCH.latency_hist_seqr::gmean 1.690107 518system.ruby.IFETCH.latency_hist_seqr::stdev 23.432463 519system.ruby.IFETCH.latency_hist_seqr | 4984 92.81% 92.81% | 360 6.70% 99.52% | 20 0.37% 99.89% | 1 0.02% 99.91% | 4 0.07% 99.98% | 0 0.00% 99.98% | 0 0.00% 99.98% | 1 0.02% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% |
| 512system.ruby.IFETCH.latency_hist_seqr::total 5370 513system.ruby.IFETCH.hit_latency_hist_seqr::bucket_size 1 514system.ruby.IFETCH.hit_latency_hist_seqr::max_bucket 9 515system.ruby.IFETCH.hit_latency_hist_seqr::samples 4655 516system.ruby.IFETCH.hit_latency_hist_seqr::mean 1 517system.ruby.IFETCH.hit_latency_hist_seqr::gmean 1 518system.ruby.IFETCH.hit_latency_hist_seqr | 0 0.00% 0.00% | 4655 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 519system.ruby.IFETCH.hit_latency_hist_seqr::total 4655 520system.ruby.IFETCH.miss_latency_hist_seqr::bucket_size 64 521system.ruby.IFETCH.miss_latency_hist_seqr::max_bucket 639 522system.ruby.IFETCH.miss_latency_hist_seqr::samples 715 | 520system.ruby.IFETCH.latency_hist_seqr::total 5370 521system.ruby.IFETCH.hit_latency_hist_seqr::bucket_size 1 522system.ruby.IFETCH.hit_latency_hist_seqr::max_bucket 9 523system.ruby.IFETCH.hit_latency_hist_seqr::samples 4655 524system.ruby.IFETCH.hit_latency_hist_seqr::mean 1 525system.ruby.IFETCH.hit_latency_hist_seqr::gmean 1 526system.ruby.IFETCH.hit_latency_hist_seqr | 0 0.00% 0.00% | 4655 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 527system.ruby.IFETCH.hit_latency_hist_seqr::total 4655 528system.ruby.IFETCH.miss_latency_hist_seqr::bucket_size 64 529system.ruby.IFETCH.miss_latency_hist_seqr::max_bucket 639 530system.ruby.IFETCH.miss_latency_hist_seqr::samples 715 |
| 523system.ruby.IFETCH.miss_latency_hist_seqr::mean 54.234965 524system.ruby.IFETCH.miss_latency_hist_seqr::gmean 48.531211 525system.ruby.IFETCH.miss_latency_hist_seqr::stdev 32.684395 526system.ruby.IFETCH.miss_latency_hist_seqr | 600 83.92% 83.92% | 93 13.01% 96.92% | 16 2.24% 99.16% | 1 0.14% 99.30% | 3 0.42% 99.72% | 2 0.28% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 531system.ruby.IFETCH.miss_latency_hist_seqr::mean 58.302098 532system.ruby.IFETCH.miss_latency_hist_seqr::gmean 51.492810 533system.ruby.IFETCH.miss_latency_hist_seqr::stdev 35.756740 534system.ruby.IFETCH.miss_latency_hist_seqr | 329 46.01% 46.01% | 360 50.35% 96.36% | 20 2.80% 99.16% | 1 0.14% 99.30% | 4 0.56% 99.86% | 0 0.00% 99.86% | 0 0.00% 99.86% | 1 0.14% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% |
| 527system.ruby.IFETCH.miss_latency_hist_seqr::total 715 528system.ruby.Directory.miss_mach_latency_hist_seqr::bucket_size 64 529system.ruby.Directory.miss_mach_latency_hist_seqr::max_bucket 639 530system.ruby.Directory.miss_mach_latency_hist_seqr::samples 1289 | 535system.ruby.IFETCH.miss_latency_hist_seqr::total 715 536system.ruby.Directory.miss_mach_latency_hist_seqr::bucket_size 64 537system.ruby.Directory.miss_mach_latency_hist_seqr::max_bucket 639 538system.ruby.Directory.miss_mach_latency_hist_seqr::samples 1289 |
| 531system.ruby.Directory.miss_mach_latency_hist_seqr::mean 53.899147 532system.ruby.Directory.miss_mach_latency_hist_seqr::gmean 48.323546 533system.ruby.Directory.miss_mach_latency_hist_seqr::stdev 32.275754 534system.ruby.Directory.miss_mach_latency_hist_seqr | 1082 83.94% 83.94% | 169 13.11% 97.05% | 28 2.17% 99.22% | 2 0.16% 99.38% | 5 0.39% 99.77% | 2 0.16% 99.92% | 1 0.08% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 539system.ruby.Directory.miss_mach_latency_hist_seqr::mean 57.811482 540system.ruby.Directory.miss_mach_latency_hist_seqr::gmean 51.058094 541system.ruby.Directory.miss_mach_latency_hist_seqr::stdev 35.397665 542system.ruby.Directory.miss_mach_latency_hist_seqr | 610 47.32% 47.32% | 633 49.11% 96.43% | 36 2.79% 99.22% | 1 0.08% 99.30% | 6 0.47% 99.77% | 2 0.16% 99.92% | 0 0.00% 99.92% | 1 0.08% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% |
| 535system.ruby.Directory.miss_mach_latency_hist_seqr::total 1289 536system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::bucket_size 1 537system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::max_bucket 9 538system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::samples 1 539system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::stdev nan 540system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request | 1 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 541system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::total 1 542system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward::bucket_size 1 --- 14 unchanged lines hidden (view full) --- 557system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::mean 75 558system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::gmean 75.000000 559system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::stdev nan 560system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1 100.00% 100.00% 561system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::total 1 562system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::bucket_size 64 563system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::max_bucket 639 564system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::samples 395 | 543system.ruby.Directory.miss_mach_latency_hist_seqr::total 1289 544system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::bucket_size 1 545system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::max_bucket 9 546system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::samples 1 547system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::stdev nan 548system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request | 1 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 549system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::total 1 550system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward::bucket_size 1 --- 14 unchanged lines hidden (view full) --- 565system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::mean 75 566system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::gmean 75.000000 567system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::stdev nan 568system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1 100.00% 100.00% 569system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::total 1 570system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::bucket_size 64 571system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::max_bucket 639 572system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::samples 395 |
| 565system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::mean 50.587342 566system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::gmean 45.603541 567system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::stdev 30.035585 568system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr | 336 85.06% 85.06% | 50 12.66% 97.72% | 8 2.03% 99.75% | 0 0.00% 99.75% | 0 0.00% 99.75% | 0 0.00% 99.75% | 1 0.25% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 573system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::mean 54.334177 574system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::gmean 47.961199 575system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::stdev 33.663530 576system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr | 220 55.70% 55.70% | 163 41.27% 96.96% | 10 2.53% 99.49% | 0 0.00% 99.49% | 1 0.25% 99.75% | 1 0.25% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% |
| 569system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::total 395 | 577system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::total 395 |
| 570system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::bucket_size 32 571system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::max_bucket 319 | 578system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::bucket_size 64 579system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::max_bucket 639 |
| 572system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::samples 179 | 580system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::samples 179 |
| 573system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::mean 59.865922 574system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::gmean 53.981018 575system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::stdev 34.573548 576system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr | 0 0.00% 0.00% | 146 81.56% 81.56% | 26 14.53% 96.09% | 0 0.00% 96.09% | 4 2.23% 98.32% | 0 0.00% 98.32% | 1 0.56% 98.88% | 0 0.00% 98.88% | 1 0.56% 99.44% | 1 0.56% 100.00% | 581system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::mean 63.525140 582system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::gmean 56.666113 583system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::stdev 37.000656 584system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr | 61 34.08% 34.08% | 110 61.45% 95.53% | 6 3.35% 98.88% | 0 0.00% 98.88% | 1 0.56% 99.44% | 1 0.56% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% |
| 577system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::total 179 578system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::bucket_size 64 579system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::max_bucket 639 580system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::samples 715 | 585system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::total 179 586system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::bucket_size 64 587system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::max_bucket 639 588system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::samples 715 |
| 581system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::mean 54.234965 582system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::gmean 48.531211 583system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::stdev 32.684395 584system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr | 600 83.92% 83.92% | 93 13.01% 96.92% | 16 2.24% 99.16% | 1 0.14% 99.30% | 3 0.42% 99.72% | 2 0.28% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 589system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::mean 58.302098 590system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::gmean 51.492810 591system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::stdev 35.756740 592system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr | 329 46.01% 46.01% | 360 50.35% 96.36% | 20 2.80% 99.16% | 1 0.14% 99.30% | 4 0.56% 99.86% | 0 0.00% 99.86% | 0 0.00% 99.86% | 1 0.14% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% |
| 585system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::total 715 586system.ruby.Directory_Controller.GETX 1289 0.00% 0.00% 587system.ruby.Directory_Controller.PUTX 1285 0.00% 0.00% 588system.ruby.Directory_Controller.Memory_Data 1289 0.00% 0.00% 589system.ruby.Directory_Controller.Memory_Ack 1285 0.00% 0.00% 590system.ruby.Directory_Controller.I.GETX 1289 0.00% 0.00% 591system.ruby.Directory_Controller.M.PUTX 1285 0.00% 0.00% 592system.ruby.Directory_Controller.IM.Memory_Data 1289 0.00% 0.00% --- 19 unchanged lines hidden --- | 593system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::total 715 594system.ruby.Directory_Controller.GETX 1289 0.00% 0.00% 595system.ruby.Directory_Controller.PUTX 1285 0.00% 0.00% 596system.ruby.Directory_Controller.Memory_Data 1289 0.00% 0.00% 597system.ruby.Directory_Controller.Memory_Ack 1285 0.00% 0.00% 598system.ruby.Directory_Controller.I.GETX 1289 0.00% 0.00% 599system.ruby.Directory_Controller.M.PUTX 1285 0.00% 0.00% 600system.ruby.Directory_Controller.IM.Memory_Data 1289 0.00% 0.00% --- 19 unchanged lines hidden --- |