1 2---------- Begin Simulation Statistics ---------- |
3sim_seconds 0.000032 4sim_ticks 31821500 5final_tick 31821500 |
6sim_freq 1000000000000 |
7host_inst_rate 11620 8host_op_rate 11638 9host_tick_rate 66593131 10host_mem_usage 258956 11host_seconds 0.48 12sim_insts 5552 13sim_ops 5561 |
14system.voltage_domain.voltage 1 15system.clk_domain.clock 1000 |
16system.physmem.pwrStateResidencyTicks::UNDEFINED 31821500 17system.physmem.bytes_read::cpu.inst 14592 18system.physmem.bytes_read::cpu.data 9216 19system.physmem.bytes_read::total 23808 20system.physmem.bytes_inst_read::cpu.inst 14592 21system.physmem.bytes_inst_read::total 14592 22system.physmem.num_reads::cpu.inst 228 23system.physmem.num_reads::cpu.data 144 24system.physmem.num_reads::total 372 25system.physmem.bw_read::cpu.inst 458557893 26system.physmem.bw_read::cpu.data 289615512 27system.physmem.bw_read::total 748173405 28system.physmem.bw_inst_read::cpu.inst 458557893 29system.physmem.bw_inst_read::total 458557893 30system.physmem.bw_total::cpu.inst 458557893 31system.physmem.bw_total::cpu.data 289615512 32system.physmem.bw_total::total 748173405 33system.pwrStateResidencyTicks::UNDEFINED 31821500 |
34system.cpu_clk_domain.clock 500 35system.cpu.dtb.read_hits 0 36system.cpu.dtb.read_misses 0 37system.cpu.dtb.read_accesses 0 38system.cpu.dtb.write_hits 0 39system.cpu.dtb.write_misses 0 40system.cpu.dtb.write_accesses 0 41system.cpu.dtb.hits 0 --- 4 unchanged lines hidden (view full) --- 46system.cpu.itb.read_accesses 0 47system.cpu.itb.write_hits 0 48system.cpu.itb.write_misses 0 49system.cpu.itb.write_accesses 0 50system.cpu.itb.hits 0 51system.cpu.itb.misses 0 52system.cpu.itb.accesses 0 53system.cpu.workload.numSyscalls 9 |
54system.cpu.pwrStateResidencyTicks::ON 31821500 55system.cpu.numCycles 63643 |
56system.cpu.numWorkItemsStarted 0 57system.cpu.numWorkItemsCompleted 0 |
58system.cpu.committedInsts 5552 59system.cpu.committedOps 5561 60system.cpu.num_int_alu_accesses 5498 |
61system.cpu.num_fp_alu_accesses 12 |
62system.cpu.num_vec_alu_accesses 0 63system.cpu.num_func_calls 282 |
64system.cpu.num_conditional_control_insts 914 |
65system.cpu.num_int_insts 5498 |
66system.cpu.num_fp_insts 12 |
67system.cpu.num_vec_insts 0 68system.cpu.num_int_register_reads 7038 69system.cpu.num_int_register_writes 3414 |
70system.cpu.num_fp_register_reads 12 71system.cpu.num_fp_register_writes 0 |
72system.cpu.num_vec_register_reads 0 73system.cpu.num_vec_register_writes 0 74system.cpu.num_mem_refs 2162 75system.cpu.num_load_insts 1082 76system.cpu.num_store_insts 1080 |
77system.cpu.num_idle_cycles 0 |
78system.cpu.num_busy_cycles 63643 |
79system.cpu.not_idle_fraction 1 80system.cpu.idle_fraction 0 |
81system.cpu.Branches 1196 |
82system.cpu.op_class::No_OpClass 10 0.18% 0.18% |
83system.cpu.op_class::IntAlu 3392 60.90% 61.08% 84system.cpu.op_class::IntMult 2 0.04% 61.11% 85system.cpu.op_class::IntDiv 4 0.07% 61.18% 86system.cpu.op_class::FloatAdd 0 0.00% 61.18% 87system.cpu.op_class::FloatCmp 0 0.00% 61.18% 88system.cpu.op_class::FloatCvt 0 0.00% 61.18% 89system.cpu.op_class::FloatMult 0 0.00% 61.18% 90system.cpu.op_class::FloatMultAcc 0 0.00% 61.18% 91system.cpu.op_class::FloatDiv 0 0.00% 61.18% 92system.cpu.op_class::FloatMisc 0 0.00% 61.18% 93system.cpu.op_class::FloatSqrt 0 0.00% 61.18% 94system.cpu.op_class::SimdAdd 0 0.00% 61.18% 95system.cpu.op_class::SimdAddAcc 0 0.00% 61.18% 96system.cpu.op_class::SimdAlu 0 0.00% 61.18% 97system.cpu.op_class::SimdCmp 0 0.00% 61.18% 98system.cpu.op_class::SimdCvt 0 0.00% 61.18% 99system.cpu.op_class::SimdMisc 0 0.00% 61.18% 100system.cpu.op_class::SimdMult 0 0.00% 61.18% 101system.cpu.op_class::SimdMultAcc 0 0.00% 61.18% 102system.cpu.op_class::SimdShift 0 0.00% 61.18% 103system.cpu.op_class::SimdShiftAcc 0 0.00% 61.18% 104system.cpu.op_class::SimdSqrt 0 0.00% 61.18% 105system.cpu.op_class::SimdFloatAdd 0 0.00% 61.18% 106system.cpu.op_class::SimdFloatAlu 0 0.00% 61.18% 107system.cpu.op_class::SimdFloatCmp 0 0.00% 61.18% 108system.cpu.op_class::SimdFloatCvt 0 0.00% 61.18% 109system.cpu.op_class::SimdFloatDiv 0 0.00% 61.18% 110system.cpu.op_class::SimdFloatMisc 0 0.00% 61.18% 111system.cpu.op_class::SimdFloatMult 0 0.00% 61.18% 112system.cpu.op_class::SimdFloatMultAcc 0 0.00% 61.18% 113system.cpu.op_class::SimdFloatSqrt 0 0.00% 61.18% 114system.cpu.op_class::MemRead 1082 19.43% 80.61% 115system.cpu.op_class::MemWrite 1068 19.17% 99.78% |
116system.cpu.op_class::FloatMemRead 0 0.00% 99.78% 117system.cpu.op_class::FloatMemWrite 12 0.22% 100.00% 118system.cpu.op_class::IprAccess 0 0.00% 100.00% 119system.cpu.op_class::InstPrefetch 0 0.00% 100.00% |
120system.cpu.op_class::total 5570 121system.cpu.dcache.tags.pwrStateResidencyTicks::UNDEFINED 31821500 |
122system.cpu.dcache.tags.replacements 0 |
123system.cpu.dcache.tags.tagsinuse 86.061155 124system.cpu.dcache.tags.total_refs 2018 125system.cpu.dcache.tags.sampled_refs 144 126system.cpu.dcache.tags.avg_refs 14.013889 |
127system.cpu.dcache.tags.warmup_cycle 0 |
128system.cpu.dcache.tags.occ_blocks::cpu.data 86.061155 129system.cpu.dcache.tags.occ_percent::cpu.data 0.021011 130system.cpu.dcache.tags.occ_percent::total 0.021011 131system.cpu.dcache.tags.occ_task_id_blocks::1024 144 132system.cpu.dcache.tags.age_task_id_blocks_1024::0 30 133system.cpu.dcache.tags.age_task_id_blocks_1024::1 114 134system.cpu.dcache.tags.occ_task_id_percent::1024 0.035156 135system.cpu.dcache.tags.tag_accesses 4468 136system.cpu.dcache.tags.data_accesses 4468 137system.cpu.dcache.pwrStateResidencyTicks::UNDEFINED 31821500 138system.cpu.dcache.ReadReq_hits::cpu.data 1013 139system.cpu.dcache.ReadReq_hits::total 1013 140system.cpu.dcache.WriteReq_hits::cpu.data 990 141system.cpu.dcache.WriteReq_hits::total 990 142system.cpu.dcache.LoadLockedReq_hits::cpu.data 7 143system.cpu.dcache.LoadLockedReq_hits::total 7 |
144system.cpu.dcache.StoreCondReq_hits::cpu.data 8 145system.cpu.dcache.StoreCondReq_hits::total 8 |
146system.cpu.dcache.demand_hits::cpu.data 2003 147system.cpu.dcache.demand_hits::total 2003 148system.cpu.dcache.overall_hits::cpu.data 2003 149system.cpu.dcache.overall_hits::total 2003 |
150system.cpu.dcache.ReadReq_misses::cpu.data 61 151system.cpu.dcache.ReadReq_misses::total 61 152system.cpu.dcache.WriteReq_misses::cpu.data 82 153system.cpu.dcache.WriteReq_misses::total 82 |
154system.cpu.dcache.LoadLockedReq_misses::cpu.data 1 155system.cpu.dcache.LoadLockedReq_misses::total 1 |
156system.cpu.dcache.demand_misses::cpu.data 143 157system.cpu.dcache.demand_misses::total 143 158system.cpu.dcache.overall_misses::cpu.data 143 159system.cpu.dcache.overall_misses::total 143 160system.cpu.dcache.ReadReq_miss_latency::cpu.data 3843000 161system.cpu.dcache.ReadReq_miss_latency::total 3843000 162system.cpu.dcache.WriteReq_miss_latency::cpu.data 5166000 163system.cpu.dcache.WriteReq_miss_latency::total 5166000 |
164system.cpu.dcache.LoadLockedReq_miss_latency::cpu.data 63000 165system.cpu.dcache.LoadLockedReq_miss_latency::total 63000 |
166system.cpu.dcache.demand_miss_latency::cpu.data 9009000 167system.cpu.dcache.demand_miss_latency::total 9009000 168system.cpu.dcache.overall_miss_latency::cpu.data 9009000 169system.cpu.dcache.overall_miss_latency::total 9009000 |
170system.cpu.dcache.ReadReq_accesses::cpu.data 1074 171system.cpu.dcache.ReadReq_accesses::total 1074 172system.cpu.dcache.WriteReq_accesses::cpu.data 1072 173system.cpu.dcache.WriteReq_accesses::total 1072 |
174system.cpu.dcache.LoadLockedReq_accesses::cpu.data 8 175system.cpu.dcache.LoadLockedReq_accesses::total 8 176system.cpu.dcache.StoreCondReq_accesses::cpu.data 8 177system.cpu.dcache.StoreCondReq_accesses::total 8 |
178system.cpu.dcache.demand_accesses::cpu.data 2146 179system.cpu.dcache.demand_accesses::total 2146 180system.cpu.dcache.overall_accesses::cpu.data 2146 181system.cpu.dcache.overall_accesses::total 2146 182system.cpu.dcache.ReadReq_miss_rate::cpu.data 0.056797 183system.cpu.dcache.ReadReq_miss_rate::total 0.056797 184system.cpu.dcache.WriteReq_miss_rate::cpu.data 0.076493 185system.cpu.dcache.WriteReq_miss_rate::total 0.076493 186system.cpu.dcache.LoadLockedReq_miss_rate::cpu.data 0.125000 187system.cpu.dcache.LoadLockedReq_miss_rate::total 0.125000 188system.cpu.dcache.demand_miss_rate::cpu.data 0.066636 189system.cpu.dcache.demand_miss_rate::total 0.066636 190system.cpu.dcache.overall_miss_rate::cpu.data 0.066636 191system.cpu.dcache.overall_miss_rate::total 0.066636 |
192system.cpu.dcache.ReadReq_avg_miss_latency::cpu.data 63000 193system.cpu.dcache.ReadReq_avg_miss_latency::total 63000 194system.cpu.dcache.WriteReq_avg_miss_latency::cpu.data 63000 195system.cpu.dcache.WriteReq_avg_miss_latency::total 63000 196system.cpu.dcache.LoadLockedReq_avg_miss_latency::cpu.data 63000 197system.cpu.dcache.LoadLockedReq_avg_miss_latency::total 63000 198system.cpu.dcache.demand_avg_miss_latency::cpu.data 63000 199system.cpu.dcache.demand_avg_miss_latency::total 63000 --- 4 unchanged lines hidden (view full) --- 204system.cpu.dcache.blocked::no_mshrs 0 205system.cpu.dcache.blocked::no_targets 0 206system.cpu.dcache.avg_blocked_cycles::no_mshrs nan 207system.cpu.dcache.avg_blocked_cycles::no_targets nan 208system.cpu.dcache.ReadReq_mshr_misses::cpu.data 61 209system.cpu.dcache.ReadReq_mshr_misses::total 61 210system.cpu.dcache.WriteReq_mshr_misses::cpu.data 82 211system.cpu.dcache.WriteReq_mshr_misses::total 82 |
212system.cpu.dcache.LoadLockedReq_mshr_misses::cpu.data 1 213system.cpu.dcache.LoadLockedReq_mshr_misses::total 1 |
214system.cpu.dcache.demand_mshr_misses::cpu.data 143 215system.cpu.dcache.demand_mshr_misses::total 143 216system.cpu.dcache.overall_mshr_misses::cpu.data 143 217system.cpu.dcache.overall_mshr_misses::total 143 218system.cpu.dcache.ReadReq_mshr_miss_latency::cpu.data 3782000 219system.cpu.dcache.ReadReq_mshr_miss_latency::total 3782000 220system.cpu.dcache.WriteReq_mshr_miss_latency::cpu.data 5084000 221system.cpu.dcache.WriteReq_mshr_miss_latency::total 5084000 |
222system.cpu.dcache.LoadLockedReq_mshr_miss_latency::cpu.data 62000 223system.cpu.dcache.LoadLockedReq_mshr_miss_latency::total 62000 |
224system.cpu.dcache.demand_mshr_miss_latency::cpu.data 8866000 225system.cpu.dcache.demand_mshr_miss_latency::total 8866000 226system.cpu.dcache.overall_mshr_miss_latency::cpu.data 8866000 227system.cpu.dcache.overall_mshr_miss_latency::total 8866000 |
228system.cpu.dcache.ReadReq_mshr_miss_rate::cpu.data 0.056797 229system.cpu.dcache.ReadReq_mshr_miss_rate::total 0.056797 230system.cpu.dcache.WriteReq_mshr_miss_rate::cpu.data 0.076493 231system.cpu.dcache.WriteReq_mshr_miss_rate::total 0.076493 232system.cpu.dcache.LoadLockedReq_mshr_miss_rate::cpu.data 0.125000 233system.cpu.dcache.LoadLockedReq_mshr_miss_rate::total 0.125000 234system.cpu.dcache.demand_mshr_miss_rate::cpu.data 0.066636 235system.cpu.dcache.demand_mshr_miss_rate::total 0.066636 236system.cpu.dcache.overall_mshr_miss_rate::cpu.data 0.066636 237system.cpu.dcache.overall_mshr_miss_rate::total 0.066636 |
238system.cpu.dcache.ReadReq_avg_mshr_miss_latency::cpu.data 62000 239system.cpu.dcache.ReadReq_avg_mshr_miss_latency::total 62000 240system.cpu.dcache.WriteReq_avg_mshr_miss_latency::cpu.data 62000 241system.cpu.dcache.WriteReq_avg_mshr_miss_latency::total 62000 242system.cpu.dcache.LoadLockedReq_avg_mshr_miss_latency::cpu.data 62000 243system.cpu.dcache.LoadLockedReq_avg_mshr_miss_latency::total 62000 244system.cpu.dcache.demand_avg_mshr_miss_latency::cpu.data 62000 245system.cpu.dcache.demand_avg_mshr_miss_latency::total 62000 246system.cpu.dcache.overall_avg_mshr_miss_latency::cpu.data 62000 247system.cpu.dcache.overall_avg_mshr_miss_latency::total 62000 |
248system.cpu.icache.tags.pwrStateResidencyTicks::UNDEFINED 31821500 |
249system.cpu.icache.tags.replacements 0 |
250system.cpu.icache.tags.tagsinuse 108.376290 251system.cpu.icache.tags.total_refs 6368 252system.cpu.icache.tags.sampled_refs 228 253system.cpu.icache.tags.avg_refs 27.929825 |
254system.cpu.icache.tags.warmup_cycle 0 |
255system.cpu.icache.tags.occ_blocks::cpu.inst 108.376290 256system.cpu.icache.tags.occ_percent::cpu.inst 0.052918 257system.cpu.icache.tags.occ_percent::total 0.052918 258system.cpu.icache.tags.occ_task_id_blocks::1024 228 259system.cpu.icache.tags.age_task_id_blocks_1024::0 82 260system.cpu.icache.tags.age_task_id_blocks_1024::1 146 261system.cpu.icache.tags.occ_task_id_percent::1024 0.111328 262system.cpu.icache.tags.tag_accesses 13420 263system.cpu.icache.tags.data_accesses 13420 264system.cpu.icache.pwrStateResidencyTicks::UNDEFINED 31821500 265system.cpu.icache.ReadReq_hits::cpu.inst 6368 266system.cpu.icache.ReadReq_hits::total 6368 267system.cpu.icache.demand_hits::cpu.inst 6368 268system.cpu.icache.demand_hits::total 6368 269system.cpu.icache.overall_hits::cpu.inst 6368 270system.cpu.icache.overall_hits::total 6368 271system.cpu.icache.ReadReq_misses::cpu.inst 228 272system.cpu.icache.ReadReq_misses::total 228 273system.cpu.icache.demand_misses::cpu.inst 228 274system.cpu.icache.demand_misses::total 228 275system.cpu.icache.overall_misses::cpu.inst 228 276system.cpu.icache.overall_misses::total 228 277system.cpu.icache.ReadReq_miss_latency::cpu.inst 14364500 278system.cpu.icache.ReadReq_miss_latency::total 14364500 279system.cpu.icache.demand_miss_latency::cpu.inst 14364500 280system.cpu.icache.demand_miss_latency::total 14364500 281system.cpu.icache.overall_miss_latency::cpu.inst 14364500 282system.cpu.icache.overall_miss_latency::total 14364500 283system.cpu.icache.ReadReq_accesses::cpu.inst 6596 284system.cpu.icache.ReadReq_accesses::total 6596 285system.cpu.icache.demand_accesses::cpu.inst 6596 286system.cpu.icache.demand_accesses::total 6596 287system.cpu.icache.overall_accesses::cpu.inst 6596 288system.cpu.icache.overall_accesses::total 6596 289system.cpu.icache.ReadReq_miss_rate::cpu.inst 0.034566 290system.cpu.icache.ReadReq_miss_rate::total 0.034566 291system.cpu.icache.demand_miss_rate::cpu.inst 0.034566 292system.cpu.icache.demand_miss_rate::total 0.034566 293system.cpu.icache.overall_miss_rate::cpu.inst 0.034566 294system.cpu.icache.overall_miss_rate::total 0.034566 295system.cpu.icache.ReadReq_avg_miss_latency::cpu.inst 63002.192982 296system.cpu.icache.ReadReq_avg_miss_latency::total 63002.192982 297system.cpu.icache.demand_avg_miss_latency::cpu.inst 63002.192982 298system.cpu.icache.demand_avg_miss_latency::total 63002.192982 299system.cpu.icache.overall_avg_miss_latency::cpu.inst 63002.192982 300system.cpu.icache.overall_avg_miss_latency::total 63002.192982 |
301system.cpu.icache.blocked_cycles::no_mshrs 0 302system.cpu.icache.blocked_cycles::no_targets 0 303system.cpu.icache.blocked::no_mshrs 0 304system.cpu.icache.blocked::no_targets 0 305system.cpu.icache.avg_blocked_cycles::no_mshrs nan 306system.cpu.icache.avg_blocked_cycles::no_targets nan |
307system.cpu.icache.ReadReq_mshr_misses::cpu.inst 228 308system.cpu.icache.ReadReq_mshr_misses::total 228 309system.cpu.icache.demand_mshr_misses::cpu.inst 228 310system.cpu.icache.demand_mshr_misses::total 228 311system.cpu.icache.overall_mshr_misses::cpu.inst 228 312system.cpu.icache.overall_mshr_misses::total 228 313system.cpu.icache.ReadReq_mshr_miss_latency::cpu.inst 14136500 314system.cpu.icache.ReadReq_mshr_miss_latency::total 14136500 315system.cpu.icache.demand_mshr_miss_latency::cpu.inst 14136500 316system.cpu.icache.demand_mshr_miss_latency::total 14136500 317system.cpu.icache.overall_mshr_miss_latency::cpu.inst 14136500 318system.cpu.icache.overall_mshr_miss_latency::total 14136500 319system.cpu.icache.ReadReq_mshr_miss_rate::cpu.inst 0.034566 320system.cpu.icache.ReadReq_mshr_miss_rate::total 0.034566 321system.cpu.icache.demand_mshr_miss_rate::cpu.inst 0.034566 322system.cpu.icache.demand_mshr_miss_rate::total 0.034566 323system.cpu.icache.overall_mshr_miss_rate::cpu.inst 0.034566 324system.cpu.icache.overall_mshr_miss_rate::total 0.034566 325system.cpu.icache.ReadReq_avg_mshr_miss_latency::cpu.inst 62002.192982 326system.cpu.icache.ReadReq_avg_mshr_miss_latency::total 62002.192982 327system.cpu.icache.demand_avg_mshr_miss_latency::cpu.inst 62002.192982 328system.cpu.icache.demand_avg_mshr_miss_latency::total 62002.192982 329system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 62002.192982 330system.cpu.icache.overall_avg_mshr_miss_latency::total 62002.192982 331system.cpu.l2cache.tags.pwrStateResidencyTicks::UNDEFINED 31821500 |
332system.cpu.l2cache.tags.replacements 0 |
333system.cpu.l2cache.tags.tagsinuse 194.560193 |
334system.cpu.l2cache.tags.total_refs 0 |
335system.cpu.l2cache.tags.sampled_refs 372 |
336system.cpu.l2cache.tags.avg_refs 0 337system.cpu.l2cache.tags.warmup_cycle 0 |
338system.cpu.l2cache.tags.occ_blocks::cpu.inst 108.451522 339system.cpu.l2cache.tags.occ_blocks::cpu.data 86.108670 340system.cpu.l2cache.tags.occ_percent::cpu.inst 0.003310 341system.cpu.l2cache.tags.occ_percent::cpu.data 0.002628 342system.cpu.l2cache.tags.occ_percent::total 0.005938 343system.cpu.l2cache.tags.occ_task_id_blocks::1024 372 344system.cpu.l2cache.tags.age_task_id_blocks_1024::0 112 345system.cpu.l2cache.tags.age_task_id_blocks_1024::1 260 346system.cpu.l2cache.tags.occ_task_id_percent::1024 0.011353 347system.cpu.l2cache.tags.tag_accesses 3348 348system.cpu.l2cache.tags.data_accesses 3348 349system.cpu.l2cache.pwrStateResidencyTicks::UNDEFINED 31821500 |
350system.cpu.l2cache.ReadExReq_misses::cpu.data 82 351system.cpu.l2cache.ReadExReq_misses::total 82 |
352system.cpu.l2cache.ReadCleanReq_misses::cpu.inst 228 353system.cpu.l2cache.ReadCleanReq_misses::total 228 354system.cpu.l2cache.ReadSharedReq_misses::cpu.data 62 355system.cpu.l2cache.ReadSharedReq_misses::total 62 356system.cpu.l2cache.demand_misses::cpu.inst 228 357system.cpu.l2cache.demand_misses::cpu.data 144 358system.cpu.l2cache.demand_misses::total 372 359system.cpu.l2cache.overall_misses::cpu.inst 228 360system.cpu.l2cache.overall_misses::cpu.data 144 361system.cpu.l2cache.overall_misses::total 372 |
362system.cpu.l2cache.ReadExReq_miss_latency::cpu.data 4961000 363system.cpu.l2cache.ReadExReq_miss_latency::total 4961000 |
364system.cpu.l2cache.ReadCleanReq_miss_latency::cpu.inst 13794500 365system.cpu.l2cache.ReadCleanReq_miss_latency::total 13794500 366system.cpu.l2cache.ReadSharedReq_miss_latency::cpu.data 3751000 367system.cpu.l2cache.ReadSharedReq_miss_latency::total 3751000 368system.cpu.l2cache.demand_miss_latency::cpu.inst 13794500 369system.cpu.l2cache.demand_miss_latency::cpu.data 8712000 370system.cpu.l2cache.demand_miss_latency::total 22506500 371system.cpu.l2cache.overall_miss_latency::cpu.inst 13794500 372system.cpu.l2cache.overall_miss_latency::cpu.data 8712000 373system.cpu.l2cache.overall_miss_latency::total 22506500 |
374system.cpu.l2cache.ReadExReq_accesses::cpu.data 82 375system.cpu.l2cache.ReadExReq_accesses::total 82 |
376system.cpu.l2cache.ReadCleanReq_accesses::cpu.inst 228 377system.cpu.l2cache.ReadCleanReq_accesses::total 228 378system.cpu.l2cache.ReadSharedReq_accesses::cpu.data 62 379system.cpu.l2cache.ReadSharedReq_accesses::total 62 380system.cpu.l2cache.demand_accesses::cpu.inst 228 381system.cpu.l2cache.demand_accesses::cpu.data 144 382system.cpu.l2cache.demand_accesses::total 372 383system.cpu.l2cache.overall_accesses::cpu.inst 228 384system.cpu.l2cache.overall_accesses::cpu.data 144 385system.cpu.l2cache.overall_accesses::total 372 |
386system.cpu.l2cache.ReadExReq_miss_rate::cpu.data 1 387system.cpu.l2cache.ReadExReq_miss_rate::total 1 388system.cpu.l2cache.ReadCleanReq_miss_rate::cpu.inst 1 389system.cpu.l2cache.ReadCleanReq_miss_rate::total 1 390system.cpu.l2cache.ReadSharedReq_miss_rate::cpu.data 1 391system.cpu.l2cache.ReadSharedReq_miss_rate::total 1 392system.cpu.l2cache.demand_miss_rate::cpu.inst 1 393system.cpu.l2cache.demand_miss_rate::cpu.data 1 394system.cpu.l2cache.demand_miss_rate::total 1 395system.cpu.l2cache.overall_miss_rate::cpu.inst 1 396system.cpu.l2cache.overall_miss_rate::cpu.data 1 397system.cpu.l2cache.overall_miss_rate::total 1 398system.cpu.l2cache.ReadExReq_avg_miss_latency::cpu.data 60500 399system.cpu.l2cache.ReadExReq_avg_miss_latency::total 60500 |
400system.cpu.l2cache.ReadCleanReq_avg_miss_latency::cpu.inst 60502.192982 401system.cpu.l2cache.ReadCleanReq_avg_miss_latency::total 60502.192982 |
402system.cpu.l2cache.ReadSharedReq_avg_miss_latency::cpu.data 60500 403system.cpu.l2cache.ReadSharedReq_avg_miss_latency::total 60500 |
404system.cpu.l2cache.demand_avg_miss_latency::cpu.inst 60502.192982 |
405system.cpu.l2cache.demand_avg_miss_latency::cpu.data 60500 |
406system.cpu.l2cache.demand_avg_miss_latency::total 60501.344086 407system.cpu.l2cache.overall_avg_miss_latency::cpu.inst 60502.192982 |
408system.cpu.l2cache.overall_avg_miss_latency::cpu.data 60500 |
409system.cpu.l2cache.overall_avg_miss_latency::total 60501.344086 |
410system.cpu.l2cache.blocked_cycles::no_mshrs 0 411system.cpu.l2cache.blocked_cycles::no_targets 0 412system.cpu.l2cache.blocked::no_mshrs 0 413system.cpu.l2cache.blocked::no_targets 0 414system.cpu.l2cache.avg_blocked_cycles::no_mshrs nan 415system.cpu.l2cache.avg_blocked_cycles::no_targets nan 416system.cpu.l2cache.ReadExReq_mshr_misses::cpu.data 82 417system.cpu.l2cache.ReadExReq_mshr_misses::total 82 |
418system.cpu.l2cache.ReadCleanReq_mshr_misses::cpu.inst 228 419system.cpu.l2cache.ReadCleanReq_mshr_misses::total 228 420system.cpu.l2cache.ReadSharedReq_mshr_misses::cpu.data 62 421system.cpu.l2cache.ReadSharedReq_mshr_misses::total 62 422system.cpu.l2cache.demand_mshr_misses::cpu.inst 228 423system.cpu.l2cache.demand_mshr_misses::cpu.data 144 424system.cpu.l2cache.demand_mshr_misses::total 372 425system.cpu.l2cache.overall_mshr_misses::cpu.inst 228 426system.cpu.l2cache.overall_mshr_misses::cpu.data 144 427system.cpu.l2cache.overall_mshr_misses::total 372 |
428system.cpu.l2cache.ReadExReq_mshr_miss_latency::cpu.data 4141000 429system.cpu.l2cache.ReadExReq_mshr_miss_latency::total 4141000 |
430system.cpu.l2cache.ReadCleanReq_mshr_miss_latency::cpu.inst 11514500 431system.cpu.l2cache.ReadCleanReq_mshr_miss_latency::total 11514500 432system.cpu.l2cache.ReadSharedReq_mshr_miss_latency::cpu.data 3131000 433system.cpu.l2cache.ReadSharedReq_mshr_miss_latency::total 3131000 434system.cpu.l2cache.demand_mshr_miss_latency::cpu.inst 11514500 435system.cpu.l2cache.demand_mshr_miss_latency::cpu.data 7272000 436system.cpu.l2cache.demand_mshr_miss_latency::total 18786500 437system.cpu.l2cache.overall_mshr_miss_latency::cpu.inst 11514500 438system.cpu.l2cache.overall_mshr_miss_latency::cpu.data 7272000 439system.cpu.l2cache.overall_mshr_miss_latency::total 18786500 |
440system.cpu.l2cache.ReadExReq_mshr_miss_rate::cpu.data 1 441system.cpu.l2cache.ReadExReq_mshr_miss_rate::total 1 442system.cpu.l2cache.ReadCleanReq_mshr_miss_rate::cpu.inst 1 443system.cpu.l2cache.ReadCleanReq_mshr_miss_rate::total 1 444system.cpu.l2cache.ReadSharedReq_mshr_miss_rate::cpu.data 1 445system.cpu.l2cache.ReadSharedReq_mshr_miss_rate::total 1 446system.cpu.l2cache.demand_mshr_miss_rate::cpu.inst 1 447system.cpu.l2cache.demand_mshr_miss_rate::cpu.data 1 448system.cpu.l2cache.demand_mshr_miss_rate::total 1 449system.cpu.l2cache.overall_mshr_miss_rate::cpu.inst 1 450system.cpu.l2cache.overall_mshr_miss_rate::cpu.data 1 451system.cpu.l2cache.overall_mshr_miss_rate::total 1 452system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::cpu.data 50500 453system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::total 50500 |
454system.cpu.l2cache.ReadCleanReq_avg_mshr_miss_latency::cpu.inst 50502.192982 455system.cpu.l2cache.ReadCleanReq_avg_mshr_miss_latency::total 50502.192982 |
456system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::cpu.data 50500 457system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::total 50500 |
458system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.inst 50502.192982 |
459system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.data 50500 |
460system.cpu.l2cache.demand_avg_mshr_miss_latency::total 50501.344086 461system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 50502.192982 |
462system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 50500 |
463system.cpu.l2cache.overall_avg_mshr_miss_latency::total 50501.344086 464system.cpu.toL2Bus.snoop_filter.tot_requests 372 |
465system.cpu.toL2Bus.snoop_filter.hit_single_requests 0 466system.cpu.toL2Bus.snoop_filter.hit_multi_requests 0 467system.cpu.toL2Bus.snoop_filter.tot_snoops 0 468system.cpu.toL2Bus.snoop_filter.hit_single_snoops 0 469system.cpu.toL2Bus.snoop_filter.hit_multi_snoops 0 |
470system.cpu.toL2Bus.pwrStateResidencyTicks::UNDEFINED 31821500 471system.cpu.toL2Bus.trans_dist::ReadResp 290 |
472system.cpu.toL2Bus.trans_dist::ReadExReq 82 473system.cpu.toL2Bus.trans_dist::ReadExResp 82 |
474system.cpu.toL2Bus.trans_dist::ReadCleanReq 228 475system.cpu.toL2Bus.trans_dist::ReadSharedReq 62 476system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 456 477system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 288 478system.cpu.toL2Bus.pkt_count::total 744 479system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 14592 480system.cpu.toL2Bus.pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 9216 481system.cpu.toL2Bus.pkt_size::total 23808 |
482system.cpu.toL2Bus.snoops 0 483system.cpu.toL2Bus.snoopTraffic 0 |
484system.cpu.toL2Bus.snoop_fanout::samples 372 |
485system.cpu.toL2Bus.snoop_fanout::mean 0 486system.cpu.toL2Bus.snoop_fanout::stdev 0 487system.cpu.toL2Bus.snoop_fanout::underflows 0 0.00% 0.00% |
488system.cpu.toL2Bus.snoop_fanout::0 372 100.00% 100.00% |
489system.cpu.toL2Bus.snoop_fanout::1 0 0.00% 100.00% 490system.cpu.toL2Bus.snoop_fanout::2 0 0.00% 100.00% 491system.cpu.toL2Bus.snoop_fanout::overflows 0 0.00% 100.00% 492system.cpu.toL2Bus.snoop_fanout::min_value 0 493system.cpu.toL2Bus.snoop_fanout::max_value 0 |
494system.cpu.toL2Bus.snoop_fanout::total 372 495system.cpu.toL2Bus.reqLayer0.occupancy 186000 |
496system.cpu.toL2Bus.reqLayer0.utilization 0.6 |
497system.cpu.toL2Bus.respLayer0.occupancy 342000 498system.cpu.toL2Bus.respLayer0.utilization 1.1 499system.cpu.toL2Bus.respLayer1.occupancy 216000 500system.cpu.toL2Bus.respLayer1.utilization 0.7 501system.membus.snoop_filter.tot_requests 372 |
502system.membus.snoop_filter.hit_single_requests 0 503system.membus.snoop_filter.hit_multi_requests 0 504system.membus.snoop_filter.tot_snoops 0 505system.membus.snoop_filter.hit_single_snoops 0 506system.membus.snoop_filter.hit_multi_snoops 0 |
507system.membus.pwrStateResidencyTicks::UNDEFINED 31821500 508system.membus.trans_dist::ReadResp 290 |
509system.membus.trans_dist::ReadExReq 82 510system.membus.trans_dist::ReadExResp 82 |
511system.membus.trans_dist::ReadSharedReq 290 512system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 744 513system.membus.pkt_count::total 744 514system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 23808 515system.membus.pkt_size::total 23808 |
516system.membus.snoops 0 517system.membus.snoopTraffic 0 |
518system.membus.snoop_fanout::samples 372 |
519system.membus.snoop_fanout::mean 0 520system.membus.snoop_fanout::stdev 0 521system.membus.snoop_fanout::underflows 0 0.00% 0.00% |
522system.membus.snoop_fanout::0 372 100.00% 100.00% |
523system.membus.snoop_fanout::1 0 0.00% 100.00% 524system.membus.snoop_fanout::overflows 0 0.00% 100.00% 525system.membus.snoop_fanout::min_value 0 526system.membus.snoop_fanout::max_value 0 |
527system.membus.snoop_fanout::total 372 528system.membus.reqLayer0.occupancy 372500 |
529system.membus.reqLayer0.utilization 1.2 |
530system.membus.respLayer1.occupancy 1860000 531system.membus.respLayer1.utilization 5.8 |
532 533---------- End Simulation Statistics ---------- |