simout (11731:c473ca7cc650) simout (12062:d6ee16239a26)
1Redirecting stdout to build/RISCV/tests/opt/quick/se/00.hello/riscv/linux/minor-timing/simout
2Redirecting stderr to build/RISCV/tests/opt/quick/se/00.hello/riscv/linux/minor-timing/simerr
1Redirecting stdout to build/RISCV/tests/debug/quick/se/00.hello/riscv/linux/minor-timing/simout
2Redirecting stderr to build/RISCV/tests/debug/quick/se/00.hello/riscv/linux/minor-timing/simerr
3gem5 Simulator System. http://gem5.org
4gem5 is copyrighted software; use the --copyright option for details.
5
3gem5 Simulator System. http://gem5.org
4gem5 is copyrighted software; use the --copyright option for details.
5
6gem5 compiled Nov 30 2016 14:33:35
7gem5 started Nov 30 2016 16:18:28
8gem5 executing on zizzer, pid 34056
9command line: /z/powerjg/gem5-upstream/build/RISCV/gem5.opt -d build/RISCV/tests/opt/quick/se/00.hello/riscv/linux/minor-timing -re /z/powerjg/gem5-upstream/tests/testing/../run.py quick/se/00.hello/riscv/linux/minor-timing
6gem5 compiled May 31 2017 18:33:59
7gem5 started May 31 2017 18:34:12
8gem5 executing on boldrock, pid 15707
9command line: /home/ar4jc/gem5/build/RISCV/gem5.debug -d build/RISCV/tests/debug/quick/se/00.hello/riscv/linux/minor-timing --stats-file 'text://stats.txt?desc=False' -re /home/ar4jc/gem5/tests/testing/../run.py quick/se/00.hello/riscv/linux/minor-timing
10
11Global frequency set at 1000000000000 ticks per second
10
11Global frequency set at 1000000000000 ticks per second
12info: Entering event queue @ 0. Starting simulation...
13info: Increasing stack size by one page.
14Hello world!
12Hello world!
15Exiting @ tick 14435000 because target called exit()
13Exiting @ tick 41515000 because exiting with last active thread context