19d18
< physmem=system.physmem
29c28
< system_port=system.membus.port[0]
---
> system_port=system.membus.slave[0]
42a42
> fastmem=false
61,62c61,62
< dcache_port=system.membus.port[3]
< icache_port=system.membus.port[2]
---
> dcache_port=system.membus.slave[2]
> icache_port=system.membus.slave[1]
105c105,106
< port=system.system_port system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
---
> master=system.physmem.port[0]
> slave=system.system_port system.cpu.icache_port system.cpu.dcache_port
108c109,110
< type=PhysicalMemory
---
> type=SimpleMemory
> conf_table_reported=false
109a112
> in_addr_map=true
115c118
< port=system.membus.port[1]
---
> port=system.membus.master[0]