stats.txt (9797:9cd5f91e7a79) stats.txt (9838:43d22d746e7a)
1
2---------- Begin Simulation Statistics ----------
3sim_seconds 0.000018 # Number of seconds simulated
4sim_ticks 18469500 # Number of ticks simulated
5final_tick 18469500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
6sim_freq 1000000000000 # Frequency of simulated ticks
1
2---------- Begin Simulation Statistics ----------
3sim_seconds 0.000018 # Number of seconds simulated
4sim_ticks 18469500 # Number of ticks simulated
5final_tick 18469500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
6sim_freq 1000000000000 # Frequency of simulated ticks
7host_inst_rate 54927 # Simulator instruction rate (inst/s)
8host_op_rate 54916 # Simulator op (including micro ops) rate (op/s)
9host_tick_rate 175080000 # Simulator tick rate (ticks/s)
10host_mem_usage 224296 # Number of bytes of host memory used
11host_seconds 0.11 # Real time elapsed on the host
7host_inst_rate 100626 # Simulator instruction rate (inst/s)
8host_op_rate 100602 # Simulator op (including micro ops) rate (op/s)
9host_tick_rate 320728752 # Simulator tick rate (ticks/s)
10host_mem_usage 223260 # Number of bytes of host memory used
11host_seconds 0.06 # Real time elapsed on the host
12sim_insts 5792 # Number of instructions simulated
13sim_ops 5792 # Number of ops (including micro ops) simulated
14system.physmem.bytes_read::cpu.inst 22080 # Number of bytes read from this memory
15system.physmem.bytes_read::cpu.data 6464 # Number of bytes read from this memory
16system.physmem.bytes_read::total 28544 # Number of bytes read from this memory
17system.physmem.bytes_inst_read::cpu.inst 22080 # Number of instructions bytes read from this memory
18system.physmem.bytes_inst_read::total 22080 # Number of instructions bytes read from this memory
19system.physmem.num_reads::cpu.inst 345 # Number of read requests responded to by this memory
20system.physmem.num_reads::cpu.data 101 # Number of read requests responded to by this memory
21system.physmem.num_reads::total 446 # Number of read requests responded to by this memory
22system.physmem.bw_read::cpu.inst 1195484447 # Total read bandwidth from this memory (bytes/s)
23system.physmem.bw_read::cpu.data 349982403 # Total read bandwidth from this memory (bytes/s)
24system.physmem.bw_read::total 1545466851 # Total read bandwidth from this memory (bytes/s)
25system.physmem.bw_inst_read::cpu.inst 1195484447 # Instruction read bandwidth from this memory (bytes/s)
26system.physmem.bw_inst_read::total 1195484447 # Instruction read bandwidth from this memory (bytes/s)
27system.physmem.bw_total::cpu.inst 1195484447 # Total bandwidth to/from this memory (bytes/s)
28system.physmem.bw_total::cpu.data 349982403 # Total bandwidth to/from this memory (bytes/s)
29system.physmem.bw_total::total 1545466851 # Total bandwidth to/from this memory (bytes/s)
12sim_insts 5792 # Number of instructions simulated
13sim_ops 5792 # Number of ops (including micro ops) simulated
14system.physmem.bytes_read::cpu.inst 22080 # Number of bytes read from this memory
15system.physmem.bytes_read::cpu.data 6464 # Number of bytes read from this memory
16system.physmem.bytes_read::total 28544 # Number of bytes read from this memory
17system.physmem.bytes_inst_read::cpu.inst 22080 # Number of instructions bytes read from this memory
18system.physmem.bytes_inst_read::total 22080 # Number of instructions bytes read from this memory
19system.physmem.num_reads::cpu.inst 345 # Number of read requests responded to by this memory
20system.physmem.num_reads::cpu.data 101 # Number of read requests responded to by this memory
21system.physmem.num_reads::total 446 # Number of read requests responded to by this memory
22system.physmem.bw_read::cpu.inst 1195484447 # Total read bandwidth from this memory (bytes/s)
23system.physmem.bw_read::cpu.data 349982403 # Total read bandwidth from this memory (bytes/s)
24system.physmem.bw_read::total 1545466851 # Total read bandwidth from this memory (bytes/s)
25system.physmem.bw_inst_read::cpu.inst 1195484447 # Instruction read bandwidth from this memory (bytes/s)
26system.physmem.bw_inst_read::total 1195484447 # Instruction read bandwidth from this memory (bytes/s)
27system.physmem.bw_total::cpu.inst 1195484447 # Total bandwidth to/from this memory (bytes/s)
28system.physmem.bw_total::cpu.data 349982403 # Total bandwidth to/from this memory (bytes/s)
29system.physmem.bw_total::total 1545466851 # Total bandwidth to/from this memory (bytes/s)
30system.physmem.readReqs 446 # Total number of read requests seen
31system.physmem.writeReqs 0 # Total number of write requests seen
32system.physmem.cpureqs 446 # Reqs generatd by CPU via cache - shady
30system.physmem.readReqs 446 # Total number of read requests accepted by DRAM controller
31system.physmem.writeReqs 0 # Total number of write requests accepted by DRAM controller
32system.physmem.readBursts 446 # Total number of DRAM read bursts. Each DRAM read request translates to either one or multiple DRAM read bursts
33system.physmem.writeBursts 0 # Total number of DRAM write bursts. Each DRAM write request translates to either one or multiple DRAM write bursts
33system.physmem.bytesRead 28544 # Total number of bytes read from memory
34system.physmem.bytesWritten 0 # Total number of bytes written to memory
35system.physmem.bytesConsumedRd 28544 # bytesRead derated as per pkt->getSize()
36system.physmem.bytesConsumedWr 0 # bytesWritten derated as per pkt->getSize()
34system.physmem.bytesRead 28544 # Total number of bytes read from memory
35system.physmem.bytesWritten 0 # Total number of bytes written to memory
36system.physmem.bytesConsumedRd 28544 # bytesRead derated as per pkt->getSize()
37system.physmem.bytesConsumedWr 0 # bytesWritten derated as per pkt->getSize()
37system.physmem.servicedByWrQ 0 # Number of read reqs serviced by write Q
38system.physmem.servicedByWrQ 0 # Number of DRAM read bursts serviced by write Q
38system.physmem.neitherReadNorWrite 0 # Reqs where no action is needed
39system.physmem.perBankRdReqs::0 70 # Track reads on a per bank basis
40system.physmem.perBankRdReqs::1 42 # Track reads on a per bank basis
41system.physmem.perBankRdReqs::2 54 # Track reads on a per bank basis
42system.physmem.perBankRdReqs::3 59 # Track reads on a per bank basis
43system.physmem.perBankRdReqs::4 53 # Track reads on a per bank basis
44system.physmem.perBankRdReqs::5 61 # Track reads on a per bank basis
45system.physmem.perBankRdReqs::6 52 # Track reads on a per bank basis

--- 144 unchanged lines hidden (view full) ---

190system.physmem.readRowHitRate 85.20 # Row buffer hit rate for reads
191system.physmem.writeRowHitRate nan # Row buffer hit rate for writes
192system.physmem.avgGap 41123.32 # Average gap between requests
193system.membus.throughput 1545466851 # Throughput (bytes/s)
194system.membus.trans_dist::ReadReq 399 # Transaction distribution
195system.membus.trans_dist::ReadResp 399 # Transaction distribution
196system.membus.trans_dist::ReadExReq 47 # Transaction distribution
197system.membus.trans_dist::ReadExResp 47 # Transaction distribution
39system.physmem.neitherReadNorWrite 0 # Reqs where no action is needed
40system.physmem.perBankRdReqs::0 70 # Track reads on a per bank basis
41system.physmem.perBankRdReqs::1 42 # Track reads on a per bank basis
42system.physmem.perBankRdReqs::2 54 # Track reads on a per bank basis
43system.physmem.perBankRdReqs::3 59 # Track reads on a per bank basis
44system.physmem.perBankRdReqs::4 53 # Track reads on a per bank basis
45system.physmem.perBankRdReqs::5 61 # Track reads on a per bank basis
46system.physmem.perBankRdReqs::6 52 # Track reads on a per bank basis

--- 144 unchanged lines hidden (view full) ---

191system.physmem.readRowHitRate 85.20 # Row buffer hit rate for reads
192system.physmem.writeRowHitRate nan # Row buffer hit rate for writes
193system.physmem.avgGap 41123.32 # Average gap between requests
194system.membus.throughput 1545466851 # Throughput (bytes/s)
195system.membus.trans_dist::ReadReq 399 # Transaction distribution
196system.membus.trans_dist::ReadResp 399 # Transaction distribution
197system.membus.trans_dist::ReadExReq 47 # Transaction distribution
198system.membus.trans_dist::ReadExResp 47 # Transaction distribution
198system.membus.pkt_count_system.cpu.l2cache.mem_side 892 # Packet count per connected master and slave (bytes)
199system.membus.pkt_count 892 # Packet count per connected master and slave (bytes)
200system.membus.tot_pkt_size_system.cpu.l2cache.mem_side 28544 # Cumulative packet size per connected master and slave (bytes)
201system.membus.tot_pkt_size 28544 # Cumulative packet size per connected master and slave (bytes)
199system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 892 # Packet count per connected master and slave (bytes)
200system.membus.pkt_count::total 892 # Packet count per connected master and slave (bytes)
201system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 28544 # Cumulative packet size per connected master and slave (bytes)
202system.membus.tot_pkt_size::total 28544 # Cumulative packet size per connected master and slave (bytes)
202system.membus.data_through_bus 28544 # Total data (bytes)
203system.membus.snoop_data_through_bus 0 # Total snoop data (bytes)
204system.membus.reqLayer0.occupancy 565000 # Layer occupancy (ticks)
205system.membus.reqLayer0.utilization 3.1 # Layer utilization (%)
206system.membus.respLayer1.occupancy 4183750 # Layer occupancy (ticks)
207system.membus.respLayer1.utilization 22.7 # Layer utilization (%)
208system.cpu.branchPred.lookups 2238 # Number of BP lookups
209system.cpu.branchPred.condPredicted 1804 # Number of conditional branches predicted

--- 278 unchanged lines hidden (view full) ---

488system.cpu.int_regfile_writes 7049 # number of integer regfile writes
489system.cpu.fp_regfile_reads 25 # number of floating regfile reads
490system.cpu.fp_regfile_writes 2 # number of floating regfile writes
491system.cpu.toL2Bus.throughput 1569723057 # Throughput (bytes/s)
492system.cpu.toL2Bus.trans_dist::ReadReq 406 # Transaction distribution
493system.cpu.toL2Bus.trans_dist::ReadResp 406 # Transaction distribution
494system.cpu.toL2Bus.trans_dist::ReadExReq 47 # Transaction distribution
495system.cpu.toL2Bus.trans_dist::ReadExResp 47 # Transaction distribution
203system.membus.data_through_bus 28544 # Total data (bytes)
204system.membus.snoop_data_through_bus 0 # Total snoop data (bytes)
205system.membus.reqLayer0.occupancy 565000 # Layer occupancy (ticks)
206system.membus.reqLayer0.utilization 3.1 # Layer utilization (%)
207system.membus.respLayer1.occupancy 4183750 # Layer occupancy (ticks)
208system.membus.respLayer1.utilization 22.7 # Layer utilization (%)
209system.cpu.branchPred.lookups 2238 # Number of BP lookups
210system.cpu.branchPred.condPredicted 1804 # Number of conditional branches predicted

--- 278 unchanged lines hidden (view full) ---

489system.cpu.int_regfile_writes 7049 # number of integer regfile writes
490system.cpu.fp_regfile_reads 25 # number of floating regfile reads
491system.cpu.fp_regfile_writes 2 # number of floating regfile writes
492system.cpu.toL2Bus.throughput 1569723057 # Throughput (bytes/s)
493system.cpu.toL2Bus.trans_dist::ReadReq 406 # Transaction distribution
494system.cpu.toL2Bus.trans_dist::ReadResp 406 # Transaction distribution
495system.cpu.toL2Bus.trans_dist::ReadExReq 47 # Transaction distribution
496system.cpu.toL2Bus.trans_dist::ReadExResp 47 # Transaction distribution
496system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side 702 # Packet count per connected master and slave (bytes)
497system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side 204 # Packet count per connected master and slave (bytes)
498system.cpu.toL2Bus.pkt_count 906 # Packet count per connected master and slave (bytes)
499system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side 22464 # Cumulative packet size per connected master and slave (bytes)
500system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side 6528 # Cumulative packet size per connected master and slave (bytes)
501system.cpu.toL2Bus.tot_pkt_size 28992 # Cumulative packet size per connected master and slave (bytes)
497system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 702 # Packet count per connected master and slave (bytes)
498system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 204 # Packet count per connected master and slave (bytes)
499system.cpu.toL2Bus.pkt_count::total 906 # Packet count per connected master and slave (bytes)
500system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 22464 # Cumulative packet size per connected master and slave (bytes)
501system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 6528 # Cumulative packet size per connected master and slave (bytes)
502system.cpu.toL2Bus.tot_pkt_size::total 28992 # Cumulative packet size per connected master and slave (bytes)
502system.cpu.toL2Bus.data_through_bus 28992 # Total data (bytes)
503system.cpu.toL2Bus.snoop_data_through_bus 0 # Total snoop data (bytes)
504system.cpu.toL2Bus.reqLayer0.occupancy 226500 # Layer occupancy (ticks)
505system.cpu.toL2Bus.reqLayer0.utilization 1.2 # Layer utilization (%)
506system.cpu.toL2Bus.respLayer0.occupancy 590750 # Layer occupancy (ticks)
507system.cpu.toL2Bus.respLayer0.utilization 3.2 # Layer utilization (%)
508system.cpu.toL2Bus.respLayer1.occupancy 163000 # Layer occupancy (ticks)
509system.cpu.toL2Bus.respLayer1.utilization 0.9 # Layer utilization (%)
503system.cpu.toL2Bus.data_through_bus 28992 # Total data (bytes)
504system.cpu.toL2Bus.snoop_data_through_bus 0 # Total snoop data (bytes)
505system.cpu.toL2Bus.reqLayer0.occupancy 226500 # Layer occupancy (ticks)
506system.cpu.toL2Bus.reqLayer0.utilization 1.2 # Layer utilization (%)
507system.cpu.toL2Bus.respLayer0.occupancy 590750 # Layer occupancy (ticks)
508system.cpu.toL2Bus.respLayer0.utilization 3.2 # Layer utilization (%)
509system.cpu.toL2Bus.respLayer1.occupancy 163000 # Layer occupancy (ticks)
510system.cpu.toL2Bus.respLayer1.utilization 0.9 # Layer utilization (%)
510system.cpu.icache.tags.replacements 0 # number of replacements
511system.cpu.icache.tags.tagsinuse 167.253035 # Cycle average of tags in use
512system.cpu.icache.tags.total_refs 1372 # Total number of references to valid blocks.
513system.cpu.icache.tags.sampled_refs 351 # Sample count of references to valid blocks.
514system.cpu.icache.tags.avg_refs 3.908832 # Average number of references to valid blocks.
515system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
516system.cpu.icache.tags.occ_blocks::cpu.inst 167.253035 # Average occupied blocks per requestor
517system.cpu.icache.tags.occ_percent::cpu.inst 0.081667 # Average percentage of cache occupancy
518system.cpu.icache.tags.occ_percent::total 0.081667 # Average percentage of cache occupancy
511system.cpu.icache.tags.replacements 0 # number of replacements
512system.cpu.icache.tags.tagsinuse 167.253035 # Cycle average of tags in use
513system.cpu.icache.tags.total_refs 1372 # Total number of references to valid blocks.
514system.cpu.icache.tags.sampled_refs 351 # Sample count of references to valid blocks.
515system.cpu.icache.tags.avg_refs 3.908832 # Average number of references to valid blocks.
516system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
517system.cpu.icache.tags.occ_blocks::cpu.inst 167.253035 # Average occupied blocks per requestor
518system.cpu.icache.tags.occ_percent::cpu.inst 0.081667 # Average percentage of cache occupancy
519system.cpu.icache.tags.occ_percent::total 0.081667 # Average percentage of cache occupancy
519system.cpu.icache.ReadReq_hits::cpu.inst 1372 # number of ReadReq hits
520system.cpu.icache.ReadReq_hits::total 1372 # number of ReadReq hits
521system.cpu.icache.demand_hits::cpu.inst 1372 # number of demand (read+write) hits
522system.cpu.icache.demand_hits::total 1372 # number of demand (read+write) hits
523system.cpu.icache.overall_hits::cpu.inst 1372 # number of overall hits
524system.cpu.icache.overall_hits::total 1372 # number of overall hits
525system.cpu.icache.ReadReq_misses::cpu.inst 442 # number of ReadReq misses
526system.cpu.icache.ReadReq_misses::total 442 # number of ReadReq misses

--- 59 unchanged lines hidden (view full) ---

586system.cpu.icache.overall_mshr_miss_rate::total 0.193495 # mshr miss rate for overall accesses
587system.cpu.icache.ReadReq_avg_mshr_miss_latency::cpu.inst 66831.196581 # average ReadReq mshr miss latency
588system.cpu.icache.ReadReq_avg_mshr_miss_latency::total 66831.196581 # average ReadReq mshr miss latency
589system.cpu.icache.demand_avg_mshr_miss_latency::cpu.inst 66831.196581 # average overall mshr miss latency
590system.cpu.icache.demand_avg_mshr_miss_latency::total 66831.196581 # average overall mshr miss latency
591system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 66831.196581 # average overall mshr miss latency
592system.cpu.icache.overall_avg_mshr_miss_latency::total 66831.196581 # average overall mshr miss latency
593system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate
520system.cpu.icache.ReadReq_hits::cpu.inst 1372 # number of ReadReq hits
521system.cpu.icache.ReadReq_hits::total 1372 # number of ReadReq hits
522system.cpu.icache.demand_hits::cpu.inst 1372 # number of demand (read+write) hits
523system.cpu.icache.demand_hits::total 1372 # number of demand (read+write) hits
524system.cpu.icache.overall_hits::cpu.inst 1372 # number of overall hits
525system.cpu.icache.overall_hits::total 1372 # number of overall hits
526system.cpu.icache.ReadReq_misses::cpu.inst 442 # number of ReadReq misses
527system.cpu.icache.ReadReq_misses::total 442 # number of ReadReq misses

--- 59 unchanged lines hidden (view full) ---

587system.cpu.icache.overall_mshr_miss_rate::total 0.193495 # mshr miss rate for overall accesses
588system.cpu.icache.ReadReq_avg_mshr_miss_latency::cpu.inst 66831.196581 # average ReadReq mshr miss latency
589system.cpu.icache.ReadReq_avg_mshr_miss_latency::total 66831.196581 # average ReadReq mshr miss latency
590system.cpu.icache.demand_avg_mshr_miss_latency::cpu.inst 66831.196581 # average overall mshr miss latency
591system.cpu.icache.demand_avg_mshr_miss_latency::total 66831.196581 # average overall mshr miss latency
592system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 66831.196581 # average overall mshr miss latency
593system.cpu.icache.overall_avg_mshr_miss_latency::total 66831.196581 # average overall mshr miss latency
594system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate
594system.cpu.l2cache.tags.replacements 0 # number of replacements
595system.cpu.l2cache.tags.tagsinuse 197.401673 # Cycle average of tags in use
596system.cpu.l2cache.tags.total_refs 7 # Total number of references to valid blocks.
597system.cpu.l2cache.tags.sampled_refs 399 # Sample count of references to valid blocks.
598system.cpu.l2cache.tags.avg_refs 0.017544 # Average number of references to valid blocks.
599system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
600system.cpu.l2cache.tags.occ_blocks::cpu.inst 166.141608 # Average occupied blocks per requestor
601system.cpu.l2cache.tags.occ_blocks::cpu.data 31.260065 # Average occupied blocks per requestor
595system.cpu.l2cache.tags.replacements 0 # number of replacements
596system.cpu.l2cache.tags.tagsinuse 197.401673 # Cycle average of tags in use
597system.cpu.l2cache.tags.total_refs 7 # Total number of references to valid blocks.
598system.cpu.l2cache.tags.sampled_refs 399 # Sample count of references to valid blocks.
599system.cpu.l2cache.tags.avg_refs 0.017544 # Average number of references to valid blocks.
600system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
601system.cpu.l2cache.tags.occ_blocks::cpu.inst 166.141608 # Average occupied blocks per requestor
602system.cpu.l2cache.tags.occ_blocks::cpu.data 31.260065 # Average occupied blocks per requestor
602system.cpu.l2cache.tags.occ_percent::cpu.inst 0.005070 # Average percentage of cache occupancy
603system.cpu.l2cache.tags.occ_percent::cpu.data 0.000954 # Average percentage of cache occupancy
603system.cpu.l2cache.tags.occ_percent::cpu.inst 0.005070 # Average percentage of cache occupancy
604system.cpu.l2cache.tags.occ_percent::cpu.data 0.000954 # Average percentage of cache occupancy
604system.cpu.l2cache.tags.occ_percent::total 0.006024 # Average percentage of cache occupancy
605system.cpu.l2cache.tags.occ_percent::total 0.006024 # Average percentage of cache occupancy
605system.cpu.l2cache.ReadReq_hits::cpu.inst 6 # number of ReadReq hits
606system.cpu.l2cache.ReadReq_hits::cpu.data 1 # number of ReadReq hits
607system.cpu.l2cache.ReadReq_hits::total 7 # number of ReadReq hits
608system.cpu.l2cache.demand_hits::cpu.inst 6 # number of demand (read+write) hits
609system.cpu.l2cache.demand_hits::cpu.data 1 # number of demand (read+write) hits
610system.cpu.l2cache.demand_hits::total 7 # number of demand (read+write) hits
611system.cpu.l2cache.overall_hits::cpu.inst 6 # number of overall hits
612system.cpu.l2cache.overall_hits::cpu.data 1 # number of overall hits

--- 101 unchanged lines hidden (view full) ---

714system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::total 65101.063830 # average ReadExReq mshr miss latency
715system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.inst 54186.231884 # average overall mshr miss latency
716system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.data 64608.910891 # average overall mshr miss latency
717system.cpu.l2cache.demand_avg_mshr_miss_latency::total 56546.524664 # average overall mshr miss latency
718system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 54186.231884 # average overall mshr miss latency
719system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 64608.910891 # average overall mshr miss latency
720system.cpu.l2cache.overall_avg_mshr_miss_latency::total 56546.524664 # average overall mshr miss latency
721system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate
606system.cpu.l2cache.ReadReq_hits::cpu.inst 6 # number of ReadReq hits
607system.cpu.l2cache.ReadReq_hits::cpu.data 1 # number of ReadReq hits
608system.cpu.l2cache.ReadReq_hits::total 7 # number of ReadReq hits
609system.cpu.l2cache.demand_hits::cpu.inst 6 # number of demand (read+write) hits
610system.cpu.l2cache.demand_hits::cpu.data 1 # number of demand (read+write) hits
611system.cpu.l2cache.demand_hits::total 7 # number of demand (read+write) hits
612system.cpu.l2cache.overall_hits::cpu.inst 6 # number of overall hits
613system.cpu.l2cache.overall_hits::cpu.data 1 # number of overall hits

--- 101 unchanged lines hidden (view full) ---

715system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::total 65101.063830 # average ReadExReq mshr miss latency
716system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.inst 54186.231884 # average overall mshr miss latency
717system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.data 64608.910891 # average overall mshr miss latency
718system.cpu.l2cache.demand_avg_mshr_miss_latency::total 56546.524664 # average overall mshr miss latency
719system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 54186.231884 # average overall mshr miss latency
720system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 64608.910891 # average overall mshr miss latency
721system.cpu.l2cache.overall_avg_mshr_miss_latency::total 56546.524664 # average overall mshr miss latency
722system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate
722system.cpu.dcache.tags.replacements 0 # number of replacements
723system.cpu.dcache.tags.tagsinuse 63.117277 # Cycle average of tags in use
724system.cpu.dcache.tags.total_refs 2192 # Total number of references to valid blocks.
725system.cpu.dcache.tags.sampled_refs 102 # Sample count of references to valid blocks.
726system.cpu.dcache.tags.avg_refs 21.490196 # Average number of references to valid blocks.
727system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
728system.cpu.dcache.tags.occ_blocks::cpu.data 63.117277 # Average occupied blocks per requestor
729system.cpu.dcache.tags.occ_percent::cpu.data 0.015409 # Average percentage of cache occupancy
730system.cpu.dcache.tags.occ_percent::total 0.015409 # Average percentage of cache occupancy
723system.cpu.dcache.tags.replacements 0 # number of replacements
724system.cpu.dcache.tags.tagsinuse 63.117277 # Cycle average of tags in use
725system.cpu.dcache.tags.total_refs 2192 # Total number of references to valid blocks.
726system.cpu.dcache.tags.sampled_refs 102 # Sample count of references to valid blocks.
727system.cpu.dcache.tags.avg_refs 21.490196 # Average number of references to valid blocks.
728system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
729system.cpu.dcache.tags.occ_blocks::cpu.data 63.117277 # Average occupied blocks per requestor
730system.cpu.dcache.tags.occ_percent::cpu.data 0.015409 # Average percentage of cache occupancy
731system.cpu.dcache.tags.occ_percent::total 0.015409 # Average percentage of cache occupancy
731system.cpu.dcache.ReadReq_hits::cpu.data 1473 # number of ReadReq hits
732system.cpu.dcache.ReadReq_hits::total 1473 # number of ReadReq hits
733system.cpu.dcache.WriteReq_hits::cpu.data 719 # number of WriteReq hits
734system.cpu.dcache.WriteReq_hits::total 719 # number of WriteReq hits
735system.cpu.dcache.demand_hits::cpu.data 2192 # number of demand (read+write) hits
736system.cpu.dcache.demand_hits::total 2192 # number of demand (read+write) hits
737system.cpu.dcache.overall_hits::cpu.data 2192 # number of overall hits
738system.cpu.dcache.overall_hits::total 2192 # number of overall hits

--- 91 unchanged lines hidden ---
732system.cpu.dcache.ReadReq_hits::cpu.data 1473 # number of ReadReq hits
733system.cpu.dcache.ReadReq_hits::total 1473 # number of ReadReq hits
734system.cpu.dcache.WriteReq_hits::cpu.data 719 # number of WriteReq hits
735system.cpu.dcache.WriteReq_hits::total 719 # number of WriteReq hits
736system.cpu.dcache.demand_hits::cpu.data 2192 # number of demand (read+write) hits
737system.cpu.dcache.demand_hits::total 2192 # number of demand (read+write) hits
738system.cpu.dcache.overall_hits::cpu.data 2192 # number of overall hits
739system.cpu.dcache.overall_hits::total 2192 # number of overall hits

--- 91 unchanged lines hidden ---