1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 0.000021 # Number of seconds simulated 4sim_ticks 21268000 # Number of ticks simulated 5final_tick 21268000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks |
7host_inst_rate 133148 # Simulator instruction rate (inst/s) 8host_op_rate 133114 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 488684971 # Simulator tick rate (ticks/s) 10host_mem_usage 249832 # Number of bytes of host memory used 11host_seconds 0.04 # Real time elapsed on the host |
12sim_insts 5792 # Number of instructions simulated 13sim_ops 5792 # Number of ops (including micro ops) simulated 14system.voltage_domain.voltage 1 # Voltage in Volts 15system.clk_domain.clock 1000 # Clock period in ticks 16system.physmem.pwrStateResidencyTicks::UNDEFINED 21268000 # Cumulative time (in ticks) in various power states 17system.physmem.bytes_read::cpu.inst 21952 # Number of bytes read from this memory 18system.physmem.bytes_read::cpu.data 6400 # Number of bytes read from this memory 19system.physmem.bytes_read::total 28352 # Number of bytes read from this memory --- 361 unchanged lines hidden (view full) --- 381system.cpu.iq.issued_per_cycle::6 212 1.71% 99.24% # Number of insts issued each cycle 382system.cpu.iq.issued_per_cycle::7 64 0.52% 99.76% # Number of insts issued each cycle 383system.cpu.iq.issued_per_cycle::8 30 0.24% 100.00% # Number of insts issued each cycle 384system.cpu.iq.issued_per_cycle::overflows 0 0.00% 100.00% # Number of insts issued each cycle 385system.cpu.iq.issued_per_cycle::min_value 0 # Number of insts issued each cycle 386system.cpu.iq.issued_per_cycle::max_value 8 # Number of insts issued each cycle 387system.cpu.iq.issued_per_cycle::total 12418 # Number of insts issued each cycle 388system.cpu.iq.fu_full::No_OpClass 0 0.00% 0.00% # attempts to use FU when none available |
389system.cpu.iq.fu_full::IntAlu 12 6.06% 6.06% # attempts to use FU when none available 390system.cpu.iq.fu_full::IntMult 0 0.00% 6.06% # attempts to use FU when none available 391system.cpu.iq.fu_full::IntDiv 0 0.00% 6.06% # attempts to use FU when none available 392system.cpu.iq.fu_full::FloatAdd 0 0.00% 6.06% # attempts to use FU when none available 393system.cpu.iq.fu_full::FloatCmp 0 0.00% 6.06% # attempts to use FU when none available 394system.cpu.iq.fu_full::FloatCvt 0 0.00% 6.06% # attempts to use FU when none available 395system.cpu.iq.fu_full::FloatMult 0 0.00% 6.06% # attempts to use FU when none available 396system.cpu.iq.fu_full::FloatMultAcc 0 0.00% 6.06% # attempts to use FU when none available 397system.cpu.iq.fu_full::FloatDiv 0 0.00% 6.06% # attempts to use FU when none available 398system.cpu.iq.fu_full::FloatMisc 0 0.00% 6.06% # attempts to use FU when none available 399system.cpu.iq.fu_full::FloatSqrt 0 0.00% 6.06% # attempts to use FU when none available 400system.cpu.iq.fu_full::SimdAdd 0 0.00% 6.06% # attempts to use FU when none available 401system.cpu.iq.fu_full::SimdAddAcc 0 0.00% 6.06% # attempts to use FU when none available 402system.cpu.iq.fu_full::SimdAlu 0 0.00% 6.06% # attempts to use FU when none available 403system.cpu.iq.fu_full::SimdCmp 0 0.00% 6.06% # attempts to use FU when none available 404system.cpu.iq.fu_full::SimdCvt 0 0.00% 6.06% # attempts to use FU when none available 405system.cpu.iq.fu_full::SimdMisc 0 0.00% 6.06% # attempts to use FU when none available 406system.cpu.iq.fu_full::SimdMult 0 0.00% 6.06% # attempts to use FU when none available 407system.cpu.iq.fu_full::SimdMultAcc 0 0.00% 6.06% # attempts to use FU when none available 408system.cpu.iq.fu_full::SimdShift 0 0.00% 6.06% # attempts to use FU when none available 409system.cpu.iq.fu_full::SimdShiftAcc 0 0.00% 6.06% # attempts to use FU when none available 410system.cpu.iq.fu_full::SimdSqrt 0 0.00% 6.06% # attempts to use FU when none available 411system.cpu.iq.fu_full::SimdFloatAdd 0 0.00% 6.06% # attempts to use FU when none available 412system.cpu.iq.fu_full::SimdFloatAlu 0 0.00% 6.06% # attempts to use FU when none available 413system.cpu.iq.fu_full::SimdFloatCmp 0 0.00% 6.06% # attempts to use FU when none available 414system.cpu.iq.fu_full::SimdFloatCvt 0 0.00% 6.06% # attempts to use FU when none available 415system.cpu.iq.fu_full::SimdFloatDiv 0 0.00% 6.06% # attempts to use FU when none available 416system.cpu.iq.fu_full::SimdFloatMisc 0 0.00% 6.06% # attempts to use FU when none available 417system.cpu.iq.fu_full::SimdFloatMult 0 0.00% 6.06% # attempts to use FU when none available 418system.cpu.iq.fu_full::SimdFloatMultAcc 0 0.00% 6.06% # attempts to use FU when none available 419system.cpu.iq.fu_full::SimdFloatSqrt 0 0.00% 6.06% # attempts to use FU when none available 420system.cpu.iq.fu_full::MemRead 88 44.44% 50.51% # attempts to use FU when none available 421system.cpu.iq.fu_full::MemWrite 87 43.94% 94.44% # attempts to use FU when none available 422system.cpu.iq.fu_full::FloatMemRead 0 0.00% 94.44% # attempts to use FU when none available 423system.cpu.iq.fu_full::FloatMemWrite 11 5.56% 100.00% # attempts to use FU when none available |
424system.cpu.iq.fu_full::IprAccess 0 0.00% 100.00% # attempts to use FU when none available 425system.cpu.iq.fu_full::InstPrefetch 0 0.00% 100.00% # attempts to use FU when none available 426system.cpu.iq.FU_type_0::No_OpClass 0 0.00% 0.00% # Type of FU issued 427system.cpu.iq.FU_type_0::IntAlu 5530 62.78% 62.78% # Type of FU issued 428system.cpu.iq.FU_type_0::IntMult 0 0.00% 62.78% # Type of FU issued 429system.cpu.iq.FU_type_0::IntDiv 0 0.00% 62.78% # Type of FU issued 430system.cpu.iq.FU_type_0::FloatAdd 2 0.02% 62.81% # Type of FU issued 431system.cpu.iq.FU_type_0::FloatCmp 0 0.00% 62.81% # Type of FU issued 432system.cpu.iq.FU_type_0::FloatCvt 0 0.00% 62.81% # Type of FU issued 433system.cpu.iq.FU_type_0::FloatMult 0 0.00% 62.81% # Type of FU issued |
434system.cpu.iq.FU_type_0::FloatMultAcc 0 0.00% 62.81% # Type of FU issued |
435system.cpu.iq.FU_type_0::FloatDiv 0 0.00% 62.81% # Type of FU issued |
436system.cpu.iq.FU_type_0::FloatMisc 0 0.00% 62.81% # Type of FU issued |
437system.cpu.iq.FU_type_0::FloatSqrt 0 0.00% 62.81% # Type of FU issued 438system.cpu.iq.FU_type_0::SimdAdd 0 0.00% 62.81% # Type of FU issued 439system.cpu.iq.FU_type_0::SimdAddAcc 0 0.00% 62.81% # Type of FU issued 440system.cpu.iq.FU_type_0::SimdAlu 0 0.00% 62.81% # Type of FU issued 441system.cpu.iq.FU_type_0::SimdCmp 0 0.00% 62.81% # Type of FU issued 442system.cpu.iq.FU_type_0::SimdCvt 0 0.00% 62.81% # Type of FU issued 443system.cpu.iq.FU_type_0::SimdMisc 0 0.00% 62.81% # Type of FU issued 444system.cpu.iq.FU_type_0::SimdMult 0 0.00% 62.81% # Type of FU issued --- 5 unchanged lines hidden (view full) --- 450system.cpu.iq.FU_type_0::SimdFloatAlu 0 0.00% 62.81% # Type of FU issued 451system.cpu.iq.FU_type_0::SimdFloatCmp 0 0.00% 62.81% # Type of FU issued 452system.cpu.iq.FU_type_0::SimdFloatCvt 0 0.00% 62.81% # Type of FU issued 453system.cpu.iq.FU_type_0::SimdFloatDiv 0 0.00% 62.81% # Type of FU issued 454system.cpu.iq.FU_type_0::SimdFloatMisc 0 0.00% 62.81% # Type of FU issued 455system.cpu.iq.FU_type_0::SimdFloatMult 0 0.00% 62.81% # Type of FU issued 456system.cpu.iq.FU_type_0::SimdFloatMultAcc 0 0.00% 62.81% # Type of FU issued 457system.cpu.iq.FU_type_0::SimdFloatSqrt 0 0.00% 62.81% # Type of FU issued |
458system.cpu.iq.FU_type_0::MemRead 1811 20.56% 83.37% # Type of FU issued 459system.cpu.iq.FU_type_0::MemWrite 1439 16.34% 99.70% # Type of FU issued 460system.cpu.iq.FU_type_0::FloatMemRead 2 0.02% 99.73% # Type of FU issued 461system.cpu.iq.FU_type_0::FloatMemWrite 24 0.27% 100.00% # Type of FU issued |
462system.cpu.iq.FU_type_0::IprAccess 0 0.00% 100.00% # Type of FU issued 463system.cpu.iq.FU_type_0::InstPrefetch 0 0.00% 100.00% # Type of FU issued 464system.cpu.iq.FU_type_0::total 8808 # Type of FU issued 465system.cpu.iq.rate 0.207067 # Inst issue rate |
466system.cpu.iq.fu_busy_cnt 198 # FU busy when requested 467system.cpu.iq.fu_busy_rate 0.022480 # FU busy rate (busy events/executed inst) 468system.cpu.iq.int_inst_queue_reads 30218 # Number of integer instruction queue reads |
469system.cpu.iq.int_inst_queue_writes 14647 # Number of integer instruction queue writes 470system.cpu.iq.int_inst_queue_wakeup_accesses 8115 # Number of integer instruction queue wakeup accesses |
471system.cpu.iq.fp_inst_queue_reads 67 # Number of floating instruction queue reads |
472system.cpu.iq.fp_inst_queue_writes 36 # Number of floating instruction queue writes 473system.cpu.iq.fp_inst_queue_wakeup_accesses 27 # Number of floating instruction queue wakeup accesses |
474system.cpu.iq.int_alu_accesses 8967 # Number of integer alu accesses 475system.cpu.iq.fp_alu_accesses 39 # Number of floating point alu accesses |
476system.cpu.iew.lsq.thread0.forwLoads 79 # Number of loads that had data forwarded from stores 477system.cpu.iew.lsq.thread0.invAddrLoads 0 # Number of loads ignored due to an invalid address 478system.cpu.iew.lsq.thread0.squashedLoads 976 # Number of loads squashed 479system.cpu.iew.lsq.thread0.ignoredResponses 2 # Number of memory responses ignored because the instruction is squashed 480system.cpu.iew.lsq.thread0.memOrderViolation 7 # Number of memory ordering violations 481system.cpu.iew.lsq.thread0.squashedStores 544 # Number of stores squashed 482system.cpu.iew.lsq.thread0.invAddrSwpfs 0 # Number of software prefetches ignored due to an invalid address 483system.cpu.iew.lsq.thread0.blockedLoads 0 # Number of blocked loads due to partial load-store forwarding --- 62 unchanged lines hidden (view full) --- 546system.cpu.commit.op_class_0::No_OpClass 0 0.00% 0.00% # Class of committed instruction 547system.cpu.commit.op_class_0::IntAlu 3783 65.31% 65.31% # Class of committed instruction 548system.cpu.commit.op_class_0::IntMult 0 0.00% 65.31% # Class of committed instruction 549system.cpu.commit.op_class_0::IntDiv 0 0.00% 65.31% # Class of committed instruction 550system.cpu.commit.op_class_0::FloatAdd 2 0.03% 65.35% # Class of committed instruction 551system.cpu.commit.op_class_0::FloatCmp 0 0.00% 65.35% # Class of committed instruction 552system.cpu.commit.op_class_0::FloatCvt 0 0.00% 65.35% # Class of committed instruction 553system.cpu.commit.op_class_0::FloatMult 0 0.00% 65.35% # Class of committed instruction |
554system.cpu.commit.op_class_0::FloatMultAcc 0 0.00% 65.35% # Class of committed instruction |
555system.cpu.commit.op_class_0::FloatDiv 0 0.00% 65.35% # Class of committed instruction |
556system.cpu.commit.op_class_0::FloatMisc 0 0.00% 65.35% # Class of committed instruction |
557system.cpu.commit.op_class_0::FloatSqrt 0 0.00% 65.35% # Class of committed instruction 558system.cpu.commit.op_class_0::SimdAdd 0 0.00% 65.35% # Class of committed instruction 559system.cpu.commit.op_class_0::SimdAddAcc 0 0.00% 65.35% # Class of committed instruction 560system.cpu.commit.op_class_0::SimdAlu 0 0.00% 65.35% # Class of committed instruction 561system.cpu.commit.op_class_0::SimdCmp 0 0.00% 65.35% # Class of committed instruction 562system.cpu.commit.op_class_0::SimdCvt 0 0.00% 65.35% # Class of committed instruction 563system.cpu.commit.op_class_0::SimdMisc 0 0.00% 65.35% # Class of committed instruction 564system.cpu.commit.op_class_0::SimdMult 0 0.00% 65.35% # Class of committed instruction --- 5 unchanged lines hidden (view full) --- 570system.cpu.commit.op_class_0::SimdFloatAlu 0 0.00% 65.35% # Class of committed instruction 571system.cpu.commit.op_class_0::SimdFloatCmp 0 0.00% 65.35% # Class of committed instruction 572system.cpu.commit.op_class_0::SimdFloatCvt 0 0.00% 65.35% # Class of committed instruction 573system.cpu.commit.op_class_0::SimdFloatDiv 0 0.00% 65.35% # Class of committed instruction 574system.cpu.commit.op_class_0::SimdFloatMisc 0 0.00% 65.35% # Class of committed instruction 575system.cpu.commit.op_class_0::SimdFloatMult 0 0.00% 65.35% # Class of committed instruction 576system.cpu.commit.op_class_0::SimdFloatMultAcc 0 0.00% 65.35% # Class of committed instruction 577system.cpu.commit.op_class_0::SimdFloatSqrt 0 0.00% 65.35% # Class of committed instruction |
578system.cpu.commit.op_class_0::MemRead 960 16.57% 81.92% # Class of committed instruction 579system.cpu.commit.op_class_0::MemWrite 1027 17.73% 99.65% # Class of committed instruction 580system.cpu.commit.op_class_0::FloatMemRead 1 0.02% 99.67% # Class of committed instruction 581system.cpu.commit.op_class_0::FloatMemWrite 19 0.33% 100.00% # Class of committed instruction |
582system.cpu.commit.op_class_0::IprAccess 0 0.00% 100.00% # Class of committed instruction 583system.cpu.commit.op_class_0::InstPrefetch 0 0.00% 100.00% # Class of committed instruction 584system.cpu.commit.op_class_0::total 5792 # Class of committed instruction 585system.cpu.commit.bw_lim_events 110 # number cycles where commit BW limit reached 586system.cpu.rob.rob_reads 21842 # The number of ROB reads 587system.cpu.rob.rob_writes 21175 # The number of ROB writes 588system.cpu.timesIdled 228 # Number of times that the entire CPU went into an idle state and unscheduled itself 589system.cpu.idleCycles 30119 # Total number of cycles that the CPU has spent unscheduled due to idling --- 423 unchanged lines hidden --- |