stats.txt (10526:0068ad93a67e) | stats.txt (10628:c9b7e0c69f88) |
---|---|
1 2---------- Begin Simulation Statistics ---------- | 1 2---------- Begin Simulation Statistics ---------- |
3sim_seconds 0.000116 # Number of seconds simulated 4sim_ticks 115508 # Number of ticks simulated 5final_tick 115508 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) | 3sim_seconds 0.000115 # Number of seconds simulated 4sim_ticks 115467 # Number of ticks simulated 5final_tick 115467 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) |
6sim_freq 1000000000 # Frequency of simulated ticks | 6sim_freq 1000000000 # Frequency of simulated ticks |
7host_inst_rate 2198 # Simulator instruction rate (inst/s) 8host_op_rate 2198 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 45146 # Simulator tick rate (ticks/s) 10host_mem_usage 435400 # Number of bytes of host memory used 11host_seconds 2.56 # Real time elapsed on the host | 7host_inst_rate 66709 # Simulator instruction rate (inst/s) 8host_op_rate 66698 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 1369179 # Simulator tick rate (ticks/s) 10host_mem_usage 449556 # Number of bytes of host memory used 11host_seconds 0.08 # Real time elapsed on the host |
12sim_insts 5624 # Number of instructions simulated 13sim_ops 5624 # Number of ops (including micro ops) simulated 14system.voltage_domain.voltage 1 # Voltage in Volts 15system.clk_domain.clock 1 # Clock period in ticks 16system.mem_ctrls.bytes_read::ruby.dir_cntrl0 94080 # Number of bytes read from this memory 17system.mem_ctrls.bytes_read::total 94080 # Number of bytes read from this memory 18system.mem_ctrls.bytes_written::ruby.dir_cntrl0 93824 # Number of bytes written to this memory 19system.mem_ctrls.bytes_written::total 93824 # Number of bytes written to this memory 20system.mem_ctrls.num_reads::ruby.dir_cntrl0 1470 # Number of read requests responded to by this memory 21system.mem_ctrls.num_reads::total 1470 # Number of read requests responded to by this memory 22system.mem_ctrls.num_writes::ruby.dir_cntrl0 1466 # Number of write requests responded to by this memory 23system.mem_ctrls.num_writes::total 1466 # Number of write requests responded to by this memory | 12sim_insts 5624 # Number of instructions simulated 13sim_ops 5624 # Number of ops (including micro ops) simulated 14system.voltage_domain.voltage 1 # Voltage in Volts 15system.clk_domain.clock 1 # Clock period in ticks 16system.mem_ctrls.bytes_read::ruby.dir_cntrl0 94080 # Number of bytes read from this memory 17system.mem_ctrls.bytes_read::total 94080 # Number of bytes read from this memory 18system.mem_ctrls.bytes_written::ruby.dir_cntrl0 93824 # Number of bytes written to this memory 19system.mem_ctrls.bytes_written::total 93824 # Number of bytes written to this memory 20system.mem_ctrls.num_reads::ruby.dir_cntrl0 1470 # Number of read requests responded to by this memory 21system.mem_ctrls.num_reads::total 1470 # Number of read requests responded to by this memory 22system.mem_ctrls.num_writes::ruby.dir_cntrl0 1466 # Number of write requests responded to by this memory 23system.mem_ctrls.num_writes::total 1466 # Number of write requests responded to by this memory |
24system.mem_ctrls.bw_read::ruby.dir_cntrl0 814489040 # Total read bandwidth from this memory (bytes/s) 25system.mem_ctrls.bw_read::total 814489040 # Total read bandwidth from this memory (bytes/s) 26system.mem_ctrls.bw_write::ruby.dir_cntrl0 812272743 # Write bandwidth from this memory (bytes/s) 27system.mem_ctrls.bw_write::total 812272743 # Write bandwidth from this memory (bytes/s) 28system.mem_ctrls.bw_total::ruby.dir_cntrl0 1626761783 # Total bandwidth to/from this memory (bytes/s) 29system.mem_ctrls.bw_total::total 1626761783 # Total bandwidth to/from this memory (bytes/s) | 24system.mem_ctrls.bw_read::ruby.dir_cntrl0 814778248 # Total read bandwidth from this memory (bytes/s) 25system.mem_ctrls.bw_read::total 814778248 # Total read bandwidth from this memory (bytes/s) 26system.mem_ctrls.bw_write::ruby.dir_cntrl0 812561165 # Write bandwidth from this memory (bytes/s) 27system.mem_ctrls.bw_write::total 812561165 # Write bandwidth from this memory (bytes/s) 28system.mem_ctrls.bw_total::ruby.dir_cntrl0 1627339413 # Total bandwidth to/from this memory (bytes/s) 29system.mem_ctrls.bw_total::total 1627339413 # Total bandwidth to/from this memory (bytes/s) |
30system.mem_ctrls.readReqs 1470 # Number of read requests accepted 31system.mem_ctrls.writeReqs 1466 # Number of write requests accepted 32system.mem_ctrls.readBursts 1470 # Number of DRAM read bursts, including those serviced by the write queue 33system.mem_ctrls.writeBursts 1466 # Number of DRAM write bursts, including those merged in the write queue | 30system.mem_ctrls.readReqs 1470 # Number of read requests accepted 31system.mem_ctrls.writeReqs 1466 # Number of write requests accepted 32system.mem_ctrls.readBursts 1470 # Number of DRAM read bursts, including those serviced by the write queue 33system.mem_ctrls.writeBursts 1466 # Number of DRAM write bursts, including those merged in the write queue |
34system.mem_ctrls.bytesReadDRAM 59264 # Total number of bytes read from DRAM 35system.mem_ctrls.bytesReadWrQ 34816 # Total number of bytes read from write queue 36system.mem_ctrls.bytesWritten 60672 # Total number of bytes written to DRAM | 34system.mem_ctrls.bytesReadDRAM 59456 # Total number of bytes read from DRAM 35system.mem_ctrls.bytesReadWrQ 34624 # Total number of bytes read from write queue 36system.mem_ctrls.bytesWritten 60800 # Total number of bytes written to DRAM |
37system.mem_ctrls.bytesReadSys 94080 # Total read bytes from the system interface side 38system.mem_ctrls.bytesWrittenSys 93824 # Total written bytes from the system interface side | 37system.mem_ctrls.bytesReadSys 94080 # Total read bytes from the system interface side 38system.mem_ctrls.bytesWrittenSys 93824 # Total written bytes from the system interface side |
39system.mem_ctrls.servicedByWrQ 544 # Number of DRAM read bursts serviced by the write queue 40system.mem_ctrls.mergedWrBursts 493 # Number of DRAM write bursts merged with an existing one | 39system.mem_ctrls.servicedByWrQ 541 # Number of DRAM read bursts serviced by the write queue 40system.mem_ctrls.mergedWrBursts 491 # Number of DRAM write bursts merged with an existing one |
41system.mem_ctrls.neitherReadNorWriteReqs 0 # Number of requests that are neither read nor write | 41system.mem_ctrls.neitherReadNorWriteReqs 0 # Number of requests that are neither read nor write |
42system.mem_ctrls.perBankRdBursts::0 33 # Per bank write bursts | 42system.mem_ctrls.perBankRdBursts::0 34 # Per bank write bursts |
43system.mem_ctrls.perBankRdBursts::1 0 # Per bank write bursts 44system.mem_ctrls.perBankRdBursts::2 0 # Per bank write bursts 45system.mem_ctrls.perBankRdBursts::3 0 # Per bank write bursts 46system.mem_ctrls.perBankRdBursts::4 7 # Per bank write bursts 47system.mem_ctrls.perBankRdBursts::5 3 # Per bank write bursts | 43system.mem_ctrls.perBankRdBursts::1 0 # Per bank write bursts 44system.mem_ctrls.perBankRdBursts::2 0 # Per bank write bursts 45system.mem_ctrls.perBankRdBursts::3 0 # Per bank write bursts 46system.mem_ctrls.perBankRdBursts::4 7 # Per bank write bursts 47system.mem_ctrls.perBankRdBursts::5 3 # Per bank write bursts |
48system.mem_ctrls.perBankRdBursts::6 12 # Per bank write bursts 49system.mem_ctrls.perBankRdBursts::7 86 # Per bank write bursts 50system.mem_ctrls.perBankRdBursts::8 65 # Per bank write bursts 51system.mem_ctrls.perBankRdBursts::9 244 # Per bank write bursts 52system.mem_ctrls.perBankRdBursts::10 102 # Per bank write bursts 53system.mem_ctrls.perBankRdBursts::11 43 # Per bank write bursts 54system.mem_ctrls.perBankRdBursts::12 100 # Per bank write bursts | 48system.mem_ctrls.perBankRdBursts::6 13 # Per bank write bursts 49system.mem_ctrls.perBankRdBursts::7 88 # Per bank write bursts 50system.mem_ctrls.perBankRdBursts::8 66 # Per bank write bursts 51system.mem_ctrls.perBankRdBursts::9 248 # Per bank write bursts 52system.mem_ctrls.perBankRdBursts::10 103 # Per bank write bursts 53system.mem_ctrls.perBankRdBursts::11 46 # Per bank write bursts 54system.mem_ctrls.perBankRdBursts::12 103 # Per bank write bursts |
55system.mem_ctrls.perBankRdBursts::13 45 # Per bank write bursts | 55system.mem_ctrls.perBankRdBursts::13 45 # Per bank write bursts |
56system.mem_ctrls.perBankRdBursts::14 173 # Per bank write bursts 57system.mem_ctrls.perBankRdBursts::15 13 # Per bank write bursts 58system.mem_ctrls.perBankWrBursts::0 35 # Per bank write bursts | 56system.mem_ctrls.perBankRdBursts::14 158 # Per bank write bursts 57system.mem_ctrls.perBankRdBursts::15 15 # Per bank write bursts 58system.mem_ctrls.perBankWrBursts::0 36 # Per bank write bursts |
59system.mem_ctrls.perBankWrBursts::1 0 # Per bank write bursts 60system.mem_ctrls.perBankWrBursts::2 0 # Per bank write bursts 61system.mem_ctrls.perBankWrBursts::3 0 # Per bank write bursts 62system.mem_ctrls.perBankWrBursts::4 7 # Per bank write bursts 63system.mem_ctrls.perBankWrBursts::5 3 # Per bank write bursts 64system.mem_ctrls.perBankWrBursts::6 13 # Per bank write bursts 65system.mem_ctrls.perBankWrBursts::7 76 # Per bank write bursts 66system.mem_ctrls.perBankWrBursts::8 60 # Per bank write bursts | 59system.mem_ctrls.perBankWrBursts::1 0 # Per bank write bursts 60system.mem_ctrls.perBankWrBursts::2 0 # Per bank write bursts 61system.mem_ctrls.perBankWrBursts::3 0 # Per bank write bursts 62system.mem_ctrls.perBankWrBursts::4 7 # Per bank write bursts 63system.mem_ctrls.perBankWrBursts::5 3 # Per bank write bursts 64system.mem_ctrls.perBankWrBursts::6 13 # Per bank write bursts 65system.mem_ctrls.perBankWrBursts::7 76 # Per bank write bursts 66system.mem_ctrls.perBankWrBursts::8 60 # Per bank write bursts |
67system.mem_ctrls.perBankWrBursts::9 244 # Per bank write bursts | 67system.mem_ctrls.perBankWrBursts::9 249 # Per bank write bursts |
68system.mem_ctrls.perBankWrBursts::10 103 # Per bank write bursts | 68system.mem_ctrls.perBankWrBursts::10 103 # Per bank write bursts |
69system.mem_ctrls.perBankWrBursts::11 45 # Per bank write bursts 70system.mem_ctrls.perBankWrBursts::12 110 # Per bank write bursts 71system.mem_ctrls.perBankWrBursts::13 43 # Per bank write bursts 72system.mem_ctrls.perBankWrBursts::14 194 # Per bank write bursts 73system.mem_ctrls.perBankWrBursts::15 15 # Per bank write bursts | 69system.mem_ctrls.perBankWrBursts::11 47 # Per bank write bursts 70system.mem_ctrls.perBankWrBursts::12 114 # Per bank write bursts 71system.mem_ctrls.perBankWrBursts::13 44 # Per bank write bursts 72system.mem_ctrls.perBankWrBursts::14 182 # Per bank write bursts 73system.mem_ctrls.perBankWrBursts::15 16 # Per bank write bursts |
74system.mem_ctrls.numRdRetry 0 # Number of times read queue was full causing retry 75system.mem_ctrls.numWrRetry 0 # Number of times write queue was full causing retry | 74system.mem_ctrls.numRdRetry 0 # Number of times read queue was full causing retry 75system.mem_ctrls.numWrRetry 0 # Number of times write queue was full causing retry |
76system.mem_ctrls.totGap 115437 # Total gap between requests | 76system.mem_ctrls.totGap 115396 # Total gap between requests |
77system.mem_ctrls.readPktSize::0 0 # Read request sizes (log2) 78system.mem_ctrls.readPktSize::1 0 # Read request sizes (log2) 79system.mem_ctrls.readPktSize::2 0 # Read request sizes (log2) 80system.mem_ctrls.readPktSize::3 0 # Read request sizes (log2) 81system.mem_ctrls.readPktSize::4 0 # Read request sizes (log2) 82system.mem_ctrls.readPktSize::5 0 # Read request sizes (log2) 83system.mem_ctrls.readPktSize::6 1470 # Read request sizes (log2) 84system.mem_ctrls.writePktSize::0 0 # Write request sizes (log2) 85system.mem_ctrls.writePktSize::1 0 # Write request sizes (log2) 86system.mem_ctrls.writePktSize::2 0 # Write request sizes (log2) 87system.mem_ctrls.writePktSize::3 0 # Write request sizes (log2) 88system.mem_ctrls.writePktSize::4 0 # Write request sizes (log2) 89system.mem_ctrls.writePktSize::5 0 # Write request sizes (log2) 90system.mem_ctrls.writePktSize::6 1466 # Write request sizes (log2) | 77system.mem_ctrls.readPktSize::0 0 # Read request sizes (log2) 78system.mem_ctrls.readPktSize::1 0 # Read request sizes (log2) 79system.mem_ctrls.readPktSize::2 0 # Read request sizes (log2) 80system.mem_ctrls.readPktSize::3 0 # Read request sizes (log2) 81system.mem_ctrls.readPktSize::4 0 # Read request sizes (log2) 82system.mem_ctrls.readPktSize::5 0 # Read request sizes (log2) 83system.mem_ctrls.readPktSize::6 1470 # Read request sizes (log2) 84system.mem_ctrls.writePktSize::0 0 # Write request sizes (log2) 85system.mem_ctrls.writePktSize::1 0 # Write request sizes (log2) 86system.mem_ctrls.writePktSize::2 0 # Write request sizes (log2) 87system.mem_ctrls.writePktSize::3 0 # Write request sizes (log2) 88system.mem_ctrls.writePktSize::4 0 # Write request sizes (log2) 89system.mem_ctrls.writePktSize::5 0 # Write request sizes (log2) 90system.mem_ctrls.writePktSize::6 1466 # Write request sizes (log2) |
91system.mem_ctrls.rdQLenPdf::0 926 # What read queue length does an incoming req see | 91system.mem_ctrls.rdQLenPdf::0 929 # What read queue length does an incoming req see |
92system.mem_ctrls.rdQLenPdf::1 0 # What read queue length does an incoming req see 93system.mem_ctrls.rdQLenPdf::2 0 # What read queue length does an incoming req see 94system.mem_ctrls.rdQLenPdf::3 0 # What read queue length does an incoming req see 95system.mem_ctrls.rdQLenPdf::4 0 # What read queue length does an incoming req see 96system.mem_ctrls.rdQLenPdf::5 0 # What read queue length does an incoming req see 97system.mem_ctrls.rdQLenPdf::6 0 # What read queue length does an incoming req see 98system.mem_ctrls.rdQLenPdf::7 0 # What read queue length does an incoming req see 99system.mem_ctrls.rdQLenPdf::8 0 # What read queue length does an incoming req see --- 30 unchanged lines hidden (view full) --- 130system.mem_ctrls.wrQLenPdf::7 1 # What write queue length does an incoming req see 131system.mem_ctrls.wrQLenPdf::8 1 # What write queue length does an incoming req see 132system.mem_ctrls.wrQLenPdf::9 1 # What write queue length does an incoming req see 133system.mem_ctrls.wrQLenPdf::10 1 # What write queue length does an incoming req see 134system.mem_ctrls.wrQLenPdf::11 1 # What write queue length does an incoming req see 135system.mem_ctrls.wrQLenPdf::12 1 # What write queue length does an incoming req see 136system.mem_ctrls.wrQLenPdf::13 1 # What write queue length does an incoming req see 137system.mem_ctrls.wrQLenPdf::14 1 # What write queue length does an incoming req see | 92system.mem_ctrls.rdQLenPdf::1 0 # What read queue length does an incoming req see 93system.mem_ctrls.rdQLenPdf::2 0 # What read queue length does an incoming req see 94system.mem_ctrls.rdQLenPdf::3 0 # What read queue length does an incoming req see 95system.mem_ctrls.rdQLenPdf::4 0 # What read queue length does an incoming req see 96system.mem_ctrls.rdQLenPdf::5 0 # What read queue length does an incoming req see 97system.mem_ctrls.rdQLenPdf::6 0 # What read queue length does an incoming req see 98system.mem_ctrls.rdQLenPdf::7 0 # What read queue length does an incoming req see 99system.mem_ctrls.rdQLenPdf::8 0 # What read queue length does an incoming req see --- 30 unchanged lines hidden (view full) --- 130system.mem_ctrls.wrQLenPdf::7 1 # What write queue length does an incoming req see 131system.mem_ctrls.wrQLenPdf::8 1 # What write queue length does an incoming req see 132system.mem_ctrls.wrQLenPdf::9 1 # What write queue length does an incoming req see 133system.mem_ctrls.wrQLenPdf::10 1 # What write queue length does an incoming req see 134system.mem_ctrls.wrQLenPdf::11 1 # What write queue length does an incoming req see 135system.mem_ctrls.wrQLenPdf::12 1 # What write queue length does an incoming req see 136system.mem_ctrls.wrQLenPdf::13 1 # What write queue length does an incoming req see 137system.mem_ctrls.wrQLenPdf::14 1 # What write queue length does an incoming req see |
138system.mem_ctrls.wrQLenPdf::15 12 # What write queue length does an incoming req see 139system.mem_ctrls.wrQLenPdf::16 16 # What write queue length does an incoming req see | 138system.mem_ctrls.wrQLenPdf::15 13 # What write queue length does an incoming req see 139system.mem_ctrls.wrQLenPdf::16 17 # What write queue length does an incoming req see |
140system.mem_ctrls.wrQLenPdf::17 56 # What write queue length does an incoming req see | 140system.mem_ctrls.wrQLenPdf::17 56 # What write queue length does an incoming req see |
141system.mem_ctrls.wrQLenPdf::18 60 # What write queue length does an incoming req see 142system.mem_ctrls.wrQLenPdf::19 59 # What write queue length does an incoming req see 143system.mem_ctrls.wrQLenPdf::20 64 # What write queue length does an incoming req see | 141system.mem_ctrls.wrQLenPdf::18 62 # What write queue length does an incoming req see 142system.mem_ctrls.wrQLenPdf::19 60 # What write queue length does an incoming req see 143system.mem_ctrls.wrQLenPdf::20 61 # What write queue length does an incoming req see |
144system.mem_ctrls.wrQLenPdf::21 59 # What write queue length does an incoming req see 145system.mem_ctrls.wrQLenPdf::22 58 # What write queue length does an incoming req see 146system.mem_ctrls.wrQLenPdf::23 58 # What write queue length does an incoming req see 147system.mem_ctrls.wrQLenPdf::24 58 # What write queue length does an incoming req see 148system.mem_ctrls.wrQLenPdf::25 57 # What write queue length does an incoming req see 149system.mem_ctrls.wrQLenPdf::26 57 # What write queue length does an incoming req see 150system.mem_ctrls.wrQLenPdf::27 57 # What write queue length does an incoming req see 151system.mem_ctrls.wrQLenPdf::28 57 # What write queue length does an incoming req see --- 27 unchanged lines hidden (view full) --- 179system.mem_ctrls.wrQLenPdf::56 0 # What write queue length does an incoming req see 180system.mem_ctrls.wrQLenPdf::57 0 # What write queue length does an incoming req see 181system.mem_ctrls.wrQLenPdf::58 0 # What write queue length does an incoming req see 182system.mem_ctrls.wrQLenPdf::59 0 # What write queue length does an incoming req see 183system.mem_ctrls.wrQLenPdf::60 0 # What write queue length does an incoming req see 184system.mem_ctrls.wrQLenPdf::61 0 # What write queue length does an incoming req see 185system.mem_ctrls.wrQLenPdf::62 0 # What write queue length does an incoming req see 186system.mem_ctrls.wrQLenPdf::63 0 # What write queue length does an incoming req see | 144system.mem_ctrls.wrQLenPdf::21 59 # What write queue length does an incoming req see 145system.mem_ctrls.wrQLenPdf::22 58 # What write queue length does an incoming req see 146system.mem_ctrls.wrQLenPdf::23 58 # What write queue length does an incoming req see 147system.mem_ctrls.wrQLenPdf::24 58 # What write queue length does an incoming req see 148system.mem_ctrls.wrQLenPdf::25 57 # What write queue length does an incoming req see 149system.mem_ctrls.wrQLenPdf::26 57 # What write queue length does an incoming req see 150system.mem_ctrls.wrQLenPdf::27 57 # What write queue length does an incoming req see 151system.mem_ctrls.wrQLenPdf::28 57 # What write queue length does an incoming req see --- 27 unchanged lines hidden (view full) --- 179system.mem_ctrls.wrQLenPdf::56 0 # What write queue length does an incoming req see 180system.mem_ctrls.wrQLenPdf::57 0 # What write queue length does an incoming req see 181system.mem_ctrls.wrQLenPdf::58 0 # What write queue length does an incoming req see 182system.mem_ctrls.wrQLenPdf::59 0 # What write queue length does an incoming req see 183system.mem_ctrls.wrQLenPdf::60 0 # What write queue length does an incoming req see 184system.mem_ctrls.wrQLenPdf::61 0 # What write queue length does an incoming req see 185system.mem_ctrls.wrQLenPdf::62 0 # What write queue length does an incoming req see 186system.mem_ctrls.wrQLenPdf::63 0 # What write queue length does an incoming req see |
187system.mem_ctrls.bytesPerActivate::samples 349 # Bytes accessed per row activation 188system.mem_ctrls.bytesPerActivate::mean 341.455587 # Bytes accessed per row activation 189system.mem_ctrls.bytesPerActivate::gmean 225.575393 # Bytes accessed per row activation 190system.mem_ctrls.bytesPerActivate::stdev 311.156448 # Bytes accessed per row activation 191system.mem_ctrls.bytesPerActivate::0-127 80 22.92% 22.92% # Bytes accessed per row activation 192system.mem_ctrls.bytesPerActivate::128-255 99 28.37% 51.29% # Bytes accessed per row activation 193system.mem_ctrls.bytesPerActivate::256-383 59 16.91% 68.19% # Bytes accessed per row activation 194system.mem_ctrls.bytesPerActivate::384-511 25 7.16% 75.36% # Bytes accessed per row activation 195system.mem_ctrls.bytesPerActivate::512-639 22 6.30% 81.66% # Bytes accessed per row activation 196system.mem_ctrls.bytesPerActivate::640-767 9 2.58% 84.24% # Bytes accessed per row activation 197system.mem_ctrls.bytesPerActivate::768-895 12 3.44% 87.68% # Bytes accessed per row activation 198system.mem_ctrls.bytesPerActivate::896-1023 6 1.72% 89.40% # Bytes accessed per row activation 199system.mem_ctrls.bytesPerActivate::1024-1151 37 10.60% 100.00% # Bytes accessed per row activation 200system.mem_ctrls.bytesPerActivate::total 349 # Bytes accessed per row activation | 187system.mem_ctrls.bytesPerActivate::samples 362 # Bytes accessed per row activation 188system.mem_ctrls.bytesPerActivate::mean 330.077348 # Bytes accessed per row activation 189system.mem_ctrls.bytesPerActivate::gmean 218.964738 # Bytes accessed per row activation 190system.mem_ctrls.bytesPerActivate::stdev 303.831296 # Bytes accessed per row activation 191system.mem_ctrls.bytesPerActivate::0-127 84 23.20% 23.20% # Bytes accessed per row activation 192system.mem_ctrls.bytesPerActivate::128-255 104 28.73% 51.93% # Bytes accessed per row activation 193system.mem_ctrls.bytesPerActivate::256-383 58 16.02% 67.96% # Bytes accessed per row activation 194system.mem_ctrls.bytesPerActivate::384-511 36 9.94% 77.90% # Bytes accessed per row activation 195system.mem_ctrls.bytesPerActivate::512-639 19 5.25% 83.15% # Bytes accessed per row activation 196system.mem_ctrls.bytesPerActivate::640-767 10 2.76% 85.91% # Bytes accessed per row activation 197system.mem_ctrls.bytesPerActivate::768-895 9 2.49% 88.40% # Bytes accessed per row activation 198system.mem_ctrls.bytesPerActivate::896-1023 5 1.38% 89.78% # Bytes accessed per row activation 199system.mem_ctrls.bytesPerActivate::1024-1151 37 10.22% 100.00% # Bytes accessed per row activation 200system.mem_ctrls.bytesPerActivate::total 362 # Bytes accessed per row activation |
201system.mem_ctrls.rdPerTurnAround::samples 57 # Reads before turning the bus around for writes | 201system.mem_ctrls.rdPerTurnAround::samples 57 # Reads before turning the bus around for writes |
202system.mem_ctrls.rdPerTurnAround::mean 16.070175 # Reads before turning the bus around for writes 203system.mem_ctrls.rdPerTurnAround::gmean 15.908868 # Reads before turning the bus around for writes 204system.mem_ctrls.rdPerTurnAround::stdev 2.750712 # Reads before turning the bus around for writes 205system.mem_ctrls.rdPerTurnAround::12-13 2 3.51% 3.51% # Reads before turning the bus around for writes 206system.mem_ctrls.rdPerTurnAround::14-15 24 42.11% 45.61% # Reads before turning the bus around for writes | 202system.mem_ctrls.rdPerTurnAround::mean 16.105263 # Reads before turning the bus around for writes 203system.mem_ctrls.rdPerTurnAround::gmean 15.953786 # Reads before turning the bus around for writes 204system.mem_ctrls.rdPerTurnAround::stdev 2.697116 # Reads before turning the bus around for writes 205system.mem_ctrls.rdPerTurnAround::12-13 1 1.75% 1.75% # Reads before turning the bus around for writes 206system.mem_ctrls.rdPerTurnAround::14-15 25 43.86% 45.61% # Reads before turning the bus around for writes |
207system.mem_ctrls.rdPerTurnAround::16-17 25 43.86% 89.47% # Reads before turning the bus around for writes 208system.mem_ctrls.rdPerTurnAround::18-19 5 8.77% 98.25% # Reads before turning the bus around for writes 209system.mem_ctrls.rdPerTurnAround::34-35 1 1.75% 100.00% # Reads before turning the bus around for writes 210system.mem_ctrls.rdPerTurnAround::total 57 # Reads before turning the bus around for writes 211system.mem_ctrls.wrPerTurnAround::samples 57 # Writes before turning the bus around for reads | 207system.mem_ctrls.rdPerTurnAround::16-17 25 43.86% 89.47% # Reads before turning the bus around for writes 208system.mem_ctrls.rdPerTurnAround::18-19 5 8.77% 98.25% # Reads before turning the bus around for writes 209system.mem_ctrls.rdPerTurnAround::34-35 1 1.75% 100.00% # Reads before turning the bus around for writes 210system.mem_ctrls.rdPerTurnAround::total 57 # Reads before turning the bus around for writes 211system.mem_ctrls.wrPerTurnAround::samples 57 # Writes before turning the bus around for reads |
212system.mem_ctrls.wrPerTurnAround::mean 16.631579 # Writes before turning the bus around for reads 213system.mem_ctrls.wrPerTurnAround::gmean 16.601010 # Writes before turning the bus around for reads 214system.mem_ctrls.wrPerTurnAround::stdev 1.045937 # Writes before turning the bus around for reads 215system.mem_ctrls.wrPerTurnAround::16 39 68.42% 68.42% # Writes before turning the bus around for reads 216system.mem_ctrls.wrPerTurnAround::17 5 8.77% 77.19% # Writes before turning the bus around for reads 217system.mem_ctrls.wrPerTurnAround::18 9 15.79% 92.98% # Writes before turning the bus around for reads 218system.mem_ctrls.wrPerTurnAround::19 3 5.26% 98.25% # Writes before turning the bus around for reads | 212system.mem_ctrls.wrPerTurnAround::mean 16.666667 # Writes before turning the bus around for reads 213system.mem_ctrls.wrPerTurnAround::gmean 16.637263 # Writes before turning the bus around for reads 214system.mem_ctrls.wrPerTurnAround::stdev 1.023533 # Writes before turning the bus around for reads 215system.mem_ctrls.wrPerTurnAround::16 37 64.91% 64.91% # Writes before turning the bus around for reads 216system.mem_ctrls.wrPerTurnAround::17 6 10.53% 75.44% # Writes before turning the bus around for reads 217system.mem_ctrls.wrPerTurnAround::18 11 19.30% 94.74% # Writes before turning the bus around for reads 218system.mem_ctrls.wrPerTurnAround::19 2 3.51% 98.25% # Writes before turning the bus around for reads |
219system.mem_ctrls.wrPerTurnAround::20 1 1.75% 100.00% # Writes before turning the bus around for reads 220system.mem_ctrls.wrPerTurnAround::total 57 # Writes before turning the bus around for reads | 219system.mem_ctrls.wrPerTurnAround::20 1 1.75% 100.00% # Writes before turning the bus around for reads 220system.mem_ctrls.wrPerTurnAround::total 57 # Writes before turning the bus around for reads |
221system.mem_ctrls.totQLat 12468 # Total ticks spent queuing 222system.mem_ctrls.totMemAccLat 30062 # Total ticks spent from burst creation until serviced by the DRAM 223system.mem_ctrls.totBusLat 4630 # Total ticks spent in databus transfers 224system.mem_ctrls.avgQLat 13.46 # Average queueing delay per DRAM burst | 221system.mem_ctrls.totQLat 12340 # Total ticks spent queuing 222system.mem_ctrls.totMemAccLat 29991 # Total ticks spent from burst creation until serviced by the DRAM 223system.mem_ctrls.totBusLat 4645 # Total ticks spent in databus transfers 224system.mem_ctrls.avgQLat 13.28 # Average queueing delay per DRAM burst |
225system.mem_ctrls.avgBusLat 5.00 # Average bus latency per DRAM burst | 225system.mem_ctrls.avgBusLat 5.00 # Average bus latency per DRAM burst |
226system.mem_ctrls.avgMemAccLat 32.46 # Average memory access latency per DRAM burst 227system.mem_ctrls.avgRdBW 513.07 # Average DRAM read bandwidth in MiByte/s 228system.mem_ctrls.avgWrBW 525.26 # Average achieved write bandwidth in MiByte/s 229system.mem_ctrls.avgRdBWSys 814.49 # Average system read bandwidth in MiByte/s 230system.mem_ctrls.avgWrBWSys 812.27 # Average system write bandwidth in MiByte/s | 226system.mem_ctrls.avgMemAccLat 32.28 # Average memory access latency per DRAM burst 227system.mem_ctrls.avgRdBW 514.92 # Average DRAM read bandwidth in MiByte/s 228system.mem_ctrls.avgWrBW 526.56 # Average achieved write bandwidth in MiByte/s 229system.mem_ctrls.avgRdBWSys 814.78 # Average system read bandwidth in MiByte/s 230system.mem_ctrls.avgWrBWSys 812.56 # Average system write bandwidth in MiByte/s |
231system.mem_ctrls.peakBW 12800.00 # Theoretical peak bandwidth in MiByte/s | 231system.mem_ctrls.peakBW 12800.00 # Theoretical peak bandwidth in MiByte/s |
232system.mem_ctrls.busUtil 8.11 # Data bus utilization in percentage 233system.mem_ctrls.busUtilRead 4.01 # Data bus utilization in percentage for reads 234system.mem_ctrls.busUtilWrite 4.10 # Data bus utilization in percentage for writes | 232system.mem_ctrls.busUtil 8.14 # Data bus utilization in percentage 233system.mem_ctrls.busUtilRead 4.02 # Data bus utilization in percentage for reads 234system.mem_ctrls.busUtilWrite 4.11 # Data bus utilization in percentage for writes |
235system.mem_ctrls.avgRdQLen 1.00 # Average read queue length when enqueuing | 235system.mem_ctrls.avgRdQLen 1.00 # Average read queue length when enqueuing |
236system.mem_ctrls.avgWrQLen 25.51 # Average write queue length when enqueuing 237system.mem_ctrls.readRowHits 626 # Number of row buffer hits during reads 238system.mem_ctrls.writeRowHits 891 # Number of row buffer hits during writes 239system.mem_ctrls.readRowHitRate 67.60 # Row buffer hit rate for reads 240system.mem_ctrls.writeRowHitRate 91.57 # Row buffer hit rate for writes 241system.mem_ctrls.avgGap 39.32 # Average gap between requests 242system.mem_ctrls.pageHitRate 79.88 # Row buffer hit rate, read and write combined 243system.mem_ctrls.memoryStateTime::IDLE 12 # Time in different power states 244system.mem_ctrls.memoryStateTime::REF 3640 # Time in different power states 245system.mem_ctrls.memoryStateTime::PRE_PDN 0 # Time in different power states 246system.mem_ctrls.memoryStateTime::ACT 105626 # Time in different power states 247system.mem_ctrls.memoryStateTime::ACT_PDN 0 # Time in different power states 248system.mem_ctrls.actEnergy::0 453600 # Energy for activate commands per rank (pJ) 249system.mem_ctrls.actEnergy::1 2033640 # Energy for activate commands per rank (pJ) 250system.mem_ctrls.preEnergy::0 252000 # Energy for precharge commands per rank (pJ) 251system.mem_ctrls.preEnergy::1 1129800 # Energy for precharge commands per rank (pJ) 252system.mem_ctrls.readEnergy::0 1547520 # Energy for read commands per rank (pJ) 253system.mem_ctrls.readEnergy::1 9409920 # Energy for read commands per rank (pJ) 254system.mem_ctrls.writeEnergy::0 1213056 # Energy for write commands per rank (pJ) 255system.mem_ctrls.writeEnergy::1 8107776 # Energy for write commands per rank (pJ) 256system.mem_ctrls.refreshEnergy::0 7119840 # Energy for refresh commands per rank (pJ) 257system.mem_ctrls.refreshEnergy::1 7119840 # Energy for refresh commands per rank (pJ) 258system.mem_ctrls.actBackEnergy::0 51518196 # Energy for active background per rank (pJ) 259system.mem_ctrls.actBackEnergy::1 74359692 # Energy for active background per rank (pJ) 260system.mem_ctrls.preBackEnergy::0 20367000 # Energy for precharge background per rank (pJ) 261system.mem_ctrls.preBackEnergy::1 330600 # Energy for precharge background per rank (pJ) 262system.mem_ctrls.totalEnergy::0 82471212 # Total energy per rank (pJ) 263system.mem_ctrls.totalEnergy::1 102491268 # Total energy per rank (pJ) 264system.mem_ctrls.averagePower::0 754.788512 # Core power per rank (mW) 265system.mem_ctrls.averagePower::1 938.014973 # Core power per rank (mW) 266system.ruby.clk_domain.clock 1 # Clock period in ticks 267system.ruby.delayHist::bucket_size 1 # delay histogram for all message 268system.ruby.delayHist::max_bucket 9 # delay histogram for all message 269system.ruby.delayHist::samples 2936 # delay histogram for all message 270system.ruby.delayHist | 2936 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for all message 271system.ruby.delayHist::total 2936 # delay histogram for all message 272system.ruby.outstanding_req_hist::bucket_size 1 273system.ruby.outstanding_req_hist::max_bucket 9 274system.ruby.outstanding_req_hist::samples 7659 275system.ruby.outstanding_req_hist::mean 1 276system.ruby.outstanding_req_hist::gmean 1 277system.ruby.outstanding_req_hist | 0 0.00% 0.00% | 7659 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 278system.ruby.outstanding_req_hist::total 7659 279system.ruby.latency_hist::bucket_size 64 280system.ruby.latency_hist::max_bucket 639 281system.ruby.latency_hist::samples 7658 282system.ruby.latency_hist::mean 14.083312 283system.ruby.latency_hist::gmean 5.240199 284system.ruby.latency_hist::stdev 27.247033 285system.ruby.latency_hist | 7337 95.81% 95.81% | 269 3.51% 99.32% | 34 0.44% 99.76% | 10 0.13% 99.90% | 4 0.05% 99.95% | 3 0.04% 99.99% | 0 0.00% 99.99% | 1 0.01% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 286system.ruby.latency_hist::total 7658 287system.ruby.hit_latency_hist::bucket_size 1 288system.ruby.hit_latency_hist::max_bucket 9 289system.ruby.hit_latency_hist::samples 6188 290system.ruby.hit_latency_hist::mean 3 291system.ruby.hit_latency_hist::gmean 3.000000 292system.ruby.hit_latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 6188 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 293system.ruby.hit_latency_hist::total 6188 294system.ruby.miss_latency_hist::bucket_size 64 295system.ruby.miss_latency_hist::max_bucket 639 296system.ruby.miss_latency_hist::samples 1470 297system.ruby.miss_latency_hist::mean 60.738776 298system.ruby.miss_latency_hist::gmean 54.828482 299system.ruby.miss_latency_hist::stdev 34.263958 300system.ruby.miss_latency_hist | 1149 78.16% 78.16% | 269 18.30% 96.46% | 34 2.31% 98.78% | 10 0.68% 99.46% | 4 0.27% 99.73% | 3 0.20% 99.93% | 0 0.00% 99.93% | 1 0.07% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 301system.ruby.miss_latency_hist::total 1470 302system.ruby.Directory.incomplete_times 1469 303system.ruby.memctrl_clk_domain.clock 3 # Clock period in ticks 304system.ruby.l1_cntrl0.cacheMemory.demand_hits 6188 # Number of cache demand hits 305system.ruby.l1_cntrl0.cacheMemory.demand_misses 1470 # Number of cache demand misses 306system.ruby.l1_cntrl0.cacheMemory.demand_accesses 7658 # Number of cache demand accesses | 236system.mem_ctrls.avgWrQLen 25.24 # Average write queue length when enqueuing 237system.mem_ctrls.readRowHits 618 # Number of row buffer hits during reads 238system.mem_ctrls.writeRowHits 892 # Number of row buffer hits during writes 239system.mem_ctrls.readRowHitRate 66.52 # Row buffer hit rate for reads 240system.mem_ctrls.writeRowHitRate 91.49 # Row buffer hit rate for writes 241system.mem_ctrls.avgGap 39.30 # Average gap between requests 242system.mem_ctrls.pageHitRate 79.31 # Row buffer hit rate, read and write combined 243system.mem_ctrls_0.actEnergy 559440 # Energy for activate commands per rank (pJ) 244system.mem_ctrls_0.preEnergy 310800 # Energy for precharge commands per rank (pJ) 245system.mem_ctrls_0.readEnergy 1684800 # Energy for read commands per rank (pJ) 246system.mem_ctrls_0.writeEnergy 1327104 # Energy for write commands per rank (pJ) 247system.mem_ctrls_0.refreshEnergy 7119840 # Energy for refresh commands per rank (pJ) 248system.mem_ctrls_0.actBackEnergy 54116712 # Energy for active background per rank (pJ) 249system.mem_ctrls_0.preBackEnergy 18087600 # Energy for precharge background per rank (pJ) 250system.mem_ctrls_0.totalEnergy 83206296 # Total energy per rank (pJ) 251system.mem_ctrls_0.averagePower 761.516108 # Core power per rank (mW) 252system.mem_ctrls_0.memoryStateTime::IDLE 29701 # Time in different power states 253system.mem_ctrls_0.memoryStateTime::REF 3640 # Time in different power states 254system.mem_ctrls_0.memoryStateTime::PRE_PDN 0 # Time in different power states 255system.mem_ctrls_0.memoryStateTime::ACT 76066 # Time in different power states 256system.mem_ctrls_0.memoryStateTime::ACT_PDN 0 # Time in different power states 257system.mem_ctrls_1.actEnergy 2079000 # Energy for activate commands per rank (pJ) 258system.mem_ctrls_1.preEnergy 1155000 # Energy for precharge commands per rank (pJ) 259system.mem_ctrls_1.readEnergy 9372480 # Energy for read commands per rank (pJ) 260system.mem_ctrls_1.writeEnergy 7993728 # Energy for write commands per rank (pJ) 261system.mem_ctrls_1.refreshEnergy 7119840 # Energy for refresh commands per rank (pJ) 262system.mem_ctrls_1.actBackEnergy 74259144 # Energy for active background per rank (pJ) 263system.mem_ctrls_1.preBackEnergy 418800 # Energy for precharge background per rank (pJ) 264system.mem_ctrls_1.totalEnergy 102397992 # Total energy per rank (pJ) 265system.mem_ctrls_1.averagePower 937.161297 # Core power per rank (mW) 266system.mem_ctrls_1.memoryStateTime::IDLE 278 # Time in different power states 267system.mem_ctrls_1.memoryStateTime::REF 3640 # Time in different power states 268system.mem_ctrls_1.memoryStateTime::PRE_PDN 0 # Time in different power states 269system.mem_ctrls_1.memoryStateTime::ACT 105360 # Time in different power states 270system.mem_ctrls_1.memoryStateTime::ACT_PDN 0 # Time in different power states |
307system.cpu.clk_domain.clock 1 # Clock period in ticks | 271system.cpu.clk_domain.clock 1 # Clock period in ticks |
308system.ruby.network.routers0.percent_links_utilized 6.354538 309system.ruby.network.routers0.msg_count.Control::2 1470 310system.ruby.network.routers0.msg_count.Data::2 1466 311system.ruby.network.routers0.msg_count.Response_Data::4 1470 312system.ruby.network.routers0.msg_count.Writeback_Control::3 1466 313system.ruby.network.routers0.msg_bytes.Control::2 11760 314system.ruby.network.routers0.msg_bytes.Data::2 105552 315system.ruby.network.routers0.msg_bytes.Response_Data::4 105840 316system.ruby.network.routers0.msg_bytes.Writeback_Control::3 11728 317system.ruby.network.routers1.percent_links_utilized 6.354538 318system.ruby.network.routers1.msg_count.Control::2 1470 319system.ruby.network.routers1.msg_count.Data::2 1466 320system.ruby.network.routers1.msg_count.Response_Data::4 1470 321system.ruby.network.routers1.msg_count.Writeback_Control::3 1466 322system.ruby.network.routers1.msg_bytes.Control::2 11760 323system.ruby.network.routers1.msg_bytes.Data::2 105552 324system.ruby.network.routers1.msg_bytes.Response_Data::4 105840 325system.ruby.network.routers1.msg_bytes.Writeback_Control::3 11728 326system.ruby.network.routers2.percent_links_utilized 6.354538 327system.ruby.network.routers2.msg_count.Control::2 1470 328system.ruby.network.routers2.msg_count.Data::2 1466 329system.ruby.network.routers2.msg_count.Response_Data::4 1470 330system.ruby.network.routers2.msg_count.Writeback_Control::3 1466 331system.ruby.network.routers2.msg_bytes.Control::2 11760 332system.ruby.network.routers2.msg_bytes.Data::2 105552 333system.ruby.network.routers2.msg_bytes.Response_Data::4 105840 334system.ruby.network.routers2.msg_bytes.Writeback_Control::3 11728 335system.ruby.network.msg_count.Control 4410 336system.ruby.network.msg_count.Data 4398 337system.ruby.network.msg_count.Response_Data 4410 338system.ruby.network.msg_count.Writeback_Control 4398 339system.ruby.network.msg_byte.Control 35280 340system.ruby.network.msg_byte.Data 316656 341system.ruby.network.msg_byte.Response_Data 317520 342system.ruby.network.msg_byte.Writeback_Control 35184 | |
343system.cpu.dtb.read_hits 0 # DTB read hits 344system.cpu.dtb.read_misses 0 # DTB read misses 345system.cpu.dtb.read_accesses 0 # DTB read accesses 346system.cpu.dtb.write_hits 0 # DTB write hits 347system.cpu.dtb.write_misses 0 # DTB write misses 348system.cpu.dtb.write_accesses 0 # DTB write accesses 349system.cpu.dtb.hits 0 # DTB hits 350system.cpu.dtb.misses 0 # DTB misses 351system.cpu.dtb.accesses 0 # DTB accesses 352system.cpu.itb.read_hits 0 # DTB read hits 353system.cpu.itb.read_misses 0 # DTB read misses 354system.cpu.itb.read_accesses 0 # DTB read accesses 355system.cpu.itb.write_hits 0 # DTB write hits 356system.cpu.itb.write_misses 0 # DTB write misses 357system.cpu.itb.write_accesses 0 # DTB write accesses 358system.cpu.itb.hits 0 # DTB hits 359system.cpu.itb.misses 0 # DTB misses 360system.cpu.itb.accesses 0 # DTB accesses 361system.cpu.workload.num_syscalls 7 # Number of system calls | 272system.cpu.dtb.read_hits 0 # DTB read hits 273system.cpu.dtb.read_misses 0 # DTB read misses 274system.cpu.dtb.read_accesses 0 # DTB read accesses 275system.cpu.dtb.write_hits 0 # DTB write hits 276system.cpu.dtb.write_misses 0 # DTB write misses 277system.cpu.dtb.write_accesses 0 # DTB write accesses 278system.cpu.dtb.hits 0 # DTB hits 279system.cpu.dtb.misses 0 # DTB misses 280system.cpu.dtb.accesses 0 # DTB accesses 281system.cpu.itb.read_hits 0 # DTB read hits 282system.cpu.itb.read_misses 0 # DTB read misses 283system.cpu.itb.read_accesses 0 # DTB read accesses 284system.cpu.itb.write_hits 0 # DTB write hits 285system.cpu.itb.write_misses 0 # DTB write misses 286system.cpu.itb.write_accesses 0 # DTB write accesses 287system.cpu.itb.hits 0 # DTB hits 288system.cpu.itb.misses 0 # DTB misses 289system.cpu.itb.accesses 0 # DTB accesses 290system.cpu.workload.num_syscalls 7 # Number of system calls |
362system.cpu.numCycles 115508 # number of cpu cycles simulated | 291system.cpu.numCycles 115467 # number of cpu cycles simulated |
363system.cpu.numWorkItemsStarted 0 # number of work items this cpu started 364system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed 365system.cpu.committedInsts 5624 # Number of instructions committed 366system.cpu.committedOps 5624 # Number of ops (including micro ops) committed 367system.cpu.num_int_alu_accesses 4944 # Number of integer alu accesses 368system.cpu.num_fp_alu_accesses 2 # Number of float alu accesses 369system.cpu.num_func_calls 190 # number of times a function call or return occured 370system.cpu.num_conditional_control_insts 649 # number of instructions that are conditional controls 371system.cpu.num_int_insts 4944 # number of integer instructions 372system.cpu.num_fp_insts 2 # number of float instructions 373system.cpu.num_int_register_reads 7054 # number of times the integer registers were read 374system.cpu.num_int_register_writes 3281 # number of times the integer registers were written 375system.cpu.num_fp_register_reads 3 # number of times the floating registers were read 376system.cpu.num_fp_register_writes 1 # number of times the floating registers were written 377system.cpu.num_mem_refs 2034 # number of memory refs 378system.cpu.num_load_insts 1132 # Number of load instructions 379system.cpu.num_store_insts 902 # Number of store instructions 380system.cpu.num_idle_cycles 0 # Number of idle cycles | 292system.cpu.numWorkItemsStarted 0 # number of work items this cpu started 293system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed 294system.cpu.committedInsts 5624 # Number of instructions committed 295system.cpu.committedOps 5624 # Number of ops (including micro ops) committed 296system.cpu.num_int_alu_accesses 4944 # Number of integer alu accesses 297system.cpu.num_fp_alu_accesses 2 # Number of float alu accesses 298system.cpu.num_func_calls 190 # number of times a function call or return occured 299system.cpu.num_conditional_control_insts 649 # number of instructions that are conditional controls 300system.cpu.num_int_insts 4944 # number of integer instructions 301system.cpu.num_fp_insts 2 # number of float instructions 302system.cpu.num_int_register_reads 7054 # number of times the integer registers were read 303system.cpu.num_int_register_writes 3281 # number of times the integer registers were written 304system.cpu.num_fp_register_reads 3 # number of times the floating registers were read 305system.cpu.num_fp_register_writes 1 # number of times the floating registers were written 306system.cpu.num_mem_refs 2034 # number of memory refs 307system.cpu.num_load_insts 1132 # Number of load instructions 308system.cpu.num_store_insts 902 # Number of store instructions 309system.cpu.num_idle_cycles 0 # Number of idle cycles |
381system.cpu.num_busy_cycles 115508 # Number of busy cycles | 310system.cpu.num_busy_cycles 115467 # Number of busy cycles |
382system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles 383system.cpu.idle_fraction 0 # Percentage of idle cycles 384system.cpu.Branches 883 # Number of branches fetched 385system.cpu.op_class::No_OpClass 637 11.32% 11.32% # Class of executed instruction 386system.cpu.op_class::IntAlu 2950 52.44% 63.77% # Class of executed instruction 387system.cpu.op_class::IntMult 2 0.04% 63.80% # Class of executed instruction 388system.cpu.op_class::IntDiv 0 0.00% 63.80% # Class of executed instruction 389system.cpu.op_class::FloatAdd 2 0.04% 63.84% # Class of executed instruction --- 22 unchanged lines hidden (view full) --- 412system.cpu.op_class::SimdFloatMult 0 0.00% 63.84% # Class of executed instruction 413system.cpu.op_class::SimdFloatMultAcc 0 0.00% 63.84% # Class of executed instruction 414system.cpu.op_class::SimdFloatSqrt 0 0.00% 63.84% # Class of executed instruction 415system.cpu.op_class::MemRead 1132 20.12% 83.96% # Class of executed instruction 416system.cpu.op_class::MemWrite 902 16.04% 100.00% # Class of executed instruction 417system.cpu.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction 418system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction 419system.cpu.op_class::total 5625 # Class of executed instruction | 311system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles 312system.cpu.idle_fraction 0 # Percentage of idle cycles 313system.cpu.Branches 883 # Number of branches fetched 314system.cpu.op_class::No_OpClass 637 11.32% 11.32% # Class of executed instruction 315system.cpu.op_class::IntAlu 2950 52.44% 63.77% # Class of executed instruction 316system.cpu.op_class::IntMult 2 0.04% 63.80% # Class of executed instruction 317system.cpu.op_class::IntDiv 0 0.00% 63.80% # Class of executed instruction 318system.cpu.op_class::FloatAdd 2 0.04% 63.84% # Class of executed instruction --- 22 unchanged lines hidden (view full) --- 341system.cpu.op_class::SimdFloatMult 0 0.00% 63.84% # Class of executed instruction 342system.cpu.op_class::SimdFloatMultAcc 0 0.00% 63.84% # Class of executed instruction 343system.cpu.op_class::SimdFloatSqrt 0 0.00% 63.84% # Class of executed instruction 344system.cpu.op_class::MemRead 1132 20.12% 83.96% # Class of executed instruction 345system.cpu.op_class::MemWrite 902 16.04% 100.00% # Class of executed instruction 346system.cpu.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction 347system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction 348system.cpu.op_class::total 5625 # Class of executed instruction |
420system.ruby.network.routers0.throttle0.link_utilization 6.361464 | 349system.ruby.clk_domain.clock 1 # Clock period in ticks 350system.ruby.delayHist::bucket_size 1 # delay histogram for all message 351system.ruby.delayHist::max_bucket 9 # delay histogram for all message 352system.ruby.delayHist::samples 2936 # delay histogram for all message 353system.ruby.delayHist | 2936 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for all message 354system.ruby.delayHist::total 2936 # delay histogram for all message 355system.ruby.outstanding_req_hist::bucket_size 1 356system.ruby.outstanding_req_hist::max_bucket 9 357system.ruby.outstanding_req_hist::samples 7659 358system.ruby.outstanding_req_hist::mean 1 359system.ruby.outstanding_req_hist::gmean 1 360system.ruby.outstanding_req_hist | 0 0.00% 0.00% | 7659 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 361system.ruby.outstanding_req_hist::total 7659 362system.ruby.latency_hist::bucket_size 64 363system.ruby.latency_hist::max_bucket 639 364system.ruby.latency_hist::samples 7658 365system.ruby.latency_hist::mean 14.077958 366system.ruby.latency_hist::gmean 5.242569 367system.ruby.latency_hist::stdev 26.858459 368system.ruby.latency_hist | 7322 95.61% 95.61% | 283 3.70% 99.31% | 37 0.48% 99.79% | 6 0.08% 99.87% | 9 0.12% 99.99% | 1 0.01% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 369system.ruby.latency_hist::total 7658 370system.ruby.hit_latency_hist::bucket_size 1 371system.ruby.hit_latency_hist::max_bucket 9 372system.ruby.hit_latency_hist::samples 6188 373system.ruby.hit_latency_hist::mean 3 374system.ruby.hit_latency_hist::gmean 3.000000 375system.ruby.hit_latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 6188 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 376system.ruby.hit_latency_hist::total 6188 377system.ruby.miss_latency_hist::bucket_size 64 378system.ruby.miss_latency_hist::max_bucket 639 379system.ruby.miss_latency_hist::samples 1470 380system.ruby.miss_latency_hist::mean 60.710884 381system.ruby.miss_latency_hist::gmean 54.957755 382system.ruby.miss_latency_hist::stdev 32.665540 383system.ruby.miss_latency_hist | 1134 77.14% 77.14% | 283 19.25% 96.39% | 37 2.52% 98.91% | 6 0.41% 99.32% | 9 0.61% 99.93% | 1 0.07% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 384system.ruby.miss_latency_hist::total 1470 385system.ruby.Directory.incomplete_times 1469 386system.ruby.l1_cntrl0.cacheMemory.demand_hits 6188 # Number of cache demand hits 387system.ruby.l1_cntrl0.cacheMemory.demand_misses 1470 # Number of cache demand misses 388system.ruby.l1_cntrl0.cacheMemory.demand_accesses 7658 # Number of cache demand accesses 389system.ruby.memctrl_clk_domain.clock 3 # Clock period in ticks 390system.ruby.network.routers0.percent_links_utilized 6.356795 391system.ruby.network.routers0.msg_count.Control::2 1470 392system.ruby.network.routers0.msg_count.Data::2 1466 393system.ruby.network.routers0.msg_count.Response_Data::4 1470 394system.ruby.network.routers0.msg_count.Writeback_Control::3 1466 395system.ruby.network.routers0.msg_bytes.Control::2 11760 396system.ruby.network.routers0.msg_bytes.Data::2 105552 397system.ruby.network.routers0.msg_bytes.Response_Data::4 105840 398system.ruby.network.routers0.msg_bytes.Writeback_Control::3 11728 399system.ruby.network.routers1.percent_links_utilized 6.356795 400system.ruby.network.routers1.msg_count.Control::2 1470 401system.ruby.network.routers1.msg_count.Data::2 1466 402system.ruby.network.routers1.msg_count.Response_Data::4 1470 403system.ruby.network.routers1.msg_count.Writeback_Control::3 1466 404system.ruby.network.routers1.msg_bytes.Control::2 11760 405system.ruby.network.routers1.msg_bytes.Data::2 105552 406system.ruby.network.routers1.msg_bytes.Response_Data::4 105840 407system.ruby.network.routers1.msg_bytes.Writeback_Control::3 11728 408system.ruby.network.routers2.percent_links_utilized 6.356795 409system.ruby.network.routers2.msg_count.Control::2 1470 410system.ruby.network.routers2.msg_count.Data::2 1466 411system.ruby.network.routers2.msg_count.Response_Data::4 1470 412system.ruby.network.routers2.msg_count.Writeback_Control::3 1466 413system.ruby.network.routers2.msg_bytes.Control::2 11760 414system.ruby.network.routers2.msg_bytes.Data::2 105552 415system.ruby.network.routers2.msg_bytes.Response_Data::4 105840 416system.ruby.network.routers2.msg_bytes.Writeback_Control::3 11728 417system.ruby.network.msg_count.Control 4410 418system.ruby.network.msg_count.Data 4398 419system.ruby.network.msg_count.Response_Data 4410 420system.ruby.network.msg_count.Writeback_Control 4398 421system.ruby.network.msg_byte.Control 35280 422system.ruby.network.msg_byte.Data 316656 423system.ruby.network.msg_byte.Response_Data 317520 424system.ruby.network.msg_byte.Writeback_Control 35184 425system.ruby.network.routers0.throttle0.link_utilization 6.363723 |
421system.ruby.network.routers0.throttle0.msg_count.Response_Data::4 1470 422system.ruby.network.routers0.throttle0.msg_count.Writeback_Control::3 1466 423system.ruby.network.routers0.throttle0.msg_bytes.Response_Data::4 105840 424system.ruby.network.routers0.throttle0.msg_bytes.Writeback_Control::3 11728 | 426system.ruby.network.routers0.throttle0.msg_count.Response_Data::4 1470 427system.ruby.network.routers0.throttle0.msg_count.Writeback_Control::3 1466 428system.ruby.network.routers0.throttle0.msg_bytes.Response_Data::4 105840 429system.ruby.network.routers0.throttle0.msg_bytes.Writeback_Control::3 11728 |
425system.ruby.network.routers0.throttle1.link_utilization 6.347612 | 430system.ruby.network.routers0.throttle1.link_utilization 6.349866 |
426system.ruby.network.routers0.throttle1.msg_count.Control::2 1470 427system.ruby.network.routers0.throttle1.msg_count.Data::2 1466 428system.ruby.network.routers0.throttle1.msg_bytes.Control::2 11760 429system.ruby.network.routers0.throttle1.msg_bytes.Data::2 105552 | 431system.ruby.network.routers0.throttle1.msg_count.Control::2 1470 432system.ruby.network.routers0.throttle1.msg_count.Data::2 1466 433system.ruby.network.routers0.throttle1.msg_bytes.Control::2 11760 434system.ruby.network.routers0.throttle1.msg_bytes.Data::2 105552 |
430system.ruby.network.routers1.throttle0.link_utilization 6.347612 | 435system.ruby.network.routers1.throttle0.link_utilization 6.349866 |
431system.ruby.network.routers1.throttle0.msg_count.Control::2 1470 432system.ruby.network.routers1.throttle0.msg_count.Data::2 1466 433system.ruby.network.routers1.throttle0.msg_bytes.Control::2 11760 434system.ruby.network.routers1.throttle0.msg_bytes.Data::2 105552 | 436system.ruby.network.routers1.throttle0.msg_count.Control::2 1470 437system.ruby.network.routers1.throttle0.msg_count.Data::2 1466 438system.ruby.network.routers1.throttle0.msg_bytes.Control::2 11760 439system.ruby.network.routers1.throttle0.msg_bytes.Data::2 105552 |
435system.ruby.network.routers1.throttle1.link_utilization 6.361464 | 440system.ruby.network.routers1.throttle1.link_utilization 6.363723 |
436system.ruby.network.routers1.throttle1.msg_count.Response_Data::4 1470 437system.ruby.network.routers1.throttle1.msg_count.Writeback_Control::3 1466 438system.ruby.network.routers1.throttle1.msg_bytes.Response_Data::4 105840 439system.ruby.network.routers1.throttle1.msg_bytes.Writeback_Control::3 11728 | 441system.ruby.network.routers1.throttle1.msg_count.Response_Data::4 1470 442system.ruby.network.routers1.throttle1.msg_count.Writeback_Control::3 1466 443system.ruby.network.routers1.throttle1.msg_bytes.Response_Data::4 105840 444system.ruby.network.routers1.throttle1.msg_bytes.Writeback_Control::3 11728 |
440system.ruby.network.routers2.throttle0.link_utilization 6.361464 | 445system.ruby.network.routers2.throttle0.link_utilization 6.363723 |
441system.ruby.network.routers2.throttle0.msg_count.Response_Data::4 1470 442system.ruby.network.routers2.throttle0.msg_count.Writeback_Control::3 1466 443system.ruby.network.routers2.throttle0.msg_bytes.Response_Data::4 105840 444system.ruby.network.routers2.throttle0.msg_bytes.Writeback_Control::3 11728 | 446system.ruby.network.routers2.throttle0.msg_count.Response_Data::4 1470 447system.ruby.network.routers2.throttle0.msg_count.Writeback_Control::3 1466 448system.ruby.network.routers2.throttle0.msg_bytes.Response_Data::4 105840 449system.ruby.network.routers2.throttle0.msg_bytes.Writeback_Control::3 11728 |
445system.ruby.network.routers2.throttle1.link_utilization 6.347612 | 450system.ruby.network.routers2.throttle1.link_utilization 6.349866 |
446system.ruby.network.routers2.throttle1.msg_count.Control::2 1470 447system.ruby.network.routers2.throttle1.msg_count.Data::2 1466 448system.ruby.network.routers2.throttle1.msg_bytes.Control::2 11760 449system.ruby.network.routers2.throttle1.msg_bytes.Data::2 105552 450system.ruby.delayVCHist.vnet_1::bucket_size 1 # delay histogram for vnet_1 451system.ruby.delayVCHist.vnet_1::max_bucket 9 # delay histogram for vnet_1 452system.ruby.delayVCHist.vnet_1::samples 1470 # delay histogram for vnet_1 453system.ruby.delayVCHist.vnet_1 | 1470 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for vnet_1 454system.ruby.delayVCHist.vnet_1::total 1470 # delay histogram for vnet_1 455system.ruby.delayVCHist.vnet_2::bucket_size 1 # delay histogram for vnet_2 456system.ruby.delayVCHist.vnet_2::max_bucket 9 # delay histogram for vnet_2 457system.ruby.delayVCHist.vnet_2::samples 1466 # delay histogram for vnet_2 458system.ruby.delayVCHist.vnet_2 | 1466 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for vnet_2 459system.ruby.delayVCHist.vnet_2::total 1466 # delay histogram for vnet_2 | 451system.ruby.network.routers2.throttle1.msg_count.Control::2 1470 452system.ruby.network.routers2.throttle1.msg_count.Data::2 1466 453system.ruby.network.routers2.throttle1.msg_bytes.Control::2 11760 454system.ruby.network.routers2.throttle1.msg_bytes.Data::2 105552 455system.ruby.delayVCHist.vnet_1::bucket_size 1 # delay histogram for vnet_1 456system.ruby.delayVCHist.vnet_1::max_bucket 9 # delay histogram for vnet_1 457system.ruby.delayVCHist.vnet_1::samples 1470 # delay histogram for vnet_1 458system.ruby.delayVCHist.vnet_1 | 1470 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for vnet_1 459system.ruby.delayVCHist.vnet_1::total 1470 # delay histogram for vnet_1 460system.ruby.delayVCHist.vnet_2::bucket_size 1 # delay histogram for vnet_2 461system.ruby.delayVCHist.vnet_2::max_bucket 9 # delay histogram for vnet_2 462system.ruby.delayVCHist.vnet_2::samples 1466 # delay histogram for vnet_2 463system.ruby.delayVCHist.vnet_2 | 1466 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for vnet_2 464system.ruby.delayVCHist.vnet_2::total 1466 # delay histogram for vnet_2 |
460system.ruby.LD.latency_hist::bucket_size 64 461system.ruby.LD.latency_hist::max_bucket 639 | 465system.ruby.LD.latency_hist::bucket_size 32 466system.ruby.LD.latency_hist::max_bucket 319 |
462system.ruby.LD.latency_hist::samples 1132 | 467system.ruby.LD.latency_hist::samples 1132 |
463system.ruby.LD.latency_hist::mean 35.522968 464system.ruby.LD.latency_hist::gmean 16.130611 465system.ruby.LD.latency_hist::stdev 37.257775 466system.ruby.LD.latency_hist | 989 87.37% 87.37% | 116 10.25% 97.61% | 20 1.77% 99.38% | 4 0.35% 99.73% | 2 0.18% 99.91% | 1 0.09% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 468system.ruby.LD.latency_hist::mean 35.492049 469system.ruby.LD.latency_hist::gmean 16.147834 470system.ruby.LD.latency_hist::stdev 37.303839 471system.ruby.LD.latency_hist | 465 41.08% 41.08% | 518 45.76% 86.84% | 124 10.95% 97.79% | 3 0.27% 98.06% | 3 0.27% 98.32% | 12 1.06% 99.38% | 2 0.18% 99.56% | 0 0.00% 99.56% | 3 0.27% 99.82% | 2 0.18% 100.00% |
467system.ruby.LD.latency_hist::total 1132 468system.ruby.LD.hit_latency_hist::bucket_size 1 469system.ruby.LD.hit_latency_hist::max_bucket 9 470system.ruby.LD.hit_latency_hist::samples 465 471system.ruby.LD.hit_latency_hist::mean 3 472system.ruby.LD.hit_latency_hist::gmean 3.000000 473system.ruby.LD.hit_latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 465 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 474system.ruby.LD.hit_latency_hist::total 465 | 472system.ruby.LD.latency_hist::total 1132 473system.ruby.LD.hit_latency_hist::bucket_size 1 474system.ruby.LD.hit_latency_hist::max_bucket 9 475system.ruby.LD.hit_latency_hist::samples 465 476system.ruby.LD.hit_latency_hist::mean 3 477system.ruby.LD.hit_latency_hist::gmean 3.000000 478system.ruby.LD.hit_latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 465 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 479system.ruby.LD.hit_latency_hist::total 465 |
475system.ruby.LD.miss_latency_hist::bucket_size 64 476system.ruby.LD.miss_latency_hist::max_bucket 639 | 480system.ruby.LD.miss_latency_hist::bucket_size 32 481system.ruby.LD.miss_latency_hist::max_bucket 319 |
477system.ruby.LD.miss_latency_hist::samples 667 | 482system.ruby.LD.miss_latency_hist::samples 667 |
478system.ruby.LD.miss_latency_hist::mean 58.196402 479system.ruby.LD.miss_latency_hist::gmean 52.112336 480system.ruby.LD.miss_latency_hist::stdev 33.226027 481system.ruby.LD.miss_latency_hist | 524 78.56% 78.56% | 116 17.39% 95.95% | 20 3.00% 98.95% | 4 0.60% 99.55% | 2 0.30% 99.85% | 1 0.15% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 483system.ruby.LD.miss_latency_hist::mean 58.143928 484system.ruby.LD.miss_latency_hist::gmean 52.206801 485system.ruby.LD.miss_latency_hist::stdev 33.349415 486system.ruby.LD.miss_latency_hist | 0 0.00% 0.00% | 518 77.66% 77.66% | 124 18.59% 96.25% | 3 0.45% 96.70% | 3 0.45% 97.15% | 12 1.80% 98.95% | 2 0.30% 99.25% | 0 0.00% 99.25% | 3 0.45% 99.70% | 2 0.30% 100.00% |
482system.ruby.LD.miss_latency_hist::total 667 | 487system.ruby.LD.miss_latency_hist::total 667 |
483system.ruby.ST.latency_hist::bucket_size 64 484system.ruby.ST.latency_hist::max_bucket 639 | 488system.ruby.ST.latency_hist::bucket_size 32 489system.ruby.ST.latency_hist::max_bucket 319 |
485system.ruby.ST.latency_hist::samples 901 | 490system.ruby.ST.latency_hist::samples 901 |
486system.ruby.ST.latency_hist::mean 15.558269 487system.ruby.ST.latency_hist::gmean 5.883337 488system.ruby.ST.latency_hist::stdev 27.738104 489system.ruby.ST.latency_hist | 860 95.45% 95.45% | 33 3.66% 99.11% | 6 0.67% 99.78% | 1 0.11% 99.89% | 0 0.00% 99.89% | 1 0.11% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 491system.ruby.ST.latency_hist::mean 14.748058 492system.ruby.ST.latency_hist::gmean 5.824702 493system.ruby.ST.latency_hist::stdev 24.783906 494system.ruby.ST.latency_hist | 684 75.92% 75.92% | 183 20.31% 96.23% | 29 3.22% 99.45% | 0 0.00% 99.45% | 2 0.22% 99.67% | 2 0.22% 99.89% | 0 0.00% 99.89% | 0 0.00% 99.89% | 1 0.11% 100.00% | 0 0.00% 100.00% |
490system.ruby.ST.latency_hist::total 901 491system.ruby.ST.hit_latency_hist::bucket_size 1 492system.ruby.ST.hit_latency_hist::max_bucket 9 493system.ruby.ST.hit_latency_hist::samples 684 494system.ruby.ST.hit_latency_hist::mean 3 495system.ruby.ST.hit_latency_hist::gmean 3.000000 496system.ruby.ST.hit_latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 684 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 497system.ruby.ST.hit_latency_hist::total 684 | 495system.ruby.ST.latency_hist::total 901 496system.ruby.ST.hit_latency_hist::bucket_size 1 497system.ruby.ST.hit_latency_hist::max_bucket 9 498system.ruby.ST.hit_latency_hist::samples 684 499system.ruby.ST.hit_latency_hist::mean 3 500system.ruby.ST.hit_latency_hist::gmean 3.000000 501system.ruby.ST.hit_latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 684 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 502system.ruby.ST.hit_latency_hist::total 684 |
498system.ruby.ST.miss_latency_hist::bucket_size 64 499system.ruby.ST.miss_latency_hist::max_bucket 639 | 503system.ruby.ST.miss_latency_hist::bucket_size 32 504system.ruby.ST.miss_latency_hist::max_bucket 319 |
500system.ruby.ST.miss_latency_hist::samples 217 | 505system.ruby.ST.miss_latency_hist::samples 217 |
501system.ruby.ST.miss_latency_hist::mean 55.142857 502system.ruby.ST.miss_latency_hist::gmean 49.160125 503system.ruby.ST.miss_latency_hist::stdev 33.648687 504system.ruby.ST.miss_latency_hist | 176 81.11% 81.11% | 33 15.21% 96.31% | 6 2.76% 99.08% | 1 0.46% 99.54% | 0 0.00% 99.54% | 1 0.46% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 506system.ruby.ST.miss_latency_hist::mean 51.778802 507system.ruby.ST.miss_latency_hist::gmean 47.157588 508system.ruby.ST.miss_latency_hist::stdev 27.288529 509system.ruby.ST.miss_latency_hist | 0 0.00% 0.00% | 183 84.33% 84.33% | 29 13.36% 97.70% | 0 0.00% 97.70% | 2 0.92% 98.62% | 2 0.92% 99.54% | 0 0.00% 99.54% | 0 0.00% 99.54% | 1 0.46% 100.00% | 0 0.00% 100.00% |
505system.ruby.ST.miss_latency_hist::total 217 506system.ruby.IFETCH.latency_hist::bucket_size 64 507system.ruby.IFETCH.latency_hist::max_bucket 639 508system.ruby.IFETCH.latency_hist::samples 5625 | 510system.ruby.ST.miss_latency_hist::total 217 511system.ruby.IFETCH.latency_hist::bucket_size 64 512system.ruby.IFETCH.latency_hist::max_bucket 639 513system.ruby.IFETCH.latency_hist::samples 5625 |
509system.ruby.IFETCH.latency_hist::mean 9.532444 510system.ruby.IFETCH.latency_hist::gmean 4.102291 511system.ruby.IFETCH.latency_hist::stdev 22.246367 512system.ruby.IFETCH.latency_hist | 5488 97.56% 97.56% | 120 2.13% 99.70% | 8 0.14% 99.84% | 5 0.09% 99.93% | 2 0.04% 99.96% | 1 0.02% 99.98% | 0 0.00% 99.98% | 1 0.02% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 514system.ruby.IFETCH.latency_hist::mean 9.661156 515system.ruby.IFETCH.latency_hist::gmean 4.110524 516system.ruby.IFETCH.latency_hist::stdev 22.183687 517system.ruby.IFETCH.latency_hist | 5472 97.28% 97.28% | 127 2.26% 99.54% | 18 0.32% 99.86% | 4 0.07% 99.93% | 3 0.05% 99.98% | 1 0.02% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% |
513system.ruby.IFETCH.latency_hist::total 5625 514system.ruby.IFETCH.hit_latency_hist::bucket_size 1 515system.ruby.IFETCH.hit_latency_hist::max_bucket 9 516system.ruby.IFETCH.hit_latency_hist::samples 5039 517system.ruby.IFETCH.hit_latency_hist::mean 3 518system.ruby.IFETCH.hit_latency_hist::gmean 3.000000 519system.ruby.IFETCH.hit_latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 5039 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 520system.ruby.IFETCH.hit_latency_hist::total 5039 521system.ruby.IFETCH.miss_latency_hist::bucket_size 64 522system.ruby.IFETCH.miss_latency_hist::max_bucket 639 523system.ruby.IFETCH.miss_latency_hist::samples 586 | 518system.ruby.IFETCH.latency_hist::total 5625 519system.ruby.IFETCH.hit_latency_hist::bucket_size 1 520system.ruby.IFETCH.hit_latency_hist::max_bucket 9 521system.ruby.IFETCH.hit_latency_hist::samples 5039 522system.ruby.IFETCH.hit_latency_hist::mean 3 523system.ruby.IFETCH.hit_latency_hist::gmean 3.000000 524system.ruby.IFETCH.hit_latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 5039 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 525system.ruby.IFETCH.hit_latency_hist::total 5039 526system.ruby.IFETCH.miss_latency_hist::bucket_size 64 527system.ruby.IFETCH.miss_latency_hist::max_bucket 639 528system.ruby.IFETCH.miss_latency_hist::samples 586 |
524system.ruby.IFETCH.miss_latency_hist::mean 65.704778 525system.ruby.IFETCH.miss_latency_hist::gmean 60.488386 526system.ruby.IFETCH.miss_latency_hist::stdev 35.064530 527system.ruby.IFETCH.miss_latency_hist | 449 76.62% 76.62% | 120 20.48% 97.10% | 8 1.37% 98.46% | 5 0.85% 99.32% | 2 0.34% 99.66% | 1 0.17% 99.83% | 0 0.00% 99.83% | 1 0.17% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 529system.ruby.IFETCH.miss_latency_hist::mean 66.940273 530system.ruby.IFETCH.miss_latency_hist::gmean 61.663848 531system.ruby.IFETCH.miss_latency_hist::stdev 32.593558 532system.ruby.IFETCH.miss_latency_hist | 433 73.89% 73.89% | 127 21.67% 95.56% | 18 3.07% 98.63% | 4 0.68% 99.32% | 3 0.51% 99.83% | 1 0.17% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% |
528system.ruby.IFETCH.miss_latency_hist::total 586 529system.ruby.Directory.miss_mach_latency_hist::bucket_size 64 530system.ruby.Directory.miss_mach_latency_hist::max_bucket 639 531system.ruby.Directory.miss_mach_latency_hist::samples 1470 | 533system.ruby.IFETCH.miss_latency_hist::total 586 534system.ruby.Directory.miss_mach_latency_hist::bucket_size 64 535system.ruby.Directory.miss_mach_latency_hist::max_bucket 639 536system.ruby.Directory.miss_mach_latency_hist::samples 1470 |
532system.ruby.Directory.miss_mach_latency_hist::mean 60.738776 533system.ruby.Directory.miss_mach_latency_hist::gmean 54.828482 534system.ruby.Directory.miss_mach_latency_hist::stdev 34.263958 535system.ruby.Directory.miss_mach_latency_hist | 1149 78.16% 78.16% | 269 18.30% 96.46% | 34 2.31% 98.78% | 10 0.68% 99.46% | 4 0.27% 99.73% | 3 0.20% 99.93% | 0 0.00% 99.93% | 1 0.07% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 537system.ruby.Directory.miss_mach_latency_hist::mean 60.710884 538system.ruby.Directory.miss_mach_latency_hist::gmean 54.957755 539system.ruby.Directory.miss_mach_latency_hist::stdev 32.665540 540system.ruby.Directory.miss_mach_latency_hist | 1134 77.14% 77.14% | 283 19.25% 96.39% | 37 2.52% 98.91% | 6 0.41% 99.32% | 9 0.61% 99.93% | 1 0.07% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% |
536system.ruby.Directory.miss_mach_latency_hist::total 1470 537system.ruby.Directory.miss_latency_hist.issue_to_initial_request::bucket_size 1 538system.ruby.Directory.miss_latency_hist.issue_to_initial_request::max_bucket 9 539system.ruby.Directory.miss_latency_hist.issue_to_initial_request::samples 1 540system.ruby.Directory.miss_latency_hist.issue_to_initial_request::stdev nan 541system.ruby.Directory.miss_latency_hist.issue_to_initial_request | 1 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 542system.ruby.Directory.miss_latency_hist.issue_to_initial_request::total 1 543system.ruby.Directory.miss_latency_hist.initial_to_forward::bucket_size 1 --- 11 unchanged lines hidden (view full) --- 555system.ruby.Directory.miss_latency_hist.first_response_to_completion::bucket_size 8 556system.ruby.Directory.miss_latency_hist.first_response_to_completion::max_bucket 79 557system.ruby.Directory.miss_latency_hist.first_response_to_completion::samples 1 558system.ruby.Directory.miss_latency_hist.first_response_to_completion::mean 75 559system.ruby.Directory.miss_latency_hist.first_response_to_completion::gmean 75.000000 560system.ruby.Directory.miss_latency_hist.first_response_to_completion::stdev nan 561system.ruby.Directory.miss_latency_hist.first_response_to_completion | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1 100.00% 100.00% 562system.ruby.Directory.miss_latency_hist.first_response_to_completion::total 1 | 541system.ruby.Directory.miss_mach_latency_hist::total 1470 542system.ruby.Directory.miss_latency_hist.issue_to_initial_request::bucket_size 1 543system.ruby.Directory.miss_latency_hist.issue_to_initial_request::max_bucket 9 544system.ruby.Directory.miss_latency_hist.issue_to_initial_request::samples 1 545system.ruby.Directory.miss_latency_hist.issue_to_initial_request::stdev nan 546system.ruby.Directory.miss_latency_hist.issue_to_initial_request | 1 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% 547system.ruby.Directory.miss_latency_hist.issue_to_initial_request::total 1 548system.ruby.Directory.miss_latency_hist.initial_to_forward::bucket_size 1 --- 11 unchanged lines hidden (view full) --- 560system.ruby.Directory.miss_latency_hist.first_response_to_completion::bucket_size 8 561system.ruby.Directory.miss_latency_hist.first_response_to_completion::max_bucket 79 562system.ruby.Directory.miss_latency_hist.first_response_to_completion::samples 1 563system.ruby.Directory.miss_latency_hist.first_response_to_completion::mean 75 564system.ruby.Directory.miss_latency_hist.first_response_to_completion::gmean 75.000000 565system.ruby.Directory.miss_latency_hist.first_response_to_completion::stdev nan 566system.ruby.Directory.miss_latency_hist.first_response_to_completion | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1 100.00% 100.00% 567system.ruby.Directory.miss_latency_hist.first_response_to_completion::total 1 |
563system.ruby.LD.Directory.miss_type_mach_latency_hist::bucket_size 64 564system.ruby.LD.Directory.miss_type_mach_latency_hist::max_bucket 639 | 568system.ruby.LD.Directory.miss_type_mach_latency_hist::bucket_size 32 569system.ruby.LD.Directory.miss_type_mach_latency_hist::max_bucket 319 |
565system.ruby.LD.Directory.miss_type_mach_latency_hist::samples 667 | 570system.ruby.LD.Directory.miss_type_mach_latency_hist::samples 667 |
566system.ruby.LD.Directory.miss_type_mach_latency_hist::mean 58.196402 567system.ruby.LD.Directory.miss_type_mach_latency_hist::gmean 52.112336 568system.ruby.LD.Directory.miss_type_mach_latency_hist::stdev 33.226027 569system.ruby.LD.Directory.miss_type_mach_latency_hist | 524 78.56% 78.56% | 116 17.39% 95.95% | 20 3.00% 98.95% | 4 0.60% 99.55% | 2 0.30% 99.85% | 1 0.15% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 571system.ruby.LD.Directory.miss_type_mach_latency_hist::mean 58.143928 572system.ruby.LD.Directory.miss_type_mach_latency_hist::gmean 52.206801 573system.ruby.LD.Directory.miss_type_mach_latency_hist::stdev 33.349415 574system.ruby.LD.Directory.miss_type_mach_latency_hist | 0 0.00% 0.00% | 518 77.66% 77.66% | 124 18.59% 96.25% | 3 0.45% 96.70% | 3 0.45% 97.15% | 12 1.80% 98.95% | 2 0.30% 99.25% | 0 0.00% 99.25% | 3 0.45% 99.70% | 2 0.30% 100.00% |
570system.ruby.LD.Directory.miss_type_mach_latency_hist::total 667 | 575system.ruby.LD.Directory.miss_type_mach_latency_hist::total 667 |
571system.ruby.ST.Directory.miss_type_mach_latency_hist::bucket_size 64 572system.ruby.ST.Directory.miss_type_mach_latency_hist::max_bucket 639 | 576system.ruby.ST.Directory.miss_type_mach_latency_hist::bucket_size 32 577system.ruby.ST.Directory.miss_type_mach_latency_hist::max_bucket 319 |
573system.ruby.ST.Directory.miss_type_mach_latency_hist::samples 217 | 578system.ruby.ST.Directory.miss_type_mach_latency_hist::samples 217 |
574system.ruby.ST.Directory.miss_type_mach_latency_hist::mean 55.142857 575system.ruby.ST.Directory.miss_type_mach_latency_hist::gmean 49.160125 576system.ruby.ST.Directory.miss_type_mach_latency_hist::stdev 33.648687 577system.ruby.ST.Directory.miss_type_mach_latency_hist | 176 81.11% 81.11% | 33 15.21% 96.31% | 6 2.76% 99.08% | 1 0.46% 99.54% | 0 0.00% 99.54% | 1 0.46% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 579system.ruby.ST.Directory.miss_type_mach_latency_hist::mean 51.778802 580system.ruby.ST.Directory.miss_type_mach_latency_hist::gmean 47.157588 581system.ruby.ST.Directory.miss_type_mach_latency_hist::stdev 27.288529 582system.ruby.ST.Directory.miss_type_mach_latency_hist | 0 0.00% 0.00% | 183 84.33% 84.33% | 29 13.36% 97.70% | 0 0.00% 97.70% | 2 0.92% 98.62% | 2 0.92% 99.54% | 0 0.00% 99.54% | 0 0.00% 99.54% | 1 0.46% 100.00% | 0 0.00% 100.00% |
578system.ruby.ST.Directory.miss_type_mach_latency_hist::total 217 579system.ruby.IFETCH.Directory.miss_type_mach_latency_hist::bucket_size 64 580system.ruby.IFETCH.Directory.miss_type_mach_latency_hist::max_bucket 639 581system.ruby.IFETCH.Directory.miss_type_mach_latency_hist::samples 586 | 583system.ruby.ST.Directory.miss_type_mach_latency_hist::total 217 584system.ruby.IFETCH.Directory.miss_type_mach_latency_hist::bucket_size 64 585system.ruby.IFETCH.Directory.miss_type_mach_latency_hist::max_bucket 639 586system.ruby.IFETCH.Directory.miss_type_mach_latency_hist::samples 586 |
582system.ruby.IFETCH.Directory.miss_type_mach_latency_hist::mean 65.704778 583system.ruby.IFETCH.Directory.miss_type_mach_latency_hist::gmean 60.488386 584system.ruby.IFETCH.Directory.miss_type_mach_latency_hist::stdev 35.064530 585system.ruby.IFETCH.Directory.miss_type_mach_latency_hist | 449 76.62% 76.62% | 120 20.48% 97.10% | 8 1.37% 98.46% | 5 0.85% 99.32% | 2 0.34% 99.66% | 1 0.17% 99.83% | 0 0.00% 99.83% | 1 0.17% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 587system.ruby.IFETCH.Directory.miss_type_mach_latency_hist::mean 66.940273 588system.ruby.IFETCH.Directory.miss_type_mach_latency_hist::gmean 61.663848 589system.ruby.IFETCH.Directory.miss_type_mach_latency_hist::stdev 32.593558 590system.ruby.IFETCH.Directory.miss_type_mach_latency_hist | 433 73.89% 73.89% | 127 21.67% 95.56% | 18 3.07% 98.63% | 4 0.68% 99.32% | 3 0.51% 99.83% | 1 0.17% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% |
586system.ruby.IFETCH.Directory.miss_type_mach_latency_hist::total 586 | 591system.ruby.IFETCH.Directory.miss_type_mach_latency_hist::total 586 |
592system.ruby.Directory_Controller.GETX 1470 0.00% 0.00% 593system.ruby.Directory_Controller.PUTX 1466 0.00% 0.00% 594system.ruby.Directory_Controller.Memory_Data 1470 0.00% 0.00% 595system.ruby.Directory_Controller.Memory_Ack 1466 0.00% 0.00% 596system.ruby.Directory_Controller.I.GETX 1470 0.00% 0.00% 597system.ruby.Directory_Controller.M.PUTX 1466 0.00% 0.00% 598system.ruby.Directory_Controller.IM.Memory_Data 1470 0.00% 0.00% 599system.ruby.Directory_Controller.MI.Memory_Ack 1466 0.00% 0.00% |
|
587system.ruby.L1Cache_Controller.Load 1132 0.00% 0.00% 588system.ruby.L1Cache_Controller.Ifetch 5625 0.00% 0.00% 589system.ruby.L1Cache_Controller.Store 901 0.00% 0.00% 590system.ruby.L1Cache_Controller.Data 1470 0.00% 0.00% 591system.ruby.L1Cache_Controller.Replacement 1466 0.00% 0.00% 592system.ruby.L1Cache_Controller.Writeback_Ack 1466 0.00% 0.00% 593system.ruby.L1Cache_Controller.I.Load 667 0.00% 0.00% 594system.ruby.L1Cache_Controller.I.Ifetch 586 0.00% 0.00% 595system.ruby.L1Cache_Controller.I.Store 217 0.00% 0.00% 596system.ruby.L1Cache_Controller.M.Load 465 0.00% 0.00% 597system.ruby.L1Cache_Controller.M.Ifetch 5039 0.00% 0.00% 598system.ruby.L1Cache_Controller.M.Store 684 0.00% 0.00% 599system.ruby.L1Cache_Controller.M.Replacement 1466 0.00% 0.00% 600system.ruby.L1Cache_Controller.MI.Writeback_Ack 1466 0.00% 0.00% 601system.ruby.L1Cache_Controller.IS.Data 1253 0.00% 0.00% 602system.ruby.L1Cache_Controller.IM.Data 217 0.00% 0.00% | 600system.ruby.L1Cache_Controller.Load 1132 0.00% 0.00% 601system.ruby.L1Cache_Controller.Ifetch 5625 0.00% 0.00% 602system.ruby.L1Cache_Controller.Store 901 0.00% 0.00% 603system.ruby.L1Cache_Controller.Data 1470 0.00% 0.00% 604system.ruby.L1Cache_Controller.Replacement 1466 0.00% 0.00% 605system.ruby.L1Cache_Controller.Writeback_Ack 1466 0.00% 0.00% 606system.ruby.L1Cache_Controller.I.Load 667 0.00% 0.00% 607system.ruby.L1Cache_Controller.I.Ifetch 586 0.00% 0.00% 608system.ruby.L1Cache_Controller.I.Store 217 0.00% 0.00% 609system.ruby.L1Cache_Controller.M.Load 465 0.00% 0.00% 610system.ruby.L1Cache_Controller.M.Ifetch 5039 0.00% 0.00% 611system.ruby.L1Cache_Controller.M.Store 684 0.00% 0.00% 612system.ruby.L1Cache_Controller.M.Replacement 1466 0.00% 0.00% 613system.ruby.L1Cache_Controller.MI.Writeback_Ack 1466 0.00% 0.00% 614system.ruby.L1Cache_Controller.IS.Data 1253 0.00% 0.00% 615system.ruby.L1Cache_Controller.IM.Data 217 0.00% 0.00% |
603system.ruby.Directory_Controller.GETX 1470 0.00% 0.00% 604system.ruby.Directory_Controller.PUTX 1466 0.00% 0.00% 605system.ruby.Directory_Controller.Memory_Data 1470 0.00% 0.00% 606system.ruby.Directory_Controller.Memory_Ack 1466 0.00% 0.00% 607system.ruby.Directory_Controller.I.GETX 1470 0.00% 0.00% 608system.ruby.Directory_Controller.M.PUTX 1466 0.00% 0.00% 609system.ruby.Directory_Controller.IM.Memory_Data 1470 0.00% 0.00% 610system.ruby.Directory_Controller.MI.Memory_Ack 1466 0.00% 0.00% | |
611 612---------- End Simulation Statistics ---------- | 616 617---------- End Simulation Statistics ---------- |