19d18
< physmem=system.physmem
29c28
< system_port=system.membus.port[0]
---
> system_port=system.membus.slave[0]
41a41
> fastmem=false
60,61c60,61
< dcache_port=system.membus.port[3]
< icache_port=system.membus.port[2]
---
> dcache_port=system.membus.slave[2]
> icache_port=system.membus.slave[1]
104c104,105
< port=system.system_port system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
---
> master=system.physmem.port[0]
> slave=system.system_port system.cpu.icache_port system.cpu.dcache_port
107c108,109
< type=PhysicalMemory
---
> type=SimpleMemory
> conf_table_reported=false
108a111
> in_addr_map=true
114c117
< port=system.membus.port[1]
---
> port=system.membus.master[0]