| config.ini (9348:44d31345e360) | config.ini (9449:56610ab73040) |
|---|---|
| 1[root] 2type=Root 3children=system 4full_system=false 5time_sync_enable=false 6time_sync_period=100000000000 7time_sync_spin_threshold=100000000 8 9[system] 10type=System 11children=cpu membus physmem 12boot_osflags=a 13clock=1000 14init_param=0 15kernel= 16load_addr_mask=1099511627775 | 1[root] 2type=Root 3children=system 4full_system=false 5time_sync_enable=false 6time_sync_period=100000000000 7time_sync_spin_threshold=100000000 8 9[system] 10type=System 11children=cpu membus physmem 12boot_osflags=a 13clock=1000 14init_param=0 15kernel= 16load_addr_mask=1099511627775 |
| 17mem_mode=atomic | 17mem_mode=timing 18mem_ranges= |
| 18memories=system.physmem 19num_work_ids=16 20readfile= 21symbolfile= 22work_begin_ckpt_count=0 23work_begin_cpu_id_exit=-1 24work_begin_exit_count=0 25work_cpus_ckpt_count=0 --- 25 unchanged lines hidden (view full) --- 51commitToFetchDelay=1 52commitToIEWDelay=1 53commitToRenameDelay=1 54commitWidth=8 55cpu_id=0 56decodeToFetchDelay=1 57decodeToRenameDelay=1 58decodeWidth=8 | 19memories=system.physmem 20num_work_ids=16 21readfile= 22symbolfile= 23work_begin_ckpt_count=0 24work_begin_cpu_id_exit=-1 25work_begin_exit_count=0 26work_cpus_ckpt_count=0 --- 25 unchanged lines hidden (view full) --- 52commitToFetchDelay=1 53commitToIEWDelay=1 54commitToRenameDelay=1 55commitWidth=8 56cpu_id=0 57decodeToFetchDelay=1 58decodeToRenameDelay=1 59decodeWidth=8 |
| 59defer_registration=false | |
| 60dispatchWidth=8 61do_checkpoint_insts=true 62do_quiesce=true 63do_statistics_insts=true 64dtb=system.cpu.dtb 65fetchToDecodeDelay=1 66fetchTrapLatency=1 67fetchWidth=8 --- 43 unchanged lines hidden (view full) --- 111smtIQThreshold=100 112smtLSQPolicy=Partitioned 113smtLSQThreshold=100 114smtNumFetchingThreads=1 115smtROBPolicy=Partitioned 116smtROBThreshold=100 117squashWidth=8 118store_set_clear_period=250000 | 60dispatchWidth=8 61do_checkpoint_insts=true 62do_quiesce=true 63do_statistics_insts=true 64dtb=system.cpu.dtb 65fetchToDecodeDelay=1 66fetchTrapLatency=1 67fetchWidth=8 --- 43 unchanged lines hidden (view full) --- 111smtIQThreshold=100 112smtLSQPolicy=Partitioned 113smtLSQThreshold=100 114smtNumFetchingThreads=1 115smtROBPolicy=Partitioned 116smtROBThreshold=100 117squashWidth=8 118store_set_clear_period=250000 |
| 119switched_out=false |
|
| 119system=system 120tracer=system.cpu.tracer 121trapLatency=13 122wbDepth=1 123wbWidth=8 124workload=system.cpu.workload 125dcache_port=system.cpu.dcache.cpu_side 126icache_port=system.cpu.icache.cpu_side 127 128[system.cpu.dcache] 129type=BaseCache 130addr_ranges=0:18446744073709551615 131assoc=2 132block_size=64 133clock=500 134forward_snoops=true | 120system=system 121tracer=system.cpu.tracer 122trapLatency=13 123wbDepth=1 124wbWidth=8 125workload=system.cpu.workload 126dcache_port=system.cpu.dcache.cpu_side 127icache_port=system.cpu.icache.cpu_side 128 129[system.cpu.dcache] 130type=BaseCache 131addr_ranges=0:18446744073709551615 132assoc=2 133block_size=64 134clock=500 135forward_snoops=true |
| 135hash_delay=1 | |
| 136hit_latency=2 137is_top_level=true 138max_miss_count=0 139mshrs=4 140prefetch_on_access=false 141prefetcher=Null | 136hit_latency=2 137is_top_level=true 138max_miss_count=0 139mshrs=4 140prefetch_on_access=false 141prefetcher=Null |
| 142prioritizeRequests=false 143repl=Null | |
| 144response_latency=2 145size=262144 | 142response_latency=2 143size=262144 |
| 146subblock_size=0 | |
| 147system=system 148tgts_per_mshr=20 | 144system=system 145tgts_per_mshr=20 |
| 149trace_addr=0 | |
| 150two_queue=false 151write_buffers=8 152cpu_side=system.cpu.dcache_port 153mem_side=system.cpu.toL2Bus.slave[1] 154 155[system.cpu.dtb] 156type=MipsTLB 157size=64 --- 263 unchanged lines hidden (view full) --- 421 422[system.cpu.icache] 423type=BaseCache 424addr_ranges=0:18446744073709551615 425assoc=2 426block_size=64 427clock=500 428forward_snoops=true | 146two_queue=false 147write_buffers=8 148cpu_side=system.cpu.dcache_port 149mem_side=system.cpu.toL2Bus.slave[1] 150 151[system.cpu.dtb] 152type=MipsTLB 153size=64 --- 263 unchanged lines hidden (view full) --- 417 418[system.cpu.icache] 419type=BaseCache 420addr_ranges=0:18446744073709551615 421assoc=2 422block_size=64 423clock=500 424forward_snoops=true |
| 429hash_delay=1 | |
| 430hit_latency=2 431is_top_level=true 432max_miss_count=0 433mshrs=4 434prefetch_on_access=false 435prefetcher=Null | 425hit_latency=2 426is_top_level=true 427max_miss_count=0 428mshrs=4 429prefetch_on_access=false 430prefetcher=Null |
| 436prioritizeRequests=false 437repl=Null | |
| 438response_latency=2 439size=131072 | 431response_latency=2 432size=131072 |
| 440subblock_size=0 | |
| 441system=system 442tgts_per_mshr=20 | 433system=system 434tgts_per_mshr=20 |
| 443trace_addr=0 | |
| 444two_queue=false 445write_buffers=8 446cpu_side=system.cpu.icache_port 447mem_side=system.cpu.toL2Bus.slave[0] 448 449[system.cpu.interrupts] 450type=MipsInterrupts 451 --- 8 unchanged lines hidden (view full) --- 460 461[system.cpu.l2cache] 462type=BaseCache 463addr_ranges=0:18446744073709551615 464assoc=8 465block_size=64 466clock=500 467forward_snoops=true | 435two_queue=false 436write_buffers=8 437cpu_side=system.cpu.icache_port 438mem_side=system.cpu.toL2Bus.slave[0] 439 440[system.cpu.interrupts] 441type=MipsInterrupts 442 --- 8 unchanged lines hidden (view full) --- 451 452[system.cpu.l2cache] 453type=BaseCache 454addr_ranges=0:18446744073709551615 455assoc=8 456block_size=64 457clock=500 458forward_snoops=true |
| 468hash_delay=1 | |
| 469hit_latency=20 470is_top_level=false 471max_miss_count=0 472mshrs=20 473prefetch_on_access=false 474prefetcher=Null | 459hit_latency=20 460is_top_level=false 461max_miss_count=0 462mshrs=20 463prefetch_on_access=false 464prefetcher=Null |
| 475prioritizeRequests=false 476repl=Null | |
| 477response_latency=20 478size=2097152 | 465response_latency=20 466size=2097152 |
| 479subblock_size=0 | |
| 480system=system 481tgts_per_mshr=12 | 467system=system 468tgts_per_mshr=12 |
| 482trace_addr=0 | |
| 483two_queue=false 484write_buffers=8 485cpu_side=system.cpu.toL2Bus.master[0] 486mem_side=system.membus.slave[1] 487 488[system.cpu.toL2Bus] 489type=CoherentBus 490block_size=64 --- 10 unchanged lines hidden (view full) --- 501[system.cpu.workload] 502type=LiveProcess 503cmd=hello 504cwd= 505egid=100 506env= 507errout=cerr 508euid=100 | 469two_queue=false 470write_buffers=8 471cpu_side=system.cpu.toL2Bus.master[0] 472mem_side=system.membus.slave[1] 473 474[system.cpu.toL2Bus] 475type=CoherentBus 476block_size=64 --- 10 unchanged lines hidden (view full) --- 487[system.cpu.workload] 488type=LiveProcess 489cmd=hello 490cwd= 491egid=100 492env= 493errout=cerr 494euid=100 |
| 509executable=/projects/pd/randd/dist/test-progs/hello/bin/mips/linux/hello | 495executable=/gem5/dist/test-progs/hello/bin/mips/linux/hello |
| 510gid=100 511input=cin 512max_stack_size=67108864 513output=cout 514pid=100 515ppid=99 516simpoint=0 517system=system --- 38 unchanged lines hidden --- | 496gid=100 497input=cin 498max_stack_size=67108864 499output=cout 500pid=100 501ppid=99 502simpoint=0 503system=system --- 38 unchanged lines hidden --- |