| config.ini (9096:8971a998190a) | config.ini (9150:a2370fa5c793) |
|---|---|
| 1[root] 2type=Root 3children=system 4full_system=false 5time_sync_enable=false 6time_sync_period=100000000000 7time_sync_spin_threshold=100000000 8 --- 498 unchanged lines hidden (view full) --- 507 508[system.membus] 509type=CoherentBus 510block_size=64 511clock=1000 512header_cycles=1 513use_default_range=false 514width=8 | 1[root] 2type=Root 3children=system 4full_system=false 5time_sync_enable=false 6time_sync_period=100000000000 7time_sync_spin_threshold=100000000 8 --- 498 unchanged lines hidden (view full) --- 507 508[system.membus] 509type=CoherentBus 510block_size=64 511clock=1000 512header_cycles=1 513use_default_range=false 514width=8 |
| 515master=system.physmem.port[0] | 515master=system.physmem.port |
| 516slave=system.system_port system.cpu.l2cache.mem_side 517 518[system.physmem] 519type=SimpleMemory 520conf_table_reported=false 521file= 522in_addr_map=true 523latency=30000 524latency_var=0 525null=false 526range=0:134217727 527zero=false 528port=system.membus.master[0] 529 | 516slave=system.system_port system.cpu.l2cache.mem_side 517 518[system.physmem] 519type=SimpleMemory 520conf_table_reported=false 521file= 522in_addr_map=true 523latency=30000 524latency_var=0 525null=false 526range=0:134217727 527zero=false 528port=system.membus.master[0] 529 |