| stats.txt (10352:5f1f92bf76ee) | stats.txt (10409:8c80b91944c5) |
|---|---|
| 1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 0.000026 # Number of seconds simulated 4sim_ticks 25815000 # Number of ticks simulated 5final_tick 25815000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks | 1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 0.000026 # Number of seconds simulated 4sim_ticks 25815000 # Number of ticks simulated 5final_tick 25815000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks |
| 7host_inst_rate 85918 # Simulator instruction rate (inst/s) 8host_op_rate 100276 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 485659481 # Simulator tick rate (ticks/s) 10host_mem_usage 277384 # Number of bytes of host memory used 11host_seconds 0.05 # Real time elapsed on the host | 7host_inst_rate 367819 # Simulator instruction rate (inst/s) 8host_op_rate 428893 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 2075494452 # Simulator tick rate (ticks/s) 10host_mem_usage 302164 # Number of bytes of host memory used 11host_seconds 0.01 # Real time elapsed on the host |
| 12sim_insts 4565 # Number of instructions simulated 13sim_ops 5329 # Number of ops (including micro ops) simulated 14system.voltage_domain.voltage 1 # Voltage in Volts 15system.clk_domain.clock 1000 # Clock period in ticks 16system.physmem.bytes_read::cpu.inst 14400 # Number of bytes read from this memory 17system.physmem.bytes_read::cpu.data 8000 # Number of bytes read from this memory 18system.physmem.bytes_read::total 22400 # Number of bytes read from this memory 19system.physmem.bytes_inst_read::cpu.inst 14400 # Number of instructions bytes read from this memory --- 4 unchanged lines hidden (view full) --- 24system.physmem.bw_read::cpu.inst 557815224 # Total read bandwidth from this memory (bytes/s) 25system.physmem.bw_read::cpu.data 309897347 # Total read bandwidth from this memory (bytes/s) 26system.physmem.bw_read::total 867712570 # Total read bandwidth from this memory (bytes/s) 27system.physmem.bw_inst_read::cpu.inst 557815224 # Instruction read bandwidth from this memory (bytes/s) 28system.physmem.bw_inst_read::total 557815224 # Instruction read bandwidth from this memory (bytes/s) 29system.physmem.bw_total::cpu.inst 557815224 # Total bandwidth to/from this memory (bytes/s) 30system.physmem.bw_total::cpu.data 309897347 # Total bandwidth to/from this memory (bytes/s) 31system.physmem.bw_total::total 867712570 # Total bandwidth to/from this memory (bytes/s) | 12sim_insts 4565 # Number of instructions simulated 13sim_ops 5329 # Number of ops (including micro ops) simulated 14system.voltage_domain.voltage 1 # Voltage in Volts 15system.clk_domain.clock 1000 # Clock period in ticks 16system.physmem.bytes_read::cpu.inst 14400 # Number of bytes read from this memory 17system.physmem.bytes_read::cpu.data 8000 # Number of bytes read from this memory 18system.physmem.bytes_read::total 22400 # Number of bytes read from this memory 19system.physmem.bytes_inst_read::cpu.inst 14400 # Number of instructions bytes read from this memory --- 4 unchanged lines hidden (view full) --- 24system.physmem.bw_read::cpu.inst 557815224 # Total read bandwidth from this memory (bytes/s) 25system.physmem.bw_read::cpu.data 309897347 # Total read bandwidth from this memory (bytes/s) 26system.physmem.bw_read::total 867712570 # Total read bandwidth from this memory (bytes/s) 27system.physmem.bw_inst_read::cpu.inst 557815224 # Instruction read bandwidth from this memory (bytes/s) 28system.physmem.bw_inst_read::total 557815224 # Instruction read bandwidth from this memory (bytes/s) 29system.physmem.bw_total::cpu.inst 557815224 # Total bandwidth to/from this memory (bytes/s) 30system.physmem.bw_total::cpu.data 309897347 # Total bandwidth to/from this memory (bytes/s) 31system.physmem.bw_total::total 867712570 # Total bandwidth to/from this memory (bytes/s) |
| 32system.membus.throughput 867712570 # Throughput (bytes/s) | |
| 33system.membus.trans_dist::ReadReq 307 # Transaction distribution 34system.membus.trans_dist::ReadResp 307 # Transaction distribution 35system.membus.trans_dist::ReadExReq 43 # Transaction distribution 36system.membus.trans_dist::ReadExResp 43 # Transaction distribution 37system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 700 # Packet count per connected master and slave (bytes) 38system.membus.pkt_count::total 700 # Packet count per connected master and slave (bytes) | 32system.membus.trans_dist::ReadReq 307 # Transaction distribution 33system.membus.trans_dist::ReadResp 307 # Transaction distribution 34system.membus.trans_dist::ReadExReq 43 # Transaction distribution 35system.membus.trans_dist::ReadExResp 43 # Transaction distribution 36system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 700 # Packet count per connected master and slave (bytes) 37system.membus.pkt_count::total 700 # Packet count per connected master and slave (bytes) |
| 39system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 22400 # Cumulative packet size per connected master and slave (bytes) 40system.membus.tot_pkt_size::total 22400 # Cumulative packet size per connected master and slave (bytes) 41system.membus.data_through_bus 22400 # Total data (bytes) 42system.membus.snoop_data_through_bus 0 # Total snoop data (bytes) | 38system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 22400 # Cumulative packet size per connected master and slave (bytes) 39system.membus.pkt_size::total 22400 # Cumulative packet size per connected master and slave (bytes) 40system.membus.snoops 0 # Total snoops (count) 41system.membus.snoop_fanout::samples 350 # Request fanout histogram 42system.membus.snoop_fanout::mean 0 # Request fanout histogram 43system.membus.snoop_fanout::stdev 0 # Request fanout histogram 44system.membus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram 45system.membus.snoop_fanout::0 350 100.00% 100.00% # Request fanout histogram 46system.membus.snoop_fanout::1 0 0.00% 100.00% # Request fanout histogram 47system.membus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram 48system.membus.snoop_fanout::min_value 0 # Request fanout histogram 49system.membus.snoop_fanout::max_value 0 # Request fanout histogram 50system.membus.snoop_fanout::total 350 # Request fanout histogram |
| 43system.membus.reqLayer0.occupancy 355000 # Layer occupancy (ticks) 44system.membus.reqLayer0.utilization 1.4 # Layer utilization (%) 45system.membus.respLayer1.occupancy 3155000 # Layer occupancy (ticks) 46system.membus.respLayer1.utilization 12.2 # Layer utilization (%) 47system.cpu_clk_domain.clock 500 # Clock period in ticks 48system.cpu.dstage2_mmu.stage2_tlb.inst_hits 0 # ITB inst hits 49system.cpu.dstage2_mmu.stage2_tlb.inst_misses 0 # ITB inst misses 50system.cpu.dstage2_mmu.stage2_tlb.read_hits 0 # DTB read hits --- 464 unchanged lines hidden (view full) --- 515system.cpu.dcache.ReadReq_avg_mshr_miss_latency::total 46142.857143 # average ReadReq mshr miss latency 516system.cpu.dcache.WriteReq_avg_mshr_miss_latency::cpu.data 53000 # average WriteReq mshr miss latency 517system.cpu.dcache.WriteReq_avg_mshr_miss_latency::total 53000 # average WriteReq mshr miss latency 518system.cpu.dcache.demand_avg_mshr_miss_latency::cpu.data 48234.042553 # average overall mshr miss latency 519system.cpu.dcache.demand_avg_mshr_miss_latency::total 48234.042553 # average overall mshr miss latency 520system.cpu.dcache.overall_avg_mshr_miss_latency::cpu.data 48234.042553 # average overall mshr miss latency 521system.cpu.dcache.overall_avg_mshr_miss_latency::total 48234.042553 # average overall mshr miss latency 522system.cpu.dcache.no_allocate_misses 0 # Number of misses that were no-allocate | 51system.membus.reqLayer0.occupancy 355000 # Layer occupancy (ticks) 52system.membus.reqLayer0.utilization 1.4 # Layer utilization (%) 53system.membus.respLayer1.occupancy 3155000 # Layer occupancy (ticks) 54system.membus.respLayer1.utilization 12.2 # Layer utilization (%) 55system.cpu_clk_domain.clock 500 # Clock period in ticks 56system.cpu.dstage2_mmu.stage2_tlb.inst_hits 0 # ITB inst hits 57system.cpu.dstage2_mmu.stage2_tlb.inst_misses 0 # ITB inst misses 58system.cpu.dstage2_mmu.stage2_tlb.read_hits 0 # DTB read hits --- 464 unchanged lines hidden (view full) --- 523system.cpu.dcache.ReadReq_avg_mshr_miss_latency::total 46142.857143 # average ReadReq mshr miss latency 524system.cpu.dcache.WriteReq_avg_mshr_miss_latency::cpu.data 53000 # average WriteReq mshr miss latency 525system.cpu.dcache.WriteReq_avg_mshr_miss_latency::total 53000 # average WriteReq mshr miss latency 526system.cpu.dcache.demand_avg_mshr_miss_latency::cpu.data 48234.042553 # average overall mshr miss latency 527system.cpu.dcache.demand_avg_mshr_miss_latency::total 48234.042553 # average overall mshr miss latency 528system.cpu.dcache.overall_avg_mshr_miss_latency::cpu.data 48234.042553 # average overall mshr miss latency 529system.cpu.dcache.overall_avg_mshr_miss_latency::total 48234.042553 # average overall mshr miss latency 530system.cpu.dcache.no_allocate_misses 0 # Number of misses that were no-allocate |
| 523system.cpu.toL2Bus.throughput 947046291 # Throughput (bytes/s) | |
| 524system.cpu.toL2Bus.trans_dist::ReadReq 339 # Transaction distribution 525system.cpu.toL2Bus.trans_dist::ReadResp 339 # Transaction distribution 526system.cpu.toL2Bus.trans_dist::ReadExReq 43 # Transaction distribution 527system.cpu.toL2Bus.trans_dist::ReadExResp 43 # Transaction distribution 528system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 482 # Packet count per connected master and slave (bytes) 529system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 282 # Packet count per connected master and slave (bytes) 530system.cpu.toL2Bus.pkt_count::total 764 # Packet count per connected master and slave (bytes) | 531system.cpu.toL2Bus.trans_dist::ReadReq 339 # Transaction distribution 532system.cpu.toL2Bus.trans_dist::ReadResp 339 # Transaction distribution 533system.cpu.toL2Bus.trans_dist::ReadExReq 43 # Transaction distribution 534system.cpu.toL2Bus.trans_dist::ReadExResp 43 # Transaction distribution 535system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 482 # Packet count per connected master and slave (bytes) 536system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 282 # Packet count per connected master and slave (bytes) 537system.cpu.toL2Bus.pkt_count::total 764 # Packet count per connected master and slave (bytes) |
| 531system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 15424 # Cumulative packet size per connected master and slave (bytes) 532system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 9024 # Cumulative packet size per connected master and slave (bytes) 533system.cpu.toL2Bus.tot_pkt_size::total 24448 # Cumulative packet size per connected master and slave (bytes) 534system.cpu.toL2Bus.data_through_bus 24448 # Total data (bytes) 535system.cpu.toL2Bus.snoop_data_through_bus 0 # Total snoop data (bytes) | 538system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 15424 # Cumulative packet size per connected master and slave (bytes) 539system.cpu.toL2Bus.pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 9024 # Cumulative packet size per connected master and slave (bytes) 540system.cpu.toL2Bus.pkt_size::total 24448 # Cumulative packet size per connected master and slave (bytes) 541system.cpu.toL2Bus.snoops 0 # Total snoops (count) 542system.cpu.toL2Bus.snoop_fanout::samples 382 # Request fanout histogram 543system.cpu.toL2Bus.snoop_fanout::mean 5 # Request fanout histogram 544system.cpu.toL2Bus.snoop_fanout::stdev 0 # Request fanout histogram 545system.cpu.toL2Bus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram 546system.cpu.toL2Bus.snoop_fanout::0 0 0.00% 0.00% # Request fanout histogram 547system.cpu.toL2Bus.snoop_fanout::1 0 0.00% 0.00% # Request fanout histogram 548system.cpu.toL2Bus.snoop_fanout::2 0 0.00% 0.00% # Request fanout histogram 549system.cpu.toL2Bus.snoop_fanout::3 0 0.00% 0.00% # Request fanout histogram 550system.cpu.toL2Bus.snoop_fanout::4 0 0.00% 0.00% # Request fanout histogram 551system.cpu.toL2Bus.snoop_fanout::5 382 100.00% 100.00% # Request fanout histogram 552system.cpu.toL2Bus.snoop_fanout::6 0 0.00% 100.00% # Request fanout histogram 553system.cpu.toL2Bus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram 554system.cpu.toL2Bus.snoop_fanout::min_value 5 # Request fanout histogram 555system.cpu.toL2Bus.snoop_fanout::max_value 5 # Request fanout histogram 556system.cpu.toL2Bus.snoop_fanout::total 382 # Request fanout histogram |
| 536system.cpu.toL2Bus.reqLayer0.occupancy 191000 # Layer occupancy (ticks) 537system.cpu.toL2Bus.reqLayer0.utilization 0.7 # Layer utilization (%) 538system.cpu.toL2Bus.respLayer0.occupancy 361500 # Layer occupancy (ticks) 539system.cpu.toL2Bus.respLayer0.utilization 1.4 # Layer utilization (%) 540system.cpu.toL2Bus.respLayer1.occupancy 211500 # Layer occupancy (ticks) 541system.cpu.toL2Bus.respLayer1.utilization 0.8 # Layer utilization (%) 542 543---------- End Simulation Statistics ---------- | 557system.cpu.toL2Bus.reqLayer0.occupancy 191000 # Layer occupancy (ticks) 558system.cpu.toL2Bus.reqLayer0.utilization 0.7 # Layer utilization (%) 559system.cpu.toL2Bus.respLayer0.occupancy 361500 # Layer occupancy (ticks) 560system.cpu.toL2Bus.respLayer0.utilization 1.4 # Layer utilization (%) 561system.cpu.toL2Bus.respLayer1.occupancy 211500 # Layer occupancy (ticks) 562system.cpu.toL2Bus.respLayer1.utilization 0.8 # Layer utilization (%) 563 564---------- End Simulation Statistics ---------- |