1[root]
2type=Root
3children=system
4eventq_index=0
5full_system=false
6sim_quantum=0
7time_sync_enable=false
8time_sync_period=100000000000

--- 9 unchanged lines hidden (view full) ---

18init_param=0
19kernel=
20kernel_addr_check=true
21load_addr_mask=1099511627775
22load_offset=0
23mem_mode=timing
24mem_ranges=
25memories=system.physmem
26mmap_using_noreserve=false
27num_work_ids=16
28readfile=
29symbolfile=
30work_begin_ckpt_count=0
31work_begin_cpu_id_exit=-1
32work_begin_exit_count=0
33work_cpus_ckpt_count=0
34work_end_ckpt_count=0

--- 45 unchanged lines hidden (view full) ---

80icache_port=system.cpu.icache.cpu_side
81
82[system.cpu.dcache]
83type=BaseCache
84children=tags
85addr_ranges=0:18446744073709551615
86assoc=2
87clk_domain=system.cpu_clk_domain
88demand_mshr_reserve=1
89eventq_index=0
90forward_snoops=true
91hit_latency=2
92is_top_level=true
93max_miss_count=0
94mshrs=4
95prefetch_on_access=false
96prefetcher=Null

--- 18 unchanged lines hidden (view full) ---

115sequential_access=false
116size=262144
117
118[system.cpu.dstage2_mmu]
119type=ArmStage2MMU
120children=stage2_tlb
121eventq_index=0
122stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb
123sys=system
124tlb=system.cpu.dtb
125
126[system.cpu.dstage2_mmu.stage2_tlb]
127type=ArmTLB
128children=walker
129eventq_index=0
130is_stage2=true
131size=32
132walker=system.cpu.dstage2_mmu.stage2_tlb.walker
133
134[system.cpu.dstage2_mmu.stage2_tlb.walker]
135type=ArmTableWalker
136clk_domain=system.cpu_clk_domain
137eventq_index=0
138is_stage2=true
139num_squash_per_cycle=2
140sys=system
138port=system.cpu.toL2Bus.slave[5]
141
142[system.cpu.dtb]
143type=ArmTLB
144children=walker
145eventq_index=0
146is_stage2=false
147size=64
148walker=system.cpu.dtb.walker

--- 8 unchanged lines hidden (view full) ---

157port=system.cpu.toL2Bus.slave[3]
158
159[system.cpu.icache]
160type=BaseCache
161children=tags
162addr_ranges=0:18446744073709551615
163assoc=2
164clk_domain=system.cpu_clk_domain
165demand_mshr_reserve=1
166eventq_index=0
167forward_snoops=true
168hit_latency=2
169is_top_level=true
170max_miss_count=0
171mshrs=4
172prefetch_on_access=false
173prefetcher=Null

--- 44 unchanged lines hidden (view full) ---

218id_isar5=0
219id_mmfr0=270536963
220id_mmfr1=0
221id_mmfr2=19070976
222id_mmfr3=34611729
223id_pfr0=49
224id_pfr1=4113
225midr=1091551472
226pmu=Null
227system=system
228
229[system.cpu.istage2_mmu]
230type=ArmStage2MMU
231children=stage2_tlb
232eventq_index=0
233stage2_tlb=system.cpu.istage2_mmu.stage2_tlb
234sys=system
235tlb=system.cpu.itb
236
237[system.cpu.istage2_mmu.stage2_tlb]
238type=ArmTLB
239children=walker
240eventq_index=0
241is_stage2=true
242size=32
243walker=system.cpu.istage2_mmu.stage2_tlb.walker
244
245[system.cpu.istage2_mmu.stage2_tlb.walker]
246type=ArmTableWalker
247clk_domain=system.cpu_clk_domain
248eventq_index=0
249is_stage2=true
250num_squash_per_cycle=2
251sys=system
247port=system.cpu.toL2Bus.slave[4]
252
253[system.cpu.itb]
254type=ArmTLB
255children=walker
256eventq_index=0
257is_stage2=false
258size=64
259walker=system.cpu.itb.walker

--- 8 unchanged lines hidden (view full) ---

268port=system.cpu.toL2Bus.slave[2]
269
270[system.cpu.l2cache]
271type=BaseCache
272children=tags
273addr_ranges=0:18446744073709551615
274assoc=8
275clk_domain=system.cpu_clk_domain
276demand_mshr_reserve=1
277eventq_index=0
278forward_snoops=true
279hit_latency=20
280is_top_level=false
281max_miss_count=0
282mshrs=20
283prefetch_on_access=false
284prefetcher=Null

--- 17 unchanged lines hidden (view full) ---

302hit_latency=20
303sequential_access=false
304size=2097152
305
306[system.cpu.toL2Bus]
307type=CoherentXBar
308clk_domain=system.cpu_clk_domain
309eventq_index=0
305header_cycles=1
310forward_latency=0
311frontend_latency=1
312response_latency=1
313snoop_filter=Null
314snoop_response_latency=1
315system=system
316use_default_range=false
317width=32
318master=system.cpu.l2cache.cpu_side
311slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.istage2_mmu.stage2_tlb.walker.port system.cpu.dstage2_mmu.stage2_tlb.walker.port
319slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port
320
321[system.cpu.tracer]
322type=ExeTracer
323eventq_index=0
324
325[system.cpu.workload]
326type=LiveProcess
327cmd=hello
328cwd=
329drivers=
330egid=100
331env=
332errout=cerr
333euid=100
334eventq_index=0
335executable=/scratch/nilay/GEM5/gem5/tests/test-progs/hello/bin/arm/linux/hello
336gid=100
337input=cin
338kvmInSE=false
339max_stack_size=67108864
340output=cout
341pid=100
342ppid=99
343simpoint=0
344system=system
345uid=100
346useArchPT=false

--- 13 unchanged lines hidden (view full) ---

360eventq_index=0
361sys_clk_domain=system.clk_domain
362transition_latency=100000000
363
364[system.membus]
365type=CoherentXBar
366clk_domain=system.clk_domain
367eventq_index=0
358header_cycles=1
368forward_latency=4
369frontend_latency=3
370response_latency=2
371snoop_filter=Null
372snoop_response_latency=4
373system=system
374use_default_range=false
362width=8
375width=16
376master=system.physmem.port
377slave=system.system_port system.cpu.l2cache.mem_side
378
379[system.physmem]
380type=SimpleMemory
381bandwidth=73.000000
382clk_domain=system.clk_domain
383conf_table_reported=true

--- 13 unchanged lines hidden ---