1[root]
2type=Root
3children=system
4eventq_index=0
5full_system=false
6sim_quantum=0
7time_sync_enable=false
8time_sync_period=100000000000
9time_sync_spin_threshold=100000000
10
11[system]
12type=System
13children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain
14boot_osflags=a
15cache_line_size=64
16clk_domain=system.clk_domain
17eventq_index=0
18init_param=0
19kernel=
20kernel_addr_check=true
21load_addr_mask=1099511627775
22load_offset=0
23mem_mode=timing
24mem_ranges=
25memories=system.physmem
26mmap_using_noreserve=false
27num_work_ids=16
28readfile=
29symbolfile=
30work_begin_ckpt_count=0
31work_begin_cpu_id_exit=-1
32work_begin_exit_count=0
33work_cpus_ckpt_count=0
34work_end_ckpt_count=0
35work_end_exit_count=0
36work_item_id=-1
37system_port=system.membus.slave[0]
38
39[system.clk_domain]
40type=SrcClockDomain
41clock=1000
42domain_id=-1
43eventq_index=0
44init_perf_level=0
45voltage_domain=system.voltage_domain
46
47[system.cpu]
48type=TimingSimpleCPU
49children=dcache dstage2_mmu dtb icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer workload
50branchPred=Null
51checker=Null
52clk_domain=system.cpu_clk_domain
53cpu_id=0
54do_checkpoint_insts=true
55do_quiesce=true
56do_statistics_insts=true
57dstage2_mmu=system.cpu.dstage2_mmu
58dtb=system.cpu.dtb
59eventq_index=0
60function_trace=false
61function_trace_start=0
62interrupts=system.cpu.interrupts
63isa=system.cpu.isa
64istage2_mmu=system.cpu.istage2_mmu
65itb=system.cpu.itb
66max_insts_all_threads=0
67max_insts_any_thread=0
68max_loads_all_threads=0
69max_loads_any_thread=0
70numThreads=1
71profile=0
72progress_interval=0
73simpoint_start_insts=
74socket_id=0
75switched_out=false
76system=system
77tracer=system.cpu.tracer
78workload=system.cpu.workload
79dcache_port=system.cpu.dcache.cpu_side
80icache_port=system.cpu.icache.cpu_side
81
82[system.cpu.dcache]
83type=BaseCache
84children=tags
85addr_ranges=0:18446744073709551615
86assoc=2
87clk_domain=system.cpu_clk_domain
88demand_mshr_reserve=1
89eventq_index=0
90forward_snoops=true
91hit_latency=2
92is_top_level=true
93max_miss_count=0
94mshrs=4
95prefetch_on_access=false
96prefetcher=Null
97response_latency=2
98sequential_access=false
99size=262144
100system=system
101tags=system.cpu.dcache.tags
102tgts_per_mshr=20
103two_queue=false
104write_buffers=8
105cpu_side=system.cpu.dcache_port
106mem_side=system.cpu.toL2Bus.slave[1]
107
108[system.cpu.dcache.tags]
109type=LRU
110assoc=2
111block_size=64
112clk_domain=system.cpu_clk_domain
113eventq_index=0
114hit_latency=2
115sequential_access=false
116size=262144
117
118[system.cpu.dstage2_mmu]
119type=ArmStage2MMU
120children=stage2_tlb
121eventq_index=0
122stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb
123sys=system
124tlb=system.cpu.dtb
125
126[system.cpu.dstage2_mmu.stage2_tlb]
127type=ArmTLB
128children=walker
129eventq_index=0
130is_stage2=true
131size=32
132walker=system.cpu.dstage2_mmu.stage2_tlb.walker
133
134[system.cpu.dstage2_mmu.stage2_tlb.walker]
135type=ArmTableWalker
136clk_domain=system.cpu_clk_domain
137eventq_index=0
138is_stage2=true
139num_squash_per_cycle=2
140sys=system
141
142[system.cpu.dtb]
143type=ArmTLB
144children=walker
145eventq_index=0
146is_stage2=false
147size=64
148walker=system.cpu.dtb.walker
149
150[system.cpu.dtb.walker]
151type=ArmTableWalker
152clk_domain=system.cpu_clk_domain
153eventq_index=0
154is_stage2=false
155num_squash_per_cycle=2
156sys=system
157port=system.cpu.toL2Bus.slave[3]
158
159[system.cpu.icache]
160type=BaseCache
161children=tags
162addr_ranges=0:18446744073709551615
163assoc=2
164clk_domain=system.cpu_clk_domain
165demand_mshr_reserve=1
166eventq_index=0
167forward_snoops=true
168hit_latency=2
169is_top_level=true
170max_miss_count=0
171mshrs=4
172prefetch_on_access=false
173prefetcher=Null
174response_latency=2
175sequential_access=false
176size=131072
177system=system
178tags=system.cpu.icache.tags
179tgts_per_mshr=20
180two_queue=false
181write_buffers=8
182cpu_side=system.cpu.icache_port
183mem_side=system.cpu.toL2Bus.slave[0]
184
185[system.cpu.icache.tags]
186type=LRU
187assoc=2
188block_size=64
189clk_domain=system.cpu_clk_domain
190eventq_index=0
191hit_latency=2
192sequential_access=false
193size=131072
194
195[system.cpu.interrupts]
196type=ArmInterrupts
197eventq_index=0
198
199[system.cpu.isa]
200type=ArmISA
201eventq_index=0
202fpsid=1090793632
203id_aa64afr0_el1=0
204id_aa64afr1_el1=0
205id_aa64dfr0_el1=1052678
206id_aa64dfr1_el1=0
207id_aa64isar0_el1=0
208id_aa64isar1_el1=0
209id_aa64mmfr0_el1=15728642
210id_aa64mmfr1_el1=0
211id_aa64pfr0_el1=17
212id_aa64pfr1_el1=0
213id_isar0=34607377
214id_isar1=34677009
215id_isar2=555950401
216id_isar3=17899825
217id_isar4=268501314
218id_isar5=0
219id_mmfr0=270536963
220id_mmfr1=0
221id_mmfr2=19070976
222id_mmfr3=34611729
223id_pfr0=49
224id_pfr1=4113
225midr=1091551472
226pmu=Null
227system=system
228
229[system.cpu.istage2_mmu]
230type=ArmStage2MMU
231children=stage2_tlb
232eventq_index=0
233stage2_tlb=system.cpu.istage2_mmu.stage2_tlb
234sys=system
235tlb=system.cpu.itb
236
237[system.cpu.istage2_mmu.stage2_tlb]
238type=ArmTLB
239children=walker
240eventq_index=0
241is_stage2=true
242size=32
243walker=system.cpu.istage2_mmu.stage2_tlb.walker
244
245[system.cpu.istage2_mmu.stage2_tlb.walker]
246type=ArmTableWalker
247clk_domain=system.cpu_clk_domain
248eventq_index=0
249is_stage2=true
250num_squash_per_cycle=2
251sys=system
252
253[system.cpu.itb]
254type=ArmTLB
255children=walker
256eventq_index=0
257is_stage2=false
258size=64
259walker=system.cpu.itb.walker
260
261[system.cpu.itb.walker]
262type=ArmTableWalker
263clk_domain=system.cpu_clk_domain
264eventq_index=0
265is_stage2=false
266num_squash_per_cycle=2
267sys=system
268port=system.cpu.toL2Bus.slave[2]
269
270[system.cpu.l2cache]
271type=BaseCache
272children=tags
273addr_ranges=0:18446744073709551615
274assoc=8
275clk_domain=system.cpu_clk_domain
276demand_mshr_reserve=1
277eventq_index=0
278forward_snoops=true
279hit_latency=20
280is_top_level=false
281max_miss_count=0
282mshrs=20
283prefetch_on_access=false
284prefetcher=Null
285response_latency=20
286sequential_access=false
287size=2097152
288system=system
289tags=system.cpu.l2cache.tags
290tgts_per_mshr=12
291two_queue=false
292write_buffers=8
293cpu_side=system.cpu.toL2Bus.master[0]
294mem_side=system.membus.slave[1]
295
296[system.cpu.l2cache.tags]
297type=LRU
298assoc=8
299block_size=64
300clk_domain=system.cpu_clk_domain
301eventq_index=0
302hit_latency=20
303sequential_access=false
304size=2097152
305
306[system.cpu.toL2Bus]
307type=CoherentXBar
308clk_domain=system.cpu_clk_domain
309eventq_index=0
310forward_latency=0
311frontend_latency=1
312response_latency=1
313snoop_filter=Null
314snoop_response_latency=1
315system=system
316use_default_range=false
317width=32
318master=system.cpu.l2cache.cpu_side
319slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port
320
321[system.cpu.tracer]
322type=ExeTracer
323eventq_index=0
324
325[system.cpu.workload]
326type=LiveProcess
327cmd=hello
328cwd=
329drivers=
330egid=100
331env=
332errout=cerr
333euid=100
334eventq_index=0
335executable=/scratch/nilay/GEM5/gem5/tests/test-progs/hello/bin/arm/linux/hello
336gid=100
337input=cin
338kvmInSE=false
339max_stack_size=67108864
340output=cout
341pid=100
342ppid=99
343simpoint=0
344system=system
345uid=100
346useArchPT=false
347
348[system.cpu_clk_domain]
349type=SrcClockDomain
350clock=500
351domain_id=-1
352eventq_index=0
353init_perf_level=0
354voltage_domain=system.voltage_domain
355
356[system.dvfs_handler]
357type=DVFSHandler
358domains=
359enable=false
360eventq_index=0
361sys_clk_domain=system.clk_domain
362transition_latency=100000000
363
364[system.membus]
365type=CoherentXBar
366clk_domain=system.clk_domain
367eventq_index=0
368forward_latency=4
369frontend_latency=3
370response_latency=2
371snoop_filter=Null
372snoop_response_latency=4
373system=system
374use_default_range=false
375width=16
376master=system.physmem.port
377slave=system.system_port system.cpu.l2cache.mem_side
378
379[system.physmem]
380type=SimpleMemory
381bandwidth=73.000000
382clk_domain=system.clk_domain
383conf_table_reported=true
384eventq_index=0
385in_addr_map=true
386latency=30000
387latency_var=0
388null=false
389range=0:134217727
390port=system.membus.master[0]
391
392[system.voltage_domain]
393type=VoltageDomain
394eventq_index=0
395voltage=1.000000
396
2type=Root
3children=system
4eventq_index=0
5full_system=false
6sim_quantum=0
7time_sync_enable=false
8time_sync_period=100000000000
9time_sync_spin_threshold=100000000
10
11[system]
12type=System
13children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain
14boot_osflags=a
15cache_line_size=64
16clk_domain=system.clk_domain
17eventq_index=0
18init_param=0
19kernel=
20kernel_addr_check=true
21load_addr_mask=1099511627775
22load_offset=0
23mem_mode=timing
24mem_ranges=
25memories=system.physmem
26mmap_using_noreserve=false
27num_work_ids=16
28readfile=
29symbolfile=
30work_begin_ckpt_count=0
31work_begin_cpu_id_exit=-1
32work_begin_exit_count=0
33work_cpus_ckpt_count=0
34work_end_ckpt_count=0
35work_end_exit_count=0
36work_item_id=-1
37system_port=system.membus.slave[0]
38
39[system.clk_domain]
40type=SrcClockDomain
41clock=1000
42domain_id=-1
43eventq_index=0
44init_perf_level=0
45voltage_domain=system.voltage_domain
46
47[system.cpu]
48type=TimingSimpleCPU
49children=dcache dstage2_mmu dtb icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer workload
50branchPred=Null
51checker=Null
52clk_domain=system.cpu_clk_domain
53cpu_id=0
54do_checkpoint_insts=true
55do_quiesce=true
56do_statistics_insts=true
57dstage2_mmu=system.cpu.dstage2_mmu
58dtb=system.cpu.dtb
59eventq_index=0
60function_trace=false
61function_trace_start=0
62interrupts=system.cpu.interrupts
63isa=system.cpu.isa
64istage2_mmu=system.cpu.istage2_mmu
65itb=system.cpu.itb
66max_insts_all_threads=0
67max_insts_any_thread=0
68max_loads_all_threads=0
69max_loads_any_thread=0
70numThreads=1
71profile=0
72progress_interval=0
73simpoint_start_insts=
74socket_id=0
75switched_out=false
76system=system
77tracer=system.cpu.tracer
78workload=system.cpu.workload
79dcache_port=system.cpu.dcache.cpu_side
80icache_port=system.cpu.icache.cpu_side
81
82[system.cpu.dcache]
83type=BaseCache
84children=tags
85addr_ranges=0:18446744073709551615
86assoc=2
87clk_domain=system.cpu_clk_domain
88demand_mshr_reserve=1
89eventq_index=0
90forward_snoops=true
91hit_latency=2
92is_top_level=true
93max_miss_count=0
94mshrs=4
95prefetch_on_access=false
96prefetcher=Null
97response_latency=2
98sequential_access=false
99size=262144
100system=system
101tags=system.cpu.dcache.tags
102tgts_per_mshr=20
103two_queue=false
104write_buffers=8
105cpu_side=system.cpu.dcache_port
106mem_side=system.cpu.toL2Bus.slave[1]
107
108[system.cpu.dcache.tags]
109type=LRU
110assoc=2
111block_size=64
112clk_domain=system.cpu_clk_domain
113eventq_index=0
114hit_latency=2
115sequential_access=false
116size=262144
117
118[system.cpu.dstage2_mmu]
119type=ArmStage2MMU
120children=stage2_tlb
121eventq_index=0
122stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb
123sys=system
124tlb=system.cpu.dtb
125
126[system.cpu.dstage2_mmu.stage2_tlb]
127type=ArmTLB
128children=walker
129eventq_index=0
130is_stage2=true
131size=32
132walker=system.cpu.dstage2_mmu.stage2_tlb.walker
133
134[system.cpu.dstage2_mmu.stage2_tlb.walker]
135type=ArmTableWalker
136clk_domain=system.cpu_clk_domain
137eventq_index=0
138is_stage2=true
139num_squash_per_cycle=2
140sys=system
141
142[system.cpu.dtb]
143type=ArmTLB
144children=walker
145eventq_index=0
146is_stage2=false
147size=64
148walker=system.cpu.dtb.walker
149
150[system.cpu.dtb.walker]
151type=ArmTableWalker
152clk_domain=system.cpu_clk_domain
153eventq_index=0
154is_stage2=false
155num_squash_per_cycle=2
156sys=system
157port=system.cpu.toL2Bus.slave[3]
158
159[system.cpu.icache]
160type=BaseCache
161children=tags
162addr_ranges=0:18446744073709551615
163assoc=2
164clk_domain=system.cpu_clk_domain
165demand_mshr_reserve=1
166eventq_index=0
167forward_snoops=true
168hit_latency=2
169is_top_level=true
170max_miss_count=0
171mshrs=4
172prefetch_on_access=false
173prefetcher=Null
174response_latency=2
175sequential_access=false
176size=131072
177system=system
178tags=system.cpu.icache.tags
179tgts_per_mshr=20
180two_queue=false
181write_buffers=8
182cpu_side=system.cpu.icache_port
183mem_side=system.cpu.toL2Bus.slave[0]
184
185[system.cpu.icache.tags]
186type=LRU
187assoc=2
188block_size=64
189clk_domain=system.cpu_clk_domain
190eventq_index=0
191hit_latency=2
192sequential_access=false
193size=131072
194
195[system.cpu.interrupts]
196type=ArmInterrupts
197eventq_index=0
198
199[system.cpu.isa]
200type=ArmISA
201eventq_index=0
202fpsid=1090793632
203id_aa64afr0_el1=0
204id_aa64afr1_el1=0
205id_aa64dfr0_el1=1052678
206id_aa64dfr1_el1=0
207id_aa64isar0_el1=0
208id_aa64isar1_el1=0
209id_aa64mmfr0_el1=15728642
210id_aa64mmfr1_el1=0
211id_aa64pfr0_el1=17
212id_aa64pfr1_el1=0
213id_isar0=34607377
214id_isar1=34677009
215id_isar2=555950401
216id_isar3=17899825
217id_isar4=268501314
218id_isar5=0
219id_mmfr0=270536963
220id_mmfr1=0
221id_mmfr2=19070976
222id_mmfr3=34611729
223id_pfr0=49
224id_pfr1=4113
225midr=1091551472
226pmu=Null
227system=system
228
229[system.cpu.istage2_mmu]
230type=ArmStage2MMU
231children=stage2_tlb
232eventq_index=0
233stage2_tlb=system.cpu.istage2_mmu.stage2_tlb
234sys=system
235tlb=system.cpu.itb
236
237[system.cpu.istage2_mmu.stage2_tlb]
238type=ArmTLB
239children=walker
240eventq_index=0
241is_stage2=true
242size=32
243walker=system.cpu.istage2_mmu.stage2_tlb.walker
244
245[system.cpu.istage2_mmu.stage2_tlb.walker]
246type=ArmTableWalker
247clk_domain=system.cpu_clk_domain
248eventq_index=0
249is_stage2=true
250num_squash_per_cycle=2
251sys=system
252
253[system.cpu.itb]
254type=ArmTLB
255children=walker
256eventq_index=0
257is_stage2=false
258size=64
259walker=system.cpu.itb.walker
260
261[system.cpu.itb.walker]
262type=ArmTableWalker
263clk_domain=system.cpu_clk_domain
264eventq_index=0
265is_stage2=false
266num_squash_per_cycle=2
267sys=system
268port=system.cpu.toL2Bus.slave[2]
269
270[system.cpu.l2cache]
271type=BaseCache
272children=tags
273addr_ranges=0:18446744073709551615
274assoc=8
275clk_domain=system.cpu_clk_domain
276demand_mshr_reserve=1
277eventq_index=0
278forward_snoops=true
279hit_latency=20
280is_top_level=false
281max_miss_count=0
282mshrs=20
283prefetch_on_access=false
284prefetcher=Null
285response_latency=20
286sequential_access=false
287size=2097152
288system=system
289tags=system.cpu.l2cache.tags
290tgts_per_mshr=12
291two_queue=false
292write_buffers=8
293cpu_side=system.cpu.toL2Bus.master[0]
294mem_side=system.membus.slave[1]
295
296[system.cpu.l2cache.tags]
297type=LRU
298assoc=8
299block_size=64
300clk_domain=system.cpu_clk_domain
301eventq_index=0
302hit_latency=20
303sequential_access=false
304size=2097152
305
306[system.cpu.toL2Bus]
307type=CoherentXBar
308clk_domain=system.cpu_clk_domain
309eventq_index=0
310forward_latency=0
311frontend_latency=1
312response_latency=1
313snoop_filter=Null
314snoop_response_latency=1
315system=system
316use_default_range=false
317width=32
318master=system.cpu.l2cache.cpu_side
319slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port
320
321[system.cpu.tracer]
322type=ExeTracer
323eventq_index=0
324
325[system.cpu.workload]
326type=LiveProcess
327cmd=hello
328cwd=
329drivers=
330egid=100
331env=
332errout=cerr
333euid=100
334eventq_index=0
335executable=/scratch/nilay/GEM5/gem5/tests/test-progs/hello/bin/arm/linux/hello
336gid=100
337input=cin
338kvmInSE=false
339max_stack_size=67108864
340output=cout
341pid=100
342ppid=99
343simpoint=0
344system=system
345uid=100
346useArchPT=false
347
348[system.cpu_clk_domain]
349type=SrcClockDomain
350clock=500
351domain_id=-1
352eventq_index=0
353init_perf_level=0
354voltage_domain=system.voltage_domain
355
356[system.dvfs_handler]
357type=DVFSHandler
358domains=
359enable=false
360eventq_index=0
361sys_clk_domain=system.clk_domain
362transition_latency=100000000
363
364[system.membus]
365type=CoherentXBar
366clk_domain=system.clk_domain
367eventq_index=0
368forward_latency=4
369frontend_latency=3
370response_latency=2
371snoop_filter=Null
372snoop_response_latency=4
373system=system
374use_default_range=false
375width=16
376master=system.physmem.port
377slave=system.system_port system.cpu.l2cache.mem_side
378
379[system.physmem]
380type=SimpleMemory
381bandwidth=73.000000
382clk_domain=system.clk_domain
383conf_table_reported=true
384eventq_index=0
385in_addr_map=true
386latency=30000
387latency_var=0
388null=false
389range=0:134217727
390port=system.membus.master[0]
391
392[system.voltage_domain]
393type=VoltageDomain
394eventq_index=0
395voltage=1.000000
396