Deleted Added
sdiff udiff text old ( 10063:9595c7a1d837 ) new ( 10220:9eab5efc02e8 )
full compact
1
2---------- Begin Simulation Statistics ----------
3sim_seconds 0.000003 # Number of seconds simulated
4sim_ticks 2870500 # Number of ticks simulated
5final_tick 2870500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
6sim_freq 1000000000000 # Frequency of simulated ticks
7host_inst_rate 82560 # Simulator instruction rate (inst/s)
8host_op_rate 102991 # Simulator op (including micro ops) rate (op/s)
9host_tick_rate 51587489 # Simulator tick rate (ticks/s)
10host_mem_usage 311624 # Number of bytes of host memory used
11host_seconds 0.06 # Real time elapsed on the host
12sim_insts 4591 # Number of instructions simulated
13sim_ops 5729 # Number of ops (including micro ops) simulated
14system.voltage_domain.voltage 1 # Voltage in Volts
15system.clk_domain.clock 1000 # Clock period in ticks
16system.physmem.bytes_read::cpu.inst 18416 # Number of bytes read from this memory
17system.physmem.bytes_read::cpu.data 4491 # Number of bytes read from this memory
18system.physmem.bytes_read::total 22907 # Number of bytes read from this memory
19system.physmem.bytes_inst_read::cpu.inst 18416 # Number of instructions bytes read from this memory

--- 122 unchanged lines hidden (view full) ---

142system.cpu.num_mem_refs 2138 # number of memory refs
143system.cpu.num_load_insts 1200 # Number of load instructions
144system.cpu.num_store_insts 938 # Number of store instructions
145system.cpu.num_idle_cycles 0 # Number of idle cycles
146system.cpu.num_busy_cycles 5742 # Number of busy cycles
147system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
148system.cpu.idle_fraction 0 # Percentage of idle cycles
149system.cpu.Branches 1007 # Number of branches fetched
150
151---------- End Simulation Statistics ----------