1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 0.000017 # Number of seconds simulated 4sim_ticks 16955000 # Number of ticks simulated 5final_tick 16955000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks 7host_inst_rate 43189 # Simulator instruction rate (inst/s) 8host_op_rate 53887 # Simulator op (including micro ops) rate (op/s) --- 692 unchanged lines hidden (view full) --- 701system.cpu.commit.bw_lim_events 121 # number cycles where commit BW limit reached 702system.cpu.commit.bw_limited 0 # number of insts not committed due to BW limits 703system.cpu.rob.rob_reads 23248 # The number of ROB reads 704system.cpu.rob.rob_writes 23415 # The number of ROB writes 705system.cpu.timesIdled 221 # Number of times that the entire CPU went into an idle state and unscheduled itself 706system.cpu.idleCycles 20659 # Total number of cycles that the CPU has spent unscheduled due to idling 707system.cpu.committedInsts 4591 # Number of Instructions Simulated 708system.cpu.committedOps 5729 # Number of Ops (including micro ops) Simulated |
709system.cpu.cpi 7.386408 # CPI: Cycles Per Instruction 710system.cpu.cpi_total 7.386408 # CPI: Total CPI of All Threads 711system.cpu.ipc 0.135384 # IPC: Instructions Per Cycle 712system.cpu.ipc_total 0.135384 # IPC: Total IPC of All Threads 713system.cpu.int_regfile_reads 39214 # number of integer regfile reads 714system.cpu.int_regfile_writes 7985 # number of integer regfile writes 715system.cpu.fp_regfile_reads 16 # number of floating regfile reads 716system.cpu.misc_regfile_reads 3239 # number of misc regfile reads --- 382 unchanged lines hidden --- |