1Redirecting stdout to build/ARM/tests/opt/quick/se/00.hello/arm/linux/o3-timing-checker/simout
2Redirecting stderr to build/ARM/tests/opt/quick/se/00.hello/arm/linux/o3-timing-checker/simerr
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3gem5 Simulator System. http://gem5.org
4gem5 is copyrighted software; use the --copyright option for details.
5
| 1gem5 Simulator System. http://gem5.org
2gem5 is copyrighted software; use the --copyright option for details.
3
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6gem5 compiled Jun 21 2014 11:22:42
7gem5 started Jun 21 2014 11:25:19
| 4gem5 compiled Apr 22 2015 10:58:25
5gem5 started Apr 22 2015 14:33:28
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8gem5 executing on phenom
9command line: build/ARM/gem5.opt -d build/ARM/tests/opt/quick/se/00.hello/arm/linux/o3-timing-checker -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/ARM/tests/opt/quick/se/00.hello/arm/linux/o3-timing-checker
| 6gem5 executing on phenom
7command line: build/ARM/gem5.opt -d build/ARM/tests/opt/quick/se/00.hello/arm/linux/o3-timing-checker -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/ARM/tests/opt/quick/se/00.hello/arm/linux/o3-timing-checker
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| 8
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10Global frequency set at 1000000000000 ticks per second
| 9Global frequency set at 1000000000000 ticks per second
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11 0: system.cpu.checker.isa: ISA system set to: 0 0x54ee6d0
12 0: system.cpu.isa: ISA system set to: 0 0x54ee6d0
| 10 0: system.cpu.checker.isa: ISA system set to: 0 0x38f90a0
11 0: system.cpu.isa: ISA system set to: 0 0x38f90a0
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13info: Entering event queue @ 0. Starting simulation...
14Hello world!
| 12info: Entering event queue @ 0. Starting simulation...
13Hello world!
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15Exiting @ tick 16786000 because target called exit()
| 14Exiting @ tick 17307500 because target called exit()
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