| config.ini (9265:8fe936e937bd) | config.ini (9348:44d31345e360) |
|---|---|
| 1[root] 2type=Root 3children=system 4full_system=false 5time_sync_enable=false 6time_sync_period=100000000000 7time_sync_spin_threshold=100000000 8 9[system] 10type=System 11children=cpu membus physmem 12boot_osflags=a | 1[root] 2type=Root 3children=system 4full_system=false 5time_sync_enable=false 6time_sync_period=100000000000 7time_sync_spin_threshold=100000000 8 9[system] 10type=System 11children=cpu membus physmem 12boot_osflags=a |
| 13clock=1 | 13clock=1000 |
| 14init_param=0 15kernel= 16load_addr_mask=1099511627775 17mem_mode=atomic 18memories=system.physmem 19num_work_ids=16 20readfile= 21symbolfile= --- 101 unchanged lines hidden (view full) --- 123workload=system.cpu.workload 124dcache_port=system.cpu.dcache.cpu_side 125icache_port=system.cpu.icache.cpu_side 126 127[system.cpu.checker] 128type=O3Checker 129children=dtb itb tracer 130checker=Null | 14init_param=0 15kernel= 16load_addr_mask=1099511627775 17mem_mode=atomic 18memories=system.physmem 19num_work_ids=16 20readfile= 21symbolfile= --- 101 unchanged lines hidden (view full) --- 123workload=system.cpu.workload 124dcache_port=system.cpu.dcache.cpu_side 125icache_port=system.cpu.icache.cpu_side 126 127[system.cpu.checker] 128type=O3Checker 129children=dtb itb tracer 130checker=Null |
| 131clock=1 | 131clock=500 |
| 132cpu_id=0 133defer_registration=false 134do_checkpoint_insts=true 135do_quiesce=true 136do_statistics_insts=true 137dtb=system.cpu.checker.dtb 138exitOnError=false 139function_trace=false --- 16 unchanged lines hidden (view full) --- 156[system.cpu.checker.dtb] 157type=ArmTLB 158children=walker 159size=64 160walker=system.cpu.checker.dtb.walker 161 162[system.cpu.checker.dtb.walker] 163type=ArmTableWalker | 132cpu_id=0 133defer_registration=false 134do_checkpoint_insts=true 135do_quiesce=true 136do_statistics_insts=true 137dtb=system.cpu.checker.dtb 138exitOnError=false 139function_trace=false --- 16 unchanged lines hidden (view full) --- 156[system.cpu.checker.dtb] 157type=ArmTLB 158children=walker 159size=64 160walker=system.cpu.checker.dtb.walker 161 162[system.cpu.checker.dtb.walker] 163type=ArmTableWalker |
| 164clock=1 | 164clock=500 |
| 165num_squash_per_cycle=2 166sys=system 167port=system.cpu.toL2Bus.slave[5] 168 169[system.cpu.checker.itb] 170type=ArmTLB 171children=walker 172size=64 173walker=system.cpu.checker.itb.walker 174 175[system.cpu.checker.itb.walker] 176type=ArmTableWalker | 165num_squash_per_cycle=2 166sys=system 167port=system.cpu.toL2Bus.slave[5] 168 169[system.cpu.checker.itb] 170type=ArmTLB 171children=walker 172size=64 173walker=system.cpu.checker.itb.walker 174 175[system.cpu.checker.itb.walker] 176type=ArmTableWalker |
| 177clock=1 | 177clock=500 |
| 178num_squash_per_cycle=2 179sys=system 180port=system.cpu.toL2Bus.slave[4] 181 182[system.cpu.checker.tracer] 183type=ExeTracer 184 185[system.cpu.dcache] 186type=BaseCache 187addr_ranges=0:18446744073709551615 188assoc=2 189block_size=64 | 178num_squash_per_cycle=2 179sys=system 180port=system.cpu.toL2Bus.slave[4] 181 182[system.cpu.checker.tracer] 183type=ExeTracer 184 185[system.cpu.dcache] 186type=BaseCache 187addr_ranges=0:18446744073709551615 188assoc=2 189block_size=64 |
| 190clock=1 | 190clock=500 |
| 191forward_snoops=true 192hash_delay=1 | 191forward_snoops=true 192hash_delay=1 |
| 193hit_latency=1000 | 193hit_latency=2 |
| 194is_top_level=true 195max_miss_count=0 | 194is_top_level=true 195max_miss_count=0 |
| 196mshrs=10 | 196mshrs=4 |
| 197prefetch_on_access=false 198prefetcher=Null 199prioritizeRequests=false 200repl=Null | 197prefetch_on_access=false 198prefetcher=Null 199prioritizeRequests=false 200repl=Null |
| 201response_latency=1000 | 201response_latency=2 |
| 202size=262144 203subblock_size=0 204system=system 205tgts_per_mshr=20 206trace_addr=0 207two_queue=false 208write_buffers=8 209cpu_side=system.cpu.dcache_port 210mem_side=system.cpu.toL2Bus.slave[1] 211 212[system.cpu.dtb] 213type=ArmTLB 214children=walker 215size=64 216walker=system.cpu.dtb.walker 217 218[system.cpu.dtb.walker] 219type=ArmTableWalker | 202size=262144 203subblock_size=0 204system=system 205tgts_per_mshr=20 206trace_addr=0 207two_queue=false 208write_buffers=8 209cpu_side=system.cpu.dcache_port 210mem_side=system.cpu.toL2Bus.slave[1] 211 212[system.cpu.dtb] 213type=ArmTLB 214children=walker 215size=64 216walker=system.cpu.dtb.walker 217 218[system.cpu.dtb.walker] 219type=ArmTableWalker |
| 220clock=1 | 220clock=500 |
| 221num_squash_per_cycle=2 222sys=system 223port=system.cpu.toL2Bus.slave[3] 224 225[system.cpu.fuPool] 226type=FUPool 227children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8 228FUList=system.cpu.fuPool.FUList0 system.cpu.fuPool.FUList1 system.cpu.fuPool.FUList2 system.cpu.fuPool.FUList3 system.cpu.fuPool.FUList4 system.cpu.fuPool.FUList5 system.cpu.fuPool.FUList6 system.cpu.fuPool.FUList7 system.cpu.fuPool.FUList8 --- 256 unchanged lines hidden (view full) --- 485opClass=IprAccess 486opLat=3 487 488[system.cpu.icache] 489type=BaseCache 490addr_ranges=0:18446744073709551615 491assoc=2 492block_size=64 | 221num_squash_per_cycle=2 222sys=system 223port=system.cpu.toL2Bus.slave[3] 224 225[system.cpu.fuPool] 226type=FUPool 227children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8 228FUList=system.cpu.fuPool.FUList0 system.cpu.fuPool.FUList1 system.cpu.fuPool.FUList2 system.cpu.fuPool.FUList3 system.cpu.fuPool.FUList4 system.cpu.fuPool.FUList5 system.cpu.fuPool.FUList6 system.cpu.fuPool.FUList7 system.cpu.fuPool.FUList8 --- 256 unchanged lines hidden (view full) --- 485opClass=IprAccess 486opLat=3 487 488[system.cpu.icache] 489type=BaseCache 490addr_ranges=0:18446744073709551615 491assoc=2 492block_size=64 |
| 493clock=1 | 493clock=500 |
| 494forward_snoops=true 495hash_delay=1 | 494forward_snoops=true 495hash_delay=1 |
| 496hit_latency=1000 | 496hit_latency=2 |
| 497is_top_level=true 498max_miss_count=0 | 497is_top_level=true 498max_miss_count=0 |
| 499mshrs=10 | 499mshrs=4 |
| 500prefetch_on_access=false 501prefetcher=Null 502prioritizeRequests=false 503repl=Null | 500prefetch_on_access=false 501prefetcher=Null 502prioritizeRequests=false 503repl=Null |
| 504response_latency=1000 | 504response_latency=2 |
| 505size=131072 506subblock_size=0 507system=system 508tgts_per_mshr=20 509trace_addr=0 510two_queue=false 511write_buffers=8 512cpu_side=system.cpu.icache_port --- 5 unchanged lines hidden (view full) --- 518[system.cpu.itb] 519type=ArmTLB 520children=walker 521size=64 522walker=system.cpu.itb.walker 523 524[system.cpu.itb.walker] 525type=ArmTableWalker | 505size=131072 506subblock_size=0 507system=system 508tgts_per_mshr=20 509trace_addr=0 510two_queue=false 511write_buffers=8 512cpu_side=system.cpu.icache_port --- 5 unchanged lines hidden (view full) --- 518[system.cpu.itb] 519type=ArmTLB 520children=walker 521size=64 522walker=system.cpu.itb.walker 523 524[system.cpu.itb.walker] 525type=ArmTableWalker |
| 526clock=1 | 526clock=500 |
| 527num_squash_per_cycle=2 528sys=system 529port=system.cpu.toL2Bus.slave[2] 530 531[system.cpu.l2cache] 532type=BaseCache 533addr_ranges=0:18446744073709551615 | 527num_squash_per_cycle=2 528sys=system 529port=system.cpu.toL2Bus.slave[2] 530 531[system.cpu.l2cache] 532type=BaseCache 533addr_ranges=0:18446744073709551615 |
| 534assoc=2 | 534assoc=8 |
| 535block_size=64 | 535block_size=64 |
| 536clock=1 | 536clock=500 |
| 537forward_snoops=true 538hash_delay=1 | 537forward_snoops=true 538hash_delay=1 |
| 539hit_latency=1000 | 539hit_latency=20 |
| 540is_top_level=false 541max_miss_count=0 | 540is_top_level=false 541max_miss_count=0 |
| 542mshrs=10 | 542mshrs=20 |
| 543prefetch_on_access=false 544prefetcher=Null 545prioritizeRequests=false 546repl=Null | 543prefetch_on_access=false 544prefetcher=Null 545prioritizeRequests=false 546repl=Null |
| 547response_latency=1000 | 547response_latency=20 |
| 548size=2097152 549subblock_size=0 550system=system | 548size=2097152 549subblock_size=0 550system=system |
| 551tgts_per_mshr=5 | 551tgts_per_mshr=12 |
| 552trace_addr=0 553two_queue=false 554write_buffers=8 555cpu_side=system.cpu.toL2Bus.master[0] 556mem_side=system.membus.slave[1] 557 558[system.cpu.toL2Bus] 559type=CoherentBus 560block_size=64 | 552trace_addr=0 553two_queue=false 554write_buffers=8 555cpu_side=system.cpu.toL2Bus.master[0] 556mem_side=system.membus.slave[1] 557 558[system.cpu.toL2Bus] 559type=CoherentBus 560block_size=64 |
| 561clock=1000 | 561clock=500 |
| 562header_cycles=1 563use_default_range=false | 562header_cycles=1 563use_default_range=false |
| 564width=8 | 564width=32 |
| 565master=system.cpu.l2cache.cpu_side 566slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.checker.itb.walker.port system.cpu.checker.dtb.walker.port 567 568[system.cpu.tracer] 569type=ExeTracer 570 571[system.cpu.workload] 572type=LiveProcess --- 20 unchanged lines hidden (view full) --- 593clock=1000 594header_cycles=1 595use_default_range=false 596width=8 597master=system.physmem.port 598slave=system.system_port system.cpu.l2cache.mem_side 599 600[system.physmem] | 565master=system.cpu.l2cache.cpu_side 566slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.checker.itb.walker.port system.cpu.checker.dtb.walker.port 567 568[system.cpu.tracer] 569type=ExeTracer 570 571[system.cpu.workload] 572type=LiveProcess --- 20 unchanged lines hidden (view full) --- 593clock=1000 594header_cycles=1 595use_default_range=false 596width=8 597master=system.physmem.port 598slave=system.system_port system.cpu.l2cache.mem_side 599 600[system.physmem] |
| 601type=SimpleMemory 602bandwidth=73.000000 603clock=1 | 601type=SimpleDRAM 602addr_mapping=openmap 603banks_per_rank=8 604clock=1000 |
| 604conf_table_reported=false 605in_addr_map=true | 605conf_table_reported=false 606in_addr_map=true |
| 606latency=30000 607latency_var=0 | 607lines_per_rowbuffer=64 608mem_sched_policy=fcfs |
| 608null=false | 609null=false |
| 610page_policy=open |
|
| 609range=0:134217727 | 611range=0:134217727 |
| 612ranks_per_channel=2 613read_buffer_size=32 614tBURST=4000 615tCL=14000 616tRCD=14000 617tREFI=7800000 618tRFC=300000 619tRP=14000 620tWTR=1000 621write_buffer_size=32 622write_thresh_perc=70 |
|
| 610zero=false 611port=system.membus.master[0] 612 | 623zero=false 624port=system.membus.master[0] 625 |