| config.ini (9055:38f1926fb599) | config.ini (9096:8971a998190a) |
|---|---|
| 1[root] 2type=Root 3children=system 4full_system=false 5time_sync_enable=false 6time_sync_period=100000000000 7time_sync_spin_threshold=100000000 8 --- 542 unchanged lines hidden (view full) --- 551mem_side=system.membus.slave[1] 552 553[system.cpu.toL2Bus] 554type=CoherentBus 555block_size=64 556clock=1000 557header_cycles=1 558use_default_range=false | 1[root] 2type=Root 3children=system 4full_system=false 5time_sync_enable=false 6time_sync_period=100000000000 7time_sync_spin_threshold=100000000 8 --- 542 unchanged lines hidden (view full) --- 551mem_side=system.membus.slave[1] 552 553[system.cpu.toL2Bus] 554type=CoherentBus 555block_size=64 556clock=1000 557header_cycles=1 558use_default_range=false |
| 559width=64 | 559width=8 |
| 560master=system.cpu.l2cache.cpu_side 561slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.checker.itb.walker.port system.cpu.checker.dtb.walker.port 562 563[system.cpu.tracer] 564type=ExeTracer 565 566[system.cpu.workload] 567type=LiveProcess --- 15 unchanged lines hidden (view full) --- 583uid=100 584 585[system.membus] 586type=CoherentBus 587block_size=64 588clock=1000 589header_cycles=1 590use_default_range=false | 560master=system.cpu.l2cache.cpu_side 561slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.checker.itb.walker.port system.cpu.checker.dtb.walker.port 562 563[system.cpu.tracer] 564type=ExeTracer 565 566[system.cpu.workload] 567type=LiveProcess --- 15 unchanged lines hidden (view full) --- 583uid=100 584 585[system.membus] 586type=CoherentBus 587block_size=64 588clock=1000 589header_cycles=1 590use_default_range=false |
| 591width=64 | 591width=8 |
| 592master=system.physmem.port[0] 593slave=system.system_port system.cpu.l2cache.mem_side 594 595[system.physmem] 596type=SimpleMemory 597conf_table_reported=false 598file= 599in_addr_map=true 600latency=30000 601latency_var=0 602null=false 603range=0:134217727 604zero=false 605port=system.membus.master[0] 606 | 592master=system.physmem.port[0] 593slave=system.system_port system.cpu.l2cache.mem_side 594 595[system.physmem] 596type=SimpleMemory 597conf_table_reported=false 598file= 599in_addr_map=true 600latency=30000 601latency_var=0 602null=false 603range=0:134217727 604zero=false 605port=system.membus.master[0] 606 |