config.ini (8983:8800b05e1cb3) | config.ini (9055:38f1926fb599) |
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1[root] 2type=Root 3children=system 4full_system=false 5time_sync_enable=false 6time_sync_period=100000000000 7time_sync_spin_threshold=100000000 8 --- 537 unchanged lines hidden (view full) --- 546tgts_per_mshr=5 547trace_addr=0 548two_queue=false 549write_buffers=8 550cpu_side=system.cpu.toL2Bus.master[0] 551mem_side=system.membus.slave[1] 552 553[system.cpu.toL2Bus] | 1[root] 2type=Root 3children=system 4full_system=false 5time_sync_enable=false 6time_sync_period=100000000000 7time_sync_spin_threshold=100000000 8 --- 537 unchanged lines hidden (view full) --- 546tgts_per_mshr=5 547trace_addr=0 548two_queue=false 549write_buffers=8 550cpu_side=system.cpu.toL2Bus.master[0] 551mem_side=system.membus.slave[1] 552 553[system.cpu.toL2Bus] |
554type=Bus | 554type=CoherentBus |
555block_size=64 | 555block_size=64 |
556bus_id=0 | |
557clock=1000 558header_cycles=1 559use_default_range=false 560width=64 561master=system.cpu.l2cache.cpu_side 562slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.checker.itb.walker.port system.cpu.checker.dtb.walker.port 563 564[system.cpu.tracer] --- 14 unchanged lines hidden (view full) --- 579output=cout 580pid=100 581ppid=99 582simpoint=0 583system=system 584uid=100 585 586[system.membus] | 556clock=1000 557header_cycles=1 558use_default_range=false 559width=64 560master=system.cpu.l2cache.cpu_side 561slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.checker.itb.walker.port system.cpu.checker.dtb.walker.port 562 563[system.cpu.tracer] --- 14 unchanged lines hidden (view full) --- 578output=cout 579pid=100 580ppid=99 581simpoint=0 582system=system 583uid=100 584 585[system.membus] |
587type=Bus | 586type=CoherentBus |
588block_size=64 | 587block_size=64 |
589bus_id=0 | |
590clock=1000 591header_cycles=1 592use_default_range=false 593width=64 594master=system.physmem.port[0] 595slave=system.system_port system.cpu.l2cache.mem_side 596 597[system.physmem] 598type=SimpleMemory 599conf_table_reported=false 600file= 601in_addr_map=true 602latency=30000 603latency_var=0 604null=false 605range=0:134217727 606zero=false 607port=system.membus.master[0] 608 | 588clock=1000 589header_cycles=1 590use_default_range=false 591width=64 592master=system.physmem.port[0] 593slave=system.system_port system.cpu.l2cache.mem_side 594 595[system.physmem] 596type=SimpleMemory 597conf_table_reported=false 598file= 599in_addr_map=true 600latency=30000 601latency_var=0 602null=false 603range=0:134217727 604zero=false 605port=system.membus.master[0] 606 |