| config.ini (11312:3d7a85d71bd1) | config.ini (11384:e3cbd2823210) |
|---|---|
| 1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=false 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 --- 300 unchanged lines hidden (view full) --- 309type=Cache 310children=tags 311addr_ranges=0:18446744073709551615 312assoc=2 313clk_domain=system.cpu_clk_domain 314clusivity=mostly_incl 315demand_mshr_reserve=1 316eventq_index=0 | 1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=false 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 --- 300 unchanged lines hidden (view full) --- 309type=Cache 310children=tags 311addr_ranges=0:18446744073709551615 312assoc=2 313clk_domain=system.cpu_clk_domain 314clusivity=mostly_incl 315demand_mshr_reserve=1 316eventq_index=0 |
| 317forward_snoops=true | |
| 318hit_latency=2 319is_read_only=false 320max_miss_count=0 321mshrs=4 322prefetch_on_access=false 323prefetcher=Null 324response_latency=2 325sequential_access=false --- 368 unchanged lines hidden (view full) --- 694type=Cache 695children=tags 696addr_ranges=0:18446744073709551615 697assoc=2 698clk_domain=system.cpu_clk_domain 699clusivity=mostly_incl 700demand_mshr_reserve=1 701eventq_index=0 | 317hit_latency=2 318is_read_only=false 319max_miss_count=0 320mshrs=4 321prefetch_on_access=false 322prefetcher=Null 323response_latency=2 324sequential_access=false --- 368 unchanged lines hidden (view full) --- 693type=Cache 694children=tags 695addr_ranges=0:18446744073709551615 696assoc=2 697clk_domain=system.cpu_clk_domain 698clusivity=mostly_incl 699demand_mshr_reserve=1 700eventq_index=0 |
| 702forward_snoops=true | |
| 703hit_latency=2 704is_read_only=true 705max_miss_count=0 706mshrs=4 707prefetch_on_access=false 708prefetcher=Null 709response_latency=2 710sequential_access=false --- 96 unchanged lines hidden (view full) --- 807type=Cache 808children=tags 809addr_ranges=0:18446744073709551615 810assoc=8 811clk_domain=system.cpu_clk_domain 812clusivity=mostly_incl 813demand_mshr_reserve=1 814eventq_index=0 | 701hit_latency=2 702is_read_only=true 703max_miss_count=0 704mshrs=4 705prefetch_on_access=false 706prefetcher=Null 707response_latency=2 708sequential_access=false --- 96 unchanged lines hidden (view full) --- 805type=Cache 806children=tags 807addr_ranges=0:18446744073709551615 808assoc=8 809clk_domain=system.cpu_clk_domain 810clusivity=mostly_incl 811demand_mshr_reserve=1 812eventq_index=0 |
| 815forward_snoops=true | |
| 816hit_latency=20 817is_read_only=false 818max_miss_count=0 819mshrs=20 820prefetch_on_access=false 821prefetcher=Null 822response_latency=20 823sequential_access=false --- 18 unchanged lines hidden (view full) --- 842 843[system.cpu.toL2Bus] 844type=CoherentXBar 845children=snoop_filter 846clk_domain=system.cpu_clk_domain 847eventq_index=0 848forward_latency=0 849frontend_latency=1 | 813hit_latency=20 814is_read_only=false 815max_miss_count=0 816mshrs=20 817prefetch_on_access=false 818prefetcher=Null 819response_latency=20 820sequential_access=false --- 18 unchanged lines hidden (view full) --- 839 840[system.cpu.toL2Bus] 841type=CoherentXBar 842children=snoop_filter 843clk_domain=system.cpu_clk_domain 844eventq_index=0 845forward_latency=0 846frontend_latency=1 |
| 847point_of_coherency=false |
|
| 850response_latency=1 851snoop_filter=system.cpu.toL2Bus.snoop_filter 852snoop_response_latency=1 853system=system 854use_default_range=false 855width=32 856master=system.cpu.l2cache.cpu_side 857slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.checker.itb.walker.port system.cpu.checker.dtb.walker.port --- 14 unchanged lines hidden (view full) --- 872cmd=hello 873cwd= 874drivers= 875egid=100 876env= 877errout=cerr 878euid=100 879eventq_index=0 | 848response_latency=1 849snoop_filter=system.cpu.toL2Bus.snoop_filter 850snoop_response_latency=1 851system=system 852use_default_range=false 853width=32 854master=system.cpu.l2cache.cpu_side 855slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.checker.itb.walker.port system.cpu.checker.dtb.walker.port --- 14 unchanged lines hidden (view full) --- 870cmd=hello 871cwd= 872drivers= 873egid=100 874env= 875errout=cerr 876euid=100 877eventq_index=0 |
| 880executable=/dist/m5/regression/test-progs/hello/bin/arm/linux/hello | 878executable=/home/stever/hg/m5sim.org/gem5/tests/test-progs/hello/bin/arm/linux/hello |
| 881gid=100 882input=cin 883kvmInSE=false 884max_stack_size=67108864 885output=cout 886pid=100 887ppid=99 888simpoint=0 --- 18 unchanged lines hidden (view full) --- 907transition_latency=100000000 908 909[system.membus] 910type=CoherentXBar 911clk_domain=system.clk_domain 912eventq_index=0 913forward_latency=4 914frontend_latency=3 | 879gid=100 880input=cin 881kvmInSE=false 882max_stack_size=67108864 883output=cout 884pid=100 885ppid=99 886simpoint=0 --- 18 unchanged lines hidden (view full) --- 905transition_latency=100000000 906 907[system.membus] 908type=CoherentXBar 909clk_domain=system.clk_domain 910eventq_index=0 911forward_latency=4 912frontend_latency=3 |
| 913point_of_coherency=true |
|
| 915response_latency=2 916snoop_filter=Null 917snoop_response_latency=4 918system=system 919use_default_range=false 920width=16 921master=system.physmem.port 922slave=system.system_port system.cpu.l2cache.mem_side --- 83 unchanged lines hidden --- | 914response_latency=2 915snoop_filter=Null 916snoop_response_latency=4 917system=system 918use_default_range=false 919width=16 920master=system.physmem.port 921slave=system.system_port system.cpu.l2cache.mem_side --- 83 unchanged lines hidden --- |