3,5c3,5
< sim_seconds 0.000107 # Number of seconds simulated
< sim_ticks 107065 # Number of ticks simulated
< final_tick 107065 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
---
> sim_seconds 0.000112 # Number of seconds simulated
> sim_ticks 112490 # Number of ticks simulated
> final_tick 112490 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
7,11c7,11
< host_inst_rate 58028 # Simulator instruction rate (inst/s)
< host_op_rate 58023 # Simulator op (including micro ops) rate (op/s)
< host_tick_rate 970128 # Simulator tick rate (ticks/s)
< host_mem_usage 456600 # Number of bytes of host memory used
< host_seconds 0.11 # Real time elapsed on the host
---
> host_inst_rate 94486 # Simulator instruction rate (inst/s)
> host_op_rate 94411 # Simulator op (including micro ops) rate (op/s)
> host_tick_rate 1658372 # Simulator tick rate (ticks/s)
> host_mem_usage 414356 # Number of bytes of host memory used
> host_seconds 0.07 # Real time elapsed on the host
16c16
< system.mem_ctrls.pwrStateResidencyTicks::UNDEFINED 107065 # Cumulative time (in ticks) in various power states
---
> system.mem_ctrls.pwrStateResidencyTicks::UNDEFINED 112490 # Cumulative time (in ticks) in various power states
25,30c25,30
< system.mem_ctrls.bw_read::ruby.dir_cntrl0 1034735908 # Total read bandwidth from this memory (bytes/s)
< system.mem_ctrls.bw_read::total 1034735908 # Total read bandwidth from this memory (bytes/s)
< system.mem_ctrls.bw_write::ruby.dir_cntrl0 1032344837 # Write bandwidth from this memory (bytes/s)
< system.mem_ctrls.bw_write::total 1032344837 # Write bandwidth from this memory (bytes/s)
< system.mem_ctrls.bw_total::ruby.dir_cntrl0 2067080745 # Total bandwidth to/from this memory (bytes/s)
< system.mem_ctrls.bw_total::total 2067080745 # Total bandwidth to/from this memory (bytes/s)
---
> system.mem_ctrls.bw_read::ruby.dir_cntrl0 984834207 # Total read bandwidth from this memory (bytes/s)
> system.mem_ctrls.bw_read::total 984834207 # Total read bandwidth from this memory (bytes/s)
> system.mem_ctrls.bw_write::ruby.dir_cntrl0 982558450 # Write bandwidth from this memory (bytes/s)
> system.mem_ctrls.bw_write::total 982558450 # Write bandwidth from this memory (bytes/s)
> system.mem_ctrls.bw_total::ruby.dir_cntrl0 1967392657 # Total bandwidth to/from this memory (bytes/s)
> system.mem_ctrls.bw_total::total 1967392657 # Total bandwidth to/from this memory (bytes/s)
35,37c35,37
< system.mem_ctrls.bytesReadDRAM 56512 # Total number of bytes read from DRAM
< system.mem_ctrls.bytesReadWrQ 54272 # Total number of bytes read from write queue
< system.mem_ctrls.bytesWritten 57856 # Total number of bytes written to DRAM
---
> system.mem_ctrls.bytesReadDRAM 56704 # Total number of bytes read from DRAM
> system.mem_ctrls.bytesReadWrQ 54080 # Total number of bytes read from write queue
> system.mem_ctrls.bytesWritten 57088 # Total number of bytes written to DRAM
40,41c40,41
< system.mem_ctrls.servicedByWrQ 848 # Number of DRAM read bursts serviced by the write queue
< system.mem_ctrls.mergedWrBursts 792 # Number of DRAM write bursts merged with an existing one
---
> system.mem_ctrls.servicedByWrQ 845 # Number of DRAM read bursts serviced by the write queue
> system.mem_ctrls.mergedWrBursts 803 # Number of DRAM write bursts merged with an existing one
43,47c43,47
< system.mem_ctrls.perBankRdBursts::0 85 # Per bank write bursts
< system.mem_ctrls.perBankRdBursts::1 47 # Per bank write bursts
< system.mem_ctrls.perBankRdBursts::2 74 # Per bank write bursts
< system.mem_ctrls.perBankRdBursts::3 68 # Per bank write bursts
< system.mem_ctrls.perBankRdBursts::4 112 # Per bank write bursts
---
> system.mem_ctrls.perBankRdBursts::0 83 # Per bank write bursts
> system.mem_ctrls.perBankRdBursts::1 50 # Per bank write bursts
> system.mem_ctrls.perBankRdBursts::2 70 # Per bank write bursts
> system.mem_ctrls.perBankRdBursts::3 63 # Per bank write bursts
> system.mem_ctrls.perBankRdBursts::4 108 # Per bank write bursts
53,64c53,64
< system.mem_ctrls.perBankRdBursts::10 49 # Per bank write bursts
< system.mem_ctrls.perBankRdBursts::11 33 # Per bank write bursts
< system.mem_ctrls.perBankRdBursts::12 17 # Per bank write bursts
< system.mem_ctrls.perBankRdBursts::13 263 # Per bank write bursts
< system.mem_ctrls.perBankRdBursts::14 79 # Per bank write bursts
< system.mem_ctrls.perBankRdBursts::15 28 # Per bank write bursts
< system.mem_ctrls.perBankWrBursts::0 83 # Per bank write bursts
< system.mem_ctrls.perBankWrBursts::1 47 # Per bank write bursts
< system.mem_ctrls.perBankWrBursts::2 80 # Per bank write bursts
< system.mem_ctrls.perBankWrBursts::3 68 # Per bank write bursts
< system.mem_ctrls.perBankWrBursts::4 133 # Per bank write bursts
< system.mem_ctrls.perBankWrBursts::5 25 # Per bank write bursts
---
> system.mem_ctrls.perBankRdBursts::10 55 # Per bank write bursts
> system.mem_ctrls.perBankRdBursts::11 36 # Per bank write bursts
> system.mem_ctrls.perBankRdBursts::12 18 # Per bank write bursts
> system.mem_ctrls.perBankRdBursts::13 270 # Per bank write bursts
> system.mem_ctrls.perBankRdBursts::14 81 # Per bank write bursts
> system.mem_ctrls.perBankRdBursts::15 24 # Per bank write bursts
> system.mem_ctrls.perBankWrBursts::0 82 # Per bank write bursts
> system.mem_ctrls.perBankWrBursts::1 51 # Per bank write bursts
> system.mem_ctrls.perBankWrBursts::2 73 # Per bank write bursts
> system.mem_ctrls.perBankWrBursts::3 60 # Per bank write bursts
> system.mem_ctrls.perBankWrBursts::4 126 # Per bank write bursts
> system.mem_ctrls.perBankWrBursts::5 27 # Per bank write bursts
66c66
< system.mem_ctrls.perBankWrBursts::7 4 # Per bank write bursts
---
> system.mem_ctrls.perBankWrBursts::7 3 # Per bank write bursts
69,71c69,71
< system.mem_ctrls.perBankWrBursts::10 46 # Per bank write bursts
< system.mem_ctrls.perBankWrBursts::11 28 # Per bank write bursts
< system.mem_ctrls.perBankWrBursts::12 11 # Per bank write bursts
---
> system.mem_ctrls.perBankWrBursts::10 50 # Per bank write bursts
> system.mem_ctrls.perBankWrBursts::11 33 # Per bank write bursts
> system.mem_ctrls.perBankWrBursts::12 12 # Per bank write bursts
74c74
< system.mem_ctrls.perBankWrBursts::15 28 # Per bank write bursts
---
> system.mem_ctrls.perBankWrBursts::15 24 # Per bank write bursts
77c77
< system.mem_ctrls.totGap 106993 # Total gap between requests
---
> system.mem_ctrls.totGap 112412 # Total gap between requests
92c92
< system.mem_ctrls.rdQLenPdf::0 883 # What read queue length does an incoming req see
---
> system.mem_ctrls.rdQLenPdf::0 886 # What read queue length does an incoming req see
139,141c139,141
< system.mem_ctrls.wrQLenPdf::15 9 # What write queue length does an incoming req see
< system.mem_ctrls.wrQLenPdf::16 10 # What write queue length does an incoming req see
< system.mem_ctrls.wrQLenPdf::17 50 # What write queue length does an incoming req see
---
> system.mem_ctrls.wrQLenPdf::15 6 # What write queue length does an incoming req see
> system.mem_ctrls.wrQLenPdf::16 6 # What write queue length does an incoming req see
> system.mem_ctrls.wrQLenPdf::17 51 # What write queue length does an incoming req see
143,147c143,147
< system.mem_ctrls.wrQLenPdf::19 60 # What write queue length does an incoming req see
< system.mem_ctrls.wrQLenPdf::20 61 # What write queue length does an incoming req see
< system.mem_ctrls.wrQLenPdf::21 57 # What write queue length does an incoming req see
< system.mem_ctrls.wrQLenPdf::22 56 # What write queue length does an incoming req see
< system.mem_ctrls.wrQLenPdf::23 57 # What write queue length does an incoming req see
---
> system.mem_ctrls.wrQLenPdf::19 57 # What write queue length does an incoming req see
> system.mem_ctrls.wrQLenPdf::20 56 # What write queue length does an incoming req see
> system.mem_ctrls.wrQLenPdf::21 60 # What write queue length does an incoming req see
> system.mem_ctrls.wrQLenPdf::22 57 # What write queue length does an incoming req see
> system.mem_ctrls.wrQLenPdf::23 56 # What write queue length does an incoming req see
155c155
< system.mem_ctrls.wrQLenPdf::31 55 # What write queue length does an incoming req see
---
> system.mem_ctrls.wrQLenPdf::31 56 # What write queue length does an incoming req see
157c157
< system.mem_ctrls.wrQLenPdf::33 1 # What write queue length does an incoming req see
---
> system.mem_ctrls.wrQLenPdf::33 0 # What write queue length does an incoming req see
188,201c188,201
< system.mem_ctrls.bytesPerActivate::samples 275 # Bytes accessed per row activation
< system.mem_ctrls.bytesPerActivate::mean 406.341818 # Bytes accessed per row activation
< system.mem_ctrls.bytesPerActivate::gmean 258.682678 # Bytes accessed per row activation
< system.mem_ctrls.bytesPerActivate::stdev 357.059585 # Bytes accessed per row activation
< system.mem_ctrls.bytesPerActivate::0-127 55 20.00% 20.00% # Bytes accessed per row activation
< system.mem_ctrls.bytesPerActivate::128-255 74 26.91% 46.91% # Bytes accessed per row activation
< system.mem_ctrls.bytesPerActivate::256-383 37 13.45% 60.36% # Bytes accessed per row activation
< system.mem_ctrls.bytesPerActivate::384-511 16 5.82% 66.18% # Bytes accessed per row activation
< system.mem_ctrls.bytesPerActivate::512-639 18 6.55% 72.73% # Bytes accessed per row activation
< system.mem_ctrls.bytesPerActivate::640-767 12 4.36% 77.09% # Bytes accessed per row activation
< system.mem_ctrls.bytesPerActivate::768-895 8 2.91% 80.00% # Bytes accessed per row activation
< system.mem_ctrls.bytesPerActivate::896-1023 6 2.18% 82.18% # Bytes accessed per row activation
< system.mem_ctrls.bytesPerActivate::1024-1151 49 17.82% 100.00% # Bytes accessed per row activation
< system.mem_ctrls.bytesPerActivate::total 275 # Bytes accessed per row activation
---
> system.mem_ctrls.bytesPerActivate::samples 264 # Bytes accessed per row activation
> system.mem_ctrls.bytesPerActivate::mean 424 # Bytes accessed per row activation
> system.mem_ctrls.bytesPerActivate::gmean 260.079273 # Bytes accessed per row activation
> system.mem_ctrls.bytesPerActivate::stdev 372.426347 # Bytes accessed per row activation
> system.mem_ctrls.bytesPerActivate::0-127 66 25.00% 25.00% # Bytes accessed per row activation
> system.mem_ctrls.bytesPerActivate::128-255 58 21.97% 46.97% # Bytes accessed per row activation
> system.mem_ctrls.bytesPerActivate::256-383 27 10.23% 57.20% # Bytes accessed per row activation
> system.mem_ctrls.bytesPerActivate::384-511 16 6.06% 63.26% # Bytes accessed per row activation
> system.mem_ctrls.bytesPerActivate::512-639 17 6.44% 69.70% # Bytes accessed per row activation
> system.mem_ctrls.bytesPerActivate::640-767 8 3.03% 72.73% # Bytes accessed per row activation
> system.mem_ctrls.bytesPerActivate::768-895 12 4.55% 77.27% # Bytes accessed per row activation
> system.mem_ctrls.bytesPerActivate::896-1023 10 3.79% 81.06% # Bytes accessed per row activation
> system.mem_ctrls.bytesPerActivate::1024-1151 50 18.94% 100.00% # Bytes accessed per row activation
> system.mem_ctrls.bytesPerActivate::total 264 # Bytes accessed per row activation
203,208c203,208
< system.mem_ctrls.rdPerTurnAround::mean 15.781818 # Reads before turning the bus around for writes
< system.mem_ctrls.rdPerTurnAround::gmean 15.596648 # Reads before turning the bus around for writes
< system.mem_ctrls.rdPerTurnAround::stdev 2.973282 # Reads before turning the bus around for writes
< system.mem_ctrls.rdPerTurnAround::12-13 4 7.27% 7.27% # Reads before turning the bus around for writes
< system.mem_ctrls.rdPerTurnAround::14-15 25 45.45% 52.73% # Reads before turning the bus around for writes
< system.mem_ctrls.rdPerTurnAround::16-17 21 38.18% 90.91% # Reads before turning the bus around for writes
---
> system.mem_ctrls.rdPerTurnAround::mean 15.818182 # Reads before turning the bus around for writes
> system.mem_ctrls.rdPerTurnAround::gmean 15.638991 # Reads before turning the bus around for writes
> system.mem_ctrls.rdPerTurnAround::stdev 2.938196 # Reads before turning the bus around for writes
> system.mem_ctrls.rdPerTurnAround::12-13 3 5.45% 5.45% # Reads before turning the bus around for writes
> system.mem_ctrls.rdPerTurnAround::14-15 24 43.64% 49.09% # Reads before turning the bus around for writes
> system.mem_ctrls.rdPerTurnAround::16-17 23 41.82% 90.91% # Reads before turning the bus around for writes
213,219c213,219
< system.mem_ctrls.wrPerTurnAround::mean 16.436364 # Writes before turning the bus around for reads
< system.mem_ctrls.wrPerTurnAround::gmean 16.408895 # Writes before turning the bus around for reads
< system.mem_ctrls.wrPerTurnAround::stdev 0.995613 # Writes before turning the bus around for reads
< system.mem_ctrls.wrPerTurnAround::16 45 81.82% 81.82% # Writes before turning the bus around for reads
< system.mem_ctrls.wrPerTurnAround::17 2 3.64% 85.45% # Writes before turning the bus around for reads
< system.mem_ctrls.wrPerTurnAround::18 2 3.64% 89.09% # Writes before turning the bus around for reads
< system.mem_ctrls.wrPerTurnAround::19 6 10.91% 100.00% # Writes before turning the bus around for reads
---
> system.mem_ctrls.wrPerTurnAround::mean 16.218182 # Writes before turning the bus around for reads
> system.mem_ctrls.wrPerTurnAround::gmean 16.206001 # Writes before turning the bus around for reads
> system.mem_ctrls.wrPerTurnAround::stdev 0.658025 # Writes before turning the bus around for reads
> system.mem_ctrls.wrPerTurnAround::16 49 89.09% 89.09% # Writes before turning the bus around for reads
> system.mem_ctrls.wrPerTurnAround::17 1 1.82% 90.91% # Writes before turning the bus around for reads
> system.mem_ctrls.wrPerTurnAround::18 4 7.27% 98.18% # Writes before turning the bus around for reads
> system.mem_ctrls.wrPerTurnAround::19 1 1.82% 100.00% # Writes before turning the bus around for reads
221,224c221,224
< system.mem_ctrls.totQLat 10887 # Total ticks spent queuing
< system.mem_ctrls.totMemAccLat 27664 # Total ticks spent from burst creation until serviced by the DRAM
< system.mem_ctrls.totBusLat 4415 # Total ticks spent in databus transfers
< system.mem_ctrls.avgQLat 12.33 # Average queueing delay per DRAM burst
---
> system.mem_ctrls.totQLat 16225 # Total ticks spent queuing
> system.mem_ctrls.totMemAccLat 33059 # Total ticks spent from burst creation until serviced by the DRAM
> system.mem_ctrls.totBusLat 4430 # Total ticks spent in databus transfers
> system.mem_ctrls.avgQLat 18.31 # Average queueing delay per DRAM burst
226,230c226,230
< system.mem_ctrls.avgMemAccLat 31.33 # Average memory access latency per DRAM burst
< system.mem_ctrls.avgRdBW 527.83 # Average DRAM read bandwidth in MiByte/s
< system.mem_ctrls.avgWrBW 540.38 # Average achieved write bandwidth in MiByte/s
< system.mem_ctrls.avgRdBWSys 1034.74 # Average system read bandwidth in MiByte/s
< system.mem_ctrls.avgWrBWSys 1032.34 # Average system write bandwidth in MiByte/s
---
> system.mem_ctrls.avgMemAccLat 37.31 # Average memory access latency per DRAM burst
> system.mem_ctrls.avgRdBW 504.08 # Average DRAM read bandwidth in MiByte/s
> system.mem_ctrls.avgWrBW 507.49 # Average achieved write bandwidth in MiByte/s
> system.mem_ctrls.avgRdBWSys 984.83 # Average system read bandwidth in MiByte/s
> system.mem_ctrls.avgWrBWSys 982.56 # Average system write bandwidth in MiByte/s
232,234c232,234
< system.mem_ctrls.busUtil 8.35 # Data bus utilization in percentage
< system.mem_ctrls.busUtilRead 4.12 # Data bus utilization in percentage for reads
< system.mem_ctrls.busUtilWrite 4.22 # Data bus utilization in percentage for writes
---
> system.mem_ctrls.busUtil 7.90 # Data bus utilization in percentage
> system.mem_ctrls.busUtilRead 3.94 # Data bus utilization in percentage for reads
> system.mem_ctrls.busUtilWrite 3.96 # Data bus utilization in percentage for writes
236,271c236,281
< system.mem_ctrls.avgWrQLen 26.13 # Average write queue length when enqueuing
< system.mem_ctrls.readRowHits 670 # Number of row buffer hits during reads
< system.mem_ctrls.writeRowHits 835 # Number of row buffer hits during writes
< system.mem_ctrls.readRowHitRate 75.88 # Row buffer hit rate for reads
< system.mem_ctrls.writeRowHitRate 89.30 # Row buffer hit rate for writes
< system.mem_ctrls.avgGap 30.94 # Average gap between requests
< system.mem_ctrls.pageHitRate 82.78 # Row buffer hit rate, read and write combined
< system.mem_ctrls_0.actEnergy 876960 # Energy for activate commands per rank (pJ)
< system.mem_ctrls_0.preEnergy 487200 # Energy for precharge commands per rank (pJ)
< system.mem_ctrls_0.readEnergy 4992000 # Energy for read commands per rank (pJ)
< system.mem_ctrls_0.writeEnergy 4489344 # Energy for write commands per rank (pJ)
< system.mem_ctrls_0.refreshEnergy 6611280 # Energy for refresh commands per rank (pJ)
< system.mem_ctrls_0.actBackEnergy 63943740 # Energy for active background per rank (pJ)
< system.mem_ctrls_0.preBackEnergy 4795800 # Energy for precharge background per rank (pJ)
< system.mem_ctrls_0.totalEnergy 86196324 # Total energy per rank (pJ)
< system.mem_ctrls_0.averagePower 849.408975 # Core power per rank (mW)
< system.mem_ctrls_0.memoryStateTime::IDLE 8418 # Time in different power states
< system.mem_ctrls_0.memoryStateTime::REF 3380 # Time in different power states
< system.mem_ctrls_0.memoryStateTime::PRE_PDN 0 # Time in different power states
< system.mem_ctrls_0.memoryStateTime::ACT 90483 # Time in different power states
< system.mem_ctrls_0.memoryStateTime::ACT_PDN 0 # Time in different power states
< system.mem_ctrls_1.actEnergy 1156680 # Energy for activate commands per rank (pJ)
< system.mem_ctrls_1.preEnergy 642600 # Energy for precharge commands per rank (pJ)
< system.mem_ctrls_1.readEnergy 5366400 # Energy for read commands per rank (pJ)
< system.mem_ctrls_1.writeEnergy 4385664 # Energy for write commands per rank (pJ)
< system.mem_ctrls_1.refreshEnergy 6611280 # Energy for refresh commands per rank (pJ)
< system.mem_ctrls_1.actBackEnergy 65375352 # Energy for active background per rank (pJ)
< system.mem_ctrls_1.preBackEnergy 3540000 # Energy for precharge background per rank (pJ)
< system.mem_ctrls_1.totalEnergy 87077976 # Total energy per rank (pJ)
< system.mem_ctrls_1.averagePower 858.097085 # Core power per rank (mW)
< system.mem_ctrls_1.memoryStateTime::IDLE 5471 # Time in different power states
< system.mem_ctrls_1.memoryStateTime::REF 3380 # Time in different power states
< system.mem_ctrls_1.memoryStateTime::PRE_PDN 0 # Time in different power states
< system.mem_ctrls_1.memoryStateTime::ACT 92641 # Time in different power states
< system.mem_ctrls_1.memoryStateTime::ACT_PDN 0 # Time in different power states
< system.pwrStateResidencyTicks::UNDEFINED 107065 # Cumulative time (in ticks) in various power states
---
> system.mem_ctrls.avgWrQLen 26.10 # Average write queue length when enqueuing
> system.mem_ctrls.readRowHits 674 # Number of row buffer hits during reads
> system.mem_ctrls.writeRowHits 833 # Number of row buffer hits during writes
> system.mem_ctrls.readRowHitRate 76.07 # Row buffer hit rate for reads
> system.mem_ctrls.writeRowHitRate 90.15 # Row buffer hit rate for writes
> system.mem_ctrls.avgGap 32.51 # Average gap between requests
> system.mem_ctrls.pageHitRate 83.26 # Row buffer hit rate, read and write combined
> system.mem_ctrls_0.actEnergy 735420 # Energy for activate commands per rank (pJ)
> system.mem_ctrls_0.preEnergy 386400 # Energy for precharge commands per rank (pJ)
> system.mem_ctrls_0.readEnergy 4581024 # Energy for read commands per rank (pJ)
> system.mem_ctrls_0.writeEnergy 3532896 # Energy for write commands per rank (pJ)
> system.mem_ctrls_0.refreshEnergy 8604960.000000 # Energy for refresh commands per rank (pJ)
> system.mem_ctrls_0.actBackEnergy 13923048 # Energy for active background per rank (pJ)
> system.mem_ctrls_0.preBackEnergy 195072 # Energy for precharge background per rank (pJ)
> system.mem_ctrls_0.actPowerDownEnergy 30921360 # Energy for active power-down per rank (pJ)
> system.mem_ctrls_0.prePowerDownEnergy 5237376 # Energy for precharge power-down per rank (pJ)
> system.mem_ctrls_0.selfRefreshEnergy 0 # Energy for self refresh per rank (pJ)
> system.mem_ctrls_0.totalEnergy 68117556 # Total energy per rank (pJ)
> system.mem_ctrls_0.averagePower 605.543213 # Core power per rank (mW)
> system.mem_ctrls_0.totalIdleTime 81406 # Total Idle time Per DRAM Rank
> system.mem_ctrls_0.memoryStateTime::IDLE 88 # Time in different power states
> system.mem_ctrls_0.memoryStateTime::REF 3640 # Time in different power states
> system.mem_ctrls_0.memoryStateTime::SREF 0 # Time in different power states
> system.mem_ctrls_0.memoryStateTime::PRE_PDN 13639 # Time in different power states
> system.mem_ctrls_0.memoryStateTime::ACT 27313 # Time in different power states
> system.mem_ctrls_0.memoryStateTime::ACT_PDN 67810 # Time in different power states
> system.mem_ctrls_1.actEnergy 1199520 # Energy for activate commands per rank (pJ)
> system.mem_ctrls_1.preEnergy 633696 # Energy for precharge commands per rank (pJ)
> system.mem_ctrls_1.readEnergy 5540640 # Energy for read commands per rank (pJ)
> system.mem_ctrls_1.writeEnergy 3917088 # Energy for write commands per rank (pJ)
> system.mem_ctrls_1.refreshEnergy 8604960.000000 # Energy for refresh commands per rank (pJ)
> system.mem_ctrls_1.actBackEnergy 12524952 # Energy for active background per rank (pJ)
> system.mem_ctrls_1.preBackEnergy 314880 # Energy for precharge background per rank (pJ)
> system.mem_ctrls_1.actPowerDownEnergy 33139344 # Energy for active power-down per rank (pJ)
> system.mem_ctrls_1.prePowerDownEnergy 4427136 # Energy for precharge power-down per rank (pJ)
> system.mem_ctrls_1.selfRefreshEnergy 0 # Energy for self refresh per rank (pJ)
> system.mem_ctrls_1.totalEnergy 70302216 # Total energy per rank (pJ)
> system.mem_ctrls_1.averagePower 624.964139 # Core power per rank (mW)
> system.mem_ctrls_1.totalIdleTime 83983 # Total Idle time Per DRAM Rank
> system.mem_ctrls_1.memoryStateTime::IDLE 260 # Time in different power states
> system.mem_ctrls_1.memoryStateTime::REF 3640 # Time in different power states
> system.mem_ctrls_1.memoryStateTime::SREF 0 # Time in different power states
> system.mem_ctrls_1.memoryStateTime::PRE_PDN 11529 # Time in different power states
> system.mem_ctrls_1.memoryStateTime::ACT 24387 # Time in different power states
> system.mem_ctrls_1.memoryStateTime::ACT_PDN 72674 # Time in different power states
> system.pwrStateResidencyTicks::UNDEFINED 112490 # Cumulative time (in ticks) in various power states
306,307c316,317
< system.cpu.pwrStateResidencyTicks::ON 107065 # Cumulative time (in ticks) in various power states
< system.cpu.numCycles 107065 # number of cpu cycles simulated
---
> system.cpu.pwrStateResidencyTicks::ON 112490 # Cumulative time (in ticks) in various power states
> system.cpu.numCycles 112490 # number of cpu cycles simulated
326c336
< system.cpu.num_busy_cycles 107065 # Number of busy cycles
---
> system.cpu.num_busy_cycles 112490 # Number of busy cycles
366c376
< system.ruby.pwrStateResidencyTicks::UNDEFINED 107065 # Cumulative time (in ticks) in various power states
---
> system.ruby.pwrStateResidencyTicks::UNDEFINED 112490 # Cumulative time (in ticks) in various power states
382,385c392,395
< system.ruby.latency_hist_seqr::mean 11.650951
< system.ruby.latency_hist_seqr::gmean 2.202191
< system.ruby.latency_hist_seqr::stdev 25.742711
< system.ruby.latency_hist_seqr | 8220 97.13% 97.13% | 190 2.25% 99.37% | 41 0.48% 99.86% | 1 0.01% 99.87% | 6 0.07% 99.94% | 4 0.05% 99.99% | 1 0.01% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
---
> system.ruby.latency_hist_seqr::mean 12.291977
> system.ruby.latency_hist_seqr::gmean 2.221869
> system.ruby.latency_hist_seqr::stdev 27.407806
> system.ruby.latency_hist_seqr | 7608 89.90% 89.90% | 798 9.43% 99.33% | 40 0.47% 99.80% | 5 0.06% 99.86% | 6 0.07% 99.93% | 6 0.07% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
397,400c407,410
< system.ruby.miss_latency_hist_seqr::mean 53.073368
< system.ruby.miss_latency_hist_seqr::gmean 47.451096
< system.ruby.miss_latency_hist_seqr::stdev 32.911544
< system.ruby.miss_latency_hist_seqr | 1488 85.96% 85.96% | 190 10.98% 96.94% | 41 2.37% 99.31% | 1 0.06% 99.36% | 6 0.35% 99.71% | 4 0.23% 99.94% | 1 0.06% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
---
> system.ruby.miss_latency_hist_seqr::mean 56.207395
> system.ruby.miss_latency_hist_seqr::gmean 49.560362
> system.ruby.miss_latency_hist_seqr::stdev 35.333412
> system.ruby.miss_latency_hist_seqr | 876 50.61% 50.61% | 798 46.10% 96.71% | 40 2.31% 99.02% | 5 0.29% 99.31% | 6 0.35% 99.65% | 6 0.35% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
403c413
< system.ruby.dir_cntrl0.pwrStateResidencyTicks::UNDEFINED 107065 # Cumulative time (in ticks) in various power states
---
> system.ruby.dir_cntrl0.pwrStateResidencyTicks::UNDEFINED 112490 # Cumulative time (in ticks) in various power states
407,408c417,418
< system.ruby.l1_cntrl0.sequencer.pwrStateResidencyTicks::UNDEFINED 107065 # Cumulative time (in ticks) in various power states
< system.ruby.l1_cntrl0.pwrStateResidencyTicks::UNDEFINED 107065 # Cumulative time (in ticks) in various power states
---
> system.ruby.l1_cntrl0.sequencer.pwrStateResidencyTicks::UNDEFINED 112490 # Cumulative time (in ticks) in various power states
> system.ruby.l1_cntrl0.pwrStateResidencyTicks::UNDEFINED 112490 # Cumulative time (in ticks) in various power states
410,411c420,421
< system.ruby.network.routers0.pwrStateResidencyTicks::UNDEFINED 107065 # Cumulative time (in ticks) in various power states
< system.ruby.network.routers0.percent_links_utilized 8.074534
---
> system.ruby.network.routers0.pwrStateResidencyTicks::UNDEFINED 112490 # Cumulative time (in ticks) in various power states
> system.ruby.network.routers0.percent_links_utilized 7.685128
420,421c430,431
< system.ruby.network.routers1.pwrStateResidencyTicks::UNDEFINED 107065 # Cumulative time (in ticks) in various power states
< system.ruby.network.routers1.percent_links_utilized 8.074534
---
> system.ruby.network.routers1.pwrStateResidencyTicks::UNDEFINED 112490 # Cumulative time (in ticks) in various power states
> system.ruby.network.routers1.percent_links_utilized 7.685128
430,431c440,441
< system.ruby.network.routers2.pwrStateResidencyTicks::UNDEFINED 107065 # Cumulative time (in ticks) in various power states
< system.ruby.network.routers2.percent_links_utilized 8.074534
---
> system.ruby.network.routers2.pwrStateResidencyTicks::UNDEFINED 112490 # Cumulative time (in ticks) in various power states
> system.ruby.network.routers2.percent_links_utilized 7.685128
440c450
< system.ruby.network.pwrStateResidencyTicks::UNDEFINED 107065 # Cumulative time (in ticks) in various power states
---
> system.ruby.network.pwrStateResidencyTicks::UNDEFINED 112490 # Cumulative time (in ticks) in various power states
449,450c459,460
< system.sys_port_proxy.pwrStateResidencyTicks::UNDEFINED 107065 # Cumulative time (in ticks) in various power states
< system.ruby.network.routers0.throttle0.link_utilization 8.082006
---
> system.sys_port_proxy.pwrStateResidencyTicks::UNDEFINED 112490 # Cumulative time (in ticks) in various power states
> system.ruby.network.routers0.throttle0.link_utilization 7.692239
455c465
< system.ruby.network.routers0.throttle1.link_utilization 8.067062
---
> system.ruby.network.routers0.throttle1.link_utilization 7.678016
460c470
< system.ruby.network.routers1.throttle0.link_utilization 8.067062
---
> system.ruby.network.routers1.throttle0.link_utilization 7.678016
465c475
< system.ruby.network.routers1.throttle1.link_utilization 8.082006
---
> system.ruby.network.routers1.throttle1.link_utilization 7.692239
470c480
< system.ruby.network.routers2.throttle0.link_utilization 8.082006
---
> system.ruby.network.routers2.throttle0.link_utilization 7.692239
475c485
< system.ruby.network.routers2.throttle1.link_utilization 8.067062
---
> system.ruby.network.routers2.throttle1.link_utilization 7.678016
493,496c503,506
< system.ruby.LD.latency_hist_seqr::mean 31.532489
< system.ruby.LD.latency_hist_seqr::gmean 10.421226
< system.ruby.LD.latency_hist_seqr::stdev 34.906160
< system.ruby.LD.latency_hist_seqr | 1091 92.07% 92.07% | 75 6.33% 98.40% | 15 1.27% 99.66% | 0 0.00% 99.66% | 2 0.17% 99.83% | 1 0.08% 99.92% | 1 0.08% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
---
> system.ruby.LD.latency_hist_seqr::mean 33.356118
> system.ruby.LD.latency_hist_seqr::gmean 10.708915
> system.ruby.LD.latency_hist_seqr::stdev 36.387225
> system.ruby.LD.latency_hist_seqr | 862 72.74% 72.74% | 301 25.40% 98.14% | 16 1.35% 99.49% | 3 0.25% 99.75% | 1 0.08% 99.83% | 2 0.17% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
508,511c518,521
< system.ruby.LD.miss_latency_hist_seqr::mean 50.699176
< system.ruby.LD.miss_latency_hist_seqr::gmean 45.385232
< system.ruby.LD.miss_latency_hist_seqr::stdev 32.101179
< system.ruby.LD.miss_latency_hist_seqr | 634 87.09% 87.09% | 75 10.30% 97.39% | 15 2.06% 99.45% | 0 0.00% 99.45% | 2 0.27% 99.73% | 1 0.14% 99.86% | 1 0.14% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
---
> system.ruby.LD.miss_latency_hist_seqr::mean 53.667582
> system.ruby.LD.miss_latency_hist_seqr::gmean 47.442261
> system.ruby.LD.miss_latency_hist_seqr::stdev 32.940895
> system.ruby.LD.miss_latency_hist_seqr | 405 55.63% 55.63% | 301 41.35% 96.98% | 16 2.20% 99.18% | 3 0.41% 99.59% | 1 0.14% 99.73% | 2 0.27% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
516,519c526,529
< system.ruby.ST.latency_hist_seqr::mean 16.426590
< system.ruby.ST.latency_hist_seqr::gmean 3.318487
< system.ruby.ST.latency_hist_seqr::stdev 28.264983
< system.ruby.ST.latency_hist_seqr | 592 68.44% 68.44% | 242 27.98% 96.42% | 21 2.43% 98.84% | 1 0.12% 98.96% | 4 0.46% 99.42% | 4 0.46% 99.88% | 0 0.00% 99.88% | 0 0.00% 99.88% | 0 0.00% 99.88% | 1 0.12% 100.00%
---
> system.ruby.ST.latency_hist_seqr::mean 17.479769
> system.ruby.ST.latency_hist_seqr::gmean 3.361529
> system.ruby.ST.latency_hist_seqr::stdev 31.340829
> system.ruby.ST.latency_hist_seqr | 592 68.44% 68.44% | 160 18.50% 86.94% | 102 11.79% 98.73% | 0 0.00% 98.73% | 4 0.46% 99.19% | 4 0.46% 99.65% | 1 0.12% 99.77% | 0 0.00% 99.77% | 1 0.12% 99.88% | 1 0.12% 100.00%
531,534c541,544
< system.ruby.ST.miss_latency_hist_seqr::mean 49.879121
< system.ruby.ST.miss_latency_hist_seqr::gmean 44.729882
< system.ruby.ST.miss_latency_hist_seqr::stdev 29.942777
< system.ruby.ST.miss_latency_hist_seqr | 0 0.00% 0.00% | 242 88.64% 88.64% | 21 7.69% 96.34% | 1 0.37% 96.70% | 4 1.47% 98.17% | 4 1.47% 99.63% | 0 0.00% 99.63% | 0 0.00% 99.63% | 0 0.00% 99.63% | 1 0.37% 100.00%
---
> system.ruby.ST.miss_latency_hist_seqr::mean 53.216117
> system.ruby.ST.miss_latency_hist_seqr::gmean 46.594106
> system.ruby.ST.miss_latency_hist_seqr::stdev 35.315815
> system.ruby.ST.miss_latency_hist_seqr | 0 0.00% 0.00% | 160 58.61% 58.61% | 102 37.36% 95.97% | 0 0.00% 95.97% | 4 1.47% 97.44% | 4 1.47% 98.90% | 1 0.37% 99.27% | 0 0.00% 99.27% | 1 0.37% 99.63% | 1 0.37% 100.00%
539,542c549,552
< system.ruby.IFETCH.latency_hist_seqr::mean 7.333073
< system.ruby.IFETCH.latency_hist_seqr::gmean 1.563492
< system.ruby.IFETCH.latency_hist_seqr::stdev 21.145733
< system.ruby.IFETCH.latency_hist_seqr | 6295 98.16% 98.16% | 93 1.45% 99.61% | 18 0.28% 99.89% | 1 0.02% 99.91% | 3 0.05% 99.95% | 3 0.05% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
---
> system.ruby.IFETCH.latency_hist_seqr::mean 7.699984
> system.ruby.IFETCH.latency_hist_seqr::gmean 1.571280
> system.ruby.IFETCH.latency_hist_seqr::stdev 22.534194
> system.ruby.IFETCH.latency_hist_seqr | 5994 93.47% 93.47% | 395 6.16% 99.63% | 16 0.25% 99.88% | 1 0.02% 99.89% | 3 0.05% 99.94% | 4 0.06% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
554,557c564,567
< system.ruby.IFETCH.miss_latency_hist_seqr::mean 56.635616
< system.ruby.IFETCH.miss_latency_hist_seqr::gmean 50.712708
< system.ruby.IFETCH.miss_latency_hist_seqr::stdev 34.440483
< system.ruby.IFETCH.miss_latency_hist_seqr | 612 83.84% 83.84% | 93 12.74% 96.58% | 18 2.47% 99.04% | 1 0.14% 99.18% | 3 0.41% 99.59% | 3 0.41% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
---
> system.ruby.IFETCH.miss_latency_hist_seqr::mean 59.858904
> system.ruby.IFETCH.miss_latency_hist_seqr::gmean 52.975537
> system.ruby.IFETCH.miss_latency_hist_seqr::stdev 37.310775
> system.ruby.IFETCH.miss_latency_hist_seqr | 311 42.60% 42.60% | 395 54.11% 96.71% | 16 2.19% 98.90% | 1 0.14% 99.04% | 3 0.41% 99.45% | 4 0.55% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
562,565c572,575
< system.ruby.Directory.miss_mach_latency_hist_seqr::mean 53.073368
< system.ruby.Directory.miss_mach_latency_hist_seqr::gmean 47.451096
< system.ruby.Directory.miss_mach_latency_hist_seqr::stdev 32.911544
< system.ruby.Directory.miss_mach_latency_hist_seqr | 1488 85.96% 85.96% | 190 10.98% 96.94% | 41 2.37% 99.31% | 1 0.06% 99.36% | 6 0.35% 99.71% | 4 0.23% 99.94% | 1 0.06% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
---
> system.ruby.Directory.miss_mach_latency_hist_seqr::mean 56.207395
> system.ruby.Directory.miss_mach_latency_hist_seqr::gmean 49.560362
> system.ruby.Directory.miss_mach_latency_hist_seqr::stdev 35.333412
> system.ruby.Directory.miss_mach_latency_hist_seqr | 876 50.61% 50.61% | 798 46.10% 96.71% | 40 2.31% 99.02% | 5 0.29% 99.31% | 6 0.35% 99.65% | 6 0.35% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
596,599c606,609
< system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::mean 50.699176
< system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::gmean 45.385232
< system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::stdev 32.101179
< system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr | 634 87.09% 87.09% | 75 10.30% 97.39% | 15 2.06% 99.45% | 0 0.00% 99.45% | 2 0.27% 99.73% | 1 0.14% 99.86% | 1 0.14% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
---
> system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::mean 53.667582
> system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::gmean 47.442261
> system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::stdev 32.940895
> system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr | 405 55.63% 55.63% | 301 41.35% 96.98% | 16 2.20% 99.18% | 3 0.41% 99.59% | 1 0.14% 99.73% | 2 0.27% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
604,607c614,617
< system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::mean 49.879121
< system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::gmean 44.729882
< system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::stdev 29.942777
< system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr | 0 0.00% 0.00% | 242 88.64% 88.64% | 21 7.69% 96.34% | 1 0.37% 96.70% | 4 1.47% 98.17% | 4 1.47% 99.63% | 0 0.00% 99.63% | 0 0.00% 99.63% | 0 0.00% 99.63% | 1 0.37% 100.00%
---
> system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::mean 53.216117
> system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::gmean 46.594106
> system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::stdev 35.315815
> system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr | 0 0.00% 0.00% | 160 58.61% 58.61% | 102 37.36% 95.97% | 0 0.00% 95.97% | 4 1.47% 97.44% | 4 1.47% 98.90% | 1 0.37% 99.27% | 0 0.00% 99.27% | 1 0.37% 99.63% | 1 0.37% 100.00%
612,615c622,625
< system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::mean 56.635616
< system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::gmean 50.712708
< system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::stdev 34.440483
< system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr | 612 83.84% 83.84% | 93 12.74% 96.58% | 18 2.47% 99.04% | 1 0.14% 99.18% | 3 0.41% 99.59% | 3 0.41% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
---
> system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::mean 59.858904
> system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::gmean 52.975537
> system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::stdev 37.310775
> system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr | 311 42.60% 42.60% | 395 54.11% 96.71% | 16 2.19% 98.90% | 1 0.14% 99.04% | 3 0.41% 99.45% | 4 0.55% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
< sim_seconds 0.000107 # Number of seconds simulated
< sim_ticks 107065 # Number of ticks simulated
< final_tick 107065 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
---
> sim_seconds 0.000112 # Number of seconds simulated
> sim_ticks 112490 # Number of ticks simulated
> final_tick 112490 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
7,11c7,11
< host_inst_rate 58028 # Simulator instruction rate (inst/s)
< host_op_rate 58023 # Simulator op (including micro ops) rate (op/s)
< host_tick_rate 970128 # Simulator tick rate (ticks/s)
< host_mem_usage 456600 # Number of bytes of host memory used
< host_seconds 0.11 # Real time elapsed on the host
---
> host_inst_rate 94486 # Simulator instruction rate (inst/s)
> host_op_rate 94411 # Simulator op (including micro ops) rate (op/s)
> host_tick_rate 1658372 # Simulator tick rate (ticks/s)
> host_mem_usage 414356 # Number of bytes of host memory used
> host_seconds 0.07 # Real time elapsed on the host
16c16
< system.mem_ctrls.pwrStateResidencyTicks::UNDEFINED 107065 # Cumulative time (in ticks) in various power states
---
> system.mem_ctrls.pwrStateResidencyTicks::UNDEFINED 112490 # Cumulative time (in ticks) in various power states
25,30c25,30
< system.mem_ctrls.bw_read::ruby.dir_cntrl0 1034735908 # Total read bandwidth from this memory (bytes/s)
< system.mem_ctrls.bw_read::total 1034735908 # Total read bandwidth from this memory (bytes/s)
< system.mem_ctrls.bw_write::ruby.dir_cntrl0 1032344837 # Write bandwidth from this memory (bytes/s)
< system.mem_ctrls.bw_write::total 1032344837 # Write bandwidth from this memory (bytes/s)
< system.mem_ctrls.bw_total::ruby.dir_cntrl0 2067080745 # Total bandwidth to/from this memory (bytes/s)
< system.mem_ctrls.bw_total::total 2067080745 # Total bandwidth to/from this memory (bytes/s)
---
> system.mem_ctrls.bw_read::ruby.dir_cntrl0 984834207 # Total read bandwidth from this memory (bytes/s)
> system.mem_ctrls.bw_read::total 984834207 # Total read bandwidth from this memory (bytes/s)
> system.mem_ctrls.bw_write::ruby.dir_cntrl0 982558450 # Write bandwidth from this memory (bytes/s)
> system.mem_ctrls.bw_write::total 982558450 # Write bandwidth from this memory (bytes/s)
> system.mem_ctrls.bw_total::ruby.dir_cntrl0 1967392657 # Total bandwidth to/from this memory (bytes/s)
> system.mem_ctrls.bw_total::total 1967392657 # Total bandwidth to/from this memory (bytes/s)
35,37c35,37
< system.mem_ctrls.bytesReadDRAM 56512 # Total number of bytes read from DRAM
< system.mem_ctrls.bytesReadWrQ 54272 # Total number of bytes read from write queue
< system.mem_ctrls.bytesWritten 57856 # Total number of bytes written to DRAM
---
> system.mem_ctrls.bytesReadDRAM 56704 # Total number of bytes read from DRAM
> system.mem_ctrls.bytesReadWrQ 54080 # Total number of bytes read from write queue
> system.mem_ctrls.bytesWritten 57088 # Total number of bytes written to DRAM
40,41c40,41
< system.mem_ctrls.servicedByWrQ 848 # Number of DRAM read bursts serviced by the write queue
< system.mem_ctrls.mergedWrBursts 792 # Number of DRAM write bursts merged with an existing one
---
> system.mem_ctrls.servicedByWrQ 845 # Number of DRAM read bursts serviced by the write queue
> system.mem_ctrls.mergedWrBursts 803 # Number of DRAM write bursts merged with an existing one
43,47c43,47
< system.mem_ctrls.perBankRdBursts::0 85 # Per bank write bursts
< system.mem_ctrls.perBankRdBursts::1 47 # Per bank write bursts
< system.mem_ctrls.perBankRdBursts::2 74 # Per bank write bursts
< system.mem_ctrls.perBankRdBursts::3 68 # Per bank write bursts
< system.mem_ctrls.perBankRdBursts::4 112 # Per bank write bursts
---
> system.mem_ctrls.perBankRdBursts::0 83 # Per bank write bursts
> system.mem_ctrls.perBankRdBursts::1 50 # Per bank write bursts
> system.mem_ctrls.perBankRdBursts::2 70 # Per bank write bursts
> system.mem_ctrls.perBankRdBursts::3 63 # Per bank write bursts
> system.mem_ctrls.perBankRdBursts::4 108 # Per bank write bursts
53,64c53,64
< system.mem_ctrls.perBankRdBursts::10 49 # Per bank write bursts
< system.mem_ctrls.perBankRdBursts::11 33 # Per bank write bursts
< system.mem_ctrls.perBankRdBursts::12 17 # Per bank write bursts
< system.mem_ctrls.perBankRdBursts::13 263 # Per bank write bursts
< system.mem_ctrls.perBankRdBursts::14 79 # Per bank write bursts
< system.mem_ctrls.perBankRdBursts::15 28 # Per bank write bursts
< system.mem_ctrls.perBankWrBursts::0 83 # Per bank write bursts
< system.mem_ctrls.perBankWrBursts::1 47 # Per bank write bursts
< system.mem_ctrls.perBankWrBursts::2 80 # Per bank write bursts
< system.mem_ctrls.perBankWrBursts::3 68 # Per bank write bursts
< system.mem_ctrls.perBankWrBursts::4 133 # Per bank write bursts
< system.mem_ctrls.perBankWrBursts::5 25 # Per bank write bursts
---
> system.mem_ctrls.perBankRdBursts::10 55 # Per bank write bursts
> system.mem_ctrls.perBankRdBursts::11 36 # Per bank write bursts
> system.mem_ctrls.perBankRdBursts::12 18 # Per bank write bursts
> system.mem_ctrls.perBankRdBursts::13 270 # Per bank write bursts
> system.mem_ctrls.perBankRdBursts::14 81 # Per bank write bursts
> system.mem_ctrls.perBankRdBursts::15 24 # Per bank write bursts
> system.mem_ctrls.perBankWrBursts::0 82 # Per bank write bursts
> system.mem_ctrls.perBankWrBursts::1 51 # Per bank write bursts
> system.mem_ctrls.perBankWrBursts::2 73 # Per bank write bursts
> system.mem_ctrls.perBankWrBursts::3 60 # Per bank write bursts
> system.mem_ctrls.perBankWrBursts::4 126 # Per bank write bursts
> system.mem_ctrls.perBankWrBursts::5 27 # Per bank write bursts
66c66
< system.mem_ctrls.perBankWrBursts::7 4 # Per bank write bursts
---
> system.mem_ctrls.perBankWrBursts::7 3 # Per bank write bursts
69,71c69,71
< system.mem_ctrls.perBankWrBursts::10 46 # Per bank write bursts
< system.mem_ctrls.perBankWrBursts::11 28 # Per bank write bursts
< system.mem_ctrls.perBankWrBursts::12 11 # Per bank write bursts
---
> system.mem_ctrls.perBankWrBursts::10 50 # Per bank write bursts
> system.mem_ctrls.perBankWrBursts::11 33 # Per bank write bursts
> system.mem_ctrls.perBankWrBursts::12 12 # Per bank write bursts
74c74
< system.mem_ctrls.perBankWrBursts::15 28 # Per bank write bursts
---
> system.mem_ctrls.perBankWrBursts::15 24 # Per bank write bursts
77c77
< system.mem_ctrls.totGap 106993 # Total gap between requests
---
> system.mem_ctrls.totGap 112412 # Total gap between requests
92c92
< system.mem_ctrls.rdQLenPdf::0 883 # What read queue length does an incoming req see
---
> system.mem_ctrls.rdQLenPdf::0 886 # What read queue length does an incoming req see
139,141c139,141
< system.mem_ctrls.wrQLenPdf::15 9 # What write queue length does an incoming req see
< system.mem_ctrls.wrQLenPdf::16 10 # What write queue length does an incoming req see
< system.mem_ctrls.wrQLenPdf::17 50 # What write queue length does an incoming req see
---
> system.mem_ctrls.wrQLenPdf::15 6 # What write queue length does an incoming req see
> system.mem_ctrls.wrQLenPdf::16 6 # What write queue length does an incoming req see
> system.mem_ctrls.wrQLenPdf::17 51 # What write queue length does an incoming req see
143,147c143,147
< system.mem_ctrls.wrQLenPdf::19 60 # What write queue length does an incoming req see
< system.mem_ctrls.wrQLenPdf::20 61 # What write queue length does an incoming req see
< system.mem_ctrls.wrQLenPdf::21 57 # What write queue length does an incoming req see
< system.mem_ctrls.wrQLenPdf::22 56 # What write queue length does an incoming req see
< system.mem_ctrls.wrQLenPdf::23 57 # What write queue length does an incoming req see
---
> system.mem_ctrls.wrQLenPdf::19 57 # What write queue length does an incoming req see
> system.mem_ctrls.wrQLenPdf::20 56 # What write queue length does an incoming req see
> system.mem_ctrls.wrQLenPdf::21 60 # What write queue length does an incoming req see
> system.mem_ctrls.wrQLenPdf::22 57 # What write queue length does an incoming req see
> system.mem_ctrls.wrQLenPdf::23 56 # What write queue length does an incoming req see
155c155
< system.mem_ctrls.wrQLenPdf::31 55 # What write queue length does an incoming req see
---
> system.mem_ctrls.wrQLenPdf::31 56 # What write queue length does an incoming req see
157c157
< system.mem_ctrls.wrQLenPdf::33 1 # What write queue length does an incoming req see
---
> system.mem_ctrls.wrQLenPdf::33 0 # What write queue length does an incoming req see
188,201c188,201
< system.mem_ctrls.bytesPerActivate::samples 275 # Bytes accessed per row activation
< system.mem_ctrls.bytesPerActivate::mean 406.341818 # Bytes accessed per row activation
< system.mem_ctrls.bytesPerActivate::gmean 258.682678 # Bytes accessed per row activation
< system.mem_ctrls.bytesPerActivate::stdev 357.059585 # Bytes accessed per row activation
< system.mem_ctrls.bytesPerActivate::0-127 55 20.00% 20.00% # Bytes accessed per row activation
< system.mem_ctrls.bytesPerActivate::128-255 74 26.91% 46.91% # Bytes accessed per row activation
< system.mem_ctrls.bytesPerActivate::256-383 37 13.45% 60.36% # Bytes accessed per row activation
< system.mem_ctrls.bytesPerActivate::384-511 16 5.82% 66.18% # Bytes accessed per row activation
< system.mem_ctrls.bytesPerActivate::512-639 18 6.55% 72.73% # Bytes accessed per row activation
< system.mem_ctrls.bytesPerActivate::640-767 12 4.36% 77.09% # Bytes accessed per row activation
< system.mem_ctrls.bytesPerActivate::768-895 8 2.91% 80.00% # Bytes accessed per row activation
< system.mem_ctrls.bytesPerActivate::896-1023 6 2.18% 82.18% # Bytes accessed per row activation
< system.mem_ctrls.bytesPerActivate::1024-1151 49 17.82% 100.00% # Bytes accessed per row activation
< system.mem_ctrls.bytesPerActivate::total 275 # Bytes accessed per row activation
---
> system.mem_ctrls.bytesPerActivate::samples 264 # Bytes accessed per row activation
> system.mem_ctrls.bytesPerActivate::mean 424 # Bytes accessed per row activation
> system.mem_ctrls.bytesPerActivate::gmean 260.079273 # Bytes accessed per row activation
> system.mem_ctrls.bytesPerActivate::stdev 372.426347 # Bytes accessed per row activation
> system.mem_ctrls.bytesPerActivate::0-127 66 25.00% 25.00% # Bytes accessed per row activation
> system.mem_ctrls.bytesPerActivate::128-255 58 21.97% 46.97% # Bytes accessed per row activation
> system.mem_ctrls.bytesPerActivate::256-383 27 10.23% 57.20% # Bytes accessed per row activation
> system.mem_ctrls.bytesPerActivate::384-511 16 6.06% 63.26% # Bytes accessed per row activation
> system.mem_ctrls.bytesPerActivate::512-639 17 6.44% 69.70% # Bytes accessed per row activation
> system.mem_ctrls.bytesPerActivate::640-767 8 3.03% 72.73% # Bytes accessed per row activation
> system.mem_ctrls.bytesPerActivate::768-895 12 4.55% 77.27% # Bytes accessed per row activation
> system.mem_ctrls.bytesPerActivate::896-1023 10 3.79% 81.06% # Bytes accessed per row activation
> system.mem_ctrls.bytesPerActivate::1024-1151 50 18.94% 100.00% # Bytes accessed per row activation
> system.mem_ctrls.bytesPerActivate::total 264 # Bytes accessed per row activation
203,208c203,208
< system.mem_ctrls.rdPerTurnAround::mean 15.781818 # Reads before turning the bus around for writes
< system.mem_ctrls.rdPerTurnAround::gmean 15.596648 # Reads before turning the bus around for writes
< system.mem_ctrls.rdPerTurnAround::stdev 2.973282 # Reads before turning the bus around for writes
< system.mem_ctrls.rdPerTurnAround::12-13 4 7.27% 7.27% # Reads before turning the bus around for writes
< system.mem_ctrls.rdPerTurnAround::14-15 25 45.45% 52.73% # Reads before turning the bus around for writes
< system.mem_ctrls.rdPerTurnAround::16-17 21 38.18% 90.91% # Reads before turning the bus around for writes
---
> system.mem_ctrls.rdPerTurnAround::mean 15.818182 # Reads before turning the bus around for writes
> system.mem_ctrls.rdPerTurnAround::gmean 15.638991 # Reads before turning the bus around for writes
> system.mem_ctrls.rdPerTurnAround::stdev 2.938196 # Reads before turning the bus around for writes
> system.mem_ctrls.rdPerTurnAround::12-13 3 5.45% 5.45% # Reads before turning the bus around for writes
> system.mem_ctrls.rdPerTurnAround::14-15 24 43.64% 49.09% # Reads before turning the bus around for writes
> system.mem_ctrls.rdPerTurnAround::16-17 23 41.82% 90.91% # Reads before turning the bus around for writes
213,219c213,219
< system.mem_ctrls.wrPerTurnAround::mean 16.436364 # Writes before turning the bus around for reads
< system.mem_ctrls.wrPerTurnAround::gmean 16.408895 # Writes before turning the bus around for reads
< system.mem_ctrls.wrPerTurnAround::stdev 0.995613 # Writes before turning the bus around for reads
< system.mem_ctrls.wrPerTurnAround::16 45 81.82% 81.82% # Writes before turning the bus around for reads
< system.mem_ctrls.wrPerTurnAround::17 2 3.64% 85.45% # Writes before turning the bus around for reads
< system.mem_ctrls.wrPerTurnAround::18 2 3.64% 89.09% # Writes before turning the bus around for reads
< system.mem_ctrls.wrPerTurnAround::19 6 10.91% 100.00% # Writes before turning the bus around for reads
---
> system.mem_ctrls.wrPerTurnAround::mean 16.218182 # Writes before turning the bus around for reads
> system.mem_ctrls.wrPerTurnAround::gmean 16.206001 # Writes before turning the bus around for reads
> system.mem_ctrls.wrPerTurnAround::stdev 0.658025 # Writes before turning the bus around for reads
> system.mem_ctrls.wrPerTurnAround::16 49 89.09% 89.09% # Writes before turning the bus around for reads
> system.mem_ctrls.wrPerTurnAround::17 1 1.82% 90.91% # Writes before turning the bus around for reads
> system.mem_ctrls.wrPerTurnAround::18 4 7.27% 98.18% # Writes before turning the bus around for reads
> system.mem_ctrls.wrPerTurnAround::19 1 1.82% 100.00% # Writes before turning the bus around for reads
221,224c221,224
< system.mem_ctrls.totQLat 10887 # Total ticks spent queuing
< system.mem_ctrls.totMemAccLat 27664 # Total ticks spent from burst creation until serviced by the DRAM
< system.mem_ctrls.totBusLat 4415 # Total ticks spent in databus transfers
< system.mem_ctrls.avgQLat 12.33 # Average queueing delay per DRAM burst
---
> system.mem_ctrls.totQLat 16225 # Total ticks spent queuing
> system.mem_ctrls.totMemAccLat 33059 # Total ticks spent from burst creation until serviced by the DRAM
> system.mem_ctrls.totBusLat 4430 # Total ticks spent in databus transfers
> system.mem_ctrls.avgQLat 18.31 # Average queueing delay per DRAM burst
226,230c226,230
< system.mem_ctrls.avgMemAccLat 31.33 # Average memory access latency per DRAM burst
< system.mem_ctrls.avgRdBW 527.83 # Average DRAM read bandwidth in MiByte/s
< system.mem_ctrls.avgWrBW 540.38 # Average achieved write bandwidth in MiByte/s
< system.mem_ctrls.avgRdBWSys 1034.74 # Average system read bandwidth in MiByte/s
< system.mem_ctrls.avgWrBWSys 1032.34 # Average system write bandwidth in MiByte/s
---
> system.mem_ctrls.avgMemAccLat 37.31 # Average memory access latency per DRAM burst
> system.mem_ctrls.avgRdBW 504.08 # Average DRAM read bandwidth in MiByte/s
> system.mem_ctrls.avgWrBW 507.49 # Average achieved write bandwidth in MiByte/s
> system.mem_ctrls.avgRdBWSys 984.83 # Average system read bandwidth in MiByte/s
> system.mem_ctrls.avgWrBWSys 982.56 # Average system write bandwidth in MiByte/s
232,234c232,234
< system.mem_ctrls.busUtil 8.35 # Data bus utilization in percentage
< system.mem_ctrls.busUtilRead 4.12 # Data bus utilization in percentage for reads
< system.mem_ctrls.busUtilWrite 4.22 # Data bus utilization in percentage for writes
---
> system.mem_ctrls.busUtil 7.90 # Data bus utilization in percentage
> system.mem_ctrls.busUtilRead 3.94 # Data bus utilization in percentage for reads
> system.mem_ctrls.busUtilWrite 3.96 # Data bus utilization in percentage for writes
236,271c236,281
< system.mem_ctrls.avgWrQLen 26.13 # Average write queue length when enqueuing
< system.mem_ctrls.readRowHits 670 # Number of row buffer hits during reads
< system.mem_ctrls.writeRowHits 835 # Number of row buffer hits during writes
< system.mem_ctrls.readRowHitRate 75.88 # Row buffer hit rate for reads
< system.mem_ctrls.writeRowHitRate 89.30 # Row buffer hit rate for writes
< system.mem_ctrls.avgGap 30.94 # Average gap between requests
< system.mem_ctrls.pageHitRate 82.78 # Row buffer hit rate, read and write combined
< system.mem_ctrls_0.actEnergy 876960 # Energy for activate commands per rank (pJ)
< system.mem_ctrls_0.preEnergy 487200 # Energy for precharge commands per rank (pJ)
< system.mem_ctrls_0.readEnergy 4992000 # Energy for read commands per rank (pJ)
< system.mem_ctrls_0.writeEnergy 4489344 # Energy for write commands per rank (pJ)
< system.mem_ctrls_0.refreshEnergy 6611280 # Energy for refresh commands per rank (pJ)
< system.mem_ctrls_0.actBackEnergy 63943740 # Energy for active background per rank (pJ)
< system.mem_ctrls_0.preBackEnergy 4795800 # Energy for precharge background per rank (pJ)
< system.mem_ctrls_0.totalEnergy 86196324 # Total energy per rank (pJ)
< system.mem_ctrls_0.averagePower 849.408975 # Core power per rank (mW)
< system.mem_ctrls_0.memoryStateTime::IDLE 8418 # Time in different power states
< system.mem_ctrls_0.memoryStateTime::REF 3380 # Time in different power states
< system.mem_ctrls_0.memoryStateTime::PRE_PDN 0 # Time in different power states
< system.mem_ctrls_0.memoryStateTime::ACT 90483 # Time in different power states
< system.mem_ctrls_0.memoryStateTime::ACT_PDN 0 # Time in different power states
< system.mem_ctrls_1.actEnergy 1156680 # Energy for activate commands per rank (pJ)
< system.mem_ctrls_1.preEnergy 642600 # Energy for precharge commands per rank (pJ)
< system.mem_ctrls_1.readEnergy 5366400 # Energy for read commands per rank (pJ)
< system.mem_ctrls_1.writeEnergy 4385664 # Energy for write commands per rank (pJ)
< system.mem_ctrls_1.refreshEnergy 6611280 # Energy for refresh commands per rank (pJ)
< system.mem_ctrls_1.actBackEnergy 65375352 # Energy for active background per rank (pJ)
< system.mem_ctrls_1.preBackEnergy 3540000 # Energy for precharge background per rank (pJ)
< system.mem_ctrls_1.totalEnergy 87077976 # Total energy per rank (pJ)
< system.mem_ctrls_1.averagePower 858.097085 # Core power per rank (mW)
< system.mem_ctrls_1.memoryStateTime::IDLE 5471 # Time in different power states
< system.mem_ctrls_1.memoryStateTime::REF 3380 # Time in different power states
< system.mem_ctrls_1.memoryStateTime::PRE_PDN 0 # Time in different power states
< system.mem_ctrls_1.memoryStateTime::ACT 92641 # Time in different power states
< system.mem_ctrls_1.memoryStateTime::ACT_PDN 0 # Time in different power states
< system.pwrStateResidencyTicks::UNDEFINED 107065 # Cumulative time (in ticks) in various power states
---
> system.mem_ctrls.avgWrQLen 26.10 # Average write queue length when enqueuing
> system.mem_ctrls.readRowHits 674 # Number of row buffer hits during reads
> system.mem_ctrls.writeRowHits 833 # Number of row buffer hits during writes
> system.mem_ctrls.readRowHitRate 76.07 # Row buffer hit rate for reads
> system.mem_ctrls.writeRowHitRate 90.15 # Row buffer hit rate for writes
> system.mem_ctrls.avgGap 32.51 # Average gap between requests
> system.mem_ctrls.pageHitRate 83.26 # Row buffer hit rate, read and write combined
> system.mem_ctrls_0.actEnergy 735420 # Energy for activate commands per rank (pJ)
> system.mem_ctrls_0.preEnergy 386400 # Energy for precharge commands per rank (pJ)
> system.mem_ctrls_0.readEnergy 4581024 # Energy for read commands per rank (pJ)
> system.mem_ctrls_0.writeEnergy 3532896 # Energy for write commands per rank (pJ)
> system.mem_ctrls_0.refreshEnergy 8604960.000000 # Energy for refresh commands per rank (pJ)
> system.mem_ctrls_0.actBackEnergy 13923048 # Energy for active background per rank (pJ)
> system.mem_ctrls_0.preBackEnergy 195072 # Energy for precharge background per rank (pJ)
> system.mem_ctrls_0.actPowerDownEnergy 30921360 # Energy for active power-down per rank (pJ)
> system.mem_ctrls_0.prePowerDownEnergy 5237376 # Energy for precharge power-down per rank (pJ)
> system.mem_ctrls_0.selfRefreshEnergy 0 # Energy for self refresh per rank (pJ)
> system.mem_ctrls_0.totalEnergy 68117556 # Total energy per rank (pJ)
> system.mem_ctrls_0.averagePower 605.543213 # Core power per rank (mW)
> system.mem_ctrls_0.totalIdleTime 81406 # Total Idle time Per DRAM Rank
> system.mem_ctrls_0.memoryStateTime::IDLE 88 # Time in different power states
> system.mem_ctrls_0.memoryStateTime::REF 3640 # Time in different power states
> system.mem_ctrls_0.memoryStateTime::SREF 0 # Time in different power states
> system.mem_ctrls_0.memoryStateTime::PRE_PDN 13639 # Time in different power states
> system.mem_ctrls_0.memoryStateTime::ACT 27313 # Time in different power states
> system.mem_ctrls_0.memoryStateTime::ACT_PDN 67810 # Time in different power states
> system.mem_ctrls_1.actEnergy 1199520 # Energy for activate commands per rank (pJ)
> system.mem_ctrls_1.preEnergy 633696 # Energy for precharge commands per rank (pJ)
> system.mem_ctrls_1.readEnergy 5540640 # Energy for read commands per rank (pJ)
> system.mem_ctrls_1.writeEnergy 3917088 # Energy for write commands per rank (pJ)
> system.mem_ctrls_1.refreshEnergy 8604960.000000 # Energy for refresh commands per rank (pJ)
> system.mem_ctrls_1.actBackEnergy 12524952 # Energy for active background per rank (pJ)
> system.mem_ctrls_1.preBackEnergy 314880 # Energy for precharge background per rank (pJ)
> system.mem_ctrls_1.actPowerDownEnergy 33139344 # Energy for active power-down per rank (pJ)
> system.mem_ctrls_1.prePowerDownEnergy 4427136 # Energy for precharge power-down per rank (pJ)
> system.mem_ctrls_1.selfRefreshEnergy 0 # Energy for self refresh per rank (pJ)
> system.mem_ctrls_1.totalEnergy 70302216 # Total energy per rank (pJ)
> system.mem_ctrls_1.averagePower 624.964139 # Core power per rank (mW)
> system.mem_ctrls_1.totalIdleTime 83983 # Total Idle time Per DRAM Rank
> system.mem_ctrls_1.memoryStateTime::IDLE 260 # Time in different power states
> system.mem_ctrls_1.memoryStateTime::REF 3640 # Time in different power states
> system.mem_ctrls_1.memoryStateTime::SREF 0 # Time in different power states
> system.mem_ctrls_1.memoryStateTime::PRE_PDN 11529 # Time in different power states
> system.mem_ctrls_1.memoryStateTime::ACT 24387 # Time in different power states
> system.mem_ctrls_1.memoryStateTime::ACT_PDN 72674 # Time in different power states
> system.pwrStateResidencyTicks::UNDEFINED 112490 # Cumulative time (in ticks) in various power states
306,307c316,317
< system.cpu.pwrStateResidencyTicks::ON 107065 # Cumulative time (in ticks) in various power states
< system.cpu.numCycles 107065 # number of cpu cycles simulated
---
> system.cpu.pwrStateResidencyTicks::ON 112490 # Cumulative time (in ticks) in various power states
> system.cpu.numCycles 112490 # number of cpu cycles simulated
326c336
< system.cpu.num_busy_cycles 107065 # Number of busy cycles
---
> system.cpu.num_busy_cycles 112490 # Number of busy cycles
366c376
< system.ruby.pwrStateResidencyTicks::UNDEFINED 107065 # Cumulative time (in ticks) in various power states
---
> system.ruby.pwrStateResidencyTicks::UNDEFINED 112490 # Cumulative time (in ticks) in various power states
382,385c392,395
< system.ruby.latency_hist_seqr::mean 11.650951
< system.ruby.latency_hist_seqr::gmean 2.202191
< system.ruby.latency_hist_seqr::stdev 25.742711
< system.ruby.latency_hist_seqr | 8220 97.13% 97.13% | 190 2.25% 99.37% | 41 0.48% 99.86% | 1 0.01% 99.87% | 6 0.07% 99.94% | 4 0.05% 99.99% | 1 0.01% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
---
> system.ruby.latency_hist_seqr::mean 12.291977
> system.ruby.latency_hist_seqr::gmean 2.221869
> system.ruby.latency_hist_seqr::stdev 27.407806
> system.ruby.latency_hist_seqr | 7608 89.90% 89.90% | 798 9.43% 99.33% | 40 0.47% 99.80% | 5 0.06% 99.86% | 6 0.07% 99.93% | 6 0.07% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
397,400c407,410
< system.ruby.miss_latency_hist_seqr::mean 53.073368
< system.ruby.miss_latency_hist_seqr::gmean 47.451096
< system.ruby.miss_latency_hist_seqr::stdev 32.911544
< system.ruby.miss_latency_hist_seqr | 1488 85.96% 85.96% | 190 10.98% 96.94% | 41 2.37% 99.31% | 1 0.06% 99.36% | 6 0.35% 99.71% | 4 0.23% 99.94% | 1 0.06% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
---
> system.ruby.miss_latency_hist_seqr::mean 56.207395
> system.ruby.miss_latency_hist_seqr::gmean 49.560362
> system.ruby.miss_latency_hist_seqr::stdev 35.333412
> system.ruby.miss_latency_hist_seqr | 876 50.61% 50.61% | 798 46.10% 96.71% | 40 2.31% 99.02% | 5 0.29% 99.31% | 6 0.35% 99.65% | 6 0.35% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
403c413
< system.ruby.dir_cntrl0.pwrStateResidencyTicks::UNDEFINED 107065 # Cumulative time (in ticks) in various power states
---
> system.ruby.dir_cntrl0.pwrStateResidencyTicks::UNDEFINED 112490 # Cumulative time (in ticks) in various power states
407,408c417,418
< system.ruby.l1_cntrl0.sequencer.pwrStateResidencyTicks::UNDEFINED 107065 # Cumulative time (in ticks) in various power states
< system.ruby.l1_cntrl0.pwrStateResidencyTicks::UNDEFINED 107065 # Cumulative time (in ticks) in various power states
---
> system.ruby.l1_cntrl0.sequencer.pwrStateResidencyTicks::UNDEFINED 112490 # Cumulative time (in ticks) in various power states
> system.ruby.l1_cntrl0.pwrStateResidencyTicks::UNDEFINED 112490 # Cumulative time (in ticks) in various power states
410,411c420,421
< system.ruby.network.routers0.pwrStateResidencyTicks::UNDEFINED 107065 # Cumulative time (in ticks) in various power states
< system.ruby.network.routers0.percent_links_utilized 8.074534
---
> system.ruby.network.routers0.pwrStateResidencyTicks::UNDEFINED 112490 # Cumulative time (in ticks) in various power states
> system.ruby.network.routers0.percent_links_utilized 7.685128
420,421c430,431
< system.ruby.network.routers1.pwrStateResidencyTicks::UNDEFINED 107065 # Cumulative time (in ticks) in various power states
< system.ruby.network.routers1.percent_links_utilized 8.074534
---
> system.ruby.network.routers1.pwrStateResidencyTicks::UNDEFINED 112490 # Cumulative time (in ticks) in various power states
> system.ruby.network.routers1.percent_links_utilized 7.685128
430,431c440,441
< system.ruby.network.routers2.pwrStateResidencyTicks::UNDEFINED 107065 # Cumulative time (in ticks) in various power states
< system.ruby.network.routers2.percent_links_utilized 8.074534
---
> system.ruby.network.routers2.pwrStateResidencyTicks::UNDEFINED 112490 # Cumulative time (in ticks) in various power states
> system.ruby.network.routers2.percent_links_utilized 7.685128
440c450
< system.ruby.network.pwrStateResidencyTicks::UNDEFINED 107065 # Cumulative time (in ticks) in various power states
---
> system.ruby.network.pwrStateResidencyTicks::UNDEFINED 112490 # Cumulative time (in ticks) in various power states
449,450c459,460
< system.sys_port_proxy.pwrStateResidencyTicks::UNDEFINED 107065 # Cumulative time (in ticks) in various power states
< system.ruby.network.routers0.throttle0.link_utilization 8.082006
---
> system.sys_port_proxy.pwrStateResidencyTicks::UNDEFINED 112490 # Cumulative time (in ticks) in various power states
> system.ruby.network.routers0.throttle0.link_utilization 7.692239
455c465
< system.ruby.network.routers0.throttle1.link_utilization 8.067062
---
> system.ruby.network.routers0.throttle1.link_utilization 7.678016
460c470
< system.ruby.network.routers1.throttle0.link_utilization 8.067062
---
> system.ruby.network.routers1.throttle0.link_utilization 7.678016
465c475
< system.ruby.network.routers1.throttle1.link_utilization 8.082006
---
> system.ruby.network.routers1.throttle1.link_utilization 7.692239
470c480
< system.ruby.network.routers2.throttle0.link_utilization 8.082006
---
> system.ruby.network.routers2.throttle0.link_utilization 7.692239
475c485
< system.ruby.network.routers2.throttle1.link_utilization 8.067062
---
> system.ruby.network.routers2.throttle1.link_utilization 7.678016
493,496c503,506
< system.ruby.LD.latency_hist_seqr::mean 31.532489
< system.ruby.LD.latency_hist_seqr::gmean 10.421226
< system.ruby.LD.latency_hist_seqr::stdev 34.906160
< system.ruby.LD.latency_hist_seqr | 1091 92.07% 92.07% | 75 6.33% 98.40% | 15 1.27% 99.66% | 0 0.00% 99.66% | 2 0.17% 99.83% | 1 0.08% 99.92% | 1 0.08% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
---
> system.ruby.LD.latency_hist_seqr::mean 33.356118
> system.ruby.LD.latency_hist_seqr::gmean 10.708915
> system.ruby.LD.latency_hist_seqr::stdev 36.387225
> system.ruby.LD.latency_hist_seqr | 862 72.74% 72.74% | 301 25.40% 98.14% | 16 1.35% 99.49% | 3 0.25% 99.75% | 1 0.08% 99.83% | 2 0.17% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
508,511c518,521
< system.ruby.LD.miss_latency_hist_seqr::mean 50.699176
< system.ruby.LD.miss_latency_hist_seqr::gmean 45.385232
< system.ruby.LD.miss_latency_hist_seqr::stdev 32.101179
< system.ruby.LD.miss_latency_hist_seqr | 634 87.09% 87.09% | 75 10.30% 97.39% | 15 2.06% 99.45% | 0 0.00% 99.45% | 2 0.27% 99.73% | 1 0.14% 99.86% | 1 0.14% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
---
> system.ruby.LD.miss_latency_hist_seqr::mean 53.667582
> system.ruby.LD.miss_latency_hist_seqr::gmean 47.442261
> system.ruby.LD.miss_latency_hist_seqr::stdev 32.940895
> system.ruby.LD.miss_latency_hist_seqr | 405 55.63% 55.63% | 301 41.35% 96.98% | 16 2.20% 99.18% | 3 0.41% 99.59% | 1 0.14% 99.73% | 2 0.27% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
516,519c526,529
< system.ruby.ST.latency_hist_seqr::mean 16.426590
< system.ruby.ST.latency_hist_seqr::gmean 3.318487
< system.ruby.ST.latency_hist_seqr::stdev 28.264983
< system.ruby.ST.latency_hist_seqr | 592 68.44% 68.44% | 242 27.98% 96.42% | 21 2.43% 98.84% | 1 0.12% 98.96% | 4 0.46% 99.42% | 4 0.46% 99.88% | 0 0.00% 99.88% | 0 0.00% 99.88% | 0 0.00% 99.88% | 1 0.12% 100.00%
---
> system.ruby.ST.latency_hist_seqr::mean 17.479769
> system.ruby.ST.latency_hist_seqr::gmean 3.361529
> system.ruby.ST.latency_hist_seqr::stdev 31.340829
> system.ruby.ST.latency_hist_seqr | 592 68.44% 68.44% | 160 18.50% 86.94% | 102 11.79% 98.73% | 0 0.00% 98.73% | 4 0.46% 99.19% | 4 0.46% 99.65% | 1 0.12% 99.77% | 0 0.00% 99.77% | 1 0.12% 99.88% | 1 0.12% 100.00%
531,534c541,544
< system.ruby.ST.miss_latency_hist_seqr::mean 49.879121
< system.ruby.ST.miss_latency_hist_seqr::gmean 44.729882
< system.ruby.ST.miss_latency_hist_seqr::stdev 29.942777
< system.ruby.ST.miss_latency_hist_seqr | 0 0.00% 0.00% | 242 88.64% 88.64% | 21 7.69% 96.34% | 1 0.37% 96.70% | 4 1.47% 98.17% | 4 1.47% 99.63% | 0 0.00% 99.63% | 0 0.00% 99.63% | 0 0.00% 99.63% | 1 0.37% 100.00%
---
> system.ruby.ST.miss_latency_hist_seqr::mean 53.216117
> system.ruby.ST.miss_latency_hist_seqr::gmean 46.594106
> system.ruby.ST.miss_latency_hist_seqr::stdev 35.315815
> system.ruby.ST.miss_latency_hist_seqr | 0 0.00% 0.00% | 160 58.61% 58.61% | 102 37.36% 95.97% | 0 0.00% 95.97% | 4 1.47% 97.44% | 4 1.47% 98.90% | 1 0.37% 99.27% | 0 0.00% 99.27% | 1 0.37% 99.63% | 1 0.37% 100.00%
539,542c549,552
< system.ruby.IFETCH.latency_hist_seqr::mean 7.333073
< system.ruby.IFETCH.latency_hist_seqr::gmean 1.563492
< system.ruby.IFETCH.latency_hist_seqr::stdev 21.145733
< system.ruby.IFETCH.latency_hist_seqr | 6295 98.16% 98.16% | 93 1.45% 99.61% | 18 0.28% 99.89% | 1 0.02% 99.91% | 3 0.05% 99.95% | 3 0.05% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
---
> system.ruby.IFETCH.latency_hist_seqr::mean 7.699984
> system.ruby.IFETCH.latency_hist_seqr::gmean 1.571280
> system.ruby.IFETCH.latency_hist_seqr::stdev 22.534194
> system.ruby.IFETCH.latency_hist_seqr | 5994 93.47% 93.47% | 395 6.16% 99.63% | 16 0.25% 99.88% | 1 0.02% 99.89% | 3 0.05% 99.94% | 4 0.06% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
554,557c564,567
< system.ruby.IFETCH.miss_latency_hist_seqr::mean 56.635616
< system.ruby.IFETCH.miss_latency_hist_seqr::gmean 50.712708
< system.ruby.IFETCH.miss_latency_hist_seqr::stdev 34.440483
< system.ruby.IFETCH.miss_latency_hist_seqr | 612 83.84% 83.84% | 93 12.74% 96.58% | 18 2.47% 99.04% | 1 0.14% 99.18% | 3 0.41% 99.59% | 3 0.41% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
---
> system.ruby.IFETCH.miss_latency_hist_seqr::mean 59.858904
> system.ruby.IFETCH.miss_latency_hist_seqr::gmean 52.975537
> system.ruby.IFETCH.miss_latency_hist_seqr::stdev 37.310775
> system.ruby.IFETCH.miss_latency_hist_seqr | 311 42.60% 42.60% | 395 54.11% 96.71% | 16 2.19% 98.90% | 1 0.14% 99.04% | 3 0.41% 99.45% | 4 0.55% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
562,565c572,575
< system.ruby.Directory.miss_mach_latency_hist_seqr::mean 53.073368
< system.ruby.Directory.miss_mach_latency_hist_seqr::gmean 47.451096
< system.ruby.Directory.miss_mach_latency_hist_seqr::stdev 32.911544
< system.ruby.Directory.miss_mach_latency_hist_seqr | 1488 85.96% 85.96% | 190 10.98% 96.94% | 41 2.37% 99.31% | 1 0.06% 99.36% | 6 0.35% 99.71% | 4 0.23% 99.94% | 1 0.06% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
---
> system.ruby.Directory.miss_mach_latency_hist_seqr::mean 56.207395
> system.ruby.Directory.miss_mach_latency_hist_seqr::gmean 49.560362
> system.ruby.Directory.miss_mach_latency_hist_seqr::stdev 35.333412
> system.ruby.Directory.miss_mach_latency_hist_seqr | 876 50.61% 50.61% | 798 46.10% 96.71% | 40 2.31% 99.02% | 5 0.29% 99.31% | 6 0.35% 99.65% | 6 0.35% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
596,599c606,609
< system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::mean 50.699176
< system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::gmean 45.385232
< system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::stdev 32.101179
< system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr | 634 87.09% 87.09% | 75 10.30% 97.39% | 15 2.06% 99.45% | 0 0.00% 99.45% | 2 0.27% 99.73% | 1 0.14% 99.86% | 1 0.14% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
---
> system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::mean 53.667582
> system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::gmean 47.442261
> system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::stdev 32.940895
> system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr | 405 55.63% 55.63% | 301 41.35% 96.98% | 16 2.20% 99.18% | 3 0.41% 99.59% | 1 0.14% 99.73% | 2 0.27% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
604,607c614,617
< system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::mean 49.879121
< system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::gmean 44.729882
< system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::stdev 29.942777
< system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr | 0 0.00% 0.00% | 242 88.64% 88.64% | 21 7.69% 96.34% | 1 0.37% 96.70% | 4 1.47% 98.17% | 4 1.47% 99.63% | 0 0.00% 99.63% | 0 0.00% 99.63% | 0 0.00% 99.63% | 1 0.37% 100.00%
---
> system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::mean 53.216117
> system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::gmean 46.594106
> system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::stdev 35.315815
> system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr | 0 0.00% 0.00% | 160 58.61% 58.61% | 102 37.36% 95.97% | 0 0.00% 95.97% | 4 1.47% 97.44% | 4 1.47% 98.90% | 1 0.37% 99.27% | 0 0.00% 99.27% | 1 0.37% 99.63% | 1 0.37% 100.00%
612,615c622,625
< system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::mean 56.635616
< system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::gmean 50.712708
< system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::stdev 34.440483
< system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr | 612 83.84% 83.84% | 93 12.74% 96.58% | 18 2.47% 99.04% | 1 0.14% 99.18% | 3 0.41% 99.59% | 3 0.41% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
---
> system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::mean 59.858904
> system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::gmean 52.975537
> system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::stdev 37.310775
> system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr | 311 42.60% 42.60% | 395 54.11% 96.71% | 16 2.19% 98.90% | 1 0.14% 99.04% | 3 0.41% 99.45% | 4 0.55% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%