| stats.txt (9797:9cd5f91e7a79) | stats.txt (9838:43d22d746e7a) |
|---|---|
| 1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 0.000021 # Number of seconds simulated 4sim_ticks 20671000 # Number of ticks simulated 5final_tick 20671000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks | 1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 0.000021 # Number of seconds simulated 4sim_ticks 20671000 # Number of ticks simulated 5final_tick 20671000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks |
| 7host_inst_rate 25591 # Simulator instruction rate (inst/s) 8host_op_rate 25589 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 83008053 # Simulator tick rate (ticks/s) 10host_mem_usage 227468 # Number of bytes of host memory used 11host_seconds 0.25 # Real time elapsed on the host | 7host_inst_rate 24570 # Simulator instruction rate (inst/s) 8host_op_rate 24568 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 79697022 # Simulator tick rate (ticks/s) 10host_mem_usage 227340 # Number of bytes of host memory used 11host_seconds 0.26 # Real time elapsed on the host |
| 12sim_insts 6372 # Number of instructions simulated 13sim_ops 6372 # Number of ops (including micro ops) simulated 14system.physmem.bytes_read::cpu.inst 20032 # Number of bytes read from this memory 15system.physmem.bytes_read::cpu.data 11136 # Number of bytes read from this memory 16system.physmem.bytes_read::total 31168 # Number of bytes read from this memory 17system.physmem.bytes_inst_read::cpu.inst 20032 # Number of instructions bytes read from this memory 18system.physmem.bytes_inst_read::total 20032 # Number of instructions bytes read from this memory 19system.physmem.num_reads::cpu.inst 313 # Number of read requests responded to by this memory 20system.physmem.num_reads::cpu.data 174 # Number of read requests responded to by this memory 21system.physmem.num_reads::total 487 # Number of read requests responded to by this memory 22system.physmem.bw_read::cpu.inst 969087127 # Total read bandwidth from this memory (bytes/s) 23system.physmem.bw_read::cpu.data 538725751 # Total read bandwidth from this memory (bytes/s) 24system.physmem.bw_read::total 1507812878 # Total read bandwidth from this memory (bytes/s) 25system.physmem.bw_inst_read::cpu.inst 969087127 # Instruction read bandwidth from this memory (bytes/s) 26system.physmem.bw_inst_read::total 969087127 # Instruction read bandwidth from this memory (bytes/s) 27system.physmem.bw_total::cpu.inst 969087127 # Total bandwidth to/from this memory (bytes/s) 28system.physmem.bw_total::cpu.data 538725751 # Total bandwidth to/from this memory (bytes/s) 29system.physmem.bw_total::total 1507812878 # Total bandwidth to/from this memory (bytes/s) | 12sim_insts 6372 # Number of instructions simulated 13sim_ops 6372 # Number of ops (including micro ops) simulated 14system.physmem.bytes_read::cpu.inst 20032 # Number of bytes read from this memory 15system.physmem.bytes_read::cpu.data 11136 # Number of bytes read from this memory 16system.physmem.bytes_read::total 31168 # Number of bytes read from this memory 17system.physmem.bytes_inst_read::cpu.inst 20032 # Number of instructions bytes read from this memory 18system.physmem.bytes_inst_read::total 20032 # Number of instructions bytes read from this memory 19system.physmem.num_reads::cpu.inst 313 # Number of read requests responded to by this memory 20system.physmem.num_reads::cpu.data 174 # Number of read requests responded to by this memory 21system.physmem.num_reads::total 487 # Number of read requests responded to by this memory 22system.physmem.bw_read::cpu.inst 969087127 # Total read bandwidth from this memory (bytes/s) 23system.physmem.bw_read::cpu.data 538725751 # Total read bandwidth from this memory (bytes/s) 24system.physmem.bw_read::total 1507812878 # Total read bandwidth from this memory (bytes/s) 25system.physmem.bw_inst_read::cpu.inst 969087127 # Instruction read bandwidth from this memory (bytes/s) 26system.physmem.bw_inst_read::total 969087127 # Instruction read bandwidth from this memory (bytes/s) 27system.physmem.bw_total::cpu.inst 969087127 # Total bandwidth to/from this memory (bytes/s) 28system.physmem.bw_total::cpu.data 538725751 # Total bandwidth to/from this memory (bytes/s) 29system.physmem.bw_total::total 1507812878 # Total bandwidth to/from this memory (bytes/s) |
| 30system.physmem.readReqs 488 # Total number of read requests seen 31system.physmem.writeReqs 0 # Total number of write requests seen 32system.physmem.cpureqs 488 # Reqs generatd by CPU via cache - shady | 30system.physmem.readReqs 488 # Total number of read requests accepted by DRAM controller 31system.physmem.writeReqs 0 # Total number of write requests accepted by DRAM controller 32system.physmem.readBursts 488 # Total number of DRAM read bursts. Each DRAM read request translates to either one or multiple DRAM read bursts 33system.physmem.writeBursts 0 # Total number of DRAM write bursts. Each DRAM write request translates to either one or multiple DRAM write bursts |
| 33system.physmem.bytesRead 31168 # Total number of bytes read from memory 34system.physmem.bytesWritten 0 # Total number of bytes written to memory 35system.physmem.bytesConsumedRd 31168 # bytesRead derated as per pkt->getSize() 36system.physmem.bytesConsumedWr 0 # bytesWritten derated as per pkt->getSize() | 34system.physmem.bytesRead 31168 # Total number of bytes read from memory 35system.physmem.bytesWritten 0 # Total number of bytes written to memory 36system.physmem.bytesConsumedRd 31168 # bytesRead derated as per pkt->getSize() 37system.physmem.bytesConsumedWr 0 # bytesWritten derated as per pkt->getSize() |
| 37system.physmem.servicedByWrQ 0 # Number of read reqs serviced by write Q | 38system.physmem.servicedByWrQ 0 # Number of DRAM read bursts serviced by write Q |
| 38system.physmem.neitherReadNorWrite 0 # Reqs where no action is needed 39system.physmem.perBankRdReqs::0 69 # Track reads on a per bank basis 40system.physmem.perBankRdReqs::1 34 # Track reads on a per bank basis 41system.physmem.perBankRdReqs::2 32 # Track reads on a per bank basis 42system.physmem.perBankRdReqs::3 47 # Track reads on a per bank basis 43system.physmem.perBankRdReqs::4 43 # Track reads on a per bank basis 44system.physmem.perBankRdReqs::5 21 # Track reads on a per bank basis 45system.physmem.perBankRdReqs::6 1 # Track reads on a per bank basis --- 143 unchanged lines hidden (view full) --- 189system.physmem.readRowHitRate 85.86 # Row buffer hit rate for reads 190system.physmem.writeRowHitRate nan # Row buffer hit rate for writes 191system.physmem.avgGap 42290.98 # Average gap between requests 192system.membus.throughput 1507812878 # Throughput (bytes/s) 193system.membus.trans_dist::ReadReq 415 # Transaction distribution 194system.membus.trans_dist::ReadResp 414 # Transaction distribution 195system.membus.trans_dist::ReadExReq 73 # Transaction distribution 196system.membus.trans_dist::ReadExResp 73 # Transaction distribution | 39system.physmem.neitherReadNorWrite 0 # Reqs where no action is needed 40system.physmem.perBankRdReqs::0 69 # Track reads on a per bank basis 41system.physmem.perBankRdReqs::1 34 # Track reads on a per bank basis 42system.physmem.perBankRdReqs::2 32 # Track reads on a per bank basis 43system.physmem.perBankRdReqs::3 47 # Track reads on a per bank basis 44system.physmem.perBankRdReqs::4 43 # Track reads on a per bank basis 45system.physmem.perBankRdReqs::5 21 # Track reads on a per bank basis 46system.physmem.perBankRdReqs::6 1 # Track reads on a per bank basis --- 143 unchanged lines hidden (view full) --- 190system.physmem.readRowHitRate 85.86 # Row buffer hit rate for reads 191system.physmem.writeRowHitRate nan # Row buffer hit rate for writes 192system.physmem.avgGap 42290.98 # Average gap between requests 193system.membus.throughput 1507812878 # Throughput (bytes/s) 194system.membus.trans_dist::ReadReq 415 # Transaction distribution 195system.membus.trans_dist::ReadResp 414 # Transaction distribution 196system.membus.trans_dist::ReadExReq 73 # Transaction distribution 197system.membus.trans_dist::ReadExResp 73 # Transaction distribution |
| 197system.membus.pkt_count_system.cpu.l2cache.mem_side 975 # Packet count per connected master and slave (bytes) 198system.membus.pkt_count 975 # Packet count per connected master and slave (bytes) 199system.membus.tot_pkt_size_system.cpu.l2cache.mem_side 31168 # Cumulative packet size per connected master and slave (bytes) 200system.membus.tot_pkt_size 31168 # Cumulative packet size per connected master and slave (bytes) | 198system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 975 # Packet count per connected master and slave (bytes) 199system.membus.pkt_count::total 975 # Packet count per connected master and slave (bytes) 200system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 31168 # Cumulative packet size per connected master and slave (bytes) 201system.membus.tot_pkt_size::total 31168 # Cumulative packet size per connected master and slave (bytes) |
| 201system.membus.data_through_bus 31168 # Total data (bytes) 202system.membus.snoop_data_through_bus 0 # Total snoop data (bytes) 203system.membus.reqLayer0.occupancy 619500 # Layer occupancy (ticks) 204system.membus.reqLayer0.utilization 3.0 # Layer utilization (%) 205system.membus.respLayer1.occupancy 4561500 # Layer occupancy (ticks) 206system.membus.respLayer1.utilization 22.1 # Layer utilization (%) 207system.cpu.branchPred.lookups 2888 # Number of BP lookups 208system.cpu.branchPred.condPredicted 1700 # Number of conditional branches predicted --- 297 unchanged lines hidden (view full) --- 506system.cpu.fp_regfile_writes 2 # number of floating regfile writes 507system.cpu.misc_regfile_reads 1 # number of misc regfile reads 508system.cpu.misc_regfile_writes 1 # number of misc regfile writes 509system.cpu.toL2Bus.throughput 1510909003 # Throughput (bytes/s) 510system.cpu.toL2Bus.trans_dist::ReadReq 416 # Transaction distribution 511system.cpu.toL2Bus.trans_dist::ReadResp 415 # Transaction distribution 512system.cpu.toL2Bus.trans_dist::ReadExReq 73 # Transaction distribution 513system.cpu.toL2Bus.trans_dist::ReadExResp 73 # Transaction distribution | 202system.membus.data_through_bus 31168 # Total data (bytes) 203system.membus.snoop_data_through_bus 0 # Total snoop data (bytes) 204system.membus.reqLayer0.occupancy 619500 # Layer occupancy (ticks) 205system.membus.reqLayer0.utilization 3.0 # Layer utilization (%) 206system.membus.respLayer1.occupancy 4561500 # Layer occupancy (ticks) 207system.membus.respLayer1.utilization 22.1 # Layer utilization (%) 208system.cpu.branchPred.lookups 2888 # Number of BP lookups 209system.cpu.branchPred.condPredicted 1700 # Number of conditional branches predicted --- 297 unchanged lines hidden (view full) --- 507system.cpu.fp_regfile_writes 2 # number of floating regfile writes 508system.cpu.misc_regfile_reads 1 # number of misc regfile reads 509system.cpu.misc_regfile_writes 1 # number of misc regfile writes 510system.cpu.toL2Bus.throughput 1510909003 # Throughput (bytes/s) 511system.cpu.toL2Bus.trans_dist::ReadReq 416 # Transaction distribution 512system.cpu.toL2Bus.trans_dist::ReadResp 415 # Transaction distribution 513system.cpu.toL2Bus.trans_dist::ReadExReq 73 # Transaction distribution 514system.cpu.toL2Bus.trans_dist::ReadExResp 73 # Transaction distribution |
| 514system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side 629 # Packet count per connected master and slave (bytes) 515system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side 348 # Packet count per connected master and slave (bytes) 516system.cpu.toL2Bus.pkt_count 977 # Packet count per connected master and slave (bytes) 517system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side 20096 # Cumulative packet size per connected master and slave (bytes) 518system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side 11136 # Cumulative packet size per connected master and slave (bytes) 519system.cpu.toL2Bus.tot_pkt_size 31232 # Cumulative packet size per connected master and slave (bytes) | 515system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 629 # Packet count per connected master and slave (bytes) 516system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 348 # Packet count per connected master and slave (bytes) 517system.cpu.toL2Bus.pkt_count::total 977 # Packet count per connected master and slave (bytes) 518system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 20096 # Cumulative packet size per connected master and slave (bytes) 519system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 11136 # Cumulative packet size per connected master and slave (bytes) 520system.cpu.toL2Bus.tot_pkt_size::total 31232 # Cumulative packet size per connected master and slave (bytes) |
| 520system.cpu.toL2Bus.data_through_bus 31232 # Total data (bytes) 521system.cpu.toL2Bus.snoop_data_through_bus 0 # Total snoop data (bytes) 522system.cpu.toL2Bus.reqLayer0.occupancy 244500 # Layer occupancy (ticks) 523system.cpu.toL2Bus.reqLayer0.utilization 1.2 # Layer utilization (%) 524system.cpu.toL2Bus.respLayer0.occupancy 531250 # Layer occupancy (ticks) 525system.cpu.toL2Bus.respLayer0.utilization 2.6 # Layer utilization (%) 526system.cpu.toL2Bus.respLayer1.occupancy 281250 # Layer occupancy (ticks) 527system.cpu.toL2Bus.respLayer1.utilization 1.4 # Layer utilization (%) | 521system.cpu.toL2Bus.data_through_bus 31232 # Total data (bytes) 522system.cpu.toL2Bus.snoop_data_through_bus 0 # Total snoop data (bytes) 523system.cpu.toL2Bus.reqLayer0.occupancy 244500 # Layer occupancy (ticks) 524system.cpu.toL2Bus.reqLayer0.utilization 1.2 # Layer utilization (%) 525system.cpu.toL2Bus.respLayer0.occupancy 531250 # Layer occupancy (ticks) 526system.cpu.toL2Bus.respLayer0.utilization 2.6 # Layer utilization (%) 527system.cpu.toL2Bus.respLayer1.occupancy 281250 # Layer occupancy (ticks) 528system.cpu.toL2Bus.respLayer1.utilization 1.4 # Layer utilization (%) |
| 528system.cpu.icache.tags.replacements 0 # number of replacements 529system.cpu.icache.tags.tagsinuse 159.268512 # Cycle average of tags in use 530system.cpu.icache.tags.total_refs 1898 # Total number of references to valid blocks. 531system.cpu.icache.tags.sampled_refs 314 # Sample count of references to valid blocks. 532system.cpu.icache.tags.avg_refs 6.044586 # Average number of references to valid blocks. 533system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. 534system.cpu.icache.tags.occ_blocks::cpu.inst 159.268512 # Average occupied blocks per requestor 535system.cpu.icache.tags.occ_percent::cpu.inst 0.077768 # Average percentage of cache occupancy 536system.cpu.icache.tags.occ_percent::total 0.077768 # Average percentage of cache occupancy | 529system.cpu.icache.tags.replacements 0 # number of replacements 530system.cpu.icache.tags.tagsinuse 159.268512 # Cycle average of tags in use 531system.cpu.icache.tags.total_refs 1898 # Total number of references to valid blocks. 532system.cpu.icache.tags.sampled_refs 314 # Sample count of references to valid blocks. 533system.cpu.icache.tags.avg_refs 6.044586 # Average number of references to valid blocks. 534system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. 535system.cpu.icache.tags.occ_blocks::cpu.inst 159.268512 # Average occupied blocks per requestor 536system.cpu.icache.tags.occ_percent::cpu.inst 0.077768 # Average percentage of cache occupancy 537system.cpu.icache.tags.occ_percent::total 0.077768 # Average percentage of cache occupancy |
| 537system.cpu.icache.ReadReq_hits::cpu.inst 1898 # number of ReadReq hits 538system.cpu.icache.ReadReq_hits::total 1898 # number of ReadReq hits 539system.cpu.icache.demand_hits::cpu.inst 1898 # number of demand (read+write) hits 540system.cpu.icache.demand_hits::total 1898 # number of demand (read+write) hits 541system.cpu.icache.overall_hits::cpu.inst 1898 # number of overall hits 542system.cpu.icache.overall_hits::total 1898 # number of overall hits 543system.cpu.icache.ReadReq_misses::cpu.inst 489 # number of ReadReq misses 544system.cpu.icache.ReadReq_misses::total 489 # number of ReadReq misses --- 59 unchanged lines hidden (view full) --- 604system.cpu.icache.overall_mshr_miss_rate::total 0.131965 # mshr miss rate for overall accesses 605system.cpu.icache.ReadReq_avg_mshr_miss_latency::cpu.inst 67819.841270 # average ReadReq mshr miss latency 606system.cpu.icache.ReadReq_avg_mshr_miss_latency::total 67819.841270 # average ReadReq mshr miss latency 607system.cpu.icache.demand_avg_mshr_miss_latency::cpu.inst 67819.841270 # average overall mshr miss latency 608system.cpu.icache.demand_avg_mshr_miss_latency::total 67819.841270 # average overall mshr miss latency 609system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 67819.841270 # average overall mshr miss latency 610system.cpu.icache.overall_avg_mshr_miss_latency::total 67819.841270 # average overall mshr miss latency 611system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate | 538system.cpu.icache.ReadReq_hits::cpu.inst 1898 # number of ReadReq hits 539system.cpu.icache.ReadReq_hits::total 1898 # number of ReadReq hits 540system.cpu.icache.demand_hits::cpu.inst 1898 # number of demand (read+write) hits 541system.cpu.icache.demand_hits::total 1898 # number of demand (read+write) hits 542system.cpu.icache.overall_hits::cpu.inst 1898 # number of overall hits 543system.cpu.icache.overall_hits::total 1898 # number of overall hits 544system.cpu.icache.ReadReq_misses::cpu.inst 489 # number of ReadReq misses 545system.cpu.icache.ReadReq_misses::total 489 # number of ReadReq misses --- 59 unchanged lines hidden (view full) --- 605system.cpu.icache.overall_mshr_miss_rate::total 0.131965 # mshr miss rate for overall accesses 606system.cpu.icache.ReadReq_avg_mshr_miss_latency::cpu.inst 67819.841270 # average ReadReq mshr miss latency 607system.cpu.icache.ReadReq_avg_mshr_miss_latency::total 67819.841270 # average ReadReq mshr miss latency 608system.cpu.icache.demand_avg_mshr_miss_latency::cpu.inst 67819.841270 # average overall mshr miss latency 609system.cpu.icache.demand_avg_mshr_miss_latency::total 67819.841270 # average overall mshr miss latency 610system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 67819.841270 # average overall mshr miss latency 611system.cpu.icache.overall_avg_mshr_miss_latency::total 67819.841270 # average overall mshr miss latency 612system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate |
| 612system.cpu.l2cache.tags.replacements 0 # number of replacements 613system.cpu.l2cache.tags.tagsinuse 218.982908 # Cycle average of tags in use 614system.cpu.l2cache.tags.total_refs 1 # Total number of references to valid blocks. 615system.cpu.l2cache.tags.sampled_refs 414 # Sample count of references to valid blocks. 616system.cpu.l2cache.tags.avg_refs 0.002415 # Average number of references to valid blocks. 617system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. 618system.cpu.l2cache.tags.occ_blocks::cpu.inst 159.353389 # Average occupied blocks per requestor 619system.cpu.l2cache.tags.occ_blocks::cpu.data 59.629519 # Average occupied blocks per requestor | 613system.cpu.l2cache.tags.replacements 0 # number of replacements 614system.cpu.l2cache.tags.tagsinuse 218.982908 # Cycle average of tags in use 615system.cpu.l2cache.tags.total_refs 1 # Total number of references to valid blocks. 616system.cpu.l2cache.tags.sampled_refs 414 # Sample count of references to valid blocks. 617system.cpu.l2cache.tags.avg_refs 0.002415 # Average number of references to valid blocks. 618system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. 619system.cpu.l2cache.tags.occ_blocks::cpu.inst 159.353389 # Average occupied blocks per requestor 620system.cpu.l2cache.tags.occ_blocks::cpu.data 59.629519 # Average occupied blocks per requestor |
| 620system.cpu.l2cache.tags.occ_percent::cpu.inst 0.004863 # Average percentage of cache occupancy 621system.cpu.l2cache.tags.occ_percent::cpu.data 0.001820 # Average percentage of cache occupancy | 621system.cpu.l2cache.tags.occ_percent::cpu.inst 0.004863 # Average percentage of cache occupancy 622system.cpu.l2cache.tags.occ_percent::cpu.data 0.001820 # Average percentage of cache occupancy |
| 622system.cpu.l2cache.tags.occ_percent::total 0.006683 # Average percentage of cache occupancy | 623system.cpu.l2cache.tags.occ_percent::total 0.006683 # Average percentage of cache occupancy |
| 623system.cpu.l2cache.ReadReq_hits::cpu.inst 1 # number of ReadReq hits 624system.cpu.l2cache.ReadReq_hits::total 1 # number of ReadReq hits 625system.cpu.l2cache.demand_hits::cpu.inst 1 # number of demand (read+write) hits 626system.cpu.l2cache.demand_hits::total 1 # number of demand (read+write) hits 627system.cpu.l2cache.overall_hits::cpu.inst 1 # number of overall hits 628system.cpu.l2cache.overall_hits::total 1 # number of overall hits 629system.cpu.l2cache.ReadReq_misses::cpu.inst 314 # number of ReadReq misses 630system.cpu.l2cache.ReadReq_misses::cpu.data 101 # number of ReadReq misses --- 98 unchanged lines hidden (view full) --- 729system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::total 57643.835616 # average ReadExReq mshr miss latency 730system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.inst 54395.700637 # average overall mshr miss latency 731system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.data 62693.965517 # average overall mshr miss latency 732system.cpu.l2cache.demand_avg_mshr_miss_latency::total 57354.508197 # average overall mshr miss latency 733system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 54395.700637 # average overall mshr miss latency 734system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 62693.965517 # average overall mshr miss latency 735system.cpu.l2cache.overall_avg_mshr_miss_latency::total 57354.508197 # average overall mshr miss latency 736system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate | 624system.cpu.l2cache.ReadReq_hits::cpu.inst 1 # number of ReadReq hits 625system.cpu.l2cache.ReadReq_hits::total 1 # number of ReadReq hits 626system.cpu.l2cache.demand_hits::cpu.inst 1 # number of demand (read+write) hits 627system.cpu.l2cache.demand_hits::total 1 # number of demand (read+write) hits 628system.cpu.l2cache.overall_hits::cpu.inst 1 # number of overall hits 629system.cpu.l2cache.overall_hits::total 1 # number of overall hits 630system.cpu.l2cache.ReadReq_misses::cpu.inst 314 # number of ReadReq misses 631system.cpu.l2cache.ReadReq_misses::cpu.data 101 # number of ReadReq misses --- 98 unchanged lines hidden (view full) --- 730system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::total 57643.835616 # average ReadExReq mshr miss latency 731system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.inst 54395.700637 # average overall mshr miss latency 732system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.data 62693.965517 # average overall mshr miss latency 733system.cpu.l2cache.demand_avg_mshr_miss_latency::total 57354.508197 # average overall mshr miss latency 734system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 54395.700637 # average overall mshr miss latency 735system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 62693.965517 # average overall mshr miss latency 736system.cpu.l2cache.overall_avg_mshr_miss_latency::total 57354.508197 # average overall mshr miss latency 737system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate |
| 737system.cpu.dcache.tags.replacements 0 # number of replacements 738system.cpu.dcache.tags.tagsinuse 106.762654 # Cycle average of tags in use 739system.cpu.dcache.tags.total_refs 2236 # Total number of references to valid blocks. 740system.cpu.dcache.tags.sampled_refs 174 # Sample count of references to valid blocks. 741system.cpu.dcache.tags.avg_refs 12.850575 # Average number of references to valid blocks. 742system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. 743system.cpu.dcache.tags.occ_blocks::cpu.data 106.762654 # Average occupied blocks per requestor 744system.cpu.dcache.tags.occ_percent::cpu.data 0.026065 # Average percentage of cache occupancy 745system.cpu.dcache.tags.occ_percent::total 0.026065 # Average percentage of cache occupancy | 738system.cpu.dcache.tags.replacements 0 # number of replacements 739system.cpu.dcache.tags.tagsinuse 106.762654 # Cycle average of tags in use 740system.cpu.dcache.tags.total_refs 2236 # Total number of references to valid blocks. 741system.cpu.dcache.tags.sampled_refs 174 # Sample count of references to valid blocks. 742system.cpu.dcache.tags.avg_refs 12.850575 # Average number of references to valid blocks. 743system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. 744system.cpu.dcache.tags.occ_blocks::cpu.data 106.762654 # Average occupied blocks per requestor 745system.cpu.dcache.tags.occ_percent::cpu.data 0.026065 # Average percentage of cache occupancy 746system.cpu.dcache.tags.occ_percent::total 0.026065 # Average percentage of cache occupancy |
| 746system.cpu.dcache.ReadReq_hits::cpu.data 1730 # number of ReadReq hits 747system.cpu.dcache.ReadReq_hits::total 1730 # number of ReadReq hits 748system.cpu.dcache.WriteReq_hits::cpu.data 506 # number of WriteReq hits 749system.cpu.dcache.WriteReq_hits::total 506 # number of WriteReq hits 750system.cpu.dcache.demand_hits::cpu.data 2236 # number of demand (read+write) hits 751system.cpu.dcache.demand_hits::total 2236 # number of demand (read+write) hits 752system.cpu.dcache.overall_hits::cpu.data 2236 # number of overall hits 753system.cpu.dcache.overall_hits::total 2236 # number of overall hits --- 91 unchanged lines hidden --- | 747system.cpu.dcache.ReadReq_hits::cpu.data 1730 # number of ReadReq hits 748system.cpu.dcache.ReadReq_hits::total 1730 # number of ReadReq hits 749system.cpu.dcache.WriteReq_hits::cpu.data 506 # number of WriteReq hits 750system.cpu.dcache.WriteReq_hits::total 506 # number of WriteReq hits 751system.cpu.dcache.demand_hits::cpu.data 2236 # number of demand (read+write) hits 752system.cpu.dcache.demand_hits::total 2236 # number of demand (read+write) hits 753system.cpu.dcache.overall_hits::cpu.data 2236 # number of overall hits 754system.cpu.dcache.overall_hits::total 2236 # number of overall hits --- 91 unchanged lines hidden --- |