7,11c7,11
< host_inst_rate 87465 # Simulator instruction rate (inst/s)
< host_op_rate 87444 # Simulator op (including micro ops) rate (op/s)
< host_tick_rate 170447462 # Simulator tick rate (ticks/s)
< host_mem_usage 210080 # Number of bytes of host memory used
< host_seconds 0.07 # Real time elapsed on the host
---
> host_inst_rate 42940 # Simulator instruction rate (inst/s)
> host_op_rate 42933 # Simulator op (including micro ops) rate (op/s)
> host_tick_rate 83690683 # Simulator tick rate (ticks/s)
> host_mem_usage 215012 # Number of bytes of host memory used
> host_seconds 0.15 # Real time elapsed on the host
368,369c368,369
< system.cpu.icache.avg_blocked_cycles::no_mshrs no_value # average number of cycles each access was blocked
< system.cpu.icache.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked
---
> system.cpu.icache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
> system.cpu.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
450,451c450,451
< system.cpu.dcache.avg_blocked_cycles::no_mshrs no_value # average number of cycles each access was blocked
< system.cpu.dcache.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked
---
> system.cpu.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
> system.cpu.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
555,556c555,556
< system.cpu.l2cache.avg_blocked_cycles::no_mshrs no_value # average number of cycles each access was blocked
< system.cpu.l2cache.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked
---
> system.cpu.l2cache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
> system.cpu.l2cache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
< host_inst_rate 87465 # Simulator instruction rate (inst/s)
< host_op_rate 87444 # Simulator op (including micro ops) rate (op/s)
< host_tick_rate 170447462 # Simulator tick rate (ticks/s)
< host_mem_usage 210080 # Number of bytes of host memory used
< host_seconds 0.07 # Real time elapsed on the host
---
> host_inst_rate 42940 # Simulator instruction rate (inst/s)
> host_op_rate 42933 # Simulator op (including micro ops) rate (op/s)
> host_tick_rate 83690683 # Simulator tick rate (ticks/s)
> host_mem_usage 215012 # Number of bytes of host memory used
> host_seconds 0.15 # Real time elapsed on the host
368,369c368,369
< system.cpu.icache.avg_blocked_cycles::no_mshrs no_value # average number of cycles each access was blocked
< system.cpu.icache.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked
---
> system.cpu.icache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
> system.cpu.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
450,451c450,451
< system.cpu.dcache.avg_blocked_cycles::no_mshrs no_value # average number of cycles each access was blocked
< system.cpu.dcache.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked
---
> system.cpu.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
> system.cpu.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
555,556c555,556
< system.cpu.l2cache.avg_blocked_cycles::no_mshrs no_value # average number of cycles each access was blocked
< system.cpu.l2cache.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked
---
> system.cpu.l2cache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
> system.cpu.l2cache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked