1[root]
2type=Root
3children=system
4eventq_index=0
5full_system=false
6sim_quantum=0
7time_sync_enable=false
8time_sync_period=100000000000

--- 146 unchanged lines hidden (view full) ---

155type=Cache
156children=tags
157addr_ranges=0:18446744073709551615
158assoc=2
159clk_domain=system.cpu_clk_domain
160clusivity=mostly_incl
161demand_mshr_reserve=1
162eventq_index=0
163forward_snoops=true
163hit_latency=2
164is_read_only=false
165max_miss_count=0
166mshrs=4
167prefetch_on_access=false
168prefetcher=Null
169response_latency=2
170sequential_access=false

--- 332 unchanged lines hidden (view full) ---

503type=Cache
504children=tags
505addr_ranges=0:18446744073709551615
506assoc=2
507clk_domain=system.cpu_clk_domain
508clusivity=mostly_incl
509demand_mshr_reserve=1
510eventq_index=0
512forward_snoops=true
511hit_latency=2
512is_read_only=true
513max_miss_count=0
514mshrs=4
515prefetch_on_access=false
516prefetcher=Null
517response_latency=2
518sequential_access=false

--- 34 unchanged lines hidden (view full) ---

553type=Cache
554children=tags
555addr_ranges=0:18446744073709551615
556assoc=8
557clk_domain=system.cpu_clk_domain
558clusivity=mostly_incl
559demand_mshr_reserve=1
560eventq_index=0
563forward_snoops=true
561hit_latency=20
562is_read_only=false
563max_miss_count=0
564mshrs=20
565prefetch_on_access=false
566prefetcher=Null
567response_latency=20
568sequential_access=false

--- 18 unchanged lines hidden (view full) ---

587
588[system.cpu.toL2Bus]
589type=CoherentXBar
590children=snoop_filter
591clk_domain=system.cpu_clk_domain
592eventq_index=0
593forward_latency=0
594frontend_latency=1
595point_of_coherency=false
596response_latency=1
597snoop_filter=system.cpu.toL2Bus.snoop_filter
598snoop_response_latency=1
599system=system
600use_default_range=false
601width=32
602master=system.cpu.l2cache.cpu_side
603slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side

--- 14 unchanged lines hidden (view full) ---

618cmd=hello
619cwd=
620drivers=
621egid=100
622env=
623errout=cerr
624euid=100
625eventq_index=0
628executable=/dist/m5/regression/test-progs/hello/bin/alpha/linux/hello
626executable=/home/stever/hg/m5sim.org/gem5/tests/test-progs/hello/bin/alpha/linux/hello
627gid=100
628input=cin
629kvmInSE=false
630max_stack_size=67108864
631output=cout
632pid=100
633ppid=99
634simpoint=0

--- 18 unchanged lines hidden (view full) ---

653transition_latency=100000000
654
655[system.membus]
656type=CoherentXBar
657clk_domain=system.clk_domain
658eventq_index=0
659forward_latency=4
660frontend_latency=3
661point_of_coherency=true
662response_latency=2
663snoop_filter=Null
664snoop_response_latency=4
665system=system
666use_default_range=false
667width=16
668master=system.physmem.port
669slave=system.system_port system.cpu.l2cache.mem_side

--- 83 unchanged lines hidden ---