stats.txt (11103:38f6188421e0) stats.txt (11138:a611a23c8cc2)
1
2---------- Begin Simulation Statistics ----------
3sim_seconds 0.000038 # Number of seconds simulated
1
2---------- Begin Simulation Statistics ----------
3sim_seconds 0.000038 # Number of seconds simulated
4sim_ticks 37552000 # Number of ticks simulated
5final_tick 37552000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
4sim_ticks 37553000 # Number of ticks simulated
5final_tick 37553000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
6sim_freq 1000000000000 # Frequency of simulated ticks
6sim_freq 1000000000000 # Frequency of simulated ticks
7host_inst_rate 72134 # Simulator instruction rate (inst/s)
8host_op_rate 72118 # Simulator op (including micro ops) rate (op/s)
9host_tick_rate 423067865 # Simulator tick rate (ticks/s)
10host_mem_usage 288748 # Number of bytes of host memory used
11host_seconds 0.09 # Real time elapsed on the host
7host_inst_rate 161315 # Simulator instruction rate (inst/s)
8host_op_rate 161262 # Simulator op (including micro ops) rate (op/s)
9host_tick_rate 945919395 # Simulator tick rate (ticks/s)
10host_mem_usage 296228 # Number of bytes of host memory used
11host_seconds 0.04 # Real time elapsed on the host
12sim_insts 6400 # Number of instructions simulated
13sim_ops 6400 # Number of ops (including micro ops) simulated
14system.voltage_domain.voltage 1 # Voltage in Volts
15system.clk_domain.clock 1000 # Clock period in ticks
16system.physmem.bytes_read::cpu.inst 23296 # Number of bytes read from this memory
17system.physmem.bytes_read::cpu.data 10816 # Number of bytes read from this memory
18system.physmem.bytes_read::total 34112 # Number of bytes read from this memory
19system.physmem.bytes_inst_read::cpu.inst 23296 # Number of instructions bytes read from this memory
20system.physmem.bytes_inst_read::total 23296 # Number of instructions bytes read from this memory
21system.physmem.num_reads::cpu.inst 364 # Number of read requests responded to by this memory
22system.physmem.num_reads::cpu.data 169 # Number of read requests responded to by this memory
23system.physmem.num_reads::total 533 # Number of read requests responded to by this memory
12sim_insts 6400 # Number of instructions simulated
13sim_ops 6400 # Number of ops (including micro ops) simulated
14system.voltage_domain.voltage 1 # Voltage in Volts
15system.clk_domain.clock 1000 # Clock period in ticks
16system.physmem.bytes_read::cpu.inst 23296 # Number of bytes read from this memory
17system.physmem.bytes_read::cpu.data 10816 # Number of bytes read from this memory
18system.physmem.bytes_read::total 34112 # Number of bytes read from this memory
19system.physmem.bytes_inst_read::cpu.inst 23296 # Number of instructions bytes read from this memory
20system.physmem.bytes_inst_read::total 23296 # Number of instructions bytes read from this memory
21system.physmem.num_reads::cpu.inst 364 # Number of read requests responded to by this memory
22system.physmem.num_reads::cpu.data 169 # Number of read requests responded to by this memory
23system.physmem.num_reads::total 533 # Number of read requests responded to by this memory
24system.physmem.bw_read::cpu.inst 620366425 # Total read bandwidth from this memory (bytes/s)
25system.physmem.bw_read::cpu.data 288027269 # Total read bandwidth from this memory (bytes/s)
26system.physmem.bw_read::total 908393694 # Total read bandwidth from this memory (bytes/s)
27system.physmem.bw_inst_read::cpu.inst 620366425 # Instruction read bandwidth from this memory (bytes/s)
28system.physmem.bw_inst_read::total 620366425 # Instruction read bandwidth from this memory (bytes/s)
29system.physmem.bw_total::cpu.inst 620366425 # Total bandwidth to/from this memory (bytes/s)
30system.physmem.bw_total::cpu.data 288027269 # Total bandwidth to/from this memory (bytes/s)
31system.physmem.bw_total::total 908393694 # Total bandwidth to/from this memory (bytes/s)
24system.physmem.bw_read::cpu.inst 620349905 # Total read bandwidth from this memory (bytes/s)
25system.physmem.bw_read::cpu.data 288019599 # Total read bandwidth from this memory (bytes/s)
26system.physmem.bw_read::total 908369504 # Total read bandwidth from this memory (bytes/s)
27system.physmem.bw_inst_read::cpu.inst 620349905 # Instruction read bandwidth from this memory (bytes/s)
28system.physmem.bw_inst_read::total 620349905 # Instruction read bandwidth from this memory (bytes/s)
29system.physmem.bw_total::cpu.inst 620349905 # Total bandwidth to/from this memory (bytes/s)
30system.physmem.bw_total::cpu.data 288019599 # Total bandwidth to/from this memory (bytes/s)
31system.physmem.bw_total::total 908369504 # Total bandwidth to/from this memory (bytes/s)
32system.physmem.readReqs 533 # Number of read requests accepted
33system.physmem.writeReqs 0 # Number of write requests accepted
34system.physmem.readBursts 533 # Number of DRAM read bursts, including those serviced by the write queue
35system.physmem.writeBursts 0 # Number of DRAM write bursts, including those merged in the write queue
36system.physmem.bytesReadDRAM 34112 # Total number of bytes read from DRAM
37system.physmem.bytesReadWrQ 0 # Total number of bytes read from write queue
38system.physmem.bytesWritten 0 # Total number of bytes written to DRAM
39system.physmem.bytesReadSys 34112 # Total read bytes from the system interface side

--- 30 unchanged lines hidden (view full) ---

70system.physmem.perBankWrBursts::10 0 # Per bank write bursts
71system.physmem.perBankWrBursts::11 0 # Per bank write bursts
72system.physmem.perBankWrBursts::12 0 # Per bank write bursts
73system.physmem.perBankWrBursts::13 0 # Per bank write bursts
74system.physmem.perBankWrBursts::14 0 # Per bank write bursts
75system.physmem.perBankWrBursts::15 0 # Per bank write bursts
76system.physmem.numRdRetry 0 # Number of times read queue was full causing retry
77system.physmem.numWrRetry 0 # Number of times write queue was full causing retry
32system.physmem.readReqs 533 # Number of read requests accepted
33system.physmem.writeReqs 0 # Number of write requests accepted
34system.physmem.readBursts 533 # Number of DRAM read bursts, including those serviced by the write queue
35system.physmem.writeBursts 0 # Number of DRAM write bursts, including those merged in the write queue
36system.physmem.bytesReadDRAM 34112 # Total number of bytes read from DRAM
37system.physmem.bytesReadWrQ 0 # Total number of bytes read from write queue
38system.physmem.bytesWritten 0 # Total number of bytes written to DRAM
39system.physmem.bytesReadSys 34112 # Total read bytes from the system interface side

--- 30 unchanged lines hidden (view full) ---

70system.physmem.perBankWrBursts::10 0 # Per bank write bursts
71system.physmem.perBankWrBursts::11 0 # Per bank write bursts
72system.physmem.perBankWrBursts::12 0 # Per bank write bursts
73system.physmem.perBankWrBursts::13 0 # Per bank write bursts
74system.physmem.perBankWrBursts::14 0 # Per bank write bursts
75system.physmem.perBankWrBursts::15 0 # Per bank write bursts
76system.physmem.numRdRetry 0 # Number of times read queue was full causing retry
77system.physmem.numWrRetry 0 # Number of times write queue was full causing retry
78system.physmem.totGap 37447500 # Total gap between requests
78system.physmem.totGap 37448500 # Total gap between requests
79system.physmem.readPktSize::0 0 # Read request sizes (log2)
80system.physmem.readPktSize::1 0 # Read request sizes (log2)
81system.physmem.readPktSize::2 0 # Read request sizes (log2)
82system.physmem.readPktSize::3 0 # Read request sizes (log2)
83system.physmem.readPktSize::4 0 # Read request sizes (log2)
84system.physmem.readPktSize::5 0 # Read request sizes (log2)
85system.physmem.readPktSize::6 533 # Read request sizes (log2)
86system.physmem.writePktSize::0 0 # Write request sizes (log2)

--- 114 unchanged lines hidden (view full) ---

201system.physmem.bytesPerActivate::1024-1151 8 9.52% 100.00% # Bytes accessed per row activation
202system.physmem.bytesPerActivate::total 84 # Bytes accessed per row activation
203system.physmem.totQLat 3307750 # Total ticks spent queuing
204system.physmem.totMemAccLat 13301500 # Total ticks spent from burst creation until serviced by the DRAM
205system.physmem.totBusLat 2665000 # Total ticks spent in databus transfers
206system.physmem.avgQLat 6205.91 # Average queueing delay per DRAM burst
207system.physmem.avgBusLat 5000.00 # Average bus latency per DRAM burst
208system.physmem.avgMemAccLat 24955.91 # Average memory access latency per DRAM burst
79system.physmem.readPktSize::0 0 # Read request sizes (log2)
80system.physmem.readPktSize::1 0 # Read request sizes (log2)
81system.physmem.readPktSize::2 0 # Read request sizes (log2)
82system.physmem.readPktSize::3 0 # Read request sizes (log2)
83system.physmem.readPktSize::4 0 # Read request sizes (log2)
84system.physmem.readPktSize::5 0 # Read request sizes (log2)
85system.physmem.readPktSize::6 533 # Read request sizes (log2)
86system.physmem.writePktSize::0 0 # Write request sizes (log2)

--- 114 unchanged lines hidden (view full) ---

201system.physmem.bytesPerActivate::1024-1151 8 9.52% 100.00% # Bytes accessed per row activation
202system.physmem.bytesPerActivate::total 84 # Bytes accessed per row activation
203system.physmem.totQLat 3307750 # Total ticks spent queuing
204system.physmem.totMemAccLat 13301500 # Total ticks spent from burst creation until serviced by the DRAM
205system.physmem.totBusLat 2665000 # Total ticks spent in databus transfers
206system.physmem.avgQLat 6205.91 # Average queueing delay per DRAM burst
207system.physmem.avgBusLat 5000.00 # Average bus latency per DRAM burst
208system.physmem.avgMemAccLat 24955.91 # Average memory access latency per DRAM burst
209system.physmem.avgRdBW 908.39 # Average DRAM read bandwidth in MiByte/s
209system.physmem.avgRdBW 908.37 # Average DRAM read bandwidth in MiByte/s
210system.physmem.avgWrBW 0.00 # Average achieved write bandwidth in MiByte/s
210system.physmem.avgWrBW 0.00 # Average achieved write bandwidth in MiByte/s
211system.physmem.avgRdBWSys 908.39 # Average system read bandwidth in MiByte/s
211system.physmem.avgRdBWSys 908.37 # Average system read bandwidth in MiByte/s
212system.physmem.avgWrBWSys 0.00 # Average system write bandwidth in MiByte/s
213system.physmem.peakBW 12800.00 # Theoretical peak bandwidth in MiByte/s
214system.physmem.busUtil 7.10 # Data bus utilization in percentage
215system.physmem.busUtilRead 7.10 # Data bus utilization in percentage for reads
216system.physmem.busUtilWrite 0.00 # Data bus utilization in percentage for writes
217system.physmem.avgRdQLen 1.19 # Average read queue length when enqueuing
218system.physmem.avgWrQLen 0.00 # Average write queue length when enqueuing
219system.physmem.readRowHits 437 # Number of row buffer hits during reads
220system.physmem.writeRowHits 0 # Number of row buffer hits during writes
221system.physmem.readRowHitRate 81.99 # Row buffer hit rate for reads
222system.physmem.writeRowHitRate nan # Row buffer hit rate for writes
212system.physmem.avgWrBWSys 0.00 # Average system write bandwidth in MiByte/s
213system.physmem.peakBW 12800.00 # Theoretical peak bandwidth in MiByte/s
214system.physmem.busUtil 7.10 # Data bus utilization in percentage
215system.physmem.busUtilRead 7.10 # Data bus utilization in percentage for reads
216system.physmem.busUtilWrite 0.00 # Data bus utilization in percentage for writes
217system.physmem.avgRdQLen 1.19 # Average read queue length when enqueuing
218system.physmem.avgWrQLen 0.00 # Average write queue length when enqueuing
219system.physmem.readRowHits 437 # Number of row buffer hits during reads
220system.physmem.writeRowHits 0 # Number of row buffer hits during writes
221system.physmem.readRowHitRate 81.99 # Row buffer hit rate for reads
222system.physmem.writeRowHitRate nan # Row buffer hit rate for writes
223system.physmem.avgGap 70257.97 # Average gap between requests
223system.physmem.avgGap 70259.85 # Average gap between requests
224system.physmem.pageHitRate 81.99 # Row buffer hit rate, read and write combined
225system.physmem_0.actEnergy 226800 # Energy for activate commands per rank (pJ)
226system.physmem_0.preEnergy 123750 # Energy for precharge commands per rank (pJ)
227system.physmem_0.readEnergy 2043600 # Energy for read commands per rank (pJ)
228system.physmem_0.writeEnergy 0 # Energy for write commands per rank (pJ)
229system.physmem_0.refreshEnergy 2034240 # Energy for refresh commands per rank (pJ)
230system.physmem_0.actBackEnergy 21178350 # Energy for active background per rank (pJ)
231system.physmem_0.preBackEnergy 265500 # Energy for precharge background per rank (pJ)

--- 56 unchanged lines hidden (view full) ---

288system.cpu.itb.write_misses 0 # DTB write misses
289system.cpu.itb.write_acv 0 # DTB write access violations
290system.cpu.itb.write_accesses 0 # DTB write accesses
291system.cpu.itb.data_hits 0 # DTB hits
292system.cpu.itb.data_misses 0 # DTB misses
293system.cpu.itb.data_acv 0 # DTB access violations
294system.cpu.itb.data_accesses 0 # DTB accesses
295system.cpu.workload.num_syscalls 17 # Number of system calls
224system.physmem.pageHitRate 81.99 # Row buffer hit rate, read and write combined
225system.physmem_0.actEnergy 226800 # Energy for activate commands per rank (pJ)
226system.physmem_0.preEnergy 123750 # Energy for precharge commands per rank (pJ)
227system.physmem_0.readEnergy 2043600 # Energy for read commands per rank (pJ)
228system.physmem_0.writeEnergy 0 # Energy for write commands per rank (pJ)
229system.physmem_0.refreshEnergy 2034240 # Energy for refresh commands per rank (pJ)
230system.physmem_0.actBackEnergy 21178350 # Energy for active background per rank (pJ)
231system.physmem_0.preBackEnergy 265500 # Energy for precharge background per rank (pJ)

--- 56 unchanged lines hidden (view full) ---

288system.cpu.itb.write_misses 0 # DTB write misses
289system.cpu.itb.write_acv 0 # DTB write access violations
290system.cpu.itb.write_accesses 0 # DTB write accesses
291system.cpu.itb.data_hits 0 # DTB hits
292system.cpu.itb.data_misses 0 # DTB misses
293system.cpu.itb.data_acv 0 # DTB access violations
294system.cpu.itb.data_accesses 0 # DTB accesses
295system.cpu.workload.num_syscalls 17 # Number of system calls
296system.cpu.numCycles 75104 # number of cpu cycles simulated
296system.cpu.numCycles 75106 # number of cpu cycles simulated
297system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
298system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
299system.cpu.committedInsts 6400 # Number of instructions committed
300system.cpu.committedOps 6400 # Number of ops (including micro ops) committed
301system.cpu.discardedOps 1085 # Number of ops (including micro ops) which were discarded before commit
302system.cpu.numFetchSuspends 0 # Number of times Execute suspended instruction fetching
297system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
298system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
299system.cpu.committedInsts 6400 # Number of instructions committed
300system.cpu.committedOps 6400 # Number of ops (including micro ops) committed
301system.cpu.discardedOps 1085 # Number of ops (including micro ops) which were discarded before commit
302system.cpu.numFetchSuspends 0 # Number of times Execute suspended instruction fetching
303system.cpu.cpi 11.735000 # CPI: cycles per instruction
304system.cpu.ipc 0.085215 # IPC: instructions per cycle
303system.cpu.cpi 11.735312 # CPI: cycles per instruction
304system.cpu.ipc 0.085213 # IPC: instructions per cycle
305system.cpu.tickCycles 12517 # Number of cycles that the object actually ticked
305system.cpu.tickCycles 12517 # Number of cycles that the object actually ticked
306system.cpu.idleCycles 62587 # Total number of cycles that the object has spent stopped
306system.cpu.idleCycles 62589 # Total number of cycles that the object has spent stopped
307system.cpu.dcache.tags.replacements 0 # number of replacements
307system.cpu.dcache.tags.replacements 0 # number of replacements
308system.cpu.dcache.tags.tagsinuse 103.919220 # Cycle average of tags in use
308system.cpu.dcache.tags.tagsinuse 103.920661 # Cycle average of tags in use
309system.cpu.dcache.tags.total_refs 1972 # Total number of references to valid blocks.
310system.cpu.dcache.tags.sampled_refs 169 # Sample count of references to valid blocks.
311system.cpu.dcache.tags.avg_refs 11.668639 # Average number of references to valid blocks.
312system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
309system.cpu.dcache.tags.total_refs 1972 # Total number of references to valid blocks.
310system.cpu.dcache.tags.sampled_refs 169 # Sample count of references to valid blocks.
311system.cpu.dcache.tags.avg_refs 11.668639 # Average number of references to valid blocks.
312system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
313system.cpu.dcache.tags.occ_blocks::cpu.data 103.919220 # Average occupied blocks per requestor
313system.cpu.dcache.tags.occ_blocks::cpu.data 103.920661 # Average occupied blocks per requestor
314system.cpu.dcache.tags.occ_percent::cpu.data 0.025371 # Average percentage of cache occupancy
315system.cpu.dcache.tags.occ_percent::total 0.025371 # Average percentage of cache occupancy
316system.cpu.dcache.tags.occ_task_id_blocks::1024 169 # Occupied blocks per task id
317system.cpu.dcache.tags.age_task_id_blocks_1024::0 22 # Occupied blocks per task id
318system.cpu.dcache.tags.age_task_id_blocks_1024::1 147 # Occupied blocks per task id
319system.cpu.dcache.tags.occ_task_id_percent::1024 0.041260 # Percentage of cache occupancy per task id
320system.cpu.dcache.tags.tag_accesses 4567 # Number of tag accesses
321system.cpu.dcache.tags.data_accesses 4567 # Number of data accesses

--- 90 unchanged lines hidden (view full) ---

412system.cpu.dcache.WriteReq_avg_mshr_miss_latency::cpu.data 73582.191781 # average WriteReq mshr miss latency
413system.cpu.dcache.WriteReq_avg_mshr_miss_latency::total 73582.191781 # average WriteReq mshr miss latency
414system.cpu.dcache.demand_avg_mshr_miss_latency::cpu.data 78047.337278 # average overall mshr miss latency
415system.cpu.dcache.demand_avg_mshr_miss_latency::total 78047.337278 # average overall mshr miss latency
416system.cpu.dcache.overall_avg_mshr_miss_latency::cpu.data 78047.337278 # average overall mshr miss latency
417system.cpu.dcache.overall_avg_mshr_miss_latency::total 78047.337278 # average overall mshr miss latency
418system.cpu.dcache.no_allocate_misses 0 # Number of misses that were no-allocate
419system.cpu.icache.tags.replacements 0 # number of replacements
314system.cpu.dcache.tags.occ_percent::cpu.data 0.025371 # Average percentage of cache occupancy
315system.cpu.dcache.tags.occ_percent::total 0.025371 # Average percentage of cache occupancy
316system.cpu.dcache.tags.occ_task_id_blocks::1024 169 # Occupied blocks per task id
317system.cpu.dcache.tags.age_task_id_blocks_1024::0 22 # Occupied blocks per task id
318system.cpu.dcache.tags.age_task_id_blocks_1024::1 147 # Occupied blocks per task id
319system.cpu.dcache.tags.occ_task_id_percent::1024 0.041260 # Percentage of cache occupancy per task id
320system.cpu.dcache.tags.tag_accesses 4567 # Number of tag accesses
321system.cpu.dcache.tags.data_accesses 4567 # Number of data accesses

--- 90 unchanged lines hidden (view full) ---

412system.cpu.dcache.WriteReq_avg_mshr_miss_latency::cpu.data 73582.191781 # average WriteReq mshr miss latency
413system.cpu.dcache.WriteReq_avg_mshr_miss_latency::total 73582.191781 # average WriteReq mshr miss latency
414system.cpu.dcache.demand_avg_mshr_miss_latency::cpu.data 78047.337278 # average overall mshr miss latency
415system.cpu.dcache.demand_avg_mshr_miss_latency::total 78047.337278 # average overall mshr miss latency
416system.cpu.dcache.overall_avg_mshr_miss_latency::cpu.data 78047.337278 # average overall mshr miss latency
417system.cpu.dcache.overall_avg_mshr_miss_latency::total 78047.337278 # average overall mshr miss latency
418system.cpu.dcache.no_allocate_misses 0 # Number of misses that were no-allocate
419system.cpu.icache.tags.replacements 0 # number of replacements
420system.cpu.icache.tags.tagsinuse 175.811080 # Cycle average of tags in use
420system.cpu.icache.tags.tagsinuse 175.815240 # Cycle average of tags in use
421system.cpu.icache.tags.total_refs 2286 # Total number of references to valid blocks.
422system.cpu.icache.tags.sampled_refs 365 # Sample count of references to valid blocks.
423system.cpu.icache.tags.avg_refs 6.263014 # Average number of references to valid blocks.
424system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
421system.cpu.icache.tags.total_refs 2286 # Total number of references to valid blocks.
422system.cpu.icache.tags.sampled_refs 365 # Sample count of references to valid blocks.
423system.cpu.icache.tags.avg_refs 6.263014 # Average number of references to valid blocks.
424system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
425system.cpu.icache.tags.occ_blocks::cpu.inst 175.811080 # Average occupied blocks per requestor
426system.cpu.icache.tags.occ_percent::cpu.inst 0.085845 # Average percentage of cache occupancy
427system.cpu.icache.tags.occ_percent::total 0.085845 # Average percentage of cache occupancy
425system.cpu.icache.tags.occ_blocks::cpu.inst 175.815240 # Average occupied blocks per requestor
426system.cpu.icache.tags.occ_percent::cpu.inst 0.085847 # Average percentage of cache occupancy
427system.cpu.icache.tags.occ_percent::total 0.085847 # Average percentage of cache occupancy
428system.cpu.icache.tags.occ_task_id_blocks::1024 365 # Occupied blocks per task id
429system.cpu.icache.tags.age_task_id_blocks_1024::0 106 # Occupied blocks per task id
430system.cpu.icache.tags.age_task_id_blocks_1024::1 259 # Occupied blocks per task id
431system.cpu.icache.tags.occ_task_id_percent::1024 0.178223 # Percentage of cache occupancy per task id
432system.cpu.icache.tags.tag_accesses 5667 # Number of tag accesses
433system.cpu.icache.tags.data_accesses 5667 # Number of data accesses
434system.cpu.icache.ReadReq_hits::cpu.inst 2286 # number of ReadReq hits
435system.cpu.icache.ReadReq_hits::total 2286 # number of ReadReq hits
436system.cpu.icache.demand_hits::cpu.inst 2286 # number of demand (read+write) hits
437system.cpu.icache.demand_hits::total 2286 # number of demand (read+write) hits
438system.cpu.icache.overall_hits::cpu.inst 2286 # number of overall hits
439system.cpu.icache.overall_hits::total 2286 # number of overall hits
440system.cpu.icache.ReadReq_misses::cpu.inst 365 # number of ReadReq misses
441system.cpu.icache.ReadReq_misses::total 365 # number of ReadReq misses
442system.cpu.icache.demand_misses::cpu.inst 365 # number of demand (read+write) misses
443system.cpu.icache.demand_misses::total 365 # number of demand (read+write) misses
444system.cpu.icache.overall_misses::cpu.inst 365 # number of overall misses
445system.cpu.icache.overall_misses::total 365 # number of overall misses
428system.cpu.icache.tags.occ_task_id_blocks::1024 365 # Occupied blocks per task id
429system.cpu.icache.tags.age_task_id_blocks_1024::0 106 # Occupied blocks per task id
430system.cpu.icache.tags.age_task_id_blocks_1024::1 259 # Occupied blocks per task id
431system.cpu.icache.tags.occ_task_id_percent::1024 0.178223 # Percentage of cache occupancy per task id
432system.cpu.icache.tags.tag_accesses 5667 # Number of tag accesses
433system.cpu.icache.tags.data_accesses 5667 # Number of data accesses
434system.cpu.icache.ReadReq_hits::cpu.inst 2286 # number of ReadReq hits
435system.cpu.icache.ReadReq_hits::total 2286 # number of ReadReq hits
436system.cpu.icache.demand_hits::cpu.inst 2286 # number of demand (read+write) hits
437system.cpu.icache.demand_hits::total 2286 # number of demand (read+write) hits
438system.cpu.icache.overall_hits::cpu.inst 2286 # number of overall hits
439system.cpu.icache.overall_hits::total 2286 # number of overall hits
440system.cpu.icache.ReadReq_misses::cpu.inst 365 # number of ReadReq misses
441system.cpu.icache.ReadReq_misses::total 365 # number of ReadReq misses
442system.cpu.icache.demand_misses::cpu.inst 365 # number of demand (read+write) misses
443system.cpu.icache.demand_misses::total 365 # number of demand (read+write) misses
444system.cpu.icache.overall_misses::cpu.inst 365 # number of overall misses
445system.cpu.icache.overall_misses::total 365 # number of overall misses
446system.cpu.icache.ReadReq_miss_latency::cpu.inst 27931500 # number of ReadReq miss cycles
447system.cpu.icache.ReadReq_miss_latency::total 27931500 # number of ReadReq miss cycles
448system.cpu.icache.demand_miss_latency::cpu.inst 27931500 # number of demand (read+write) miss cycles
449system.cpu.icache.demand_miss_latency::total 27931500 # number of demand (read+write) miss cycles
450system.cpu.icache.overall_miss_latency::cpu.inst 27931500 # number of overall miss cycles
451system.cpu.icache.overall_miss_latency::total 27931500 # number of overall miss cycles
446system.cpu.icache.ReadReq_miss_latency::cpu.inst 27932500 # number of ReadReq miss cycles
447system.cpu.icache.ReadReq_miss_latency::total 27932500 # number of ReadReq miss cycles
448system.cpu.icache.demand_miss_latency::cpu.inst 27932500 # number of demand (read+write) miss cycles
449system.cpu.icache.demand_miss_latency::total 27932500 # number of demand (read+write) miss cycles
450system.cpu.icache.overall_miss_latency::cpu.inst 27932500 # number of overall miss cycles
451system.cpu.icache.overall_miss_latency::total 27932500 # number of overall miss cycles
452system.cpu.icache.ReadReq_accesses::cpu.inst 2651 # number of ReadReq accesses(hits+misses)
453system.cpu.icache.ReadReq_accesses::total 2651 # number of ReadReq accesses(hits+misses)
454system.cpu.icache.demand_accesses::cpu.inst 2651 # number of demand (read+write) accesses
455system.cpu.icache.demand_accesses::total 2651 # number of demand (read+write) accesses
456system.cpu.icache.overall_accesses::cpu.inst 2651 # number of overall (read+write) accesses
457system.cpu.icache.overall_accesses::total 2651 # number of overall (read+write) accesses
458system.cpu.icache.ReadReq_miss_rate::cpu.inst 0.137684 # miss rate for ReadReq accesses
459system.cpu.icache.ReadReq_miss_rate::total 0.137684 # miss rate for ReadReq accesses
460system.cpu.icache.demand_miss_rate::cpu.inst 0.137684 # miss rate for demand accesses
461system.cpu.icache.demand_miss_rate::total 0.137684 # miss rate for demand accesses
462system.cpu.icache.overall_miss_rate::cpu.inst 0.137684 # miss rate for overall accesses
463system.cpu.icache.overall_miss_rate::total 0.137684 # miss rate for overall accesses
452system.cpu.icache.ReadReq_accesses::cpu.inst 2651 # number of ReadReq accesses(hits+misses)
453system.cpu.icache.ReadReq_accesses::total 2651 # number of ReadReq accesses(hits+misses)
454system.cpu.icache.demand_accesses::cpu.inst 2651 # number of demand (read+write) accesses
455system.cpu.icache.demand_accesses::total 2651 # number of demand (read+write) accesses
456system.cpu.icache.overall_accesses::cpu.inst 2651 # number of overall (read+write) accesses
457system.cpu.icache.overall_accesses::total 2651 # number of overall (read+write) accesses
458system.cpu.icache.ReadReq_miss_rate::cpu.inst 0.137684 # miss rate for ReadReq accesses
459system.cpu.icache.ReadReq_miss_rate::total 0.137684 # miss rate for ReadReq accesses
460system.cpu.icache.demand_miss_rate::cpu.inst 0.137684 # miss rate for demand accesses
461system.cpu.icache.demand_miss_rate::total 0.137684 # miss rate for demand accesses
462system.cpu.icache.overall_miss_rate::cpu.inst 0.137684 # miss rate for overall accesses
463system.cpu.icache.overall_miss_rate::total 0.137684 # miss rate for overall accesses
464system.cpu.icache.ReadReq_avg_miss_latency::cpu.inst 76524.657534 # average ReadReq miss latency
465system.cpu.icache.ReadReq_avg_miss_latency::total 76524.657534 # average ReadReq miss latency
466system.cpu.icache.demand_avg_miss_latency::cpu.inst 76524.657534 # average overall miss latency
467system.cpu.icache.demand_avg_miss_latency::total 76524.657534 # average overall miss latency
468system.cpu.icache.overall_avg_miss_latency::cpu.inst 76524.657534 # average overall miss latency
469system.cpu.icache.overall_avg_miss_latency::total 76524.657534 # average overall miss latency
464system.cpu.icache.ReadReq_avg_miss_latency::cpu.inst 76527.397260 # average ReadReq miss latency
465system.cpu.icache.ReadReq_avg_miss_latency::total 76527.397260 # average ReadReq miss latency
466system.cpu.icache.demand_avg_miss_latency::cpu.inst 76527.397260 # average overall miss latency
467system.cpu.icache.demand_avg_miss_latency::total 76527.397260 # average overall miss latency
468system.cpu.icache.overall_avg_miss_latency::cpu.inst 76527.397260 # average overall miss latency
469system.cpu.icache.overall_avg_miss_latency::total 76527.397260 # average overall miss latency
470system.cpu.icache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked
471system.cpu.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked
472system.cpu.icache.blocked::no_mshrs 0 # number of cycles access was blocked
473system.cpu.icache.blocked::no_targets 0 # number of cycles access was blocked
474system.cpu.icache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
475system.cpu.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
476system.cpu.icache.fast_writes 0 # number of fast writes performed
477system.cpu.icache.cache_copies 0 # number of cache copies performed
478system.cpu.icache.ReadReq_mshr_misses::cpu.inst 365 # number of ReadReq MSHR misses
479system.cpu.icache.ReadReq_mshr_misses::total 365 # number of ReadReq MSHR misses
480system.cpu.icache.demand_mshr_misses::cpu.inst 365 # number of demand (read+write) MSHR misses
481system.cpu.icache.demand_mshr_misses::total 365 # number of demand (read+write) MSHR misses
482system.cpu.icache.overall_mshr_misses::cpu.inst 365 # number of overall MSHR misses
483system.cpu.icache.overall_mshr_misses::total 365 # number of overall MSHR misses
470system.cpu.icache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked
471system.cpu.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked
472system.cpu.icache.blocked::no_mshrs 0 # number of cycles access was blocked
473system.cpu.icache.blocked::no_targets 0 # number of cycles access was blocked
474system.cpu.icache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
475system.cpu.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
476system.cpu.icache.fast_writes 0 # number of fast writes performed
477system.cpu.icache.cache_copies 0 # number of cache copies performed
478system.cpu.icache.ReadReq_mshr_misses::cpu.inst 365 # number of ReadReq MSHR misses
479system.cpu.icache.ReadReq_mshr_misses::total 365 # number of ReadReq MSHR misses
480system.cpu.icache.demand_mshr_misses::cpu.inst 365 # number of demand (read+write) MSHR misses
481system.cpu.icache.demand_mshr_misses::total 365 # number of demand (read+write) MSHR misses
482system.cpu.icache.overall_mshr_misses::cpu.inst 365 # number of overall MSHR misses
483system.cpu.icache.overall_mshr_misses::total 365 # number of overall MSHR misses
484system.cpu.icache.ReadReq_mshr_miss_latency::cpu.inst 27566500 # number of ReadReq MSHR miss cycles
485system.cpu.icache.ReadReq_mshr_miss_latency::total 27566500 # number of ReadReq MSHR miss cycles
486system.cpu.icache.demand_mshr_miss_latency::cpu.inst 27566500 # number of demand (read+write) MSHR miss cycles
487system.cpu.icache.demand_mshr_miss_latency::total 27566500 # number of demand (read+write) MSHR miss cycles
488system.cpu.icache.overall_mshr_miss_latency::cpu.inst 27566500 # number of overall MSHR miss cycles
489system.cpu.icache.overall_mshr_miss_latency::total 27566500 # number of overall MSHR miss cycles
484system.cpu.icache.ReadReq_mshr_miss_latency::cpu.inst 27567500 # number of ReadReq MSHR miss cycles
485system.cpu.icache.ReadReq_mshr_miss_latency::total 27567500 # number of ReadReq MSHR miss cycles
486system.cpu.icache.demand_mshr_miss_latency::cpu.inst 27567500 # number of demand (read+write) MSHR miss cycles
487system.cpu.icache.demand_mshr_miss_latency::total 27567500 # number of demand (read+write) MSHR miss cycles
488system.cpu.icache.overall_mshr_miss_latency::cpu.inst 27567500 # number of overall MSHR miss cycles
489system.cpu.icache.overall_mshr_miss_latency::total 27567500 # number of overall MSHR miss cycles
490system.cpu.icache.ReadReq_mshr_miss_rate::cpu.inst 0.137684 # mshr miss rate for ReadReq accesses
491system.cpu.icache.ReadReq_mshr_miss_rate::total 0.137684 # mshr miss rate for ReadReq accesses
492system.cpu.icache.demand_mshr_miss_rate::cpu.inst 0.137684 # mshr miss rate for demand accesses
493system.cpu.icache.demand_mshr_miss_rate::total 0.137684 # mshr miss rate for demand accesses
494system.cpu.icache.overall_mshr_miss_rate::cpu.inst 0.137684 # mshr miss rate for overall accesses
495system.cpu.icache.overall_mshr_miss_rate::total 0.137684 # mshr miss rate for overall accesses
490system.cpu.icache.ReadReq_mshr_miss_rate::cpu.inst 0.137684 # mshr miss rate for ReadReq accesses
491system.cpu.icache.ReadReq_mshr_miss_rate::total 0.137684 # mshr miss rate for ReadReq accesses
492system.cpu.icache.demand_mshr_miss_rate::cpu.inst 0.137684 # mshr miss rate for demand accesses
493system.cpu.icache.demand_mshr_miss_rate::total 0.137684 # mshr miss rate for demand accesses
494system.cpu.icache.overall_mshr_miss_rate::cpu.inst 0.137684 # mshr miss rate for overall accesses
495system.cpu.icache.overall_mshr_miss_rate::total 0.137684 # mshr miss rate for overall accesses
496system.cpu.icache.ReadReq_avg_mshr_miss_latency::cpu.inst 75524.657534 # average ReadReq mshr miss latency
497system.cpu.icache.ReadReq_avg_mshr_miss_latency::total 75524.657534 # average ReadReq mshr miss latency
498system.cpu.icache.demand_avg_mshr_miss_latency::cpu.inst 75524.657534 # average overall mshr miss latency
499system.cpu.icache.demand_avg_mshr_miss_latency::total 75524.657534 # average overall mshr miss latency
500system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 75524.657534 # average overall mshr miss latency
501system.cpu.icache.overall_avg_mshr_miss_latency::total 75524.657534 # average overall mshr miss latency
496system.cpu.icache.ReadReq_avg_mshr_miss_latency::cpu.inst 75527.397260 # average ReadReq mshr miss latency
497system.cpu.icache.ReadReq_avg_mshr_miss_latency::total 75527.397260 # average ReadReq mshr miss latency
498system.cpu.icache.demand_avg_mshr_miss_latency::cpu.inst 75527.397260 # average overall mshr miss latency
499system.cpu.icache.demand_avg_mshr_miss_latency::total 75527.397260 # average overall mshr miss latency
500system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 75527.397260 # average overall mshr miss latency
501system.cpu.icache.overall_avg_mshr_miss_latency::total 75527.397260 # average overall mshr miss latency
502system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate
503system.cpu.l2cache.tags.replacements 0 # number of replacements
502system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate
503system.cpu.l2cache.tags.replacements 0 # number of replacements
504system.cpu.l2cache.tags.tagsinuse 233.447652 # Cycle average of tags in use
504system.cpu.l2cache.tags.tagsinuse 233.452540 # Cycle average of tags in use
505system.cpu.l2cache.tags.total_refs 1 # Total number of references to valid blocks.
506system.cpu.l2cache.tags.sampled_refs 460 # Sample count of references to valid blocks.
507system.cpu.l2cache.tags.avg_refs 0.002174 # Average number of references to valid blocks.
508system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
505system.cpu.l2cache.tags.total_refs 1 # Total number of references to valid blocks.
506system.cpu.l2cache.tags.sampled_refs 460 # Sample count of references to valid blocks.
507system.cpu.l2cache.tags.avg_refs 0.002174 # Average number of references to valid blocks.
508system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
509system.cpu.l2cache.tags.occ_blocks::cpu.inst 175.824515 # Average occupied blocks per requestor
510system.cpu.l2cache.tags.occ_blocks::cpu.data 57.623137 # Average occupied blocks per requestor
509system.cpu.l2cache.tags.occ_blocks::cpu.inst 175.828674 # Average occupied blocks per requestor
510system.cpu.l2cache.tags.occ_blocks::cpu.data 57.623866 # Average occupied blocks per requestor
511system.cpu.l2cache.tags.occ_percent::cpu.inst 0.005366 # Average percentage of cache occupancy
512system.cpu.l2cache.tags.occ_percent::cpu.data 0.001759 # Average percentage of cache occupancy
513system.cpu.l2cache.tags.occ_percent::total 0.007124 # Average percentage of cache occupancy
514system.cpu.l2cache.tags.occ_task_id_blocks::1024 460 # Occupied blocks per task id
515system.cpu.l2cache.tags.age_task_id_blocks_1024::0 122 # Occupied blocks per task id
516system.cpu.l2cache.tags.age_task_id_blocks_1024::1 338 # Occupied blocks per task id
517system.cpu.l2cache.tags.occ_task_id_percent::1024 0.014038 # Percentage of cache occupancy per task id
518system.cpu.l2cache.tags.tag_accesses 4805 # Number of tag accesses

--- 116 unchanged lines hidden (view full) ---

635system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::total 69927.083333 # average ReadSharedReq mshr miss latency
636system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.inst 64197.802198 # average overall mshr miss latency
637system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.data 66532.544379 # average overall mshr miss latency
638system.cpu.l2cache.demand_avg_mshr_miss_latency::total 64938.086304 # average overall mshr miss latency
639system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 64197.802198 # average overall mshr miss latency
640system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 66532.544379 # average overall mshr miss latency
641system.cpu.l2cache.overall_avg_mshr_miss_latency::total 64938.086304 # average overall mshr miss latency
642system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate
511system.cpu.l2cache.tags.occ_percent::cpu.inst 0.005366 # Average percentage of cache occupancy
512system.cpu.l2cache.tags.occ_percent::cpu.data 0.001759 # Average percentage of cache occupancy
513system.cpu.l2cache.tags.occ_percent::total 0.007124 # Average percentage of cache occupancy
514system.cpu.l2cache.tags.occ_task_id_blocks::1024 460 # Occupied blocks per task id
515system.cpu.l2cache.tags.age_task_id_blocks_1024::0 122 # Occupied blocks per task id
516system.cpu.l2cache.tags.age_task_id_blocks_1024::1 338 # Occupied blocks per task id
517system.cpu.l2cache.tags.occ_task_id_percent::1024 0.014038 # Percentage of cache occupancy per task id
518system.cpu.l2cache.tags.tag_accesses 4805 # Number of tag accesses

--- 116 unchanged lines hidden (view full) ---

635system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::total 69927.083333 # average ReadSharedReq mshr miss latency
636system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.inst 64197.802198 # average overall mshr miss latency
637system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.data 66532.544379 # average overall mshr miss latency
638system.cpu.l2cache.demand_avg_mshr_miss_latency::total 64938.086304 # average overall mshr miss latency
639system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 64197.802198 # average overall mshr miss latency
640system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 66532.544379 # average overall mshr miss latency
641system.cpu.l2cache.overall_avg_mshr_miss_latency::total 64938.086304 # average overall mshr miss latency
642system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate
643system.cpu.toL2Bus.snoop_filter.tot_requests 534 # Total number of requests made to the snoop filter.
644system.cpu.toL2Bus.snoop_filter.hit_single_requests 1 # Number of requests hitting in the snoop filter with a single holder of the requested data.
645system.cpu.toL2Bus.snoop_filter.hit_multi_requests 0 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data.
646system.cpu.toL2Bus.snoop_filter.tot_snoops 0 # Total number of snoops made to the snoop filter.
647system.cpu.toL2Bus.snoop_filter.hit_single_snoops 0 # Number of snoops hitting in the snoop filter with a single holder of the requested data.
648system.cpu.toL2Bus.snoop_filter.hit_multi_snoops 0 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data.
643system.cpu.toL2Bus.trans_dist::ReadResp 461 # Transaction distribution
644system.cpu.toL2Bus.trans_dist::ReadExReq 73 # Transaction distribution
645system.cpu.toL2Bus.trans_dist::ReadExResp 73 # Transaction distribution
646system.cpu.toL2Bus.trans_dist::ReadCleanReq 365 # Transaction distribution
647system.cpu.toL2Bus.trans_dist::ReadSharedReq 96 # Transaction distribution
648system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 730 # Packet count per connected master and slave (bytes)
649system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 338 # Packet count per connected master and slave (bytes)
650system.cpu.toL2Bus.pkt_count::total 1068 # Packet count per connected master and slave (bytes)
651system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 23360 # Cumulative packet size per connected master and slave (bytes)
652system.cpu.toL2Bus.pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 10816 # Cumulative packet size per connected master and slave (bytes)
653system.cpu.toL2Bus.pkt_size::total 34176 # Cumulative packet size per connected master and slave (bytes)
654system.cpu.toL2Bus.snoops 0 # Total snoops (count)
655system.cpu.toL2Bus.snoop_fanout::samples 534 # Request fanout histogram
649system.cpu.toL2Bus.trans_dist::ReadResp 461 # Transaction distribution
650system.cpu.toL2Bus.trans_dist::ReadExReq 73 # Transaction distribution
651system.cpu.toL2Bus.trans_dist::ReadExResp 73 # Transaction distribution
652system.cpu.toL2Bus.trans_dist::ReadCleanReq 365 # Transaction distribution
653system.cpu.toL2Bus.trans_dist::ReadSharedReq 96 # Transaction distribution
654system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 730 # Packet count per connected master and slave (bytes)
655system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 338 # Packet count per connected master and slave (bytes)
656system.cpu.toL2Bus.pkt_count::total 1068 # Packet count per connected master and slave (bytes)
657system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 23360 # Cumulative packet size per connected master and slave (bytes)
658system.cpu.toL2Bus.pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 10816 # Cumulative packet size per connected master and slave (bytes)
659system.cpu.toL2Bus.pkt_size::total 34176 # Cumulative packet size per connected master and slave (bytes)
660system.cpu.toL2Bus.snoops 0 # Total snoops (count)
661system.cpu.toL2Bus.snoop_fanout::samples 534 # Request fanout histogram
656system.cpu.toL2Bus.snoop_fanout::mean 1 # Request fanout histogram
657system.cpu.toL2Bus.snoop_fanout::stdev 0 # Request fanout histogram
662system.cpu.toL2Bus.snoop_fanout::mean 0.001873 # Request fanout histogram
663system.cpu.toL2Bus.snoop_fanout::stdev 0.043274 # Request fanout histogram
658system.cpu.toL2Bus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram
664system.cpu.toL2Bus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram
659system.cpu.toL2Bus.snoop_fanout::0 0 0.00% 0.00% # Request fanout histogram
660system.cpu.toL2Bus.snoop_fanout::1 534 100.00% 100.00% # Request fanout histogram
665system.cpu.toL2Bus.snoop_fanout::0 533 99.81% 99.81% # Request fanout histogram
666system.cpu.toL2Bus.snoop_fanout::1 1 0.19% 100.00% # Request fanout histogram
661system.cpu.toL2Bus.snoop_fanout::2 0 0.00% 100.00% # Request fanout histogram
662system.cpu.toL2Bus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram
667system.cpu.toL2Bus.snoop_fanout::2 0 0.00% 100.00% # Request fanout histogram
668system.cpu.toL2Bus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram
663system.cpu.toL2Bus.snoop_fanout::min_value 1 # Request fanout histogram
669system.cpu.toL2Bus.snoop_fanout::min_value 0 # Request fanout histogram
664system.cpu.toL2Bus.snoop_fanout::max_value 1 # Request fanout histogram
665system.cpu.toL2Bus.snoop_fanout::total 534 # Request fanout histogram
666system.cpu.toL2Bus.reqLayer0.occupancy 267000 # Layer occupancy (ticks)
667system.cpu.toL2Bus.reqLayer0.utilization 0.7 # Layer utilization (%)
668system.cpu.toL2Bus.respLayer0.occupancy 547500 # Layer occupancy (ticks)
669system.cpu.toL2Bus.respLayer0.utilization 1.5 # Layer utilization (%)
670system.cpu.toL2Bus.respLayer1.occupancy 253500 # Layer occupancy (ticks)
671system.cpu.toL2Bus.respLayer1.utilization 0.7 # Layer utilization (%)

--- 25 unchanged lines hidden ---
670system.cpu.toL2Bus.snoop_fanout::max_value 1 # Request fanout histogram
671system.cpu.toL2Bus.snoop_fanout::total 534 # Request fanout histogram
672system.cpu.toL2Bus.reqLayer0.occupancy 267000 # Layer occupancy (ticks)
673system.cpu.toL2Bus.reqLayer0.utilization 0.7 # Layer utilization (%)
674system.cpu.toL2Bus.respLayer0.occupancy 547500 # Layer occupancy (ticks)
675system.cpu.toL2Bus.respLayer0.utilization 1.5 # Layer utilization (%)
676system.cpu.toL2Bus.respLayer1.occupancy 253500 # Layer occupancy (ticks)
677system.cpu.toL2Bus.respLayer1.utilization 0.7 # Layer utilization (%)

--- 25 unchanged lines hidden ---